Method, apparatus, device and storage medium for digitizing flicker pulses

Abstract

This application discloses a method, apparatus, device, and storage medium for digitizing flicker pulses. The digitization method includes: presetting at least two thresholds; synchronously and in parallel comparing a flicker pulse to be processed with the at least two thresholds to determine at least two state change signals corresponding to the at least two thresholds when the flicker pulse to be processed crosses a threshold; performing delay processing on at least one of the state change signals to obtain at least two corresponding delayed state change signals; and using the same sampling module to sequentially sample the delayed state change signals to obtain the corresponding flicker pulse threshold-time pairs. This application can achieve the reuse of the sampling module while ensuring sampling accuracy, greatly saving logic resources.

Description

Technical Field

[0001] This application relates to the field of signal sampling, and in particular to a method, apparatus, device and storage medium for digitizing scintillation pulses. Background Technology

[0002] In a range of applications involving high-energy rays, such as positron emission tomography (PET) and radiation detection, high-energy rays, such as gamma rays, are converted into visible light signals by scintillation crystals. These visible light signals are further converted into scintillation pulse signals by photoelectric conversion devices. A series of application images can then be obtained by sampling and processing these scintillation pulse signals. In this process, the digitization quality of the scintillation pulses has a significant impact on the final image quality.

[0003] In recent years, with the development of digital signal processing technologies and methods, directly digitizing scintillation pulses and using software algorithms to replace traditional analog circuits for information extraction, such as particle energy deposition information, has great development potential. Compared with traditional equal-time-interval sampling methods, the multi-voltage threshold sampling (MVT) method is a more promising digital processing method for scintillation pulses.

[0004] like Figure 1 As shown, in the MVT sampling method, the time information of the input flicker pulse waveform crossing a set threshold is usually obtained through TDC (Time-to-Digital Converter) technology, and then the waveform information of the flicker pulse is reconstructed based on the corresponding voltage-time pair information. In most cases, multiple voltage thresholds are set, such as four voltage thresholds, and each voltage threshold corresponds to one channel for subsequent time measurement. The flicker pulse signal is input to the LVDS comparator through one pin of each LVDS (Low-Voltage Differential Signaling) comparator. The preset voltage threshold is input to the LVDS comparator through DAC (Digital-to-Analog Converter). One TDC in each channel is used to convert the time of the flicker pulse crossing the corresponding threshold, and the other TDC is used to convert the time of the flicker pulse below the threshold, thereby obtaining a series of voltage-time pair information.

[0005] In the above structure, TDC is typically implemented using the carry chain within the FPGA, which consumes a certain amount of logic resources within the FPGA. A single FPGA chip usually cannot meet the pin or logic resource requirements. Therefore, there is a need to develop a method or device with lower resource consumption to further improve performance and overcome the dependence on high-speed processing resources in existing technologies. Summary of the Invention

[0006] The technical problem to be solved by the embodiments of this application is how to reduce the resource consumption of time-based digital sampling of flash pulses and improve sampling performance.

[0007] To address the aforementioned problems, this application discloses a method, apparatus, device, and storage medium for digitizing scintillation pulses.

[0008] According to a first aspect of this application, a method for digitizing a flicker pulse is provided. The digitization method includes: presetting at least two thresholds; synchronously and in parallel comparing a flicker pulse to be processed with the at least two thresholds to determine at least two state change signals corresponding to the at least two thresholds when the flicker pulse to be processed crosses the thresholds; performing delay processing on at least one of the state change signals to obtain at least two corresponding delayed state change signals; and using the same sampling module to sequentially perform time sampling on the delayed state change signals to obtain corresponding flicker pulse threshold-time pairs.

[0009] According to some embodiments of this application, the at least two thresholds are set using a digital-to-analog converter.

[0010] According to some embodiments of this application, the thresholds include voltage thresholds, current thresholds, energy thresholds, and sound intensity thresholds.

[0011] According to some embodiments of this application, the threshold value is set to not exceed the maximum amplitude of the flicker pulse to be processed.

[0012] According to some embodiments of this application, the number of thresholds is set to 2-4.

[0013] According to some embodiments of this application, synchronously comparing the flash pulse to be processed with the at least two thresholds includes: the comparison module compares the magnitude of the flash pulse to be processed with the thresholds respectively through multiple comparators arranged in parallel, and each comparator works independently.

[0014] According to some embodiments of this application, the state change signal includes a rising edge indicating that the flash pulse to be processed first crosses the threshold and a falling edge indicating that it crosses the threshold a second time.

[0015] According to some embodiments of this application, performing delay processing on at least one of the state change signals includes: adjusting the at least one state change signal based on a preset time difference so that the rising edge and falling edge of the state change signal are staggered, and the adjusted state change signal is the delayed state change signal.

[0016] According to some embodiments of this application, the time difference is set such that the time interval between the rising and falling edges of the adjusted state change signal is not less than the minimum identification unit of the sampling module.

[0017] According to some embodiments of this application, the step of sequentially sampling the delayed state change signal includes: performing first time sampling on the time corresponding to the rising edge of the delayed state change signal in a first order; and performing second time sampling on the time corresponding to the falling edge of the delayed state change signal in a second order.

[0018] According to some embodiments of this application, the first order is an arrangement order determined from smallest to largest based on the at least two thresholds; the second order is an arrangement order determined from largest to smallest based on the at least two thresholds.

[0019] According to some embodiments of this application, after performing first time sampling on the rising edge of the delayed state change signal in a first order, the digitization method further includes: determining whether the first time sampling is successful; if so, synchronously outputting a feedback signal and starting to switch to performing second time sampling on the falling edge of the delayed state change signal in a second order; if not, re-performing the first time sampling.

[0020] According to some embodiments of this application, the sampling module is implemented by a circuit including a signal path controller and a time-to-digital converter. The signal path controller sequentially selects and controls the delay state change signal, and the time-to-digital converter implements the time sampling.

[0021] According to some embodiments of this application, the flicker pulse threshold-time pair includes the delay state change time obtained by time sampling of the delay state change signal and the threshold corresponding to the delay state change time.

[0022] According to some embodiments of this application, the digitization method further includes: for each state change signal, adjusting the delayed state change time to a target state change time based on the preset time difference; specifying the target state change time and the threshold corresponding to the state change signal to form a flashing pulse threshold-target time pair.

[0023] According to a second aspect of this application, a method for digitizing a flicker pulse is provided. The digitization method includes: presetting at least two thresholds; synchronously and in parallel comparing a flicker pulse to be processed with the at least two thresholds to determine at least two state change signals corresponding to the thresholds when the flicker pulse to be processed crosses the thresholds; and using the same sampling module to sequentially perform time sampling on the at least two state change signals to obtain at least two sets of corresponding flicker pulse threshold-time pairs.

[0024] According to some embodiments of this application, the at least two thresholds are set using a digital-to-analog converter.

[0025] According to some embodiments of this application, the thresholds include voltage thresholds, current thresholds, energy thresholds, and sound intensity thresholds.

[0026] According to some embodiments of this application, the threshold value is set to not exceed the maximum amplitude of the flicker pulse to be processed.

[0027] According to some embodiments of this application, the number of thresholds is set to 2-4.

[0028] According to some embodiments of this application, synchronously comparing the flash pulse to be processed with the at least two thresholds includes: the comparison module compares the magnitude of the flash pulse to be processed with the thresholds respectively through a plurality of comparators arranged in parallel, and each comparator works independently.

[0029] According to some embodiments of this application, the state change signal includes a rising edge indicating that the flash pulse to be processed first crosses the threshold and a falling edge indicating that it crosses the threshold a second time.

[0030] According to some embodiments of this application, the step of sequentially sampling the delayed state change signal includes: performing first time sampling on the rising edge of the state change signal in a first order; and performing second time sampling on the falling edge of the state change signal in a second order.

[0031] According to some embodiments of this application, the first order is an arrangement order determined from smallest to largest based on one or more thresholds; the second order is an arrangement order determined from largest to smallest based on one or more thresholds.

[0032] According to some embodiments of this application, after performing first time sampling on the rising edges of the state change signals in a first order, the digitization method further includes: determining whether the first time sampling is successful; if so, synchronously outputting a feedback signal and starting to switch to performing second time sampling on the falling edges of the state change signals in a second order; if not, re-performing the first time sampling.

[0033] According to some embodiments of this application, the sampling module is implemented by a circuit including a signal path controller and a time-to-digital converter. The signal path controller sequentially selects and controls the state change signals, and the time-to-digital converter implements the time sampling.

[0034] According to some embodiments of this application, the flicker pulse threshold-time pair includes the state change time obtained by time sampling of the state change signal and the threshold corresponding to the state change time.

[0035] According to a third aspect of this application, a method for digitizing a flicker pulse is provided. The digitization method includes: presetting at least two thresholds; performing delay processing on a flicker pulse signal input from at least one of the channels; synchronously and in parallel comparing the flicker pulse after delay processing with the at least two thresholds in each channel, and determining at least two state change signals corresponding to the at least two thresholds when the flicker pulse crosses the threshold; and sequentially sampling the state change signals using the same sampling module to obtain corresponding flicker pulse threshold-time pairs.

[0036] According to a fourth aspect of this application, a digitization device for a flicker pulse is provided, the digitization device comprising: a first acquisition module for acquiring a flicker pulse to be processed and at least two preset thresholds; a first comparison module for synchronously and in parallel comparing the flicker pulse to be processed with the at least two thresholds, and determining at least two state change signals corresponding to the at least two thresholds respectively when the flicker pulse to be processed crosses the thresholds; a first delay module for performing delay processing on at least one of the state change signals to acquire at least two corresponding delayed state change signals; and a first sampling module for sequentially performing time sampling on the delayed state change signals to acquire corresponding flicker pulse threshold-time pairs.

[0037] According to some embodiments of this application, the first acquisition module includes a digital-to-analog converter, which is used to preset at least two of the thresholds.

[0038] According to some embodiments of this application, the first comparison module includes a plurality of comparators arranged in parallel, each of the comparators independently comparing the flashing pulse to be processed with one of the thresholds.

[0039] According to some embodiments of this application, the first delay module is used to: adjust the at least one state change signal based on a preset time difference so that the rising edge and falling edge of the state change signal are staggered, and the adjusted state change signal is the delayed state change signal.

[0040] According to some embodiments of this application, the first sampling module is used to: perform first time sampling on the rising edge of the delayed state change signal in a first order; and perform second time sampling on the falling edge of the delayed state change signal in a second order.

[0041] According to some embodiments of this application, the first order is an arrangement order determined from smallest to largest based on the at least two thresholds; the second order is an arrangement order determined from largest to smallest based on the at least two thresholds.

[0042] According to some embodiments of this application, the first sampling module is configured to: determine whether the first time sampling is successful; if so, synchronously output a feedback signal and start switching to perform second time sampling on the falling edge of the delayed state change signal in a second order; if not, re-execute the first time sampling.

[0043] According to some embodiments of this application, the first sampling module includes a signal path controller and a time-to-digital converter. The signal path controller sequentially selects and controls the delayed state change signal, and the time-to-digital converter implements the time sampling.

[0044] According to some embodiments of this application, the flicker pulse threshold-time pair includes the delay state change time obtained by time sampling of the delay state change signal and the threshold corresponding to the delay state change time.

[0045] According to some embodiments of this application, the system further includes a post-processing module, which is used to: for each state change signal, adjust the delayed state change time to a target state change time based on the preset time difference; and specify the target state change time and the threshold corresponding to the state change signal to form a flashing pulse threshold-target time pair.

[0046] According to a fifth aspect of this application, a digitization device for a flicker pulse is provided, the digitization device comprising: a second acquisition module for acquiring a flicker pulse to be processed and at least two preset thresholds; a second comparison module for synchronously and in parallel comparing the flicker pulse to be processed with the at least two thresholds, and determining at least two state change signals corresponding to the at least two thresholds respectively when the flicker pulse to be processed crosses the thresholds; and a second sampling module for sequentially performing time sampling on the state change signals to acquire corresponding flicker pulse threshold-time pairs.

[0047] According to some embodiments of this application, the second acquisition module includes a digital-to-analog converter, which is used to preset at least two of the thresholds.

[0048] According to some embodiments of this application, the second comparison module includes a plurality of comparators arranged in parallel, each of which independently compares the flash pulse to be processed with one of the thresholds.

[0049] According to some embodiments of this application, the second sampling module is used to: perform first time sampling on the rising edge of the state change signal in a first order; and perform second time sampling on the falling edge of the state change signal in a second order.

[0050] According to some embodiments of this application, the first order is an arrangement order determined from smallest to largest based on the at least two thresholds; the second order is an arrangement order determined from largest to smallest based on the at least two thresholds.

[0051] According to some embodiments of this application, the second sampling module is used to: determine whether the first time sampling is successful; if so, synchronously output a feedback signal and start switching to perform second time sampling on the falling edge of the state change signal in sequence based on a second order; if not, re-execute the first time sampling.

[0052] According to some embodiments of this application, the second sampling module includes a signal path controller and a time-to-digital converter. The signal path controller sequentially selects and controls the state change signals, and the time-to-digital converter implements the time sampling.

[0053] According to some embodiments of this application, the flicker pulse threshold-time pair includes the state change time obtained by time sampling of the state change signal and the threshold corresponding to the state change time.

[0054] According to a sixth aspect of this application, a digitization device for a flicker pulse is provided, the digitization device comprising: a third acquisition module for acquiring a flicker pulse to be processed and at least two preset thresholds; a third delay module for performing delay processing on the flicker pulse of at least one channel; a third comparison module for synchronously and in parallel comparing the flicker pulse processed by the delay module with the at least two thresholds, and determining at least two state change signals corresponding to the at least two thresholds respectively when the flicker pulse to be processed crosses the thresholds; and a third sampling module for sequentially performing time sampling on the state change signals to acquire corresponding flicker pulse threshold-time pairs.

[0055] According to a seventh aspect of this application, a digitizing device is provided, comprising: a digitizing device for flashing pulses as described in any of the preceding technical solutions.

[0056] According to the eighth aspect of this application, a digital device is provided, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the computer program, when executed by the processor, implements the steps of the method described in any of the preceding technical solutions.

[0057] According to a ninth aspect of this application, a computer-readable storage medium is provided, on which a computer program is stored, which, when executed by a processor, implements the steps of the method described in any of the preceding technical solutions.

[0058] The digitization method, apparatus, device, and storage medium for scintillation pulses disclosed in this application can reuse the time sampling module while ensuring sampling accuracy, greatly saving logic resources and effectively reducing energy consumption. Attached Figure Description

[0059] This application will be further described by way of exemplary embodiments, which will be described in detail with reference to the accompanying drawings. These embodiments are not limiting; in these embodiments, the same reference numerals denote the same structures, wherein:

[0060] Figure 1 This is an exemplary processing circuit diagram for multi-voltage threshold sampling according to the prior art;

[0061] Figure 2 This is an exemplary flowchart of a method for digitizing flashing pulses according to some embodiments of this application;

[0062] Figure 3 This is an exemplary flowchart illustrating the method for determining a delay state signal in a digitization of a flashing pulse according to some embodiments of this application;

[0063] Figure 4This is an exemplary flowchart of a time sampling method for digitizing flash pulses according to some embodiments of this application;

[0064] Figure 5 This is a schematic diagram illustrating an exemplary relationship between a threshold and a flickering pulse to be processed, according to some embodiments of this application;

[0065] Figure 6 This is an exemplary schematic diagram of state change signals according to some embodiments of this application;

[0066] Figure 7 This is an exemplary schematic diagram of a delayed state change signal according to some embodiments of this application;

[0067] Figure 8 This is an exemplary block diagram of a digitization device for flashing pulses according to some embodiments of this application;

[0068] Figure 9 This is an exemplary functional block diagram of a digitization device for flashing pulses according to some embodiments of this application;

[0069] Figure 10 This is a schematic diagram illustrating an exemplary relationship between a threshold and a flickering pulse to be processed, according to other embodiments of this application;

[0070] Figure 11 This is an exemplary flowchart of a method for digitizing flashing pulses according to other embodiments of this application;

[0071] Figure 12 It is based on Figure 11 An exemplary functional block diagram of the data processing system of the digitization device for the flicker pulse shown in the embodiment;

[0072] Figure 13 This is an exemplary flowchart of a method for digitizing flashing pulses according to other embodiments of this application;

[0073] Figure 14 It is based on Figure 13 An exemplary functional block diagram of the data processing system of the digitization device for the flicker pulse shown in the embodiment. Detailed Implementation

[0074] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0075] It should be noted that when a component is said to be "fixed to" another component, it can be directly fixed to the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.

[0076] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The terms “and / or” or “and / or” as used herein include any and all combinations of one or more of the associated listed items.

[0077] The following description, with reference to the accompanying drawings, illustrates some preferred embodiments of the present application. It should be noted that the following description is for illustrative purposes only and is not intended to limit the scope of protection of this application.

[0078] Figure 2 This is an exemplary flowchart illustrating flicker pulse sampling according to some embodiments of this application. In some embodiments, the flicker pulse digitization method 200 can be executed by a data processing system 800. For example, the flicker pulse digitization method 200 can be stored in a storage device (such as the built-in storage unit of the data processing system 800 or an external storage device) in the form of a program or instructions, which, when executed, can implement the flicker pulse digitization method 200. Figure 2 As shown, the digitization method 200 for scintillation pulses may include the following steps.

[0079] Step 210: Obtain at least two preset thresholds.

[0080] In some embodiments, the at least two thresholds can be used to compare with the amplitude of the flicker pulse to be processed. The comparison results can be used for time sampling to determine the time points when the amplitude of the flicker pulse to be processed exceeds the thresholds. These time points, after being matched with the corresponding thresholds, can be used for waveform restoration in subsequent processing (e.g., image reconstruction), such as restoring the area of ​​the waveform, and thus obtaining the waveform energy value. In some embodiments, the values ​​of the thresholds are all within the amplitude of the flicker pulse to be processed. (Reference) Figure 5 , Figure 5This is a schematic diagram illustrating an exemplary relationship between threshold voltage and flicker pulse according to some embodiments of this application, where 510 represents a flicker pulse, which can be the flicker pulse to be processed mentioned in this application. The waveform of the flicker pulse in the figure shows the characteristics of a very short rise time, typically only a few nanoseconds, before reaching its highest point. The fall time is relatively long, generally around 200 nanoseconds. 510-1, 510-2, 510-3, and 510-4 represent four different threshold voltages. It can be seen that the magnitudes of all four threshold voltages are within the amplitude of the flicker pulse. For example, assuming the amplitude range of the flicker pulse to be processed is 3mV-220mV, the four threshold voltages can be 20mV, 40mV, 60mV, and 80mV, respectively.

[0081] In some embodiments, the scintillation pulse to be processed can be acquired by a detector, such as a PET detector, CT detector, neutron detector, or oil detector. These detectors typically include a scintillation crystal and a photoelectric conversion device coupled together. The scintillation crystal is used to convert detected high-energy rays (such as gamma rays, neutron rays, etc.) into visible light signals, and the photoelectric conversion device (e.g., a photomultiplier tube PMT, a silicon photomultiplier tube SiPM, etc.) is used to convert the visible light signals into electrical signals. The electrical signals are output in the form of scintillation pulse signals through electronic devices connected to the photoelectric conversion device. For example, the scintillation pulse to be processed can be acquired by communicating with the detector through an acquisition module (e.g., a first acquisition module 810).

[0082] In some embodiments, the scintillation pulse typically has a rising edge and a falling edge, and the rising edge and falling edge can be represented by a function model. For example, the scintillation pulse corresponding to a gamma photon typically exhibits a relatively fast rising edge and a relatively slow falling edge. The rising edge can be characterized by a linear function, and the falling edge can be characterized by an exponential function.

[0083] Those skilled in the art should understand that the pulse signal can be in the form of an electrical pulse signal, an acoustic pulse signal, a thermal pulse signal, or a pressure wave signal, etc. For example, when the pulse signal is an electrical pulse signal, its corresponding characteristics can be the voltage and current of the electrical pulse signal; when the pulse signal is an acoustic pulse signal, its corresponding characteristics can be the sound intensity of the acoustic pulse signal, and so on, which will not be elaborated here.

[0084] Those skilled in the art should understand that the flashing pulse signal in this application can be extended to a continuous signal. Generally, it is sufficient to regard the continuous signal as a pulse signal arranged according to a certain period. The pulse signal in this application is not intended to limit the sampling signal.

[0085] Those skilled in the art should understand that the threshold can take many forms. For example, when the pulse signal is an electrical pulse signal, the corresponding threshold can be a voltage threshold, a current threshold, or an energy threshold; when the pulse signal is an acoustic pulse signal, the corresponding threshold can be a sound intensity threshold, and so on. Further details will not be elaborated here.

[0086] In some embodiments, the threshold can be set by a digital-to-time converter (DAC). After setting, the acquisition module (e.g., the first acquisition module 810) can transmit the threshold to a comparator via the DAC for amplitude comparison.

[0087] Step 220: Simultaneously and in parallel compare the flash pulse to be processed with the at least two thresholds to determine the multiple state change signals corresponding to the at least two thresholds when the flash pulse to be processed crosses the threshold.

[0088] In some embodiments, synchronous parallel comparison refers to the simultaneous input of the flicker pulses to be processed into the comparison modules. The number of comparison modules corresponds to the number of thresholds. These comparison modules are configured in parallel. Each comparison module can compare the amplitude of the flicker pulse to be processed with a preset threshold. The comparison modules work independently of each other without interference. For example, four comparators correspond to four thresholds and are configured in parallel. The flicker pulses to be processed are input into the corresponding comparators through this parallel structure. Each comparator corresponds to a different threshold, and the amplitude of the received flicker pulse can be compared with the corresponding threshold value. After receiving the flicker pulse, the different comparison modules work synchronously and independently without interference. In some embodiments, these comparison modules can collectively constitute the first comparison module 820.

[0089] In some embodiments, the first comparison module 820 may be implemented by a circuit including a Low-Voltage Differential Signaling (LVDS) comparator. As an example, a scintillation pulse generated by the detector may be input to the p terminal (also known as the positive terminal) of the LVDS comparator pin, and a threshold may be input to the n terminal (also known as the negative terminal) of the LVDS comparator pin, thereby completing the comparison between the pulse waveform and the threshold.

[0090] In some embodiments, the first comparison module 820 may include a plurality of LVDS comparators. Each LVDS comparator can be used to compare the flicker pulse to be processed with a threshold. In this way, synchronous and parallel comparison of the flicker pulse to be processed with the plurality of thresholds can be achieved.

[0091] It is known that, regarding the threshold setting, the flicker pulse can typically cross the same threshold twice. Once during the rising phase of the flicker pulse, the amplitude of the flicker pulse rises from low to high, exceeding the threshold. Once during the falling phase of the flicker pulse, the amplitude of the flicker pulse falls from high to low, exceeding the threshold but falling below it. Regardless of which type of crossing occurs, the first comparison module 820 can generate a jump and record the time when the amplitude crosses the threshold. For example... Figure 5 The diagram illustrates the principle of multi-voltage threshold sampling. During the rising phase, the scintillation pulse 510 first crosses and exceeds the threshold voltage 510-1, then continues upward, crossing and exceeding the threshold voltage 510-2. Next, it crosses and exceeds the threshold voltages 510-3 and 510-4. During the falling phase, the scintillation pulse 510 first crosses and falls below the threshold voltage 510-4, then continues downward, crossing and falling below the threshold voltage 510-3. Next, it crosses and falls below the threshold voltages 510-2 and 510-1. Throughout the entire process, the scintillation pulse 510 can undergo eight state changes relative to the four threshold voltages.

[0092] Those skilled in the art should understand that when the threshold is set too high, such as above the maximum amplitude of the signal, the amplitude of the flashing pulse will never exceed the preset threshold, and therefore the comparison module will not change its state. When the threshold is set exactly equal to the maximum amplitude of the signal, the comparison module will only change its state once. Therefore, those skilled in the art can usually set the size and number of thresholds reasonably based on limited experiments to make the threshold intervals more reasonable. Typically, selecting 2-4 evenly spaced thresholds will result in information that is closer to the real state, accurately restoring the pulse shape while reducing the number of channels and improving data processing efficiency. This will not be elaborated further here.

[0093] Those skilled in the art should also understand that, in actual sampling, the pulse waveform is not as... Figure 5 Instead of the smoothness shown, there will be more fluctuations, which will actually manifest as... Figure 5 The waveform shown fluctuates upwards or downwards within a certain range. The actual waveform, after fitting, is as follows: Figure 5 As shown, in actual sampling, the waveform may cross the same threshold multiple times in a very short time during the rising or falling edge. In actual sampling, the average time of crossing the threshold multiple times within a certain time window or time period can be used as the time of crossing the threshold. This is something that can be easily implemented by those skilled in the art based on the teachings of this application, and will not be elaborated here.

[0094] In some embodiments, the first comparison module 820 can compare the flickering pulse to be processed with the threshold and output a state change signal. The state change signal can indicate the state change of the pulse to be processed relative to the threshold (e.g., from below the threshold to above and below the threshold, or from above the threshold to above and below the threshold). The time sampling mentioned later in this application can refer to measuring the time corresponding to the state transition. Reference Figure 6 , Figure 6 This is an exemplary schematic diagram of state change signals according to some embodiments of this application. State change signals 610-1, 610-2, 610-3, and 610-4 correspond to threshold voltages 510-1, 510-2, 510-3, and 510-4, respectively. Each state change signal includes a rising edge and a falling edge. For example, rising edges ①, ②, ③, and ④ correspond to the moments when the flash pulse to be processed crosses the threshold voltages 510-1, 510-2, 510-3, and 510-4 at the rising edge of the pulse, respectively; falling edges ⑤, ⑥, ⑦, and ⑧ correspond to the moments when the flash pulse to be processed crosses the threshold voltages 510-4, 510-3, 510-2, and 510-1 at the falling edge of the pulse, respectively. Rising edges ①, ②, ③, and ④ indicate that the flash pulse to be processed crosses the threshold voltage from bottom to top and is above the threshold voltage; falling edges ⑤, ⑥, ⑦, and ⑧ indicate that the flash pulse to be processed crosses the threshold voltage from top to bottom and is below the threshold voltage. The times corresponding to the rising and falling edges can be the moments when the flash pulse crosses the threshold voltage. Those skilled in the art should understand that the above embodiments only use voltage thresholds and voltage state change signals as examples; the principles are generally applicable to other thresholds and state changes, and will not be elaborated further here.

[0095] Step 230: Perform delay processing on one or more state change signals to obtain one or more corresponding delayed state change signals.

[0096] Continue to return to the reference Figure 5 ,from Figure 5As can be seen, due to the characteristics of the scintillation pulse, the rising edges of the state change signals corresponding to each threshold voltage are very close, making the times corresponding to the positions of each rising edge very close as well. This is detrimental to subsequent data processing, such as image reconstruction based on the time sampling results of the scintillation pulse waveform. Therefore, the method disclosed in this application can perform delay processing on one or more state change signals, so that the positions of the rising edges of the state change signals corresponding to each threshold voltage are staggered. As an example, the time difference / time interval corresponding to each state change signal can be obtained through a delay module, and then this time difference / time interval can be superimposed on the state change signal, so that the positions of its rising and falling edges are simultaneously delayed, thereby achieving the purpose of staggering the state change signals. For a detailed description of obtaining the delayed state change signal, please refer to this application. Figure 3 The details of the description will not be repeated here.

[0097] In some embodiments, performing delay processing on the plurality of state change signals refers to delaying a portion of the state change signals. For example, delaying the remaining state change signals (excluding the first state change signal) or at least one of the remaining state change signals, so that the remaining state change signals or at least one of the remaining state change signals are staggered from the first state change signal. This staggering means that the rising or falling edge transition times of the state change signals are spaced apart, thus enabling them to be identified by the minimum identification unit of the time-to-digital converter. Preferably, after the delay processing, the time interval between the rising edges of adjacent state change signals and / or the time interval between the falling edges of adjacent state change signals is greater than the minimum identification unit of the time-to-digital converter. This minimum identification unit can have various sizes depending on the technology used. For example, according to current technology, a time interval greater than 10 ns is generally sufficient to meet the minimum identification unit requirements of existing time-to-digital converters. Those skilled in the art should understand that this minimum identification unit can be continuously reduced according to technological advancements. When given an actual time-to-digital converter product, its minimum identification unit is often known based on its manufacturing technology level.

[0098] Step 240: Sequentially sample the one or more state change signals and / or delayed state change signals to obtain one or more corresponding flashing pulse threshold-time pairs.

[0099] In some embodiments, the time sampling may be time digitization sampling of the rising and falling edges of the state change signal and / or the delayed state change signal. In this application, the terms "time sampling," "time digitization sampling," and "time measurement" are used interchangeably to refer to the operation of determining the time corresponding to the rising and falling edges of each state change signal and / or each delayed state change signal after delay processing.

[0100] The time sampling mentioned in the following parts of this application may refer to measuring the time corresponding to the state transition. (See reference) Figure 6 as well as Figure 7 The rising edge ① and falling edge ⑧ of the state change signal 610-1 were not delayed. After step S240, they themselves did not change, only their names changed. That is, after step S240, the state change signal 610-1 became the delayed state change signal 710-1, while the state change signals 610-2, 610-3, and 610-4 were all delayed and became the delayed state change signals 710-2, 710-3, and 710-4, respectively. Therefore, time sampling refers to acquiring the times corresponding to the rising edges ①', ②', ③', ④' and falling edges ⑤', ⑥', ⑦', ⑧' of the delayed state change signals 710-1, 710-2, 710-3, and 710-4.

[0101] In some embodiments, the first sampling module 840 can sample the times corresponding to the rising and falling edges of the above-mentioned delayed state change signals according to a certain sampling order. In some embodiments, the first sampling module 840 can be implemented by a circuit including a signal route control (SRC) and a time-to-digital converter (TDC). The first sampling module 840 can use the TDC to sample the times corresponding to the rising or falling edges of the input delayed state change signals, and use the SRC to select and control the delayed state change signals input into the TDC. In some embodiments, the first sampling module 840 performs first time sampling on the times corresponding to the rising edges of one or more delayed state change signals in a first order, and performs second time sampling on the times corresponding to the falling edges of one or more delayed state change signals in a second order. For a detailed description of the time sampling of the delayed state change signals, please refer to this application. Figure 4 The details are omitted here.

[0102] In some embodiments, the flicker pulse threshold-time pair may include the delayed state change time obtained by time sampling the delayed state change signal and the amplitude of the threshold corresponding to the delayed state change signal. For example, for a certain threshold V1, a state change signal can be obtained by comparing it with the flicker pulse to be processed. The TDC can obtain two moments by measuring the time of the state change signal obtained after delay processing, including the moment T1 corresponding to the position of the rising edge and the moment T2 corresponding to the position of the falling edge. T1 and T2 may be referred to as the delayed state change time, and the flicker pulse threshold-time pair may include (V1, T1) and (V1, T2).

[0103] In some embodiments, the flicker pulse threshold-time pair can be post-processed by the data processing system 800 to obtain a flicker pulse threshold-target time pair. Continuing with the above example, it can be seen that the rising and falling edges of the delayed state change signals corresponding to T1 and T2 are delayed. Therefore, the delayed state change time can be adjusted to the target state change time based on a preset time difference. The target state change time can be the time corresponding to the rising and falling edges of the state change signal corresponding to the threshold, obtained by subtracting the preset time difference from the delayed state change time. As an example, assuming the preset time difference is ΔT and the delayed state change times are T1 and T2, the target state change times can be (T1-ΔT) and (T2-ΔT). The data processing system can also match the target state change time with the threshold corresponding to the state change signal to form a flicker pulse threshold-target time pair. For example, the flicker pulse threshold-target time pair can include (V, (T1-ΔT)) and (V, (T2-ΔT)).

[0104] In some embodiments, the scintillation pulse threshold-target time pair can be transmitted to other components for further processing. For example, the data processing system 800 can transmit the sampling results to an image processing component associated with the PET device via wired or wireless communication for subsequent PET image reconstruction.

[0105] It should be noted that the above-mentioned Figure 2 The descriptions of the various steps in this specification are for illustrative purposes only and do not limit the scope of this specification. Those skilled in the art can, under the guidance of this specification, [perform certain tasks / activities]. Figure 2 Various modifications and changes have been made to the steps described herein. However, these modifications and changes remain within the scope of this specification.

[0106] It is worth noting that in some extreme cases, such as single-pulse signal sampling or non-stacking pulse sampling, that is, when the time interval between pulses reaching the threshold can be identified by the time-to-digital conversion module, the delay step S230 can be omitted in the above steps and methods, and only the state change signal can be sampled. In this case, the number of thresholds can be arbitrary, such as one or more.

[0107] The scintillation pulse sampling method disclosed in this application enables the reuse of the time sampling module, greatly saving computational resources and effectively reducing energy consumption. Simultaneously, the saved resources can improve the accuracy of time sampling, thereby enhancing system performance.

[0108] Figure 3 This is an exemplary flowchart illustrating the determination of a delay state signal according to some embodiments of this application. Flow 300 may include the following operations.

[0109] Step 310: Obtain one or more preset time differences corresponding to the one or more state change signals.

[0110] In some embodiments, the state change signal includes a rising edge indicating that the flicker pulse to be processed has crossed the same threshold and a falling edge indicating that it has crossed the same threshold. For example, the flicker pulse to be processed crosses the threshold voltage from bottom to top and is above the threshold voltage, and crosses the threshold voltage from top to bottom and is below the threshold voltage. These state changes can be characterized by the rising and falling edges of the state change signal. The time corresponding to the position of the rising edge can be the time when the flicker pulse to be processed first crosses the corresponding threshold, and the time corresponding to the position of the falling edge can be the time when the flicker pulse to be processed crosses the threshold for the second time.

[0111] As explained above, the rising edges of the state change signals are very close and need to be staggered. The magnitude of the preset time difference indicates the degree of delay of each state change signal. Combined with... Figure 5 as well as Figure 6 For example, if a reference signal is needed, the state change signal corresponding to the threshold voltage first crossed by the flash pulse can be used without delay, which is the state change signal 610-1 corresponding to the threshold voltage 510-1. In this case, the preset time difference corresponding to the state change signal 610-1 can be 0. Other preset time differences can be determined by, for example, a simple proportional increase or a fixed value. For example, the preset time difference corresponding to the state change signal 610-2 can be ΔT, the preset time difference corresponding to the state change signal 610-3 can be 2ΔT, and the preset time difference corresponding to the state change signal 610-3 can be 3ΔT.

[0112] Step 320: Adjust at least one of the state change signals based on the preset time difference.

[0113] In some embodiments, the preset time difference can correspond to a time delay length. A delay module can be used to shift the position of the state change signal backward to complete the delay operation. In this case, the rising and falling edges of the state change signal are simultaneously delayed. (Reference) Figure 6 Assuming the preset time difference for state change signal 610-1 is 0, the preset time difference for state change signal 610-2 is ΔT, the preset time difference for state change signal 610-3 is 2ΔT, and the preset time difference for state change signal 610-4 is 3ΔT, the positions of the rising edges (including rising edges ①, ②, ③, and ④) and falling edges (including falling edges ⑤, ⑥, ⑦, and ⑧) of each state change signal can be shifted forward by the length corresponding to the preset time difference using a delay module. The positions of the rising and falling edges of state change signal 610-1 remain unchanged. The positions of the rising and falling edges of state change signal 610-2 are shifted forward by the displacement length corresponding to ΔT, the positions of the rising and falling edges of state change signal 610-3 are shifted forward by the displacement length corresponding to 2ΔT, and the positions of the rising and falling edges of state change signal 610-4 are shifted forward by the displacement length corresponding to 3ΔT. After completion, the rising and falling edges of each state change signal will be staggered.

[0114] Step 330: The adjusted state change signal is determined as the delayed state change signal.

[0115] refer to Figure 6 and Figure 7 , Figure 7This is an exemplary schematic diagram of a delayed state change signal according to some embodiments of this application. The positions of the rising edge ① and falling edge ⑧ of state change signal 610-1 remain unchanged after delay processing, and the obtained result is delayed state change signal 710-1. The positions of the rising edge ①' and falling edge ⑧' of delayed state change signal 710-1 are the same as the positions of the rising edge ① and falling edge ⑧ of state change signal 610-1. The positions of the rising edge ② and falling edge ⑦ of state change signal 610-2 are shifted by ΔT, and the obtained result is delayed state change signal 710-2. The positions of the rising edge ②' and falling edge ⑦' of delayed state change signal 710-2 are shifted by ΔT compared to the rising edge ② and falling edge ⑦ of state change signal 610-2. The positions of the rising edge ③ and falling edge ⑥ of state change signal 610-3 are shifted by 2ΔT, and the obtained result is delayed state change signal 710-3. The positions of the rising edge ③' and falling edge ⑥' of the delayed state change signal 710-3 are shifted by 2ΔT compared to the rising edge ③ and falling edge ⑥ of the state change signal 610-3. The positions of the rising edge ④ and falling edge ⑤ of the state change signal 610-4 are shifted by 3ΔT, resulting in the delayed state change signal 710-4. The positions of the rising edge ④' and falling edge ⑤' of the delayed state change signal 710-4 are shifted by 3ΔT compared to the rising edge ④ and falling edge ⑤ of the state change signal 610-4.

[0116] In some embodiments, after the delay processing, the rising and falling edges of each delayed state change signal are not close. That is, the positions of the rising edges of the one or more delayed state change signals are not the same, and the positions of the falling edges are not the same. Thus, the times corresponding to the positions of each rising edge are not close, and the times corresponding to the positions of each falling edge are not close either.

[0117] It should be noted that the above-mentioned Figure 3 The descriptions of the various steps in this specification are for illustrative purposes only and do not limit the scope of this specification. Those skilled in the art can, under the guidance of this specification, [perform certain tasks / activities]. Figure 2 Various modifications and changes have been made to the steps described herein. However, these modifications and changes remain within the scope of this specification.

[0118] Figure 4 This is an exemplary flowchart illustrating the time sampling of a delayed state change signal according to some embodiments of this application. Figure 4 As shown, process 400 may include the following operations.

[0119] Step 410: Perform first time sampling on the rising edges of multiple delayed state change signals in sequence based on the first order.

[0120] In some embodiments, the first order may be an arrangement order determined from smallest to largest based on the magnitude of one or more thresholds. The first sampling module 840 may first perform a first-time sampling at the rising edge of the delayed state change signal corresponding to the threshold at the first position in the order. For example, referring to... Figure 5 and Figure 7 Of the four threshold voltages, the first one, arranged in ascending order, is threshold voltage 510-1, which corresponds to the delay state change signal 710-1. Each delay state change signal, after being output from the delay module, is input to the SRC of the first sampling module 840. The SRC can selectively output the delay state change signal to the TDC for time sampling. In step 410, the SRC first outputs the delay state change signal 710-1 to the TDC. The TDC can perform time sampling at the time corresponding to the rising edge ①' of the delay state change signal 710-1. Then, the SRC sequentially selects delay state signals 710-2, 710-3, and 710-4 in a first order and performs time sampling at the times corresponding to their rising edges ②', ③', and ④', thereby completing the first time sampling.

[0121] Step 420: Determine whether the first time sampling was successful.

[0122] In some embodiments, when the TDC of the first sampling module 840 performs time sampling on the delayed state change signal, it can simultaneously output feedback. The feedback may include one or more combinations of numbers, letters, symbols, etc. For example, the feedback may be 1 or 0. 1 indicates that the flash pulse crosses and exceeds a threshold, and 0 indicates that the flash pulse crosses and falls below the threshold voltage. Thus, when time sampling is performed on the moment corresponding to the rising edge of the delayed state change signal, if the output feedback is 1, it indicates that the sampling was successful. Conversely, if the output feedback is 0, it indicates that the sampling failed. When the first time sampling is successful, process 400 can proceed to step 430. Otherwise, process 400 will return to step 410 to re-perform the first time sampling on the moments corresponding to the rising edges of multiple delayed state change signals in a first order.

[0123] Step 430: Perform second time sampling on the falling edge of one or more delayed state change signals in sequence based on the second order.

[0124] In some embodiments, after the first time sampling is successful, the first sampling module 840 can sequentially perform second time sampling on the times corresponding to the falling edges of one or more delayed state change signals. In some embodiments, the second order can be an arrangement order determined from largest to smallest based on the amplitude of one or more thresholds. For example, continue to refer to Figure 5 and Figure 7Of the four threshold voltages, the largest threshold voltage, 510-4, arranged in ascending order, corresponds to the delayed state change signal 710-4. After completing the first time sampling, the first sampling module 840 can start the second time sampling based on the delayed state change signal 710-4, that is, the TDC continues to collect the time corresponding to the falling edge ⑤' of the state change signal 710-4. After successful sampling of the delayed state change signal 710-4, the SRC then sequentially selects the delayed state signals 710-3, 710-2, and 710-1 in descending order and samples the times corresponding to their falling edges ⑥', ⑦', and ⑧', thereby completing the second time sampling, and process 400 can end.

[0125] It should be noted that the above-mentioned Figure 4 The descriptions of the various steps in this specification are for illustrative purposes only and do not limit the scope of this specification. Those skilled in the art can, under the guidance of this specification, [perform certain tasks / activities]. Figure 4 Various modifications and changes have been made to the steps described herein. However, these modifications and changes remain within the scope of this specification.

[0126] Figure 8 This is an exemplary block diagram of a data processing system according to some embodiments of this specification. This data processing system can achieve high-performance sampling of scintillation pulses. Figure 8 As shown, the data processing system 800 may include a first acquisition module 810, a first comparison module 820, a first delay module 830, and a first sampling module 840.

[0127] The first acquisition module 810 can be used to acquire the scintillation pulse to be processed and one or more threshold voltages as described in step S210 above. The scintillation pulse to be processed can be acquired by a detector, such as a PET detector, CT detector, neutron detector, or oil detector. These detectors typically include mutually coupled scintillation crystals and photoelectric conversion devices. The scintillation crystal converts detected high-energy rays (such as gamma rays, neutron rays, etc.) into visible light signals, and the photoelectric conversion device (e.g., a photomultiplier tube PMT, a silicon photomultiplier tube SiPM, etc.) converts the visible light signals into electrical signals. These electrical signals are output as scintillation pulse signals through electronic devices connected to the photoelectric conversion device. The first acquisition module 810 can acquire the scintillation pulse to be processed by communicating with the detector. The first comparison module 820 can be used to synchronously and in parallel compare the scintillation pulse to be processed with one or more thresholds as described in step S220 above, and generate one or more state change signals corresponding to the one or more thresholds when the scintillation pulse to be processed crosses the threshold. The first comparison module 820 can be implemented by circuitry including a Low-Voltage Differential Signaling (LVDS) comparator. The first comparison module 820 may include one or more LVDS comparators. Each LVDS comparator can be used to compare the flicker pulse to be processed with a threshold. Thus, synchronous parallel comparison of the flicker pulse to be processed with the one or more thresholds can be achieved. After comparing the flicker pulse to be processed with the threshold, the first comparison module 820 outputs a state change signal. The state change signal can indicate the state change of the flicker pulse to be processed relative to the threshold. The state change signal includes a rising edge indicating the flicker pulse to be processed first crossing the threshold and a falling edge indicating the flicker pulse crossing the threshold a second time.

[0128] In some embodiments, the first comparison module 820 may be implemented by a circuit including a Low-Voltage Differential Signaling (LVDS) comparator. As an example, a scintillation pulse generated by a photodetector may be input to the LVDS pin p (also known as the positive terminal), and a threshold voltage may be input to the LVDS pin n (also known as the negative terminal), thereby completing the comparison between the pulse waveform and the threshold voltage.

[0129] In some embodiments, the first comparison module 820 may include one or more LVDS comparators. Each LVDS comparator can be used to compare the scintillation pulse to be processed with a threshold voltage. In this way, synchronous parallel comparison of the scintillation pulse to be processed with the one or more threshold voltages can be achieved.

[0130] It is known that for a given threshold, the flicker pulse can cross the threshold twice. Once is during the rising phase of the flicker pulse, where the flicker pulse can cross the threshold and exceed it. The other time is during the falling phase of the flicker pulse, where the flicker pulse can cross the threshold and fall below it.

[0131] In some embodiments, when the flashing pulse signal is an electrical signal, the first comparison module 820 can output a state change signal after comparing the flashing pulse to be processed with the threshold voltage. The state change signal can indicate the state change of the pulse to be processed relative to the threshold voltage (e.g., from below the threshold voltage to above and above the threshold voltage, or from above the threshold voltage to above and below the threshold voltage).

[0132] The first delay module 830 can perform delay processing on the one or more state change signals as described in step S230 to obtain one or more corresponding delayed state change signals. The first delay module 830 can obtain the time difference corresponding to each state change signal, and then superimpose the time difference onto the state change signal, simultaneously delaying the positions of its rising and falling edges, thereby achieving the purpose of staggering the rising edges of each state change signal. In some embodiments, the first delay module 830 can obtain one or more preset time differences / time intervals corresponding to the one or more state change signals. For any state change signal, the first delay module 830 can adjust the positions of the rising and falling edges of the state change signal based on the preset time difference / time interval, and designate the adjusted state change signal as the delayed state change signal.

[0133] In some embodiments, the first delay module 830 may delay one, a portion or all of the state change signals. For example, it may delay the remaining state change signals other than the first state change signal or at least one of the remaining state change signals so that the remaining state change signals or at least one of the remaining state change signals are staggered from the first state change signal.

[0134] The first sampling module 840 can perform time sampling on one or more state change signals and / or delayed state change signals according to a certain sampling order to obtain one or more corresponding flashing pulse threshold-time pairs. The first sampling module 840 can be implemented by a circuit including a signal route control (SRC) and a time-to-digital converter (TDC). The first sampling module 840 can use the TDC to sample the time corresponding to the rising or falling edge of the input delayed state change signal, and use the SRC to select and control the delayed state change signal input to the TDC. In some embodiments, the first sampling module 840 can perform first time sampling on the time corresponding to the rising edge of one or more delayed state change signals according to a first order, and perform second time sampling on the time corresponding to the falling edge of one or more delayed state change signals according to a second order. The first order is an arrangement order determined by sorting the amplitudes of one or more thresholds from smallest to largest. If the first sampling is successful, the first sampling module 840 can perform second sampling on the delayed state change signals corresponding to the remaining thresholds according to the second order, until the delayed state change signal corresponding to the last threshold in the second order has completed the second sampling. If unsuccessful, the second sampling is re-executed. The second order is an arrangement order determined by sorting the amplitudes of one or more thresholds from largest to smallest. The first sampling module 840 can perform second sampling on the falling edge of the delayed state change signal corresponding to the first threshold voltage in the second order. If the second sampling is successful, the first sampling module 840 can perform the above operation on the delayed state change signals corresponding to the remaining thresholds according to the second order, until the second sampling is completed on the falling edge of the delayed state change signal corresponding to the last threshold in the second order. If unsuccessful, the second sampling is re-executed. In some embodiments, the first sampling module 840 can first obtain sampling feedback from performing first sampling on the rising edge of one or more delayed state change signals according to the first order. If it is determined that the sampling feedback indicates that the first time sampling was successful, then the second time sampling continues to be performed on the falling edge of one or more delayed state change signals in the second order.

[0135] In some embodiments, the data processing system 800 may further include a post-processing module. For each state change signal, the post-processing module may adjust the delayed state change time to a target state change time based on the preset time difference, and specify the target state change time and the threshold corresponding to the state change signal to form a flashing pulse threshold-target time pair. In some embodiments, the data processing system 800 (e.g., the post-processing module) Figure 8 (Not shown in the image) The flicker pulse threshold-time pair can be post-processed to obtain a flicker pulse threshold-target time pair. Continuing with the example above, it can be seen that the rising and falling edges of the delayed state change signals corresponding to T1 and T2 are delayed. Therefore, the post-processing module can adjust the delayed state change time to the target state change time based on the preset time difference. The target state change time can be the time corresponding to the rising and falling edges of the state change signal corresponding to the threshold, obtained by subtracting the preset time difference from the delayed state change time. As an example, assuming the preset time difference is ΔT and the delayed state change times are T1 and T2, the target state times can be (T1-ΔT) and (T2-ΔT). The post-processing module can also specify the target state change time and the threshold corresponding to the state change signal to form a flicker pulse threshold-target time pair. For example, the flicker pulse voltage-target time pair can include (V, (T1-ΔT)) and (V, (T2-ΔT)).

[0136] In some embodiments, the data processing system 800 can also be used to execute the process 300 described above. For example, the process 300 can be stored in a storage device (such as the built-in storage unit of the data processing system 800 or an external storage device) in the form of a program or instructions, which can implement the process 300 when executed. In some embodiments, the process 300 can be executed by a delay module.

[0137] In some embodiments, the data processing system 800 can also be used to execute the process 400 described above. For example, the process 400 can be stored in a storage device (such as the built-in storage unit of the data processing system 800 or an external storage device) in the form of a program or instructions, which can implement the process 400 when executed. In some embodiments, the process 400 can be executed by the first sampling module 840.

[0138] It is worth noting that in certain special cases, such as single-pulse signal sampling or non-stacking pulse sampling, that is, when the time interval between the rising edges of the pulse state change signal can be recognized by the time-to-digital converter module, the first delay module 830 can be omitted in the above data processing system, and only the state change signal needs to be sampled. Similarly, compared to existing technologies, this reduces the number of time-to-digital converters while achieving accurate pulse sampling, thus improving resource utilization efficiency. Accordingly, the threshold settings, signal channel settings, and sampling module settings can be modified according to the above embodiments, and will not be elaborated further here.

[0139] For further descriptions of the above modules, please refer to other parts of this application, for example, Figures 2-7 .

[0140] It should be understood that Figure 8 The systems and modules shown can be implemented in various ways. For example, in some embodiments, the systems and modules can be implemented in hardware, software, or a combination of both. The hardware portion can be implemented using dedicated logic; the software portion can be stored in memory and executed by an appropriate instruction execution system, such as a microprocessor or dedicated hardware. Those skilled in the art will understand that the methods and systems described above can be implemented using computer-executable instructions and / or included in processor control code, for example, on a carrier medium such as a disk, CD, or DVD-ROM, a programmable memory such as read-only memory (firmware), or a data carrier such as an optical or electronic signal carrier. The systems and modules of this specification can be implemented not only with hardware circuits such as very large-scale integrated circuits or gate arrays, semiconductors such as logic chips, transistors, or programmable hardware devices such as field-programmable gate arrays, programmable logic devices, etc., but also with software, for example, executed by various types of processors, or with a combination of the aforementioned hardware circuits and software (e.g., firmware).

[0141] It should be noted that the above description of the modules is for convenience only and should not be construed as limiting this specification to the embodiments described. It is understood that those skilled in the art, after understanding the principles of the system, may arbitrarily combine the modules or construct subsystems connected to other modules without departing from these principles. For example, modules may share a single storage module, or each module may have its own separate storage module. Such modifications are all within the scope of this specification.

[0142] Figure 9This is an exemplary functional block diagram of a data processing system according to some embodiments of this specification. This data processing system can be implemented based on a Field Programmable Gate Array (FPGA) chip. Figure 9 As shown, Sp can be the input flicker pulse to be processed, and TV1, TV2, TV3, and TV4 can be different thresholds. C can be an LVDS comparator. Sp is input to four LVDS comparators C1, C2, C3, and C4 respectively, and four different thresholds are also input to the above LVDS comparators. C1, C2, C3, and C4 can compare the threshold with the flicker pulse to be processed. In this application, the first comparison module 820 can be implemented by C. C can output a comparison result. The comparison result can be a state change signal. The comparison result output by C can be input to D. D is a delay unit, including D1, D2, D3, and D4. Each delay unit can delay the state change signal input from C1, C2, C3, and C4. In this application, the delay module can be implemented by D. D can output a delayed state change signal. All delayed state change signals will be input to SRC. SRC can be a signal channel controller, which can selectively control the delayed state change signal input to TDC (Time-to-Digital Converter). The time-delayed state change signal can be measured by the time-delayed sampling converter. In this application, the first sampling module 840 can be implemented by the sampling control unit (SRC) and the time-delayed sampling converter (TDC).

[0143] It is worth noting that, Figure 9 The embodiments shown are illustrated using only four thresholds as examples. However, those skilled in the art should understand that the number of thresholds, comparators, delay units, and the number of channels corresponding to the comparators and delay units can be increased or decreased according to actual circumstances, and this does not constitute a limitation.

[0144] Meanwhile, in certain special cases, such as single-pulse signal sampling or non-stacking pulse sampling—that is, when the time interval between pulses reaching a threshold can be recognized by the time-to-digital converter—the aforementioned data processing system can omit the delay unit and only sample the state change signal. This also allows for more accurate pulse sampling compared to existing technologies. For example, Figure 10 This is a schematic diagram illustrating an exemplary relationship between a threshold voltage and a flicker pulse to be processed, according to other embodiments of this application. Figure 10It can be seen that when the waveform of the flicker pulse 10 is a triangular wave, a sine wave, or other shapes, the time intervals between sampling points A, B, C, D, E, F, G, and H that reach the thresholds 10⁻¹, 10⁻², 10⁻³, and 10⁻⁴ do not overlap and can be recognized by the time-to-digital converter. For sampling such flicker pulses, it is not necessary to perform delay processing on a portion of the state change signal. For example, Figure 11 This is an exemplary flowchart of scintillation pulse sampling according to some other embodiments of this application. In this case, the scintillation pulse digitization method 110 of this application may include the following steps:

[0145] Step 111: Preset at least two thresholds;

[0146] Step 113: Synchronously and in parallel compare the flash pulse to be processed with the at least two thresholds to determine at least two state change signals corresponding to the thresholds when the flash pulse to be processed crosses the thresholds;

[0147] Step 115: Use the same sampling module or the same channel to sequentially sample the at least two state change signals to obtain at least two sets of corresponding flicker pulse threshold-time pairs.

[0148] Correspondingly, the delay unit can be omitted in the data processing system, and only the state change signal needs to be sampled. For example, Figure 12 This is an exemplary functional block diagram of a data processing system for scintillation pulse sampling according to other embodiments of this application. Compared to data processing system 800, this data processing system may include a second acquisition module, a second comparison module, and a second sampling module. The second acquisition module may be used to preset at least two thresholds as described in step 111 above. The second comparison module may be used to synchronously and in parallel compare the scintillation pulse to be processed with the at least two thresholds as described in step 113 above, and determine at least two state change signals corresponding to the thresholds when the scintillation pulse to be processed crosses the thresholds. The second sampling module may be used to sequentially perform time sampling on the at least two state change signals using the same sampling module or the same channel as described in step 115 above, to obtain at least two sets of corresponding scintillation pulse threshold-time pairs. In some embodiments, the second acquisition module, the second comparison module, and the second sampling module may respectively perform the same and / or similar operation steps as the first acquisition module 810, the first comparison module 820, and the first sampling module 840. Figure 12In this process, the flicker pulse Sp to be processed is input to four LVDS comparators C1, C2, C3, and C4, respectively, while four different threshold values ​​are also input to these LVDS comparators. C1, C2, C3, and C4 can compare the threshold values ​​with the flicker pulse to be processed. Since the time intervals between sampling points do not overlap, the comparator module C can directly output the state change signal to the signal channel controller SRC. The SRC can selectively control the state change signal input to the TDC (Time-to-Digital Converter). The TDC can directly measure the time of the input delayed state change signal.

[0149] In the embodiments of the above-described digitization method and data processing system, the implementation of other steps and modules can be referred to the embodiments with delay modules described above, and will not be repeated here.

[0150] The methods disclosed in some of the above embodiments of this application can perform delay processing on one or more state change signals, so that the rising edges of the state change signals corresponding to each threshold voltage are staggered. By using the above technical means to stagger the time points corresponding to each threshold voltage before TDC sampling, the purpose is to facilitate accurate sampling by the cooperation of TDC and SRC. To further stagger the arrival times of the signals at each threshold, according to other embodiments of this application, such as... Figure 13 As shown, at least a portion of the signal can be delayed before comparison at the signal input TDC, for example... Figure 13 The method for digitizing scintillation pulses provided in the embodiments may include the following steps:

[0151] Step 131: Preset at least two threshold values;

[0152] Step 132: Perform a delay process on the flash pulse signal to be processed input in at least one channel, so that the delayed flash pulse signal is staggered from the flash pulse signals to be processed input in other channels;

[0153] Step 133: Each channel synchronously and in parallel compares the delayed flash pulse to be processed with the at least two thresholds to determine at least two state change signals corresponding to the threshold when the flash pulse to be processed crosses the threshold.

[0154] Step 135: Use the same sampling module or the same channel to sequentially sample the at least two state change signals to obtain at least two sets of corresponding flicker pulse threshold-time pairs.

[0155] In this embodiment, the implementation of the same or similar technical means and features in each step can refer to the descriptions in the above embodiments or be adapted accordingly. For example, when the flicker pulse signal to be processed is first delayed and then compared with the threshold, the time corresponding to the sampled state change signal should be reduced by the delay duration to obtain the accurate time point corresponding to each threshold of the flicker pulse to be processed. This is something that those skilled in the art can easily implement based on the descriptions in the above embodiments, and will not be elaborated further here. In this embodiment, by performing a delay before comparison, the change time corresponding to the state change signal can also be staggered to facilitate sampling.

[0156] Correspondingly, Figure 14 It is based on Figure 13 The exemplary functional block diagram of the data processing system for scintillation pulse sampling shown in the embodiment, compared to the data processing system 800, may include a third acquisition module, a third delay module, a third comparison module, and a third sampling module. The third acquisition module may be used to preset at least two thresholds as described in step 131 above. The third delay module may be used to perform delay processing on the scintillation pulse signal input in at least one channel as described in step 132 above, so that the delayed scintillation pulse signal is staggered from the scintillation pulse signals input in other channels. The third comparison module may be used to synchronously and parallelly compare the delayed scintillation pulse with the at least two thresholds as described in step 133 above, determining at least two state change signals corresponding to the threshold when the scintillation pulse crosses the threshold. The third sampling module may be used to sequentially sample the at least two state change signals using the same sampling module or the same channel as described in step 135 above, obtaining at least two sets of corresponding scintillation pulse threshold-time pairs. In some embodiments, the third acquisition module, the third delay module, the third comparison module, and the third sampling module may respectively perform the same and / or similar operation steps as the first acquisition module, the first delay module, the first comparison module, and the first sampling module. Figure 14In this process, four different threshold values ​​are input to comparators C1, C2, C3, and C4 in ascending order. The flicker pulse Sp to be processed is divided into four channels and input to four LVDS comparators C1, C2, C3, and C4 respectively. One channel of Sp is directly input to comparator C1, while the Sp values ​​of the other three channels are processed by delay units D2, D3, and D4 respectively before being input to comparators C2, C3, and C4. C1, C2, C3, and C4 can compare the threshold values ​​with the flicker pulse to be processed and can directly output state change signals to the signal channel controller SRC. The SRC can selectively control the state change signals input to the TDC (Time-to-Digital Converter), thereby staggering the time transition points of the various threshold values ​​corresponding to the state change signals. The TDC can directly measure the time of the input delayed state change signals.

[0157] In some embodiments, this application also provides a digitizing device, which may include the digitizing apparatus mentioned in the above embodiments. This digitizing device can be used to acquire corresponding scintillation pulse data and reconstruct images from it. In a specific example, the scintillation pulse digitizing apparatus provided in this application can be applied to positron emission tomography (PET). In a PET system, gamma photon data can be acquired using the scheme described in the embodiments of this application, followed by image reconstruction. In other specific examples of this application, the scintillation pulse digitizing method and apparatus, detector, electronic device, and storage medium provided in this application can be applied to various digitizing devices, such as CT equipment, MRI equipment, radiation detection equipment, oil exploration equipment, low-light detection equipment, SPET equipment, security inspection equipment, gamma cameras, X-ray equipment, DR equipment, and other devices utilizing the high-energy ray conversion principle, as well as other photoelectric conversion application devices, or a combination of the above-mentioned devices.

[0158] Although not shown, some embodiments also provide a computer-readable storage medium storing a computer program configured to be executed to perform the methods of any of the embodiments of this application. The computer program includes various program modules / units constituting the apparatus according to the embodiments of this application, and when executed, the computer program comprised of the various program modules / units can perform the functions corresponding to the various steps in the methods described in the above embodiments. The computer program can also run on electronic devices as described in the embodiments of this application.

[0159] The digitization method, apparatus, device, and storage medium for scintillation pulses disclosed in this application do not cause information loss, can reuse the time sampling module while ensuring sampling accuracy, greatly saves logic resources, and effectively reduces energy consumption.

[0160] The basic concepts have been described herein. It is obvious that the detailed disclosure above is merely illustrative and does not constitute a limitation of this specification. Although not explicitly stated herein, various modifications, improvements, and corrections may be made to this specification by those skilled in the art. Such modifications, improvements, and corrections are suggested in this specification and therefore remain within the spirit and scope of the exemplary embodiments described herein.

[0161] Furthermore, this specification uses specific terms to describe embodiments thereof. For example, "an embodiment," "one embodiment," and / or "some embodiments" refer to a particular feature, structure, or characteristic associated with at least one embodiment of this specification. Therefore, it should be emphasized and noted that references to "an embodiment," "one embodiment," or "an alternative embodiment" in different locations throughout this specification do not necessarily refer to the same embodiment. Moreover, certain features, structures, or characteristics in one or more embodiments of this specification can be appropriately combined.

[0162] Furthermore, those skilled in the art will understand that various aspects of this specification can be described and illustrated in several patentable ways or situations, including any new and useful combination of processes, machines, products, or substances, or any new and useful improvements thereof. Accordingly, various aspects of this specification can be implemented entirely by hardware, entirely by software (including firmware, resident software, microcode, etc.), or by a combination of hardware and software. All of the above hardware or software may be referred to as a “data block,” “module,” “engine,” “unit,” “component,” or “system.” Furthermore, various aspects of this specification may be represented as a computer product located on one or more computer-readable media, including computer-readable program code.

[0163] Computer storage media may contain a propagated data signal containing computer program code, for example, on baseband or as part of a carrier wave. This propagated signal may take various forms, including electromagnetic, optical, and suitable combinations thereof. Computer storage media can be any computer-readable medium other than a computer-readable storage medium, which can be connected to an instruction execution system, apparatus, or device to enable communication, propagation, or transmission of a program for use. The program code located on the computer storage medium can be propagated through any suitable medium, including radio, cable, fiber optic cable, RF, or similar media, or any combination of the above media.

[0164] The computer program code required for the operation of each part of this manual can be written in any one or more programming languages, including object-oriented programming languages ​​such as Java, Scala, Smalltalk, Eiffel, JADE, Emerald, C++, C#, VB.NET, Python, etc.; conventional procedural programming languages ​​such as C, Visual Basic, Fortran 3003, Perl, COBOL 3002, PHP, ABAP; dynamic programming languages ​​such as Python, Ruby, and Groovy; or other programming languages. This program code can run entirely on the user's computer, or as a standalone software package on the user's computer, or partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer can be connected to the user's computer through any network, such as a local area network (LAN) or wide area network (WAN), or connected to an external computer (e.g., via the Internet), or in a cloud computing environment, or used as a service such as Software as a Service (SaaS).

[0165] Furthermore, unless expressly stated in the claims, the order of processing elements and sequences, the use of numbers and letters, or other names described in this specification are not intended to limit the order of the processes and methods described herein. Although various examples have been discussed in the foregoing disclosure of some embodiments of the invention that are currently considered useful, it should be understood that such details are for illustrative purposes only, and the appended claims are not limited to the disclosed embodiments; rather, the claims are intended to cover all modifications and equivalent combinations that conform to the spirit and scope of the embodiments described herein. For example, while the system components described above can be implemented using hardware devices, they can also be implemented solely using software solutions, such as installing the described system on existing servers or mobile devices.

[0166] Similarly, it should be noted that, in order to simplify the description disclosed herein and thus aid in the understanding of one or more embodiments of the invention, the foregoing description of embodiments in this specification may sometimes combine multiple features into a single embodiment, drawing, or description thereof. However, this method of disclosure does not imply that the subject matter of this specification requires more features than those mentioned in the claims. In fact, the embodiments contain fewer features than all the features of a single embodiment disclosed above.

[0167] In some embodiments, numbers describing the quantity of components and attributes are used. It should be understood that such numbers used in the description of embodiments are modified in some examples with the terms "approximately," "approximately," or "generally." Unless otherwise stated, "approximately," "approximately," or "generally" indicates that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in the specification and claims are approximate values, which may be changed depending on the characteristics required by individual embodiments. In some embodiments, numerical parameters should take into account specified significant digits and employ a general method of digit reservation. Although the numerical ranges and parameters used to confirm their breadth of range in some embodiments of this specification are approximate values, in specific embodiments, such values ​​are set as precisely as feasible.

[0168] For each patent, patent application, patent application publication, and other material such as articles, books, specifications, publications, and documents referenced in this specification, the entire contents of which are incorporated herein by reference. This excludes historical application documents that are inconsistent with or conflict with the content of this specification, as well as documents that limit the broadest scope of the claims in this specification (currently or subsequently appended to this specification). It should be noted that in the event of any inconsistency or conflict between the descriptions, definitions, and / or terminology used in the supplementary materials to this specification and the content of this specification, the descriptions, definitions, and / or terminology used in this specification shall prevail.

[0169] Finally, it should be understood that the embodiments described in this specification are merely illustrative of the principles of the embodiments described herein. Other variations may also fall within the scope of this specification. Therefore, alternative configurations of the embodiments described herein are intended to be illustrative rather than limiting, and should be considered consistent with the teachings of this specification. Accordingly, the embodiments described herein are not limited to those explicitly introduced and described herein.

Claims

1. A method of digitizing a scintillation pulse, comprising: The digitalization method comprises: presetting at least two threshold values; synchronously and in parallel comparing a to-be-processed scintillation pulse with the at least two threshold values, determining at least two state change signals corresponding to the at least two threshold values respectively when the to-be-processed scintillation pulse crosses the threshold values; performing delay processing on at least one of the state change signals to obtain at least one delayed state change signal; sequentially performing time sampling on the delayed state change signals by using a same sampling module to obtain a scintillation pulse threshold-time pair corresponding to the delayed state change signals.

2. The method of digitizing a scintillation pulse according to claim 1, wherein, The at least two threshold values are set by a digital-to-analog converter.

3. The method of digitizing a scintillation pulse according to claim 1, wherein, The threshold values comprise voltage threshold values, current threshold values, energy threshold values and sound intensity threshold values.

4. The method of digitizing a scintillation pulse of claim 1, wherein, The sizes of the threshold values are set to be not more than the maximum amplitude of the to-be-processed scintillation pulse.

5. The method of digitizing a scintillation pulse of claim 1, wherein, The number of the threshold values is set to be 2-4.

6. The method of digitizing a scintillation pulse according to any one of claims 1 to 5, characterized in that, The synchronous and parallel comparison of the to-be-processed scintillation pulse with the at least two threshold values comprises: a comparison module compares the to-be-processed scintillation pulse with the sizes of the threshold values by using a plurality of comparators arranged in parallel, and each of the comparators works independently.

7. The method of digitizing a scintillating pulse of claim 1, wherein, The state change signals comprise a rising edge indicating that the to-be-processed scintillation pulse crosses the threshold values for the first time and a falling edge indicating that the to-be-processed scintillation pulse crosses the threshold values for the second time.

8. The method of digitizing a scintillating pulse of claim 1, wherein, The delay processing on at least one of the state change signals comprises: based on a preset time difference, adjusting the at least one state change signal to stagger the rising edge and the falling edge of the state change signal, and the adjusted state change signal is the delayed state change signal.

9. The method of digitizing a scintillation pulse according to claim 8, wherein, The time difference is set to be such that the time interval between the rising edge and the falling edge of the adjusted state change signal is not less than the minimum recognition unit of the sampling module.

10. The method of digitizing a scintillation pulse of claim 1 or 8, wherein, The sequential time sampling on the delayed state change signals comprises: based on a first sequence, sequentially performing first time sampling on the time corresponding to the rising edge of the delayed state change signal; based on a second sequence, sequentially performing second time sampling on the time corresponding to the falling edge of the delayed state change signal.

11. The method of digitizing a scintillation pulse according to claim 10, wherein, The first sequence is determined according to the at least two threshold values in ascending order, and the second sequence is determined according to the at least two threshold values in descending order.

12. The method of digitizing a scintillation pulse according to claim 11, wherein, After the first time sampling on the time corresponding to the rising edge of the delayed state change signal based on the first sequence, the digitalization method further comprises: determining whether the first time sampling is successful; if yes, synchronously outputting a feedback signal and starting to switch to perform the second time sampling on the time corresponding to the falling edge of the delayed state change signal based on the second sequence; if no, re-performing the first time sampling.

13. The method of digitizing a scintillating pulse of claim 1, wherein, The sampling module is implemented by a circuit comprising a signal path controller and a time-to-digital converter, the signal path controller sequentially controls the selection of the delayed state change signals, and the time-to-digital converter implements the time sampling.

14. The method of digitizing a scintillation pulse of claim 1, wherein, The scintillation pulse threshold-time pair comprises a delayed state change time obtained by time sampling on the delayed state change signal and a threshold value corresponding to the delayed state change time.

15. The method of digitizing a scintillating pulse of claim 1, wherein, The digitalization method further comprises: for each state change signal, Adjusting the delay state change time to a target state change time based on a preset time difference; Specifying the target state change time and the threshold corresponding to the state change signal as a flicker pulse threshold-target time pair.

16. A method of digitizing a scintillation pulse, comprising: The digitization method comprises: presetting at least two thresholds; synchronously and in parallel comparing the to-be-processed flicker pulse with the at least two thresholds to determine at least two state change signals corresponding to the at least two thresholds when the to-be-processed flicker pulse crosses the thresholds; using the same sampling module to sequentially perform time sampling on the at least two state change signals to obtain at least two groups of flicker pulse threshold-time pairs corresponding to the at least two state change signals.

17. The method of digitizing a scintillation pulse according to claim 16, wherein, The at least two thresholds are set by a digital-to-analog converter.

18. The method of digitizing a scintillation pulse of claim 16, wherein, The thresholds comprise voltage thresholds, current thresholds, energy thresholds and sound intensity thresholds.

19. The method of digitizing a scintillation pulse of claim 16, wherein, The size of the threshold is set to be no more than the maximum amplitude of the to-be-processed flicker pulse.

20. The method of digitizing a scintillation pulse of claim 16, wherein, The number of the thresholds is set to be 2-4.

21. The method of digitizing a scintillation pulse according to any one of claims 16 to 20, wherein, Synchronously and in parallel comparing the to-be-processed flicker pulse with the at least two thresholds comprises: a comparison module compares the to-be-processed flicker pulse with the thresholds in parallel by using multiple comparators, and each of the comparators works independently.

22. The method of digitizing a scintillation pulse of claim 16, wherein, The state change signals comprise a rising edge indicating that the to-be-processed flicker pulse crosses the threshold for the first time and a falling edge indicating that the to-be-processed flicker pulse crosses the threshold for the second time.

23. The method of digitizing a scintillation pulse of claim 16, wherein, Sequentially performing time sampling on the at least two state change signals comprises: performing first time sampling on time points corresponding to the rising edges of the state change signals based on a first sequence; performing second time sampling on time points corresponding to the falling edges of the state change signals based on a second sequence.

24. The method of digitizing a scintillation pulse according to claim 23, wherein, The first sequence is a sequence determined according to the one or more thresholds from small to large, and the second sequence is a sequence determined according to the one or more thresholds from large to small.

25. The method of digitizing a scintillation pulse of claim 23, wherein, After performing the first time sampling on the time points corresponding to the rising edges of the state change signals based on the first sequence, the digitization method further comprises: determining whether the first time sampling is successful; if yes, synchronously outputting a feedback signal and starting to switch to performing the second time sampling on the time points corresponding to the falling edges of the state change signals based on the second sequence; if no, re-performing the first time sampling.

26. The method of digitizing a scintillation pulse of claim 16, wherein, The sampling module is implemented by a circuit comprising a signal path controller and a time-to-digital converter, the signal path controller sequentially controls the selection of the state change signals, and the time-to-digital converter implements the time sampling.

27. The method of digitizing a scintillation pulse of claim 16, wherein, The flicker pulse threshold-time pair comprises a state change time obtained by time sampling on the state change signal and a threshold corresponding to the state change time.

28. A method of digitizing a scintillation pulse, comprising: The digitization method comprises: presetting at least two thresholds; performing delay processing on a to-be-processed flicker pulse signal input by at least one channel; synchronously and in parallel comparing the to-be-processed flicker pulse after the delay processing with the at least two thresholds to determine at least two state change signals corresponding to the at least two thresholds when the to-be-processed flicker pulse crosses the thresholds; The same sampling module is used to sequentially time sample the state change signals to obtain corresponding scintillation pulse threshold-time pairs.

29. A scintillation pulse digitizer comprising: The digitizing device comprises: A first obtaining module for obtaining a to-be-processed scintillation pulse and at least two preset thresholds; A first comparing module for synchronously and in parallel comparing the to-be-processed scintillation pulse with the at least two thresholds to determine at least two state change signals corresponding to the to-be-processed scintillation pulse when the to-be-processed scintillation pulse crosses the thresholds; A first delaying module for performing delay processing on at least one of the state change signals to obtain at least one delayed state change signal; A first sampling module for sequentially time sampling the delayed state change signals to obtain corresponding scintillation pulse threshold-time pairs.

30. The scintillation pulse digitizing device of claim 29, wherein, The first obtaining module comprises a digital-to-analog converter for presetting the at least two thresholds.

31. The scintillation pulse digitizing device of claim 29, wherein, The first comparing module comprises a plurality of comparators arranged in parallel, each of which independently compares the to-be-processed scintillation pulse with one of the thresholds.

32. The scintillation pulse digitizing device of claim 29, wherein, The first delaying module is configured to: Adjust the at least one state change signal based on a preset time difference to stagger rising and falling edges of the state change signal, and the adjusted state change signal is the delayed state change signal.

33. The device of claim 29, wherein, The first sampling module is configured to: Perform first time sampling on time points corresponding to rising edges of the delayed state change signals in a first order; Perform second time sampling on time points corresponding to falling edges of the delayed state change signals in a second order.

34. The scintillation pulse digitizing device of claim 33, wherein, The first order is an arrangement order determined according to the at least two thresholds from small to large, and the second order is an arrangement order determined according to the at least two thresholds from large to small.

35. The scintillation pulse digitizing device of claim 34, wherein, The first sampling module is configured to: Determine whether the first time sampling is successful; If yes, synchronously output a feedback signal and start switching to perform the second time sampling on the time points corresponding to the falling edges of the delayed state change signals in the second order; If no, re-perform the first time sampling.

36. The device of claim 29, wherein, The first sampling module comprises a signal path controller and a time-to-digital converter, the signal path controller sequentially controls the selection of the delayed state change signals, and the time-to-digital converter implements the time sampling.

37. The device of claim 29, wherein, The scintillation pulse threshold-time pairs comprise delayed state change times obtained by time sampling the delayed state change signals and thresholds corresponding to the delayed state change times.

38. The device of claim 29, wherein, The digitizing device further comprises a post-processing module, which is configured to: For each state change signal, Adjust a delayed state change time to a target state change time based on a preset time difference; Specify the target state change time and a threshold corresponding to the state change signal to form a scintillation pulse threshold-target time pair.

39. A scintillation pulse digitizer comprising: The digitizing device comprises: A second obtaining module for obtaining a to-be-processed scintillation pulse and at least two preset thresholds; a second comparison module configured to synchronously and in parallel compare the to-be-processed scintillation pulse with the at least two threshold values, and determine at least two state change signals corresponding to the at least two threshold values respectively when the to-be-processed scintillation pulse crosses the threshold values; a second sampling module configured to sequentially perform time sampling on the state change signals, and obtain corresponding scintillation pulse threshold-time pairs.

40. The scintillation pulse digitizing device of claim 39, wherein, The second obtaining module comprises a digital-to-analog converter configured to preset the at least two threshold values.

41. The device of claim 39, wherein, The second comparison module comprises a plurality of comparators arranged in parallel, each of which independently compares the to-be-processed scintillation pulse with one of the threshold values.

42. The device of claim 39, wherein, The second sampling module is configured to: perform first time sampling on time points corresponding to rising edges of the state change signals based on a first sequence; perform second time sampling on time points corresponding to falling edges of the state change signals based on a second sequence.

43. The scintillation pulse digitizing device of claim 42, wherein, The first sequence is a sequence determined according to the at least two threshold values from small to large, and the second sequence is a sequence determined according to the at least two threshold values from large to small.

44. The scintillation pulse digitizing device of claim 43, wherein, The second sampling module is configured to: determine whether the first time sampling is successful; if yes, synchronously output a feedback signal and start switching to perform the second time sampling on the time points corresponding to the falling edges of the state change signals based on the second sequence; if no, re-perform the first time sampling.

45. The device of claim 39, wherein, The second sampling module comprises a signal path controller and a time-to-digital converter, the signal path controller is configured to sequentially control selection of the state change signals, and the time-to-digital converter is configured to implement the time sampling.

46. The device of claim 39, wherein, The scintillation pulse threshold-time pairs comprise state change times obtained by time sampling on the state change signals and threshold values corresponding to the state change times.

47. A scintillation pulse digitizer comprising: The digitizing device comprises: a third obtaining module configured to obtain to-be-processed scintillation pulses and at least two preset threshold values; a third delay module configured to perform delay processing on the scintillation pulses of at least one channel; a third comparison module configured to synchronously and in parallel compare the scintillation pulses processed by the delay module with the at least two threshold values, and determine at least two state change signals corresponding to the at least two threshold values respectively when the to-be-processed scintillation pulses cross the threshold values; a third sampling module configured to sequentially perform time sampling on the state change signals, and obtain corresponding scintillation pulse threshold-time pairs.

48. A digitizer device, comprising: The digitizing device comprises: a scintillation pulse digitizing device according to any one of claims 29 to 47.

49. A digitizer device, comprising: The digitizing device comprises: a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the computer program, when executed by the processor, implements the steps of the method according to any one of claims 1 to 28.

50. A computer-readable storage medium, comprising: The storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the method according to any one of claims 1 to 28.

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