Semiconductor epitaxial structure and method for preparing semiconductor epitaxial structure

Abstract

An embodiment of the present invention provides a semiconductor epitaxial structure and a method for preparing a semiconductor epitaxial structure, relating to the field of semiconductor epitaxial technology. The semiconductor epitaxial structure includes a substrate, a nucleation layer and a buffer layer. The present invention forms a nucleation layer on the substrate and then forms a buffer layer on the nucleation layer, wherein the nucleation layer includes multiple layers of periodically doped and repeatedly arranged semiconductor periodic stacks, so that the nucleation layer forms a doped superlattice structure with different doping types. The embodiment of the present invention uses doped superlattice structures with different doping types to improve the crystal quality of the nucleation layer. The embodiment of the present invention utilizes the formed doped superlattice to reduce epitaxial layer threading dislocations and obtain an epitaxial film with high crystal quality, and can simply and efficiently obtain a high-quality nucleation layer, reduce epitaxial layer threading dislocations, and thus obtain an epitaxial film with high crystal quality.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor epitaxy technology, and in particular to a semiconductor epitaxial structure and a method for preparing the semiconductor epitaxial structure. Background Art

[0002] Aluminum nitride thin films are an important third-generation semiconductor material, exhibiting excellent properties such as a wide bandgap, high breakdown field strength, corrosion resistance, strong radiation resistance, and good thermal stability. Due to the lack of large-scale, high-quality commercial gallium nitride and aluminum nitride substrates, nitride semiconductor materials are generally grown via heteroepitaxial growth on silicon, silicon carbide, or sapphire substrates. Due to its good wettability with heteroepitaxial substrates, aluminum nitride is often used as the nucleation layer material for nitride heteroepitaxial growth. The preparation of high-quality AlN films is also a key technology for the epitaxial growth of nitride semiconductor thin films.

[0003] There is generally a large lattice and thermal mismatch between aluminum nitride films and silicon carbide substrates (silicon substrates), resulting in a large number of threading dislocations and microcracks in heteroepitaxially grown AlN films. Reducing the threading dislocation density in aluminum nitride heteroepitaxial growth generally requires the participation of interfaces or point defects to promote the annihilation of threading dislocations. Therefore, obtaining high-quality AlN layers requires optimizing growth conditions or adopting a specific epitaxial structure.

[0004] Generally, there are several methods for obtaining high-quality AlN heteroepitaxial thin film materials: 1. Using higher growth temperatures (>1200°C) or pulsed deposition methods to increase the mobility of Al atoms during AlN growth, reduce the generation of interface dislocations, and improve the efficiency of dislocation annihilation; 2. Reduce the interface misfit dislocation density by treating the substrate interface state before the growth of the AlN nucleation layer and optimizing the growth conditions of the interface AlN layer; 3. Using a patterned substrate through lateral epitaxy to cause threading dislocations to bend at the grain boundary and terminate or annihilate, thereby reducing the dislocation density of subsequent epitaxial layers; 4. Increasing the growth thickness of the AlN layer to increase the probability of dislocation annihilation and reduce the threading dislocation density on the AlN surface. The above methods are more or less limited by conditions such as the narrow epitaxial growth window, the equipment heating temperature limit, and the difficulty in removing the AlN film on the graphite parts of the reaction chamber after growth, making it difficult to obtain high-quality AlN thin film materials simply and efficiently. Summary of the Invention

[0005] The objects of the present invention include, for example, providing a semiconductor epitaxial structure and a method for preparing a semiconductor epitaxial structure, which can simply and efficiently obtain a high-quality nucleation layer, reduce epitaxial layer threading dislocations, and obtain an epitaxial film with high crystal quality.

[0006] The embodiments of the present invention can be implemented as follows:

[0007] In a first aspect, the present invention provides a semiconductor epitaxial structure, comprising:

[0008] substrate;

[0009] a nucleation layer located on one side of the substrate;

[0010] and a buffer layer located on a side of the nucleation layer away from the substrate;

[0011] The nucleation layer includes multiple layers of semiconductor periodic stacks stacked in sequence, at least one layer of the semiconductor periodic stack is a doped structure, and multiple layers of the semiconductor periodic stack form a doped superlattice structure with different doping types.

[0012] In an optional embodiment, each layer of the semiconductor periodic stack includes a first thin film layer and a second thin film layer stacked in sequence, the first thin film layer is doped with a first doping atom, and the second thin film layer is doped with a second doping atom, wherein the first doping atom and the second doping atom are different types of doping atoms.

[0013] In an optional embodiment, the first doping atom is at least one of In, Ga, Si, Mg and Zn; and the second doping atom is at least one of In, Ga, Si, Mg and Zn.

[0014] In an optional embodiment, the doping concentration of the first doping atoms in the first thin film layer and the doping concentration of the second doping atoms in the second thin film layer are both between 1E16 / cm3 and 1E21 / cm3.

[0015] In an optional embodiment, each layer of the semiconductor periodic stack includes a first thin film layer and a second thin film layer stacked in sequence, the first thin film layer is a non-doped layer, and the second thin film layer is doped with second doping atoms.

[0016] In an optional embodiment, the second doping atom is at least one of In, Ga, Si, Mg and Zn.

[0017] In an optional embodiment, the doping concentration of the second doping atoms in the second thin film layer is between 1E16 / cm3 and 1E21 / cm3.

[0018] In an optional embodiment, the thickness of the first thin film layer and the second thin film layer are both between 1-20 nm.

[0019] In an optional embodiment, the number of layers of the semiconductor periodic stack is greater than or equal to 3.

[0020] In an optional embodiment, the thickness of the nucleation layer is between 20-250 nm.

[0021] In an optional embodiment, the nucleation layer is a doped or undoped AlN layer.

[0022] In an optional embodiment, the semiconductor epitaxial structure further includes:

[0023] a stress transfer layer located between the buffer layer and the nucleation layer;

[0024] Wherein, both side surfaces of the stress transfer layer are in contact with the nucleation layer and the buffer layer respectively.

[0025] In an optional embodiment, the semiconductor epitaxial structure further includes:

[0026] a channel layer located on a side of the buffer layer away from the substrate;

[0027] and a barrier layer located on a side of the channel layer away from the substrate.

[0028] In a second aspect, the present invention provides a method for preparing a semiconductor epitaxial structure, which is used to prepare the semiconductor epitaxial structure as described in the above embodiment, and the preparation method comprises:

[0029] providing a substrate;

[0030] growing a nucleation layer on one side of the substrate;

[0031] growing a buffer layer on a side of the nucleation layer away from the substrate;

[0032] The nucleation layer includes multiple layers of semiconductor periodic stacks stacked in sequence, at least one layer of the semiconductor periodic stack is a doped structure, and multiple layers of the semiconductor periodic stack form a doped superlattice structure with different doping types.

[0033] In an optional embodiment, the step of growing a nucleation layer on one side of the substrate includes:

[0034] growing a first thin film layer doped with first doping atoms on the substrate;

[0035] growing a second thin film layer doped with a second doping atom or undoped on the first thin film layer;

[0036] Periodically repeating the steps of growing the first thin film layer and the second thin film layer several times to obtain the nucleation layer;

[0037] The first doping atom and the second doping atom are different types of doping atoms.

[0038] In an optional embodiment, before the step of growing a buffer layer on a side of the nucleation layer away from the substrate, the preparation method further comprises:

[0039] A stress transfer layer is grown on a side of the nucleation layer away from the substrate.

[0040] In an optional embodiment, after the step of growing a buffer layer on a side of the nucleation layer away from the substrate, the preparation method further comprises:

[0041] growing a channel layer on a side of the buffer layer away from the substrate;

[0042] A barrier layer is grown on a side of the channel layer away from the substrate.

[0043] The beneficial effects of the embodiments of the present invention include, for example:

[0044] Embodiments of the present invention provide a semiconductor epitaxial structure and a method for fabricating the same. A nucleation layer is formed on a substrate, and then a buffer layer is formed on the nucleation layer. The nucleation layer comprises multiple sequentially stacked semiconductor periodic layers, at least one of which is a doped structure, and the multiple semiconductor periodic layers form a doped superlattice structure with different doping types. Embodiments of the present invention utilize a doped superlattice structure with different doping types to improve the crystal quality of the nucleation layer. During heterogeneous growth, due to the large lattice mismatch between the epitaxial film and the substrate, a large number of threading dislocations are present in the nucleation layer. The doped superlattice structure can effectively bend the threading dislocations, reducing the dislocation density in the subsequent epitaxial film and thus improving the crystal quality of the epitaxial buffer layer. Compared to a composition-modulated superlattice, the interfacial stress of the doped superlattice is relatively low, thus avoiding the generation of misfit dislocations at the superlattice interface. Furthermore, impurity atoms in the doped superlattice can promote dislocation movement and dislocation annihilation, thereby reducing the threading dislocation density. The doping concentration in the doped superlattice can be controlled by the flow rate of the doping source, making the growth of the doped superlattice structure very convenient. Moreover, the doping atoms only form a small amount of carriers in the nucleation layer, which does not affect the high resistance characteristics of the nucleation layer. By using a doped superlattice nucleation layer, a high-crystalline-quality gallium nitride-based buffer layer can be obtained, thereby improving the optical and electrical properties of the device. At the same time, this composite nucleation layer is simple to grow and has low dependence on equipment, and can be used in the mass production of epitaxial wafers for gallium nitride-based electronic devices and light-emitting devices. Compared with the prior art, the semiconductor epitaxial structure and preparation method provided by the present invention can reduce the threading dislocations in the epitaxial layer by forming a doped superlattice to obtain an epitaxial film with high crystalline quality, and can simply and efficiently obtain a high-quality nucleation layer, reduce the threading dislocations in the epitaxial layer, and obtain an epitaxial film with high crystalline quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0046] Figure 1 A schematic diagram of a semiconductor epitaxial structure provided by a first embodiment of the present invention;

[0047] Figure 2 for Figure 1 Schematic diagram of the structure of the nucleation layer;

[0048] Figure 3 A schematic diagram of a semiconductor epitaxial structure provided in accordance with a third embodiment of the present invention;

[0049] Figure 4 A schematic diagram of a semiconductor epitaxial structure provided in accordance with a fourth embodiment of the present invention.

[0050] Icon: 100 - semiconductor epitaxial structure; 110 - substrate; 130 - nucleation layer; 131 - first thin film layer; 133 - second thin film layer; 150 - buffer layer; 170 - channel layer; 180 - stress transfer layer; 190 - barrier layer. DETAILED DESCRIPTION

[0051] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0052] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without creative effort shall fall within the scope of protection of the present invention.

[0053] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0054] In the description of the present invention, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. appear, the orientation or position relationship indicated is based on the orientation or position relationship shown in the accompanying drawings, or is the orientation or position relationship in which the product of the invention is usually placed when in use. It is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be understood as a limitation on the present invention.

[0055] In addition, the terms "first", "second", etc., if used, are merely used to distinguish and describe, and should not be understood as indicating or implying relative importance.

[0056] As disclosed in the background art, in order to obtain high-quality AlN heteroepitaxial thin film materials in the prior art, the following methods are generally used:

[0057] 1. Use higher growth temperature (>1200℃) or pulse deposition method to increase the mobility of Al atoms during AlN growth, reduce the generation of interface dislocations and improve the efficiency of dislocation annihilation. This method requires a high temperature environment and has high requirements for equipment, making it difficult to achieve mass production.

[0058] 2. Reduce the interface misfit dislocation density by treating the substrate interface state before the growth of the AlN nucleation layer and optimizing the interface AlN layer growth conditions.

[0059] 3. Using a patterned substrate and lateral epitaxy, threading dislocations are bent at the grain boundary and terminated or annihilated to reduce the dislocation density of subsequent epitaxial layers.

[0060] 4. Increasing the growth thickness of the AlN layer increases the probability of dislocation annihilation and reduces the threading dislocation density on the AlN surface.

[0061] However, the above methods are more or less limited by conditions such as the narrow epitaxial growth window, the equipment heating temperature limit, and the difficulty in removing the AlN film on the graphite parts of the reaction chamber after growth, making it difficult to obtain high-quality AlN film materials simply and efficiently.

[0062] In order to solve the above problems, the embodiment of the present invention provides a semiconductor epitaxial structure and a method for preparing a semiconductor epitaxial structure, which uses AlN doped superlattice structures of different doping types to improve the crystal quality of the AlN layer. In the heterogeneous outer AlN layer, due to the large lattice mismatch between the epitaxial film and the substrate, there are a large number of threading dislocations in the AlN nucleation layer. The use of a doped superlattice structure can effectively bend the threading dislocations to reduce the dislocation density in the subsequent epitaxial film, thereby improving the crystal quality of the epitaxial buffer layer. Compared with the composition-modulated superlattice, the interface stress of the doped superlattice is relatively small, so the generation of mismatch dislocations at the superlattice interface can be avoided. In addition, the impurity atoms in the doped superlattice can also promote the movement and annihilation of dislocations, thereby reducing the threading dislocation density. The doping concentration in the doped superlattice can be controlled by the flow rate of the doping source to achieve the growth of the doped superlattice structure, which is very convenient, and the band gap of AlN is as high as 6.2eV. The doped atoms only form a small amount of carriers in AlN and do not affect the high resistance characteristics of AlN. By using a doped superlattice AlN nucleation layer, a high-crystal-quality GaN-based buffer layer can be obtained, thereby improving the optical and electrical properties of the device. At the same time, this composite AlN layer is simple to grow and has low dependence on equipment, and can be used in the mass production of epitaxial wafers for GaN-based electronic devices and light-emitting devices.

[0063] It should be noted that, in the absence of conflict, the features in the embodiments of the present invention may be combined with each other.

[0064] First embodiment

[0065] See also Figure 1 and Figure 2 This embodiment provides a semiconductor epitaxial structure 100, which can simply and efficiently obtain a high-quality nucleation layer 130, reduce epitaxial layer threading dislocations, and obtain an epitaxial film with high crystal quality.

[0066] The semiconductor epitaxial structure 100 provided in this embodiment includes a substrate 110, a nucleation layer 130, and a buffer layer 150. The nucleation layer 130 is located on one side of the substrate 110, and the buffer layer 150 is located on one side of the nucleation layer 130. The nucleation layer 130 includes multiple semiconductor periodic layers stacked in sequence, at least one of which is a doped structure, and the multiple semiconductor periodic layers form a doped superlattice structure with different doping types. Preferably, each semiconductor periodic layer can be doped with impurity atoms, or some of the semiconductor periodic layers can be doped with impurity atoms.

[0067] In this embodiment, the semiconductor epitaxial structure 100 can be applied to semiconductor devices such as gallium nitride-based electronic devices or light-emitting devices, wherein the substrate 110 can be made of materials such as silicon (Si), silicon carbide (SiC), sapphire, etc., and the substrate 110 is used for heteroepitaxial growth. The deposition method of the substrate 110 can include CVD (Chemical Vapor Deposition), VPE (Vapour Phase Epitaxy), MOCVD (Metal-organic Chemical Vapor Deposition), LPCVD (Low Pressure Chemical Vapor Deposition), PECVD (Plasma Enhanced Chemical Vapor Deposition), PLD (Pulsed Laser Deposition), atomic layer epitaxy, MBE (Molecular Beam Epitaxy), sputtering, evaporation, etc. Of course, the deposition method of the substrate 110 is not specifically limited here.

[0068] In this embodiment, nucleation layer 130 is made of AlN. Here, nucleation layer 130 comprises a periodic stack of multiple semiconductor layers, specifically, multiple AlN films with different doping types. Meanwhile, buffer layer 150 is made of a gallium nitride-based buffer material, such as GaN or AlGaN. The materials used for substrate 110, nucleation layer 130, and buffer layer 150 are merely examples and are not intended to be limiting.

[0069] In this embodiment, the nucleation layer 130 and the buffer layer 150 can be epitaxially grown by processes such as CVD (Chemical Vapor Deposition), VPE (Vapour Phase Epitaxy), MOCVD (Metal-organic Chemical Vapor Deposition), LPCVD (Low Pressure Chemical Vapor Deposition), PECVD (Plasma Enhanced Chemical Vapor Deposition), PLD (Pulsed Laser Deposition), atomic layer epitaxy, and MBE (Molecular Beam Epitaxy). Preferably, the nucleation layer 130 here can be prepared by MOCVD process. Of course, there is no specific limitation on the growth process of the nucleation layer 130 and the buffer layer 150 here.

[0070] It should be noted that the nucleation layer 130 is formed with a doped superlattice structure having different doping types. During the heterogeneous growth process, due to the large lattice mismatch between the epitaxial film and the substrate 110, a large number of threading dislocations exist in the nucleation layer 130. In this embodiment, the use of a doped superlattice structure can effectively bend the threading dislocations, reduce the dislocation density in the subsequent epitaxial film, and thus improve the crystal quality of the epitaxial buffer layer 150. In addition, compared with the composition-modulated superlattice, the interface stress of the doped superlattice is relatively small, thus avoiding the generation of misfit dislocations at the superlattice interface. In addition, impurity atoms in the doped superlattice can also promote the movement and annihilation of dislocations, thereby reducing the threading dislocation density.

[0071] It should also be noted that the doping concentration in the doped superlattice structure can be controlled by the flow rate of the doping source, making the growth of the doped superlattice structure very convenient. Furthermore, the doping atoms only form a small number of carriers in the nucleation layer 130, which does not affect the high resistivity of the nucleation layer 130. Utilizing the doped superlattice nucleation layer 130, a high-quality gallium nitride-based buffer layer 150 can be obtained, thereby improving the optical and electrical properties of the device. Furthermore, this composite nucleation layer 130 is simple to grow and has low equipment dependence, making it suitable for mass production of epitaxial wafers for gallium nitride-based electronic devices and light-emitting devices.

[0072] In this embodiment, each semiconductor periodic stack includes a first thin film layer 131 and a second thin film layer 133 stacked in sequence, the first thin film layer 131 is doped with a first doping atom, and the second thin film layer 133 is doped with a second doping atom, wherein the first doping atom and the second doping atom are different types of doping atoms. Specifically, when growing the first thin film layer 131, a doping source containing the first doping atom can be introduced, and when growing the second thin film layer 133, a doping source containing the second doping atom can be introduced. Specifically, the first doping atom is at least one of In, Ga, Si, Mg, and Zn; and the second doping atom is at least one of In, Ga, Si, Mg, and Zn. In other words, the doped superlattice AlN layer mentioned in this embodiment refers to a superlattice structure formed by periodically introducing an electron doping source such as Ga (In) or a hole (electron) doping source such as Mg (Si) when the AlN layer is grown.

[0073] It is worth noting that it is not difficult to realize the superlattice structure by periodically introducing the doping source here. The difference from the conventional superlattice structure is that in this embodiment, different doping sources are adaptively and periodically introduced according to the periodic deposition law of the first thin film layer 131 and the second thin film layer 133, so as to form a superlattice structure with periodic doping and different doping types. The superlattice structure formed in this way has periodic stress changes, and the periodic stress changes in the doped superlattice and the aggregation effect of doping atoms near the dislocations can be used to make the threading dislocations in the AlN layer bend, thereby reducing the density of threading dislocations in the epitaxial film, and thereby improving the crystal quality of the epitaxial GaN buffer layer 150.

[0074] In this embodiment, the doping concentration of the first doping atoms in the first thin film layer 131 and the doping concentration of the second doping atoms in the second thin film layer 133 are both 1E16 / cm 3 -1E21 / cm 3 Preferably, the doping concentrations in the first thin film layer 131 and the second thin film layer 133 are both 1E18 / cm 3 In this embodiment, the first doping concentration and the second doping concentration are kept consistent, so that the periodic variation of the superlattice structure is more stable, the stress variation is more linear and stable, and the aggregation effect is more obvious.

[0075] In this embodiment, the thickness of the first thin film layer 131 and the second thin film layer 133 are both between 1 and 20 nm. Preferably, the thickness of the first thin film layer 131 and the second thin film layer 133 are both 5 nm. Here, the thickness of the first thin film layer 131 and the second thin film layer 133 are kept consistent. Since the base material of the first thin film layer 131 and the second thin film layer 133 are both AlN, the same growth equipment can be used for periodic epitaxial growth, which is very convenient and simplifies the process steps.

[0076] In this embodiment, the number of layers of the first thin film layer 131 and the second thin film layer 133 is greater than or equal to 3. Specifically, each first thin film layer 131 and the adjacent second thin film layer 133 constitute a growth cycle. In this embodiment, the growth cycle in the nucleation layer 130 needs to be greater than or equal to 3 to form a superlattice structure with a sufficient number of layers, which is more conducive to achieving periodic stress changes in the nucleation layer 130 and the aggregation effect of dopant atoms near dislocations. Preferably, in this embodiment, the first thin film layer 131 and the second thin film layer 133 are both 12 layers. On the one hand, this can ensure that they can better demonstrate the periodic stress changes and the aggregation effect of dopant atoms. On the other hand, it can achieve a thinner overall thickness, which is conducive to the miniaturization of the entire semiconductor device.

[0077] In this embodiment, the thickness of the nucleation layer 130 is between 20-250 nm. Preferably, the thickness of the nucleation layer 130 is 120 nm, which can ensure that the periodic stress variation and the aggregation effect of the dopant atoms can be achieved while also preventing the nucleation layer 130 from being too thick.

[0078] This embodiment further provides a method for preparing a semiconductor epitaxial structure 100, which is used to prepare the aforementioned semiconductor epitaxial structure 100. The method comprises the following steps:

[0079] S1 : growing a nucleation layer 130 on one side of the substrate 110 .

[0080] Specifically, a substrate 110 is first provided, and the substrate 110 is placed in a reaction chamber, and then a nucleation layer 130 is grown on the substrate 110. The nucleation layer 130 includes a plurality of semiconductor periodic stacks stacked in sequence, at least one semiconductor periodic stack is a doped structure, and the plurality of semiconductor stacks form a doped superlattice structure of different doping types. Preferably, each semiconductor periodic stack is doped with impurity atoms, or some of the semiconductor periodic layers are doped with impurity atoms. The substrate 110 can be made of materials such as silicon (Si), silicon carbide (SiC), and sapphire, and the substrate 110 is used for heteroepitaxial growth. The deposition method of the substrate 110 may include CVD (Chemical Vapor Deposition), VPE (Vapour Phase Epitaxy), MOCVD (Metal-organic Chemical Vapor Deposition), LPCVD (Low Pressure Chemical Vapor Deposition), PECVD (Plasma Enhanced Chemical Vapor Deposition), PLD (Pulsed Laser Deposition), atomic layer epitaxy, MBE (Molecular Beam Epitaxy), sputtering, evaporation, etc. Of course, the deposition method of the substrate 110 is not specifically limited here.

[0081] When growing the nucleation layer 130 on the substrate 110, first, a first thin film layer 131 doped with the first doping atoms is grown on the substrate 110, and then a second thin film layer 133 doped with the second doping atoms is grown on the first thin film layer 131. Then, the growth of the first thin film layer 131 and the second thin film layer 133 is repeated several times so that the first thin film layer 131 and the second thin film layer 133 are periodically staggered and finally the nucleation layer 130 is obtained. It should be noted that the first thin film layer 131 and the second thin film layer 133 here can be epitaxially grown by processes such as CVD (Chemical Vapor Deposition), VPE (Vapour Phase Epitaxy), MOCVD (Metal-organic Chemical Vapor Deposition), LPCVD (Low Pressure Chemical Vapor Deposition), PECVD (Plasma Enhanced Chemical Vapor Deposition), PLD (Pulsed Laser Deposition), atomic layer epitaxy, and MBE (Molecular Beam Epitaxy). Preferably, the nucleation layer 130 here is prepared by a MOCVD (Metal-organic Chemical Vapor Deposition) process.

[0082] It is worth noting that the first doping atoms and the second doping atoms here can come from different doping sources, that is, during the growth of the first thin film layer 131, the doping source containing the first doping atoms is continuously introduced into the reaction chamber, and during the growth of the second thin film layer 133, the doping source containing the second doping atoms is continuously introduced into the reaction chamber, thereby utilizing the method of periodically introducing the doping source to form the first thin film layer 131 and the second thin film layer 133 of different doping types.

[0083] S2 : growing a buffer layer 150 on a side of the nucleation layer 130 away from the substrate 110 .

[0084] Specifically, the nucleation layer 130 is prepared after the first thin film layer 131 and the second thin film layer 133 are periodically formed to reach a predetermined thickness, and then the buffer layer 150 is grown on the surface of the nucleation layer 130. The buffer layer 150 can also be prepared using an MOCVD (Metal-organic Chemical Vapor Deposition) process.

[0085] The actual process and environmental parameters are described in detail below:

[0086] Step 1: Place the substrate 110 (sapphire, SiC, Si) for heteroepitaxial growth into a metal organic chemical vapor deposition (MOCVD) device and heat the substrate 110 in a high temperature hydrogen environment to decompose the oxide on the surface of the substrate 110 and repair the surface damage of the substrate 110.

[0087] Step 2: Grow a doped superlattice structure on the surface of the substrate 110 selected for heteroepitaxial growth, that is, grow a nucleation layer 130 on the surface of the substrate 110 at a growth temperature of 800°C to 1200°C, with a thickness of the nucleation layer 130 ranging from 20nm to 200nm. The specific growth method of the doped superlattice structure is as follows:

[0088] First, a doping source containing a first doping atom is introduced, wherein the first doping atom contains one of In, Ga, Si, Mg, and Zn, and a first thin film layer 131 is grown. The growth thickness of the first thin film layer 131 is 1-20 nm, and the doping concentration is 1E16 / cm 3 -1E21 / cm 3 between.

[0089] Then, a doping source containing a second doping atom is introduced, wherein the second doping atom contains one of In, Ga, Si, Mg, and Zn, and a second thin film layer 133 is grown. The growth thickness of the second thin film layer 133 is 1-20 nm, and the doping concentration is 1E16 / cm 3 -1E21 / cm 3 and the first doping atom and the second doping atom are of different types.

[0090] Then, n periods of the first thin film layer 131 and the second thin film layer 133 are repeatedly grown, where n≥3, and finally a doped superlattice AlN layer with a total thickness of 20-250 nm is grown.

[0091] Step 3: growing a GaN buffer layer 150 or an AlGaN / GaN buffer layer 150 on the doped superlattice AlN nucleation layer 130 .

[0092] In summary, this embodiment provides a semiconductor epitaxial structure 100 and a method for fabricating the same. A nucleation layer 130 is formed on a substrate 110, and then a buffer layer 150 is formed on the nucleation layer 130. The nucleation layer 130 comprises a plurality of sequentially stacked semiconductor periodic layers, at least one of which is a doped structure. This structure forms a doped superlattice structure with different doping types in the nucleation layer 130. This embodiment of the present invention utilizes a doped superlattice structure with different doping types to improve the crystal quality of the nucleation layer 130. During heterogeneous growth, due to the large lattice mismatch between the epitaxial film and the substrate 110, a large number of threading dislocations are present in the nucleation layer 130. The doped superlattice structure effectively bends the threading dislocations, reducing the dislocation density in the subsequent epitaxial film and thereby improving the crystal quality of the epitaxial buffer layer 150. Furthermore, compared to a composition-modulated superlattice, the interfacial stress of the doped superlattice is relatively low, thereby preventing the generation of misfit dislocations at the superlattice interface. In addition, the impurity atoms in the doped superlattice can also promote the movement and annihilation of dislocations, thereby reducing the threading dislocation density. The doping concentration in the doped superlattice can be achieved by controlling the flow rate of the doping source, making the growth of the doped superlattice structure very convenient. The doped superlattice is simple to prepare, the interface stress is small, and no new interface dislocations are introduced. Moreover, the doping atoms only form a small amount of carriers in the nucleation layer 130, which does not affect the high resistance characteristics of the nucleation layer 130. That is, the band gap of AlN in this embodiment is high, the ionization efficiency of the dopant in AlN is low, and the doped superlattice AlN layer still has high resistance. By using a doped superlattice nucleation layer 130, a high crystal quality gallium nitride-based buffer layer 150 can be obtained, thereby improving the optical and electrical properties of the device. At the same time, this composite nucleation layer 130 is simple to grow and has low dependence on equipment, and can be used in the mass production of epitaxial wafers of gallium nitride-based electronic devices and light-emitting devices.

[0093] Second embodiment

[0094] Please continue to see Figure 1 and Figure 2 This embodiment provides a semiconductor epitaxial structure 100. Its basic structure, principles, and technical effects are the same as those of the first embodiment. For the sake of brevity, any details not mentioned in this embodiment may be referred to the corresponding contents of the first embodiment. This embodiment differs from the first embodiment in the structure of the nucleation layer 130.

[0095] In this embodiment, the semiconductor epitaxial structure 100 includes a substrate 110, a nucleation layer 130 and a buffer layer 150, wherein the nucleation layer 130 is located on one side of the substrate 110, and the buffer layer 150 is located on one side of the nucleation layer 130, wherein the nucleation layer 130 includes multiple layers of periodically doped and repeatedly arranged semiconductor periodic stacks, so that the nucleation layer 130 forms a doped superlattice structure with different doping types.

[0096] In this embodiment, the multi-layer semiconductor periodic stack includes a first thin film layer 131 and a second thin film layer 133 that are periodically staggered. The first thin film layer 131 is doped as an undoped layer, and the second thin film layer 133 is doped with a second doping atom, wherein the second doping atom is at least one of In, Ga, Si, Mg, and Zn. Specifically, when growing the first thin film layer 131, no doping source may be introduced. When growing the second thin film layer 133, a doping source containing the first doping atom may be introduced, so that the first thin film layer 131 forms an undoped layer, which also forms a periodically doped superlattice structure by periodically introducing the doping source. The second thin film layer 133 is a doped structure, and the first thin film layer 131 is an undoped structure, so that the first thin film layer 131 and the second thin film layer 133 can also constitute a superlattice structure of different doping types. Here, different doping types can refer to the difference between doping and undoping.

[0097] It is worth noting that it is not difficult to realize the superlattice structure by periodically introducing the doping source here. The difference from the conventional superlattice structure is that in this embodiment, the doping source is adaptively introduced periodically according to the periodic deposition law of the first thin film layer 131 and the second thin film layer 133, so as to form a superlattice structure with periodic doping and different doping types. The superlattice structure formed in this way has periodic stress changes, and the periodic stress changes in the doped superlattice and the aggregation effect of doping atoms near the dislocations can be used to make the threading dislocations in the AlN layer bend, thereby reducing the density of threading dislocations in the epitaxial film, and thereby improving the crystal quality of the epitaxial GaN buffer layer 150.

[0098] It should be noted that, in this embodiment, the thicknesses of the first thin film layer 131 and the second thin film layer 133 may be inconsistent, wherein the first thin film layer 131 is a non-doped layer and the second thin film layer 133 is a doped layer. The thickness of the first thin film layer 131 may be greater than that of the second thin film layer 133. For example, the first thin film layer 131 is 10 nm and the second thin film layer 133 is 5 nm. Of course, this is just an example and does not impose any limitation on the thicknesses of the first thin film layer 131 and the second thin film layer 133.

[0099] This embodiment also provides a method for preparing a semiconductor epitaxial structure 100, which differs from the first embodiment in step S1, that is, the step of growing a nucleation layer 130. The method for preparing a semiconductor epitaxial structure 100 provided in this embodiment includes:

[0100] S1 : growing a nucleation layer 130 on one side of the substrate 110 .

[0101] Specifically, an undoped layer is first grown on the substrate 110, that is, an undoped first thin film layer 131 is grown, and then a second thin film layer 133 doped with second doping atoms is grown on the first thin film layer 131, and then the first thin film layer 131 and the second thin film layer 133 are periodically repeated to form a nucleation layer 130.

[0102] It should be noted that here the substrate 110 first needs to be sent into the reaction chamber. When growing the first thin film layer 131, it is possible to avoid introducing the doping source into the reaction chamber. When growing the second thin film layer 133, the doping source containing the first doping atoms is introduced to form a doping structure in the second thin film layer 133.

[0103] Step S2 is the same as that in the first embodiment and will not be described again here.

[0104] The semiconductor epitaxial structure 100 and its fabrication method provided in this embodiment form a nucleation layer 130 on a substrate 110, and then form a buffer layer 150 on the nucleation layer 130. The nucleation layer 130 is composed of a first thin film layer 131 and a second thin film layer 133 that are grown periodically and repeatedly. The first thin film layer 131 is an undoped layer, and the second thin film layer 133 is doped with a second dopant atom. This embodiment of the present invention utilizes a doped superlattice structure with different doping types to improve the crystal quality of the nucleation layer 130. During the heterogeneous growth process, due to the large lattice mismatch between the epitaxial film and the substrate 110, a large number of threading dislocations are present in the nucleation layer 130. The doped superlattice structure effectively bends the threading dislocations, reducing the dislocation density in the subsequent epitaxial film and thereby improving the crystal quality of the epitaxial buffer layer 150. Furthermore, compared to a composition-modulated superlattice, the interfacial stress of the doped superlattice is relatively low, thereby preventing the generation of misfit dislocations at the superlattice interface. In addition, the impurity atoms in the doped superlattice can also promote the movement and annihilation of dislocations, thereby reducing the threading dislocation density. The doping concentration in the doped superlattice can be achieved by controlling the flow rate of the doping source, making the growth of the doped superlattice structure very convenient. In addition, the doping atoms only form a small amount of carriers in the nucleation layer 130, which does not affect the high resistance characteristics of the nucleation layer 130. By using the doped superlattice nucleation layer 130, a high crystal quality gallium nitride-based buffer layer 150 can be obtained to improve the optical and electrical properties of the device. At the same time, this composite nucleation layer 130 is simple to grow and has low dependence on equipment, and can be used in the mass production of epitaxial wafers of gallium nitride-based electronic devices and light-emitting devices.

[0105] Third embodiment

[0106] See also Figure 3This embodiment provides a semiconductor epitaxial structure 100, whose basic structure, principle and technical effects are the same as those of the first embodiment or the second embodiment. For the sake of brief description, for parts not mentioned in this embodiment, reference may be made to the corresponding contents in the first embodiment or the second embodiment.

[0107] In this embodiment, the semiconductor epitaxial structure 100 includes a substrate 110, a nucleation layer 130, a buffer layer 150, a channel layer 170, and a barrier layer 190. The nucleation layer 130 is located on one side of the substrate 110, and the buffer layer 150 is located on one side of the nucleation layer 130. The nucleation layer 130 includes multiple layers of periodically doped and repeatedly arranged semiconductor periodic stacks, thereby forming a doped superlattice structure with different doping types in the nucleation layer 130. The channel layer 170 is located on the side of the buffer layer 150 away from the substrate 110, and the barrier layer 190 is located on the side of the channel layer 170 away from the substrate 110. In this embodiment, the nucleation layer 130 is formed on the surface of the substrate 110. Its formation process and structure can be specifically referred to the first embodiment or the second embodiment. At the same time, the buffer layer 150 is formed on the surface of the nucleation layer 130, the channel layer 170 is formed on the surface of the buffer layer 150, and the barrier layer 190 is formed on the surface of the channel layer 170, thereby forming a semiconductor epitaxial structure 100, which in turn helps to form a semiconductor device.

[0108] In this embodiment, the substrate 110 is a SiC substrate 110 with a crystal orientation of (0001), the nucleation layer 130 is a periodically doped AlN superlattice structure, the buffer layer 150 is a GaN layer, the channel layer 170 is a high-temperature GaN layer, and the barrier layer 190 is an AlGaN layer.

[0109] This embodiment further provides a method for preparing a semiconductor epitaxial structure 100. Compared with the first embodiment or the second embodiment, the method further performs the following steps after step S2:

[0110] S3 : growing a channel layer 170 on a side of the buffer layer 150 away from the substrate 110 .

[0111] Specifically, the channel layer 170 may also be formed by using a MOCVD (Metal-organic Chemical Vapor Deposition) process.

[0112] S4 : growing a barrier layer 190 on a side of the channel layer 170 away from the substrate 110 .

[0113] Specifically, the barrier layer 190 may also be prepared by using a MOCVD (Metal-organic Chemical Vapor Deposition) process.

[0114] The actual process steps of the method for preparing the semiconductor epitaxial structure 100 provided in this embodiment are described below:

[0115] Step 1: Select a silicon carbide substrate 110 with a crystal orientation of (0001), place it in a metal organic chemical vapor deposition device, heat the substrate 110 to 1100° C. in a hydrogen atmosphere, and desorb for 5 minutes to remove the oxide and defect layer on the surface of the substrate 110.

[0116] Step 2: growing an AlN nucleation layer 130 having a doped superlattice structure on the surface of the substrate 110 after completing step 1. Specifically, the growth of the composite AlN nucleation layer 130 includes the following steps:

[0117] First, a 5 nm Si-doped AlN layer is grown to form the first thin film layer 131. The growth conditions are: substrate 110 temperature 1100° C., TMAl flow rate 300 sccm, TMIn flow rate 5 sccm, NH 3 flow rate 3000 sccm, and growth time 1.5 min.

[0118] Then, a 5 nm Mg-doped AlN layer was grown on the first thin film layer 131 to form the second thin film layer 133. The growth conditions were: substrate 110 temperature 1100°C, reaction chamber pressure 75 mbar, TMAl flow rate 300 sccm, Cp2Mg flow rate 300 sccm, NH3 flow rate 3000 sccm, and growth time 1.5 min.

[0119] Repeating the growth of the first thin film layer 131 and the second thin film layer 133 for 12 cycles, thereby growing a doped superlattice AlN nucleation layer 130 with a total thickness of 120 nm;

[0120] Step 3: Grow a GaN buffer layer 150 on the superlattice AlN nucleation layer 130 formed in step 2. Growth conditions are: substrate 110 temperature 980°C, reaction chamber pressure 100 mbar, TMGa flow rate 230 sccm, NH3 flow rate 1500 sccm, growth time 20 minutes, and thickness 1000 nm.

[0121] Step 4: Grow a high-temperature GaN channel layer 170 on the GaN buffer layer 150 formed in step 3. The growth conditions of the high-temperature GaN channel layer 170 are as follows: TMGa flow rate is 200 sccm, while NH3 flow rate is 30,000 sccm, surface temperature is 1090°C, growth rate is 2 μm / h, growth time is 9 minutes, and thickness is about 300 nm.

[0122] Step 5: Continue growing a barrier layer 190 on the gallium nitride channel layer 170 formed in step 4. The growth conditions for barrier layer 190 are: surface temperature: 1080°C, NH3 flow rate: 8000 sccm. It should be noted that an AlN intercalation layer (not shown) needs to be grown before growing barrier layer 190. The AlN intercalation layer is grown with a TMAl flow rate of 400 sccm, a growth time of 16 seconds, and a thickness of approximately 1 nm. The AlGaN barrier layer 190 is grown with the following conditions: TMAl 400 sccm, TMGa 180 sccm, corresponding to an Al composition of approximately 25%, a growth time of 60 seconds, and a thickness of approximately 20 nm. After the barrier layer 190 is grown, a GaN cap layer can be grown. During the growth of the GaN cap layer, the TMGa flow rate is 150 sccm, the growth time is 20 seconds, and the thickness of the GaN cap layer is 3 nm.

[0123] The epitaxial wafer prepared according to the above steps is a GaN-based HEMT epitaxial wafer having a doped superlattice nucleation layer 130 on a SiC substrate 110 .

[0124] It should be noted that, in the actual preparation process, the use of MOCVD (Metal-organic Chemical Vapor Deposition) process is a very mature process, which further reduces the difficulty of preparing the AlN layer of the superlattice structure.

[0125] Fourth embodiment

[0126] See also Figure 4 This embodiment provides a semiconductor epitaxial structure 100, whose basic structure, principle and technical effects are the same as those of the first embodiment, the second embodiment or the third embodiment. For the sake of brief description, for parts not mentioned in this embodiment, reference may be made to the corresponding contents in the first embodiment, the second embodiment or the third embodiment.

[0127] In this embodiment, the semiconductor epitaxial structure 100 includes a substrate 110, a nucleation layer 130, a stress transfer layer 180, a buffer layer 150, a channel layer 170, and a barrier layer 190. The nucleation layer 130 is located on one side of the substrate 110, and the buffer layer 150 is located on one side of the nucleation layer 130. The nucleation layer 130 includes multiple periodic doped and repeatedly arranged semiconductor periodic layers, thereby forming a doped superlattice structure with different doping types in the nucleation layer 130. The stress transfer layer 180 is located between the buffer layer 150 and the nucleation layer 130, and the two side surfaces of the stress transfer layer 180 are in contact with the nucleation layer 130 and the buffer layer 150, respectively. The channel layer 170 is located on the side of the buffer layer 150 away from the substrate 110, and the barrier layer 190 is located on the side of the channel layer 170 away from the substrate 110. In this embodiment, the nucleation layer 130 is formed on the surface of the substrate 110. The formation process and structure thereof may be specifically referred to the first embodiment or the second embodiment. At the same time, the stress transfer layer 180 is formed on the surface of the nucleation layer 130, the buffer layer 150 is formed on the surface of the stress transfer layer 180, the channel layer 170 is formed on the surface of the buffer layer 150, and the barrier layer 190 is formed on the surface of the channel layer 170, thereby forming a semiconductor epitaxial structure 100, which in turn helps to form a semiconductor device.

[0128] In this embodiment, the substrate 110 is a silicon substrate 110 with a crystal orientation of (111), the nucleation layer 130 is a periodically doped AlN superlattice structure, the stress transfer layer 180 is an AlGaN layer, the buffer layer 150 is a GaN layer, the channel layer 170 is a high-temperature GaN layer, and the barrier layer 190 is an AlGaN layer.

[0129] This embodiment further provides a method for preparing a semiconductor epitaxial structure 100, which is used to prepare the aforementioned semiconductor epitaxial structure 100. The method comprises the following steps:

[0130] S1 : growing a nucleation layer 130 on one side of the substrate 110 .

[0131] Specifically, the growth process of the nucleation layer 130 here is consistent with that of the aforementioned embodiment, and will not be described again here.

[0132] S2 : forming a stress transfer layer 180 on a side of the nucleation layer 130 away from the substrate 110 .

[0133] Specifically, after the superlattice structure is prepared and the nucleation layer 130 is grown, an AlGaN stress transfer layer 180 can be grown on the superlattice AlN nucleation layer 130. The stress transfer layer 180 can play a role in stress transfer so that the periodic stress changes in the nucleation layer 130 can be better transferred.

[0134] S3 : forming a buffer layer 150 on a side of the stress transfer layer 180 away from the substrate 110 .

[0135] Specifically, the buffer layer 150 may be directly grown on the stress transfer layer 180 , and the growth method is the same as that in the aforementioned embodiment, which will not be described in detail here.

[0136] S4 : forming a channel layer 170 on a side of the buffer layer 150 away from the substrate 110 .

[0137] S5 : forming a barrier layer 190 on a side of the channel layer 170 away from the substrate 110 .

[0138] The growth methods of the channel layer 170 and the barrier layer 190 may be specifically described in the third embodiment.

[0139] The actual process steps of the method for preparing the semiconductor epitaxial structure 100 provided in this embodiment are described below:

[0140] Step 1: Select a silicon substrate 110 with a crystal orientation of (111) and place it in a metal organic chemical vapor deposition device. Heat the substrate 110 to 1060° C. in a hydrogen atmosphere and desorb for 5 minutes to remove the oxide layer on the surface of the silicon substrate 110.

[0141] Step 2: Grow an AlN nucleation layer 130 having a doped superlattice structure on the surface of the substrate 110 after completing step 1. The growth of the superlattice nucleation layer 130 includes the following steps:

[0142] First, pre-flow the organometallic source TMAl. The TMAl pre-flow conditions are: substrate 110 temperature 1050°C, reaction chamber pressure 75 mbar, TMAl flow rate 100 sccm, and pre-flow time 40 seconds.

[0143] Then, a 10 nm non-doped AlN layer is grown to form the first thin film layer 131. The growth conditions are: substrate 110 temperature 1100° C., TMAl flow rate 300 sccm, NH 3 flow rate 3000 sccm, and growth time 3 min.

[0144] A 5 nm thick silicon-doped AlN layer was grown on the AlN layer on the first thin film layer 131 to form the second thin film layer 133. The growth conditions were: substrate 110 temperature 1100° C., reaction chamber pressure 75 mbar, TMAl flow rate 300 sccm, 200 ppm SiH4 / H2 flow rate 500 sccm, NH3 flow rate 3000 sccm, and growth time 1.5 min.

[0145] Repeating the growth of the first thin film layer 131 and the second thin film layer 133 for 15 cycles, thereby growing a superlattice AlN nucleation layer 130 with a total thickness of 225 nm;

[0146] Step 3: Grow an AlGaN stress transfer layer 180 on the superlattice AlN nucleation layer 130 formed in step 2. The stress transfer layer 180 contains 300nm of Al 0.75 Ga 0.25 N layer, 1000nm Al 0.5 Ga 0.5 N layer and 1500nm Al 0.2 Ga 0.8 For the N layer, the growth temperature is 1030°C, the pressure in the reaction chamber is 55 mbar, and the NH3 flow rate is 3000 sccm.

[0147] Step 4: A GaN buffer layer 150 is grown on the stress transfer layer 180 formed in step 3. The growth conditions are: substrate 110 temperature 980° C., reaction chamber pressure 55 mbar, TMGa flow rate 230 sccm, NH 3 flow rate 1500 sccm, growth time 30 min, and thickness 1500 nm.

[0148] Step 5: Grow a high-temperature GaN channel layer 170 on the GaN layer formed in Step 4. The growth conditions for the high-temperature GaN channel layer 170 are: a TMGa flow rate of 200 sccm, an NH3 flow rate of 30,000 sccm, a surface temperature of 1080°C, a growth rate of 2 μm / h, a growth time of 6 minutes, and a thickness of approximately 200 nm.

[0149] Step 6: Continue growing a barrier layer 190 on the GaN channel layer 170. The growth conditions for the barrier layer 190 are: a surface temperature of 1080°C, an NH3 flow rate of 8000 sccm; the AlN intercalation layer is grown at a TMAl flow rate of 400 sccm, a growth time of 16 seconds, and a thickness of approximately 1 nm; the AlGaN barrier layer 190 is grown at 200 sccm of TMAl and 200 sccm of TMGa, corresponding to an Al composition of approximately 20%, a growth time of 80 seconds, and a thickness of approximately 25 nm; and the GaN cap layer is grown at a TMGa flow rate of 150 sccm, a growth time of 20 seconds, and a thickness of 3 nm.

[0150] The epitaxial wafer prepared according to the above steps is a gallium nitride-based HEMT epitaxial wafer having a doped superlattice nucleation layer 130 on a Si substrate 110 .

[0151] Compared with the third embodiment, this embodiment adds a stress transfer layer 180, which is used to store sufficient compressive stress to balance the tensile stress generated by cooling after the growth of the gallium nitride-based epitaxial film on the silicon substrate 110 is completed, thereby obtaining an epitaxial wafer with low warpage.

[0152] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A semiconductor epitaxial structure, characterized in that: include: substrate; a nucleation layer located on the surface of the substrate; and a buffer layer located on a side of the nucleation layer away from the substrate; Wherein, the nucleation layer comprises a plurality of semiconductor periodic stacks stacked in sequence, at least one layer of the semiconductor periodic stack is a doped structure, and the plurality of semiconductor periodic stacks form a doped superlattice structure with different doping types; Each layer of the semiconductor periodic stack comprises a first thin film layer and a second thin film layer stacked in sequence, the first thin film layer is doped with a first dopant atom, and the second thin film layer is doped with a second dopant atom, wherein the first dopant atom and the second dopant atom are different types of dopant atoms; The substrate is one of silicon (Si), silicon carbide (SiC), and sapphire; and the nucleation layer is a doped AlN layer.

2. The semiconductor epitaxial structure according to claim 1, wherein: The first doping atom is at least one of In, Ga, Si, Mg and Zn; the second doping atom is at least one of In, Ga, Si, Mg and Zn.

3. The semiconductor epitaxial structure according to claim 1, wherein: The doping concentration of the first doping atoms in the first thin film layer and the doping concentration of the second doping atoms in the second thin film layer are both between 1E16 / cm 3 and 1E21 / cm 3 .

4. The semiconductor epitaxial structure according to claim 1, wherein: The thickness of the first thin film layer and the second thin film layer are both between 1-20 nm.

5. The semiconductor epitaxial structure according to claim 1, wherein: The number of layers of the semiconductor periodic stack is greater than or equal to 3.

6. The semiconductor epitaxial structure according to claim 1, wherein: The thickness of the nucleation layer is between 20-250 nm.

7. The semiconductor epitaxial structure according to claim 1, wherein: The semiconductor epitaxial structure further includes: a stress transfer layer located between the buffer layer and the nucleation layer; Wherein, both side surfaces of the stress transfer layer are in contact with the nucleation layer and the buffer layer respectively.

8. The semiconductor epitaxial structure according to any one of claims 1 to 7, characterized in that: The semiconductor epitaxial structure further includes: a channel layer located on a side of the buffer layer away from the substrate; and a barrier layer located on a side of the channel layer away from the substrate.

9. A method for preparing a semiconductor epitaxial structure, characterized in that: The preparation method comprises: Providing a substrate, wherein the substrate is one of silicon (Si), silicon carbide (SiC), and sapphire; growing a nucleation layer on the surface of the substrate, wherein the nucleation layer is a doped AlN layer; growing a buffer layer on a side of the nucleation layer away from the substrate; The nucleation layer comprises a plurality of semiconductor periodic stacks stacked in sequence, at least one layer of the semiconductor periodic stack is a doped structure, and the plurality of semiconductor periodic stacks form a doped superlattice structure with different doping types; The step of growing a nucleation layer on the surface of the substrate comprises: growing a first thin film layer doped with first doping atoms on the substrate; growing a second thin film layer doped with second doping atoms on the first thin film layer; Repeating the steps of growing the first thin film layer and the second thin film layer several times to obtain the nucleation layer; The first doping atom and the second doping atom are different types of doping atoms.

10. The method for preparing a semiconductor epitaxial structure according to claim 9, wherein: Before the step of growing a buffer layer on a side of the nucleation layer away from the substrate, the preparation method further comprises: A stress transfer layer is grown on a side of the nucleation layer away from the substrate.

11. The method for preparing a semiconductor epitaxial structure according to claim 9 or 10, characterized in that: After the step of growing a buffer layer on a side of the nucleation layer away from the substrate, the preparation method further comprises: growing a channel layer on a side of the buffer layer away from the substrate; A barrier layer is grown on a side of the channel layer away from the substrate.

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