A surface acoustic wave filter wafer level packaging structure and a manufacturing method thereof

Abstract

The application discloses a surface acoustic wave filter wafer level packaging structure and a manufacturing method thereof. The surface acoustic wave filter wafer level packaging structure comprises a wafer, a first surface of the wafer is provided with a surface acoustic wave filter, wherein the surface acoustic wave filter comprises an interdigital transducer and at least two electrodes, and a part of the electrodes protrudes from the edge of the wafer; a cofferdam layer is located between the interdigital transducer and the electrodes and surrounds the interdigital transducer, and the thickness of the cofferdam layer is greater than the thickness of the interdigital transducer; a shielding layer is located on the side of the cofferdam layer away from the wafer; a packaging layer is located on the side of the shielding layer away from the wafer, the packaging layer covers the first surface of the wafer, the surface of the electrode away from the wafer, the cofferdam layer and the shielding layer, and the packaging layer is provided with a groove adjacent to the surface of the wafer, and the side wall of the groove exposes the side surface of the electrode. The packaging structure and the manufacturing method thereof provided in the embodiment can improve the sealing performance of the wafer and the reliability of the surface acoustic wave filter wafer level packaging structure.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a surface acoustic wave filter wafer level packaging structure and a manufacturing method thereof. BACKGROUND

[0002] The surface acoustic wave filter is a core component in wireless communication system, and has been widely used in wireless communication system such as mobile communication, navigation, satellite communication and radar.

[0003] The surface acoustic wave filter wafer level packaging is an essential link in the manufacturing process of the surface acoustic wave filter, and the existing packaging structure can expose the circuit and the electrode on the wafer, and has poor sealing performance and reliability. SUMMARY

[0004] The present application provides a surface acoustic wave filter wafer level packaging structure and a manufacturing method thereof, which can improve the sealing performance of the wafer and the reliability of the surface acoustic wave filter wafer level packaging structure.

[0005] According to a first aspect of the present application, a surface acoustic wave filter wafer level packaging structure is provided, which comprises:

[0006] a wafer, a first surface of the wafer being provided with a surface acoustic wave filter, wherein the surface acoustic wave filter comprises an interdigital transducer and at least two electrodes, and a part of the electrodes protrudes from the edge of the wafer;

[0007] a cofferdam layer located between the interdigital transducer and the electrodes and surrounding the interdigital transducer, the thickness of the cofferdam layer being greater than the thickness of the interdigital transducer;

[0008] a shielding layer located on the side of the cofferdam layer away from the wafer;

[0009] a packaging layer located on the side of the shielding layer away from the wafer, the packaging layer covering the first surface of the wafer, the surface of the electrodes away from the wafer, the cofferdam layer and the shielding layer, and the packaging layer being provided with a groove adjacent to the surface of the wafer, and the side wall of the groove exposing the side surface of the electrodes;

[0010] a first passivation layer located on the second surface of the wafer opposite to the first surface and covering the wafer and the surface of the electrodes away from the packaging layer;

[0011] a re-wiring layer located on the side of the first passivation layer away from the packaging layer and extending to the side edge of the electrodes and connected with the electrodes.

[0012] Optionally, the surface acoustic wave filter wafer level packaging structure provided by the embodiment further comprises a second passivation layer.

[0013] The second passivation layer is located on a side of the re-wiring layer away from the wafer, and the second passivation layer comprises a through hole exposing part of the re-wiring layer.

[0014] Optionally, the surface acoustic wave filter wafer level packaging structure provided by the embodiment further comprises a bump;

[0015] The bump is connected with the re-wiring layer through the through hole.

[0016] Optionally, the thickness of the dam layer is greater than 1 μm.

[0017] The thickness of the shielding layer is greater than 1 μm.

[0018] Optionally, the material of the dam layer comprises photoresist.

[0019] The material of the shielding layer comprises photoresist.

[0020] The material of the first passivation layer comprises photoresist.

[0021] The material of the second passivation layer comprises photoresist.

[0022] According to another aspect of the present application, a method for manufacturing a surface acoustic wave filter wafer level packaging structure is provided, which comprises:

[0023] Providing a wafer, wherein a first surface of the wafer is provided with at least one surface acoustic wave filter, and the surface acoustic wave filter comprises an interdigital transducer and at least two electrodes;

[0024] Forming a dam layer between the interdigital transducer and the electrodes, so that the dam layer surrounds the interdigital transducer, and the thickness of the dam layer is greater than the thickness of the interdigital transducer;

[0025] Forming a shielding layer on a side of the dam layer away from the wafer;

[0026] Forming a packaging layer on a side of the shielding layer away from the wafer, so that the packaging layer covers the first surface of the wafer, the surface of the electrodes away from the wafer, the dam layer and the shielding layer;

[0027] Etching a second surface of the wafer opposite to the first surface to form an etching groove, wherein part of the electrodes is exposed by the etching groove;

[0028] Forming a first passivation layer on the second surface of the wafer, so that the first passivation layer covers the wafer and the surface of the exposed electrodes away from the packaging layer;

[0029] cutting the first passivation layer and part of the encapsulation layer on a side of the first passivation layer away from the encapsulation layer to form a groove, so that a side wall of the groove exposes a side surface of the electrode;

[0030] forming a rewiring layer on a side of the first passivation layer away from the encapsulation layer, wherein the rewiring layer is connected to the exposed side surface of the electrode and extends to a side surface and part of a bottom surface of the groove;

[0031] cutting the encapsulation layer in each of the grooves to form the SAW filter wafer-level packaging structure.

[0032] Optionally, before the encapsulation layer is formed on a side of the shielding layer away from the wafer, the method further comprises:

[0033] irradiating a splitting region of the wafer with a laser to form a modified layer, the modified layer being located inside the wafer, the modified layer comprising a crack, wherein the splitting region is located between two adjacent SAW filters.

[0034] Optionally, before the second surface of the wafer opposite to the first surface is etched to form an etching groove, the method further comprises:

[0035] thinning the second surface of the wafer.

[0036] Optionally, after the rewiring layer is formed on a side of the first passivation layer away from the encapsulation layer, the method further comprises:

[0037] forming a second passivation layer on a side of the rewiring layer away from the encapsulation layer, wherein the second passivation layer comprises a via hole, and the via hole exposes part of the rewiring layer.

[0038] Optionally, after the second passivation layer is formed, the method further comprises:

[0039] forming a bump, so that the bump is connected to the rewiring layer through the via hole.

[0040] The embodiment provides a surface acoustic wave filter wafer level packaging structure, a cofferdam layer, a shielding layer and a wafer in the surface acoustic wave filter wafer level packaging structure form a cavity, and an interdigital transducer is located in the cavity, so that the interdigital transducer is sealed and protected, a packaging layer covers a first surface of the wafer, a surface of the electrode away from the wafer, the shielding layer and the cofferdam layer, so that the first surface of the wafer and the surface of the electrode away from the wafer are not exposed, and the interdigital transducer in the cavity is sealed again, the sealing property and the reliability are improved. The side surface of the electrode is exposed through the groove sidewall in the packaging layer, so that the rewiring layer can be connected with the side surface of the electrode. The first passivation layer is arranged on a second surface of the wafer opposite to the first surface, and the first passivation layer covers the second surface of the wafer, so that the second surface of the wafer is prevented from being exposed, and the side, away from the packaging layer, of the first passivation layer is provided with the rewiring layer, so that the rewiring layer is attached and is not easy to fall off.

[0041] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present application, nor is it used to limit the scope of the present application. Other features of the present application will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0042] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0043] Figure 1 is a structural schematic diagram of a surface acoustic wave filter wafer level packaging structure provided by the embodiment of the present application;

[0044] Figure 2 is a flowchart of a manufacturing method of a surface acoustic wave filter wafer level packaging structure provided by the embodiment of the present application;

[0045] Figures 3-14 is a process structural schematic diagram of forming the surface acoustic wave filter wafer level packaging structure provided by the embodiment of the present application. DETAILED DESCRIPTION

[0046] In order to enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be described clearly and completely in the following with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor should be within the scope of protection of the present application.

[0047] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0048] Figure 1 is a schematic structural diagram of a surface acoustic wave filter wafer-level packaging structure provided according to an embodiment of the present invention, with reference to Figure 1 The surface acoustic wave filter wafer-level packaging structure provided in this embodiment includes: a wafer 110, a surface acoustic wave filter is provided on the first surface of the wafer 110, wherein the surface acoustic wave filter includes an interdigital transducer 111 and at least two electrodes 112, and a portion of the electrode 112 protrudes from the edge of the wafer 110; a cofferdam layer 120, located between the interdigital transducer 111 and the electrode 112 and surrounding the interdigital transducer 111, and the thickness of the cofferdam layer 120 is greater than the thickness of the interdigital transducer 111; a shielding layer 130, located on the side of the cofferdam layer 120 away from the wafer 110; and a packaging layer 140, located on the side of the shielding layer 130 away from the wafer 110. On the side away from the wafer 110, the packaging layer 140 covers the first surface of the wafer 110, the surface of the electrode 112 away from the wafer 110, the cofferdam layer 120 and the shielding layer 130. The packaging layer 140 is provided with a groove on the surface adjacent to the wafer 110, and the side wall of the groove exposes the side of the electrode 112; the first passivation layer 150 is located on the second surface of the wafer 110 opposite to the first surface and covers the surface of the wafer 110 and the exposed electrode 112 away from the packaging layer 140; the rewiring layer 160 is located on the side of the first passivation layer 150 away from the packaging layer 140 and extends to the side of the electrode 112 to connect with the electrode 112.

[0049] Specifically, by setting the thickness of the dam layer 120 to be greater than the thickness of the IDT 111, the dam layer 120, the shielding layer 130 and the wafer 110 can form a cavity, so that the cavity can accommodate the IDT 111, thereby sealing and protecting the IDT 111. The packaging layer 140 covers the first surface of the wafer 110 and the electrode 112 away from the surface of the wafer 110, which can protect the first surface of the wafer 110 and the electrode 112 away from the surface of the wafer 110 from damage. The packaging layer 140 covers the dam layer 120 and the shielding layer 130, thereby further sealing the IDT 111, thereby enhancing the sealing strength and reliability of the surface acoustic wave filter wafer-level packaging structure. The sidewalls of the groove in the packaging layer 140 expose the side of the electrode 112, allowing the rewiring layer 160 to be connected to the side of the electrode 112. The material of the first passivation layer 150 can be photoresist or silicon dioxide. The first passivation layer 150 has insulating properties and can protect the second surface of the wafer 110 from damage. The rewiring layer 160 is conductive and can be made of metal. The rewiring layer 160 is used to transmit signals. Metal leads may exist in some areas of the second surface of the wafer 110, and the second surface of the wafer 110 has a large roughness and hardness. If the rewiring layer 160 is directly attached to the second surface of the wafer 110, it will cause the rewiring layer 160 to directly contact the second surface of the wafer 110, causing a short circuit problem. It is also easy for the rewiring layer 160 to fall off. Therefore, the first passivation layer 150 is provided on the second surface of the wafer 110, and the rewiring layer 160 is provided on the side of the first passivation layer 150 away from the packaging layer 140. This is less likely to cause a short circuit problem and less likely to cause the rewiring layer 160 to fall off, thereby improving the reliability of the wafer-level packaging structure of the surface acoustic wave filter. The rewiring layers 160 connected to different electrodes 112 are not connected, thereby avoiding a short circuit problem.

[0050] The embodiment provides a surface acoustic wave filter wafer level packaging structure, a cofferdam layer, a shielding layer and a wafer in the surface acoustic wave filter wafer level packaging structure constitute a cavity, and an interdigital transducer is located in the cavity, so that the interdigital transducer is sealed and protected, a packaging layer covers a first surface of the wafer, a surface of an electrode away from the wafer, the shielding layer and the cofferdam layer, so that the first surface of the wafer and the surface of the electrode away from the wafer are not exposed, and the interdigital transducer in the cavity is sealed again, the sealing property and the reliability are improved. The side surface of the electrode is exposed through a groove sidewall in the packaging layer, so that a rewiring layer can be connected with the side surface of the electrode. A first passivation layer is arranged on a second surface of the wafer opposite to the first surface, the first passivation layer covers the second surface of the wafer, so that the second surface of the wafer can be prevented from being exposed, and a side of the first passivation layer away from the packaging layer has the rewiring layer, so that the rewiring layer is attached and is not easy to fall off. The surface acoustic wave filter wafer level packaging structure provided by the embodiment can improve the sealing property of the wafer and the reliability of the surface acoustic wave filter wafer level packaging structure.

[0051] Optionally, with reference to Figure 1 the surface acoustic wave filter wafer level packaging structure provided by the embodiment further comprises a second passivation layer 170; the second passivation layer 170 is located on a side of the rewiring layer 160 away from the wafer 110, and the second passivation layer 170 comprises a through hole, and a part of the rewiring layer 160 is exposed in the through hole.

[0052] Specifically, the second passivation layer 170 has insulation, and the second passivation layer 170 is used for protecting the rewiring layer 160 and preventing the rewiring layer 160 from being exposed for a long time and in a large area to cause damage to the surface acoustic wave filter wafer level packaging structure. The part of the rewiring layer 160 exposed in the through hole in the second passivation layer 170 facilitates connection of the rewiring layer 160 with an external device.

[0053] Optionally, with reference to Figure 1 the surface acoustic wave filter wafer level packaging structure provided by the embodiment further comprises a bump 180; the bump 180 is connected with the rewiring layer 160 through the through hole.

[0054] Specifically, the shape of the bump 180 can be hemispherical or cuboid, and the material of the bump 180 can be metal, the bump 180 is used for connection with an external device, and the bump 180 can transmit a signal to the external device and receive a signal sent by the external device.

[0055] Optionally, the thickness of the cofferdam layer is greater than 1 mu m, and the thickness of the shielding layer is greater than 1 mu m.

[0056] Specifically, the thickness of the cofferdam layer and the thickness of the shielding layer are both greater than 1 mu m, so that the cofferdam layer and the shielding layer are facilitated to be manufactured.

[0057] Optionally, the material of the bank layer includes photoresist; the material of the shielding layer includes photoresist; the material of the first passivation layer includes photoresist; and the material of the second passivation layer includes photoresist.

[0058] Specifically, the photoresist is insulating and curable. The bank layer and the shielding layer are made of the same material, which provides good compatibility and enhances sealing strength. The first passivation layer is made of photoresist, facilitating the attachment of the rewiring layer. The second passivation layer is also made of photoresist, protecting the rewiring layer.

[0059] Figure 2 FIG. 1 is a flow chart of a method for manufacturing a surface acoustic wave filter wafer-level packaging structure according to an embodiment of the present invention, with reference to FIG. Figure 2 The manufacturing method provided in this embodiment includes the following steps:

[0060] S110 , providing a wafer, wherein at least one surface acoustic wave filter is provided on a first surface of the wafer, wherein the surface acoustic wave filter includes an interdigital transducer and at least two electrodes.

[0061] S120 , forming a dam layer between the IDT and the electrode, so that the dam layer surrounds the IDT, and the thickness of the dam layer is greater than the thickness of the IDT.

[0062] Specifically, refer to Figure 3 , Figure 3 FIG. 1 is a schematic diagram of the structure after the bank layer 120 is formed. The bank layer 120 may be formed by using a semiconductor photolithography method.

[0063] S130 , forming a shielding layer on a side of the dam layer away from the wafer.

[0064] Specifically, refer to Figure 4 , Figure 4 FIG. 1 is a schematic diagram of the structure after the shielding layer 130 is formed. The shielding layer 130 can be formed on the side of the dam layer 120 away from the wafer 110 by lamination or bonding.

[0065] Optionally, before forming the packaging layer on the side of the shielding layer away from the wafer, the method further includes: using laser to irradiate the split area of ​​the wafer to form a modified layer, the modified layer is located inside the wafer, the modified layer includes cracks, and the split area is located between two adjacent surface acoustic wave filters.

[0066] Specifically, refer to Figure 5 , Figure 5This is a schematic diagram of the structure before the packaging layer is made and after the modified layer 113 is formed. Due to the large difference in thermal expansion coefficients between the wafer 110 and the packaging layer, the thermal expansion coefficient of the packaging layer is greater than the thermal expansion coefficient of the wafer 110. If the packaging layer is made directly on the first surface of the wafer 110, the packaging layer will pull the wafer after expansion, causing cracks to appear on the wafer, and the location of the cracks is not fixed. If the modified layer 113 including cracks is made inside the divided area of ​​the wafer 110, then when the packaging layer is made, the cracks caused by the different thermal expansion coefficients between the packaging layer and the wafer 110 will crack along the cracks in the modified layer 113, and will not cause cracks in other places of the wafer 110, thereby improving the yield of the wafer-level packaging structure of the surface acoustic wave filter. The modified layer 113 is located inside the wafer 110 and will not cause the wafer 110 to separate. An invisible laser cutting process can be used to process the inside of the divided area of ​​the wafer 110 using a semi-transparent wavelength laser to form the modified layer 113.

[0067] S140 , forming a packaging layer on a side of the shielding layer away from the wafer, so that the packaging layer covers the first surface of the wafer, the surface of the electrode away from the wafer, the dam layer and the shielding layer.

[0068] Specifically, refer to Figure 6 , Figure 6 1 is a schematic diagram of the structure after the encapsulation layer 140 is formed. Specifically, the encapsulation layer 140 can be formed on the first surface of the wafer 110 using a wafer molding process. The encapsulation layer 140 can be made of an insulating and corrosion-resistant material such as epoxy resin.

[0069] Optionally, before etching the second surface of the wafer opposite to the first surface to form the etched grooves, the method further includes: thinning the second surface of the wafer.

[0070] refer to Figure 7 , Figure 7 This is a schematic diagram of the structure after thinning the second surface of wafer 110, which is opposite the first surface, before etching to form etched grooves. Thinning wafer 110 can reduce the final volume. After thinning wafer 110 to the target thickness, the second surface of wafer 110 is polished until the blackened layer on the second surface of wafer 110 is removed and electrodes 112 are visible from the second surface of wafer 110. This arrangement facilitates subsequent processing and alignment.

[0071] S150 , etching a second surface of the wafer opposite to the first surface to form an etched groove, wherein the etched groove exposes a portion of the electrode.

[0072] Specifically, refer to Figure 8 , Figure 8This is a structural diagram after etching the second surface of the wafer 110 opposite to the first surface to form an etched groove 114. The angle between the sidewall of the etched groove 114 and the surface of the packaging layer 140 close to the wafer 110 can be 90° or greater than 90°.

[0073] S160 , forming a first passivation layer on the second surface of the wafer, so that the first passivation layer covers the wafer and the exposed electrode away from the surface of the packaging layer.

[0074] Specifically, refer to Figure 9 , Figure 9 FIG1 is a schematic diagram of the structure after forming the first passivation layer 150. The first passivation layer 150 can be formed by coating a photoresist.

[0075] S170 , cutting the first passivation layer and a portion of the encapsulation layer on a side of the first passivation layer away from the encapsulation layer to form a groove, so that the side wall of the groove exposes the side surface of the electrode.

[0076] Specifically, refer to Figure 10 , Figure 10 To form the structural diagram of the groove 115, mechanical cutting or laser cutting can be used to cut off the electrode 112 and cut into the packaging layer 140 to expose the side of the electrode 112. The angle between the side wall of the groove 115 and the bottom surface of the groove 115 can be 90° or greater than 90°. Figure 8 and Figure 10 The depth of the groove 115 is greater than the depth of the etched groove 114 , and along the arrangement direction of the surface acoustic wave filter, the bottom length of the groove 115 is less than the bottom length of the etched groove 114 .

[0077] S180 , forming a redistribution layer on a side of the first passivation layer away from the encapsulation layer, wherein the redistribution layer is connected to the side of the exposed electrode and extends to the side surface and a portion of the bottom surface of the groove.

[0078] Specifically, refer to Figure 11 , Figure 11 Schematic diagram of the structure after the redistribution layer 160 is formed. The redistribution layer 160 is located on a side of the wafer 110 away from the packaging layer 140 .

[0079] Optionally, after forming the rewiring layer on the side of the first passivation layer away from the encapsulation layer, the method further includes: forming a second passivation layer on the side of the rewiring layer away from the encapsulation layer, wherein the second passivation layer includes a through hole, and the through hole exposes a portion of the rewiring layer.

[0080] Specifically, refer to Figure 12 , Figure 12 1 is a schematic structural diagram of forming a second passivation layer 170 on a side of the rewiring layer 160 away from the encapsulation layer 140 .

[0081] Optionally, after forming the second passivation layer, the method further includes: forming bumps, so that the bumps pass through the through holes and connect to the rewiring layer.

[0082] Specifically, refer to Figure 13 , Figure 13 FIG. 1 is a schematic diagram of the structure after forming the bumps 180. The bumps 180 can be formed on the exposed portion of the redistribution layer 160 on the back side of the wafer 110 by using a printing or ball planting process.

[0083] S190 , cutting the packaging layer in each groove to form a surface acoustic wave filter wafer-level packaging structure.

[0084] Specifically, refer to Figure 14 , Figure 14 FIG. 1 is a schematic diagram of the structure after the encapsulation layer 140 is cut along the cutting line in each groove. The cutting can be performed along the cutting line by mechanical cutting or laser cutting.

[0085] The manufacturing method of the surface acoustic wave filter wafer-level packaging structure provided by the embodiment of the present invention has corresponding beneficial effects as the surface acoustic wave filter wafer-level packaging structure provided by any embodiment of the present invention. The technical details not detailed in this embodiment are detailed in the surface acoustic wave filter wafer-level packaging structure provided by any embodiment of the present invention.

[0086] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in the present invention can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved. This is not limited herein.

[0087] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A surface acoustic wave filter wafer-level packaging structure, characterized in that: include: A wafer, wherein a surface acoustic wave filter is provided on a first surface of the wafer, wherein the surface acoustic wave filter includes an interdigital transducer and at least two electrodes, and portions of the electrodes protrude from an edge of the wafer; a dam layer, located between the IDT and the electrode and surrounding the IDT, wherein the thickness of the dam layer is greater than the thickness of the IDT; a shielding layer, located on a side of the dam layer away from the wafer; an encapsulation layer, located on a side of the shielding layer away from the wafer, the encapsulation layer covering the first surface of the wafer, the surface of the electrode away from the wafer, the dam layer, and the shielding layer; the encapsulation layer is provided with a groove adjacent to the surface of the wafer, the sidewall of the groove exposing the side surface of the electrode; a first passivation layer, located on a second surface of the wafer opposite to the first surface and covering the wafer and the exposed surface of the electrode away from the packaging layer; a redistribution layer, located on a side of the first passivation layer away from the encapsulation layer and extending to a side of the electrode to be connected to the electrode; The rewiring layers connected to different electrodes are not connected.

2. The surface acoustic wave filter wafer-level packaging structure according to claim 1, wherein: Also comprising a second passivation layer; The second passivation layer is located on a side of the re-distribution layer away from the wafer. The second passivation layer includes a through hole, and the through hole exposes a portion of the re-distribution layer.

3. The surface acoustic wave filter wafer-level packaging structure according to claim 2, wherein: Also includes bumps; The bump is connected to the rewiring layer through the through hole.

4. The surface acoustic wave filter wafer-level packaging structure according to claim 1, wherein: The thickness of the cofferdam layer is greater than 1 μm; The shielding layer has a thickness greater than 1 μm.

5. The surface acoustic wave filter wafer-level packaging structure according to claim 2, wherein: The material of the bank layer includes photoresist; The material of the shielding layer includes photoresist; The material of the first passivation layer includes photoresist; The material of the second passivation layer includes photoresist.

6. A method for manufacturing a surface acoustic wave filter wafer-level packaging structure, characterized in that: include: A wafer is provided, wherein at least one surface acoustic wave filter is provided on a first surface of the wafer, wherein the surface acoustic wave filter includes an interdigital transducer and at least two electrodes; forming a dam layer between the IDT and the electrode, so that the dam layer surrounds the IDT, and the thickness of the dam layer is greater than the thickness of the IDT; forming a shielding layer on a side of the dam layer away from the wafer; forming an encapsulation layer on a side of the shielding layer away from the wafer, so that the encapsulation layer covers the first surface of the wafer, the surface of the electrode away from the wafer, the dam layer and the shielding layer; Etching a second surface of the wafer opposite to the first surface to form an etched groove, wherein the etched groove exposes a portion of the electrode; forming a first passivation layer on the second surface of the wafer, so that the first passivation layer covers the wafer and the exposed electrode away from the surface of the packaging layer; cutting the first passivation layer and a portion of the encapsulation layer on a side of the first passivation layer away from the encapsulation layer to form a groove, so that the sidewall of the groove exposes the side surface of the electrode; forming a redistribution layer on a side of the first passivation layer away from the encapsulation layer, wherein the redistribution layer is connected to the side of the exposed electrode and extends to the side and a portion of the bottom of the groove; and the redistribution layer connected to different electrodes is not connected; The packaging layer at a position not covered by the rewiring layer is cut in each groove to form the surface acoustic wave filter wafer-level packaging structure.

7. The production method according to claim 6, characterized in that: Before forming the packaging layer on the side of the shielding layer away from the wafer, the method further includes: Laser is used to irradiate the divided area of ​​the wafer to form a modified layer, the modified layer is located inside the wafer, and the modified layer includes cracks, wherein the divided area is located between two adjacent surface acoustic wave filters.

8. The manufacturing method according to claim 6, characterized in that: Before etching the second surface of the wafer opposite to the first surface to form an etched groove, the method further includes: The second surface of the wafer is thinned.

9. The manufacturing method according to claim 6, characterized in that: After forming a rewiring layer on a side of the first passivation layer away from the encapsulation layer, the method further comprises: A second passivation layer is formed on a side of the rewiring layer away from the encapsulation layer, wherein the second passivation layer includes a through hole, and the through hole exposes a portion of the rewiring layer.

10. The manufacturing method according to claim 9, characterized in that: After forming the second passivation layer, the method further includes: Bumps are formed so as to pass through the through holes and connect to the rewiring layer.

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