Schottky diodes and their fabrication methods

Abstract

This application discloses a Schottky diode and its fabrication method, relating to the field of semiconductor chip manufacturing technology. The Schottky diode fabrication method first provides a Schottky diode chip with a barrier layer. Then, a front electrode is formed on the side of the Schottky diode chip with the barrier layer, the front electrode comprising a first metal layer, a nickel metal layer, and a gold metal layer; a second metal layer is formed on the side of the Schottky diode chip without the barrier layer as a back electrode. The first metal layer does not include silver. Thus, the front electrode of the fabricated Schottky diode does not contain silver ions, thereby avoiding the problem of silver ion migration and extending the lifespan of the Schottky diode.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor chip manufacturing, in particular to a Schottky diode and a preparation method thereof. BACKGROUND

[0002] Unlike a PN junction diode composed of a P-type semiconductor (also known as a hole-type semiconductor) and an N-type semiconductor (also known as an electron-type semiconductor), a Schottky diode (SBD) refers to a diode made by using the principle of a metal-semiconductor junction formed by the contact between a metal and a semiconductor. When preparing a Schottky diode, a front electrode (i.e., an anode) needs to be formed on the front surface of a Schottky diode chip, and a back electrode (i.e., a cathode) needs to be formed on the back surface of the Schottky diode chip.

[0003] In related technologies, the front electrode of a Schottky diode is generally a three-layer metal structure of titanium, nickel, and silver or a three-layer metal structure of vanadium, nickel, and silver. However, the front electrode of a Schottky diode with such a structure is prone to silver ion migration when it works under high-frequency conditions, which can cause the Schottky diode to fail. SUMMARY

[0004] The present application provides a Schottky diode and a preparation method thereof, which can solve the problem that the front electrode of a Schottky diode in related technologies is prone to silver ion migration when it works under high-frequency conditions, thereby prolonging the service life of the Schottky diode. The technical solution is as follows:

[0005] In a first aspect, a preparation method of a Schottky diode is provided, which includes:

[0006] including:

[0007] A Schottky diode chip is provided, which includes a substrate layer, an epitaxial layer, and a barrier layer, the epitaxial layer and the substrate layer are stacked along a preset direction; along a direction perpendicular to the preset direction, the epitaxial layer has a first region and a second region surrounding the first region, and the barrier layer is located on a side of the epitaxial layer away from the substrate layer and is embedded in the first region of the epitaxial layer;

[0008] A first metal layer covering at least the barrier layer is formed on a side of the Schottky diode chip having the barrier layer, the material of the first metal layer includes aluminum metal and does not include silver metal;

[0009] Chemical nickel plating is performed on the first metal layer on a side of the first metal layer away from the barrier layer to form a nickel metal layer;

[0010] forming a gold metal layer on the nickel metal layer far away from the first metal layer by electroless plating;

[0011] forming a second metal layer on the side of the Schottky diode chip without the barrier layer.

[0012] In the present application, when a Schottky diode is prepared, a Schottky diode chip is first provided, which has a barrier layer. Then, a front electrode is formed on the side of the Schottky diode chip with the barrier layer, which includes a first metal layer and a nickel metal layer and a gold metal layer; and a second metal layer is formed on the side of the Schottky diode chip without the barrier layer as a back electrode. The first metal layer does not include metal silver. In this way, the front electrode of the Schottky diode formed does not include silver ions, and therefore the problem of silver ion migration does not occur, thereby prolonging the service life of the Schottky diode.

[0013] In a second aspect, a preparation method of a Schottky diode is provided, which includes:

[0014] providing a Schottky diode chip, which includes a substrate layer, an epitaxial layer and a barrier layer, the epitaxial layer and the substrate layer are stacked along a preset direction; along a direction perpendicular to the preset direction, the epitaxial layer has a first region and a second region surrounding the first region, and the barrier layer is located on the side of the epitaxial layer far away from the substrate layer and embedded in the first region of the epitaxial layer;

[0015] forming a first metal layer covering at least the barrier layer on the side of the Schottky diode chip with the barrier layer, the material of the first metal layer includes metal aluminum;

[0016] forming a second metal layer on the side of the Schottky diode chip without the barrier layer, the material of the second metal layer includes metal aluminum;

[0017] forming a first nickel metal layer and a second nickel metal layer by electroless plating nickel on the side of the first metal layer and the second metal layer far away from the barrier layer, respectively;

[0018] forming a first gold metal layer and a second gold metal layer by electroless plating gold on the side of the first nickel metal layer and the second nickel metal layer far away from the barrier layer, respectively.

[0019] In a third aspect, a Schottky diode is provided, which is prepared by the preparation method of any one of the first aspect and the second aspect, and includes a Schottky diode chip, a first metal layer, a nickel metal layer, a gold metal layer and a second metal layer.

[0020] The Schottky diode chip comprises a substrate layer, an epitaxial layer and a barrier layer, the epitaxial layer and the substrate layer are stacked along a preset direction; the epitaxial layer has a first region and a second region surrounding the first region along a direction perpendicular to the preset direction, and the barrier layer is located on a side of the epitaxial layer away from the substrate layer and embedded in the first region of the epitaxial layer;

[0021] The first metal layer is located on a side of the barrier layer away from the Schottky diode chip, and the first metal layer at least covers the barrier layer;

[0022] The nickel metal layer is located on a side of the first metal layer away from the barrier layer;

[0023] The gold metal layer is located on a side of the nickel metal layer away from the first metal layer;

[0024] The second metal layer is located on a side of the Schottky diode chip without the barrier layer.

[0025] The technical effects obtained by the above-mentioned second aspect and third aspect are similar to the technical effects obtained by the corresponding technical means in the above-mentioned first aspect, and will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figures 1 to 5 is a preparation flowchart of a Schottky diode provided by an embodiment of the present application;

[0027] Figure 6 is a structural schematic diagram of a Schottky diode chip provided by an embodiment of the present application;

[0028] Figures 7 to 17 is a preparation flowchart of a Schottky diode chip provided by an embodiment of the present application;

[0029] Figure 18 is a cross-sectional structural schematic diagram of a first metal layer provided by an embodiment of the present application;

[0030] Figures 19 to 24 is a preparation flowchart of a first metal layer provided by an embodiment of the present application;

[0031] Figure 25 is a structural schematic diagram of a passivation layer provided by an embodiment of the present application;

[0032] Figures 26 to 28 is a flowchart of electroless nickel plating and electroless gold plating provided by an embodiment of the present application;

[0033] Figure 29 is a structural schematic diagram of a Schottky diode provided by an embodiment of the present application;

[0034] Figures 30 to 33 is a preparation flowchart of a Schottky diode provided in Embodiment Four of the present application;

[0035] Figure 34 is a structure schematic diagram of a passivation layer provided in Embodiment Five of the present application;

[0036] Figure 35 is a structure schematic diagram of a Schottky diode provided in Embodiment Five of the present application.

[0037] In which, the meaning represented by each figure number is respectively:

[0038] 10, Schottky diode chip; 101, photoresist; 102, first region; 104, second region; 110, substrate layer; 120, epitaxial layer; 1202, epitaxial prefabricated layer; 1204, boron ring; 130, barrier layer; 1302, contact area pattern; 1304, barrier metal; 140, protection ring; 1402, silicon dioxide film; 1404, window pattern; 142, third region; 144, fourth region; 20, Schottky diode; 210, first metal layer; 212, first sub-metal layer; 2122, titanium metal layer; 213, patterned structure; 214, second sub-metal layer; 2142, aluminum metal layer; 220, first nickel metal layer; 230, first gold metal layer; 240, second metal layer; 242, third sub-metal layer; 244, fourth sub-metal layer; 250, passivation layer; 252, via hole; 260, zinc metal layer; 270, second nickel metal layer; 280, second gold metal layer. DETAILED DESCRIPTION

[0039] In order to make the purpose, technical scheme and advantages of the present application more clear, the embodiments of the present application will be further described in detail below with reference to the drawings.

[0040] It should be understood that the "multiple" mentioned in the present application refers to two or more than two. In the description of the present application, unless otherwise specified, " / " represents the meaning of or, for example, A / B can represent A or B; "and / or" in the present application is only a description of the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of A alone, A and B together, and B alone. In addition, in order to clearly describe the technical scheme of the present application, the same items or similar items with basically the same function and role are distinguished by using "first", "second" and the like. The skilled in the art can understand that "first", "second" and the like do not limit the quantity and execution order, and "first", "second" and the like do not necessarily mean different.

[0041] The preparation method of the Schottky diode provided in the embodiments of the present application is explained and described in detail below.

[0042] The preparation method of the Schottky diode provided in the embodiments of the present application includes two schemes. In the first scheme, the front electrode of the Schottky diode is formed first, and then the back electrode of the Schottky diode is formed. The first scheme includes Embodiment One, Embodiment Two and Embodiment Three.

[0043] Embodiment One:

[0044] Figures 1 to 5 is a preparation flowchart of a Schottky diode 20 provided in Embodiment One of the present application. As shown in Figures 1 to 5 , the preparation method includes the following steps S110 to S150.

[0045] S110, providing a Schottky diode chip 10.

[0046] The Schottky diode 20 includes the Schottky diode chip 10, a front electrode located on the front side of the Schottky diode chip 10, and a back electrode located on the back side of the Schottky diode chip 10. Therefore, when preparing the Schottky diode 20, the Schottky diode chip 10 needs to be provided first. As shown in Figure 1 , the Schottky diode chip 10 includes a substrate layer 110, an epitaxial layer 120 and a barrier layer 130. The substrate layer 110 can be a heavily doped silicon substrate. The epitaxial layer 120 can be a lightly doped silicon epitaxial layer. That is, the doping concentration of the epitaxial layer 120 is less than the doping concentration of the substrate layer 110. The epitaxial layer 120 and the substrate layer 110 are stacked along a preset direction, which is the direction along the paper surface in the drawing. For ease of description, in the embodiments of the present application, a first direction X, a second direction (not shown in the drawing, which is the Y direction of the orthogonal spatial coordinate system) and a third direction Z are defined. The first direction X, the second direction and the third direction Z are perpendicular to each other. The third direction Z is the preset direction, and the third direction Z is also the thickness direction of the Schottky diode chip 10. The plane formed by the first direction X and the second direction is perpendicular to the third direction Z.

[0047] The epitaxial layer 120 has a first region 102 and a second region 104 along the direction perpendicular to the third direction Z, that is, along the plane direction formed by the first direction X and the second direction. The second region 104 surrounds the first region 102. The barrier layer 130 is located on the side of the epitaxial layer 120 away from the substrate layer 110 and is embedded in the first region 102 of the epitaxial layer 120. The barrier layer 130 can be formed by combining metal and the epitaxial layer 120.

[0048] S120, forming a first metal layer 210 covering at least the barrier layer 130 on the side of the Schottky diode chip 10 having the barrier layer 130.

[0049] like Figure 2 As shown, in the illustrated direction, a first metal layer 210 is formed above the Schottky diode chip 10. The first metal layer 210 at least covers the barrier layer 130. The first metal layer 210 can be formed by evaporating a metal material. In this embodiment, the material of the first metal layer 210 includes aluminum to facilitate electroless nickel plating of the first metal layer 210 in subsequent steps; and the material of the first metal layer 210 does not include silver. In this step, the first metal layer 210 is not limited to a single metal film layer, but may include multiple sub-metal layers.

[0050] S130, electroless nickel plating is performed on the side of the first metal layer 210 away from the barrier layer 130 to form a first nickel metal layer 220.

[0051] like Figure 3 As shown, a first nickel metal layer 220 is formed on the upper surface of the first metal layer 210 away from the barrier layer 130 by electroless nickel plating. Electroless nickel plating here refers to a method of depositing a layer of nickel on the surface of a metal component (i.e., the first metal layer 210) using only a redox reaction (such as a displacement reaction) without the need for an external current. Electroless nickel plating on the surface of the first metal layer 210 can improve its corrosion resistance and wear resistance. Furthermore, electroless nickel plating is more efficient, and the utilization rate of nickel ions is higher compared to evaporation to form the first nickel metal layer 220. In some specific embodiments, the thickness of the first nickel metal layer 220 after electroless nickel plating is 15,000 angstroms to 25,000 angstroms (1 angstrom is 0.1 nanometers).

[0052] S140, chemically plate gold on the side of the first nickel metal layer 220 away from the first metal layer 210 to form the first gold metal layer 230.

[0053] like Figure 4As shown, the first gold metal layer 230 is formed on the upper surface of the first nickel metal layer 220 away from the first metal layer 210 by electroless plating. The electroless plating refers to a method of depositing a layer of gold on the surface of a metal product (i.e. the first nickel metal layer 220) by using a redox reaction (e.g. displacement reaction) without external current. The electroless plating on the surface of the first nickel metal layer 220 can further improve the corrosion resistance and wear resistance of the prepared Schottky diode 20. Meanwhile, the electroless plating has a high efficiency, and the utilization rate of gold ions is higher than that of the evaporation method. In some specific embodiments, the thickness of the first gold metal layer 230 formed after the electroless plating is 300 angstroms to 500 angstroms.

[0054] The side of the Schottky diode chip 10 with the first metal layer 210 is the front surface of the Schottky diode chip 10. After step S140, the front electrode of the Schottky diode 20 is formed. The front electrode of the Schottky diode 20 includes the first metal layer 210, the first nickel metal layer 220, and the first gold metal layer 230. When the Schottky diode 20 is in operation, the first gold metal layer 230, the first nickel metal layer 220, and the first metal layer 210 can transmit carriers with the Schottky diode chip 10.

[0055] S150, a second metal layer 240 is formed on the side of the Schottky diode chip 10 without the barrier layer 130.

[0056] The side of the Schottky diode chip 10 without the first metal layer 210 is the back surface of the Schottky diode chip 10. The second metal layer 240 is formed on the back surface of the Schottky diode chip 10, and the second metal layer 240 can transmit carriers with the Schottky diode chip 10. That is, the second metal layer 240 is the back electrode formed on the back surface of the Schottky diode chip 10. After the second metal layer 240 is prepared, the Schottky diode 20 is obtained. The structure of the obtained Schottky diode 20 can be as shown in Figure 5

[0057] ​In the embodiment of the present application, when the Schottky diode 20 is prepared, first, the Schottky diode chip 10 is provided, and the Schottky diode chip 10 has the barrier layer 130. Then, the front electrode is formed on one side of the Schottky diode chip 10 having the barrier layer 130, and the front electrode includes the first metal layer 210 and the first nickel metal layer 220, the first gold metal layer 230; and the second metal layer 240 is formed as the back electrode on the side of the Schottky diode chip 10 without the barrier layer 130. The first metal layer 210 does not include silver metal. In this way, the front electrode of the prepared Schottky diode 20 does not include silver ions, and thus the problem of silver ion migration does not occur, so that the service life of the Schottky diode 20 can be prolonged. In addition, the first nickel metal layer 220 is formed by the method of chemical nickel plating, so that the nickel metal is only formed on the upper surface of the first metal layer 210. In this way, compared with the evaporation method for forming the first nickel metal layer 220, the nickel metal evaporation to other positions (such as the surface of the evaporation chamber) except the upper surface of the first metal layer 210 can be avoided, so that the waste of nickel ions is avoided. In this way, the preparation cost can be reduced. Similarly, the first gold metal layer 230 is formed by the method of chemical gold plating, so that the waste of gold ions is avoided, and the preparation cost is reduced. The method of chemical gold plating does not need to corrode the first gold metal layer 230, so that the risk of gold ion pollution can be avoided.

[0058] Embodiment two:

[0059] Figure 6 is a structural schematic diagram of a Schottky diode chip 10 provided by an embodiment of the present application. As shown in Figure 6 , the Schottky diode chip 10 further includes a guard ring 140. The guard ring 140 is annular, and the guard ring 140 is located on the side of the epitaxial layer 120 away from the substrate layer 110 and covers the second region 104 of the epitaxial layer 120. Generally, as shown in Figure 6 , in the third direction Z, the height of the barrier layer 130 is lower than the height of the guard ring 140.

[0060] Figures 7 to 17 is a preparation flowchart of a Schottky diode chip 10 provided by an embodiment of the present application. The preparation flowchart of the Schottky diode chip 10 shown in Figures 7 to 17 is explained and described in detail as follows, which specifically includes the following steps S1101 to S1111. Figure 6

[0061] S1101, depositing an epitaxial pre-prepared layer 1202 on the substrate layer 110.

[0062] As shown in Figure 7 ​As shown, step S1101 is epitaxy, that is, depositing a lightly doped silicon layer of a certain thickness on the heavily doped silicon substrate layer 110. To distinguish it from the epitaxial layer 120 mentioned above, the deposited lightly doped silicon layer is referred to as the epitaxial prefabrication layer 1202.

[0063] S1102, the epitaxial preform 1202 is oxidized to form a silicon dioxide film 1402 on the surface of the epitaxial preform 1202 away from the substrate layer 110.

[0064] like Figure 8 As shown, step S1102 is oxidation to form a silicon dioxide film 1402. The silicon dioxide film 1402 has the functions of masking and passivation protection.

[0065] S1103, photoresist 101 is formed on the surface of silicon dioxide film 1402 away from substrate layer 110, and photolithography is performed on photoresist 101 to form window pattern 1404.

[0066] Step S1103 is a single photolithography step. For example... Figure 9 As shown, photoresist 101 can first be formed on the surface of silicon dioxide film 1402 away from substrate layer 110. Then, photolithography (including exposure, development, and curing) is performed on photoresist 101 to form a window pattern 1404, such as... Figure 10 As shown. In Figure 10 In the structure shown, the portion without photoresist 101 after photolithography is the window pattern 1404. The extent of the window pattern 1404 in the horizontal plane (i.e., the plane formed by the first direction X and the second direction) can be slightly larger than the extent of the first region 102 of the epitaxial prefabricated layer 1202 (i.e., the first region 102 of the epitaxial layer 120) in the horizontal plane, thus ensuring that the extent of the first region 102 in the horizontal plane is within the extent of the window pattern 1404 in the horizontal plane. In some specific embodiments, the extent of the first region 102 in the horizontal plane and the extent of the window pattern 1404 in the horizontal plane are concentric circles.

[0067] S1104, the silicon dioxide film 1402 is etched from the window pattern 1404 to form a protective ring 140.

[0068] Step S1104 involves silica etching. After etching, a protective ring 140 is formed, resulting in the structure shown below. Figure 11 As shown. After step S1104, the thickness of silicon dioxide corresponding to the location of window pattern 1404 is less than 100 angstroms.

[0069] S1105, boron is implanted into the epitaxial preform 1202.

[0070] like Figure 12As shown, step S1105 is boron implantation, which involves implanting boron into the epitaxial prefabricated layer 1202 to form a boron ring 1204. Along the horizontal plane, part of the boron ring 1204 is located in the first region 102, and another part is located in the second region 104. The portion of the boron ring 1204 located in the first region 102 needs to contact the barrier layer 130 in subsequent processes.

[0071] S1106 is used to anneal the structure formed after boron implantation.

[0072] The structure obtained in step S1105 is subjected to high-temperature annealing. Here, high temperature refers to above 1000℃ (degrees Celsius). This allows the impurities doped in the epitaxial prefabricated layer 1202 to diffuse and activate.

[0073] S1107, photoresist 101 is formed on the surface of silicon dioxide film 1402 away from substrate layer 110, and photolithography is performed on photoresist 101 to form contact area pattern 1302.

[0074] Step S1107 is a secondary photolithography process. For example... Figure 13 As shown, photoresist 101 can first be formed on the surface of silicon dioxide film 1402 away from substrate layer 110. Then, photolithography (including exposure, development, and curing) is performed on photoresist 101 to form contact area pattern 1302, such as... Figure 14 As shown. In Figure 14 In the structure shown, the portion without photoresist 101 after photolithography is the contact area pattern 1302. The range of the contact area pattern 1302 in the horizontal plane is the range of the first region of the epitaxial preform (i.e., the first region 102 of the epitaxial layer 120) in the horizontal plane.

[0075] S1108, etching silicon dioxide from contact area pattern 1302.

[0076] like Figure 15 As shown, step S1108 is silicon dioxide etching. After etching, the silicon dioxide at the location of the contact area pattern 1302 can be removed, thereby exposing the surface of the first region 102 of the epitaxial preform 1202 (i.e., the first region 102 of the epitaxial layer 120) away from the substrate layer 110.

[0077] S1109, barrier metal 1304 is deposited in the first region 102 of the epitaxial preform 1202.

[0078] like Figure 16As shown, step S1109 is barrier deposition, which involves depositing a barrier metal 1304 on the surface of the first region 102 of the epitaxial prefabricated layer 1202 away from the substrate layer 110 using vacuum evaporation or sputtering. The barrier metal 1304 can be one or more of nickel, platinum, and chromium. For example, the barrier metal 1304 can include 5% platinum and 95% nickel, or 10% platinum and 90% nickel, or 15% platinum and 85% nickel, or 30% platinum and 70% nickel, or 60% platinum and 40% nickel.

[0079] S1110, the structure formed after the precipitation of barrier metal 1304 is subjected to low temperature treatment so that the barrier metal 1304 and the epitaxial prefabricated layer 1202 are combined to form barrier layer 130.

[0080] Step S1110 is a barrier alloy, whereby the barrier metal 1304 and the epitaxial preform 1202 are combined to form the barrier layer 130. The low temperature here can be, for example, 450°C to 550°C.

[0081] S1111, etch the structure formed after the formation of barrier layer 130 to remove the barrier metal 1304 that has not formed an alloy.

[0082] Step S1111 is barrier etching, the purpose of which is to remove the barrier metal 1304 that is not bonded to the epitaxial prefabricated layer 1202. Generally, the structure formed in step S can be etched using an etchant corresponding to the barrier metal 1304. Afterwards, the structure as shown in the image is obtained. Figure 17 The Schottky diode chip 10 shown is an example. After the barrier layer 130 is formed, the epitaxial prefabrication layer 1202 becomes the aforementioned epitaxial layer 120.

[0083] In some embodiments, step S110 may further include cleaning the Schottky diode chip 10. That is, cleaning the Schottky diode chip 10 using standard No. 3 solution or hydrofluoric acid (HF).

[0084] Figure 18 This is a cross-sectional structural diagram of a first metal layer 210 provided in Embodiment 2 of this application. Figure 18 As shown, in some embodiments, the first metal layer 210 includes a first sub-metal layer 212 and a second sub-metal layer 214 stacked along a predetermined direction (i.e., the third direction Z). The material of the first sub-metal layer 212 is titanium. The material of the second sub-metal layer 214 is aluminum. The thickness of the first sub-metal layer 212 can be from 1000 angstroms to 3000 angstroms, and the thickness of the second sub-metal layer 214 can be from 20000 angstroms to 45000 angstroms. The first sub-metal layer 212 at least covers the barrier layer 130, and the second sub-metal layer 214 completely covers the first sub-metal layer 212. In some specific embodiments, such as... Figure 18 As shown, based onFigure 6 The structure of the Schottky diode chip 10 shown, the first sub-metal layer 212 and the second sub-metal layer 214 cover the range of the orthographic projection of the plane where the barrier layer 130 is located. That is, the first sub-metal layer 212 and the second sub-metal layer 214 not only cover the barrier layer 130, but also cover part of the guard ring 140. In this way, the first sub-metal layer 212 and the second sub-metal layer 214 of the two adjacent Schottky diodes 20 can be prevented from being connected together. In the embodiment of the present application, along the plane direction composed of the first direction X and the second direction Y, the guard ring 140 can be divided into a third region 142 and a fourth region 144 surrounding the third region 142. The first sub-metal layer 212 and the second sub-metal layer 214 not only cover the barrier layer 130, but also cover the third region 142 of the guard ring 140. In this way, the first sub-metal layer 212 and the second sub-metal layer 214 of the two adjacent Schottky diodes 20 can be prevented from being connected together.

[0085] Figures 19 to 24 is a preparation flowchart of a first metal layer 210 provided by the second embodiment of the present application, which is used to prepare the first metal layer 210 of the structure shown in Figure 18 . As shown in Figures 19 to 24 , in some embodiments, the step S120 can specifically include the following steps S121 to S125.

[0086] S121, evaporate titanium metal on the side of the Schottky diode chip 10 with the barrier layer 130 to form a titanium metal layer 2122.

[0087] As shown in Figure 19 , evaporate titanium metal on the side of the barrier layer 130 and the guard ring 140 away from the Schottky diode chip 10 to form a titanium metal layer 2122. The titanium metal layer 2122 completely covers the barrier layer 130 and the guard ring 140. That is, the titanium metal layer 2122 covers the surface of the barrier layer 130 away from the substrate layer 110, the surface of the guard ring 140 away from the epitaxial layer 120, and the inner surface of the guard ring 140. The titanium metal layer 2122 is used to form the first sub-metal layer 212.

[0088] S122, evaporate aluminum metal on the side of the titanium metal layer 2122 away from the Schottky diode chip 10 to form an aluminum metal layer 2142.

[0089] As shown in Figure 20 , evaporate aluminum metal on the side of the titanium metal layer 2122 away from the Schottky diode chip 10 to form an aluminum metal layer 2142 covering the titanium metal layer 2122. The aluminum metal layer 2142 is used to form the second sub-metal layer 214.

[0090] S123, a photoresist 101 covering an aluminum metal layer 2142 is formed, and the photoresist 101 is photolithographically formed to form a patterned structure 213.

[0091] Step S123 involves three photolithography steps. For example... Figure 21 As shown, a photoresist 101 covering an aluminum metal layer 2142 can be formed first. Then, photolithography (including exposure, development, and curing) is performed on the photoresist 101 to form a patterned structure 213. Along the third direction Z, the projection of the patterned structure 213 overlaps with the projection of the fourth region 144, as shown... Figure 22 As shown. In Figure 22 In the structure shown, the portion without photoresist 101 after photolithography is a patterned structure 213.

[0092] S124, the aluminum metal layer 2142 is etched through the patterned structure 213 to obtain the second sub-metal layer 214.

[0093] S125, the titanium metal layer 2122 is etched through the patterned structure 213 to obtain the first sub-metal layer 212.

[0094] By sequentially etching the patterned structure 213 through aluminum metal layer 2142 and titanium metal layer 2122, the portion of the aluminum metal layer 2142 and titanium metal layer 2122 covering the fourth region 144 of the protective ring 140 can be etched away. Therefore, after etching the aluminum metal layer 2142, the second sub-metal layer 214 is obtained; after etching the titanium metal layer 2122, the first sub-metal layer 212 is obtained, as shown below. Figure 23 As shown.

[0095] After obtaining the second sub-metal layer 214 and the first sub-metal layer 212, the cured photoresist 101 is removed to obtain the following: Figure 24 The structure shown is such that the portion of the first sub-metal layer 212 and the second sub-metal layer 214 covering the protective ring 140 can act as a voltage divider, thereby improving the voltage withstand performance of the Schottky diode 20.

[0096] In some embodiments, after step S120 and before step S130, step S160 may also be included.

[0097] S160, a passivation layer 250 is formed on the side of the first metal layer 210 away from the barrier layer 130. The passivation layer 250 has a through hole 252 for exposing a portion of the surface of the first metal layer 210. The orthographic projection of the through hole 252 onto the plane of the barrier layer 130 is located within the barrier layer 130.

[0098] The material of the passivation layer 250 can be polyimide. Figure 25FIG. 2 is a structural schematic diagram of a passivation layer 250 according to an embodiment of the present application. As shown in FIG. 2, the passivation layer 250 can be formed before the first nickel metal layer 220 is formed. The passivation layer 250 has a through hole 252 for exposing part of the surface of the first metal layer 210, i.e., part of the surface of the second sub-metal layer 214. The cross-sectional shape of the through hole 252 along the third direction Z can be rectangular. The orthogonal projection of the through hole 252 on the plane of the barrier layer 130 is located in the barrier layer 130. That is, the projection of the through hole 252 on the plane of the barrier layer 130 along the third direction Z (in the opposite direction) is located in the barrier layer 130. Figure 25 As shown in FIG. 2, the passivation layer 250 can be formed before the first nickel metal layer 220 is formed. The passivation layer 250 has a through hole 252 for exposing part of the surface of the first metal layer 210, i.e., part of the surface of the second sub-metal layer 214. The cross-sectional shape of the through hole 252 along the third direction Z can be rectangular. The orthogonal projection of the through hole 252 on the plane of the barrier layer 130 is located in the barrier layer 130. That is, the projection of the through hole 252 on the plane of the barrier layer 130 along the third direction Z (in the opposite direction) is located in the barrier layer 130.

[0099] Based on the structure shown in FIG. 2, if steps S130 and S140 are performed after step S160, the processes of electroless nickel plating and electroless gold plating can be performed in the through hole 252 formed by the passivation layer 250. Figure 25 Based on the structure shown in FIG. 2, if steps S130 and S140 are performed after step S160, the processes of electroless nickel plating and electroless gold plating can be performed in the through hole 252 formed by the passivation layer 250. Figures 26 to 28 FIG. 3 is a flowchart of a process of electroless nickel plating and electroless gold plating according to an embodiment of the present application. The process of electroless nickel plating and electroless gold plating can be performed after step S160. Figures 26 to 28 Steps S130 and S140 will be described in detail. Step S130 can include steps S132 and S134.

[0100] S132, electroless zinc plating is performed on the first metal layer 210 on the side of the first metal layer 210 away from the barrier layer 130 to form a zinc metal layer 260.

[0101] In the embodiment of the present application, when electroless nickel plating is performed on the first metal layer 210, electroless zinc plating is first performed on the first metal layer 210 to form a zinc metal layer 260, and then the zinc metal layer 260 is replaced by the first nickel metal layer 220. In some specific embodiments, step S132 can include steps S1322 to S1326.

[0102] S1322, the structure formed with the first metal layer 210 is placed in a zinc deposition agent to perform zinc deposition on the side of the first metal layer 210 away from the barrier layer 130.

[0103] Zinc precipitating agent refers to a solution containing zinc ions. For example, the zinc precipitating agent can be a cyanide-free zinc precipitating agent for aluminum alloys. The zinc precipitating agent is used to react with the metallic aluminum in the first metal layer 210 (the second sub-metal layer 214), thereby replacing a portion of the metallic aluminum in the first metal layer 210 with metallic zinc. In the embodiments of this application, the structure having the first metal layer 210 and the passivation layer 250 can be placed in the zinc precipitating agent, so that only the portion of the first metal layer 210 exposed by the through-holes 252 of the passivation layer 250 reacts with the zinc precipitating agent. In this way, metallic zinc can be formed only within the through-holes 252 of the passivation layer 250. Since this is the first deposition of metallic zinc, this step is called primary zinc precipitating.

[0104] In some specific embodiments, in step S1322, the structure having the first metal layer 210 and the passivation layer 250 can be formed, i.e., as shown in the example. Figure 25 The structure shown was placed in a cyanide-free zinc plating agent of aluminum alloy at 25 degrees Celsius for 20 seconds to perform a zinc plating on the side of the first metal layer 210 away from the barrier layer 130.

[0105] S1324, using nitric acid solution to perform a zinc washing process on the structure formed after a primary zinc deposit.

[0106] Because the zinc metal formed in the first zinc plating is relatively coarse, it is impossible to obtain dense zinc metal. Therefore, after the first zinc plating, it is necessary to use a nitric acid solution to wash away the zinc metal formed in the first zinc plating, so that zinc seed crystals are left only on the surface of the second sub-metal layer 214 exposed by the through-holes 252 of the passivation layer 250. Since this is the first time that the zinc metal is washed away, this step is called the first zinc wash.

[0107] In some specific embodiments, in step S1324, the structure after the first zinc immersion can be placed in a nitric acid solution at 25 degrees Celsius for 10 seconds to wash away the metallic zinc formed during the first zinc immersion.

[0108] S1326, the structure formed after the first zinc washing is placed in a zinc immersion agent to perform a second zinc immersion on the side of the first metal layer 210 away from the barrier layer 130, to obtain a zinc metal layer 260.

[0109] After a zinc wash of the structure formed after the first zinc deposition, the structure can be placed in the zinc deposition agent again, thus performing zinc deposition again on the side of the first metal layer 210 away from the barrier layer 130. Since this is the second zinc deposition, this step is called secondary zinc deposition. The zinc obtained after secondary zinc deposition has a higher density than the zinc obtained after the first zinc deposition. Here, the zinc obtained after secondary zinc deposition is used as the zinc metal layer 260. The zinc metal layer 260 is used to replace and form the first nickel metal layer 220. The zinc metal layer 260 obtained after secondary zinc deposition is located within the through-hole 252, such as... Figure 26 As shown.

[0110] In some embodiments, in step S1326, the structure formed after the first zinc washing can be placed in an aluminum alloy cyanide-free zinc immersion agent at 25 degrees Celsius for 30 seconds to perform a second zinc immersion on the side of the first metal layer 210 away from the barrier layer 130.

[0111] It should be noted that in this embodiment, step S132 is described using only the zinc obtained after the "second zinc immersion" as the zinc metal layer 260. In some other embodiments, to obtain a denser zinc metal layer 260, the zinc obtained after three zinc immersions (one zinc immersion, one zinc washing, two zinc immersions, and two zinc washings) can be used as the zinc metal layer 260. In other embodiments, the zinc obtained after four or five zinc immersions can also be used as the zinc metal layer 260.

[0112] S134, the structure with the zinc metal layer 260 is placed in a solution containing nickel ions to replace the zinc metal layer 260 with the first nickel metal layer 220.

[0113] The nickel ion-containing solution can be, for example, a nickel chloride solution. This solution reacts with the zinc metal layer 260, thereby completely replacing the zinc in the zinc metal layer 260 with nickel, forming a first nickel metal layer 220. The first nickel metal layer 220 is also formed within the vias 252 of the passivation layer 250. In other words, after the formation of the zinc metal layer 260, a structure containing the zinc metal layer 260 will be formed, as shown below. Figure 26 When the structure shown is placed in a solution containing nickel ions, the zinc metal layer 260 can be replaced with the first nickel metal layer 220, resulting in the structure after the first nickel metal layer 220 is formed. Figure 27 As shown.

[0114] In some embodiments, in step S134, the structure with the zinc metal layer 260 formed can be immersed in a nickel chloride solution at 80°C to 90°C for 25 to 35 minutes to completely replace the zinc metal layer 260 with the first nickel metal layer 220. In some specific embodiments, the temperature of the nickel chloride solution is 85°C and the immersion time is 30 minutes. In step S134, electroless nickel plating starter, nickel ion supplement, electroless nickel plating additive, and electroless nickel plating accelerator may also be added.

[0115] Step 140 may specifically involve placing the structure with the first nickel metal layer 220 in a solution containing gold ions to replace a portion of the thickness of the first nickel metal layer 220 with the first gold metal layer 230.

[0116] The solution containing gold ions can be, for example, a potassium gold cyanide solution. This solution reacts with the first nickel metal layer 220, thereby replacing a portion of the nickel in the first nickel metal layer 220 with gold, forming a first gold metal layer 230. The first gold metal layer 230 is also formed within the vias 252 of the passivation layer 250. In other words, after the formation of the first nickel metal layer 220, a structure containing the first nickel metal layer 220 is formed, as shown below. Figure 27 When the structure shown is placed in a solution containing gold ions, a portion of the first nickel metal layer 220 can be replaced with a first gold metal layer 230, resulting in the structure after the formation of the first gold metal layer 230. Figure 28 As shown.

[0117] In some specific embodiments, in step S140, the structure with the first nickel metal layer 220 formed can be immersed in a potassium gold cyanide solution at 55 degrees Celsius for 25 minutes to replace a portion of the thickness of the first nickel metal layer 220 with the first gold metal layer 230. In step S140, a chemical gold plating bath agent and chemical gold plating additives may also be added.

[0118] In some embodiments, before step S132, i.e. before the first zinc plating, the structure having the first metal layer 210 can also be formed, i.e., as shown in the figure below. Figure 25 The structure shown is placed in an acidic degreasing agent to remove impurities from the surface of the first metal layer 210. The first metal layer 210 is etched from the side of the first metal layer 210 away from the barrier layer 130 to give the first metal layer 210 a rough surface away from the barrier layer 130. The temperature of the acidic degreasing agent can be 25 degrees Celsius, and the structure with the first metal layer 210 formed can be immersed in the acidic degreasing agent for 3 to 6 minutes. The etchant used to etch the first metal layer 210 can be one or more of the following: a solution formed by a mixture of hydrogen persulfate and sulfuric acid, a solution formed by a mixture of sodium persulfate and sulfuric acid, or a solution formed by a mixture of sulfuric acid and hydrogen peroxide. The temperature of the etchant can be 25 degrees Celsius, and the etching time is 3 minutes.

[0119] Figure 29 This is a schematic diagram of the structure of a Schottky diode 20 provided in Embodiment 2 of this application. Figure 29 As shown, in some embodiments, the second metal layer 240 includes a third sub-metal layer 242 and a fourth sub-metal layer 244. The third sub-metal layer 242 is located between the Schottky diode chip 10 and the fourth sub-metal layer 244. The material of the third sub-metal layer 242 can be the same as the material of the first sub-metal layer 212, that is, the material of the third sub-metal layer 242 can be titanium. The material of the fourth sub-metal layer 244 can be the same as the material of the second sub-metal layer 214, that is, the material of the fourth sub-metal layer 244 can be aluminum.

[0120] The fabrication method of Schottky diode 20 will be described in detail below with reference to the accompanying drawings, using a specific embodiment.

[0121] Example 3:

[0122] The fabrication method of Schottky diode 20 includes the following steps:

[0123] S1, an epitaxial prefabricated layer 1202 of a certain thickness is deposited on the substrate layer 110, such as Figure 7 As shown.

[0124] S2, the epitaxial preform 1202 is oxidized to form a silicon dioxide film 1402 on the surface of the epitaxial preform 1202 away from the substrate layer 110, such as Figure 8 As shown.

[0125] S3, a photoresist 101 is formed on the surface of the silicon dioxide film 1402 away from the substrate layer 110, and photolithography is performed on the photoresist 101 to form a window pattern 1404, such as... Figure 9 and Figure 10 As shown.

[0126] S4, etching is performed on the silicon dioxide film 1402 from the window pattern 1404 to form a protective ring 140, such as Figure 11 As shown.

[0127] S5, Boron implantation is performed on the epitaxial prefabricated layer 1202, such as Figure 12 As shown.

[0128] S6, Annealing.

[0129] S7, a photoresist 101 is formed on the surface of the silicon dioxide film 1402 away from the substrate layer 110, and photolithography is performed on the photoresist 101 to form a contact area pattern 1302, such as... Figure 13 and Figure 14 As shown.

[0130] S8, etching of silicon dioxide from contact area pattern 1302, such as Figure 15 As shown.

[0131] S9, in the first region 102 of the epitaxial prefabricated layer 1202, a barrier metal 1304 is deposited, such as Figure 16 As shown.

[0132] S10, the structure formed after the precipitation of barrier metal 1304 is subjected to low temperature treatment so that the barrier metal 1304 and the epitaxial prefabricated layer 1202 are combined to form barrier layer 130.

[0133] S11, the structure formed after the formation of barrier layer 130 is etched to remove the barrier metal 1304 that has not formed an alloy, to obtain as shown. Figure 17The structure shown.

[0134] S12. Use standard No. 3 solution or hydrofluoric acid to clean the Schottky diode chip 10 to ensure the cleanliness of the surface of the Schottky diode chip 10.

[0135] S13, titanium metal is evaporated on one side of the Schottky diode chip 10 where the barrier layer 130 is located, forming a titanium metal layer 2122, as shown below. Figure 19 As shown, aluminum is evaporated on the side of the titanium metal layer 2122 away from the Schottky diode chip 10 to form an aluminum metal layer 2142, which covers the titanium metal layer 2122, as shown. Figure 20 As shown.

[0136] S14, a photoresist 101 covering the aluminum metal layer 2142 is formed, and photolithography is performed on the photoresist 101 to form a patterned structure 213, such as... Figure 21 and Figure 22 As shown.

[0137] S15, the aluminum metal layer 2142 and the titanium metal layer 2122 are etched through the patterned structure 213 to obtain the second sub-metal layer 214 and the first sub-metal layer 212, as shown. Figure 23 As shown. Remove photoresist 101, as... Figure 24 As shown.

[0138] S16, a passivation layer 250 is formed on the side of the first metal layer 210 away from the barrier layer 130. The passivation layer 250 has a via 252, which exposes a portion of the surface of the first metal layer 210. The orthographic projection of the via 252 onto the plane of the barrier layer 130 lies within the barrier layer 130. Figure 25 As shown.

[0139] S17, a structure with a first metal layer 210 will be formed, i.e. Figure 25 The structure shown is placed in an acidic degreasing agent at 25 degrees Celsius for 3 to 6 minutes to remove oil, oxide layer, and other impurities from the surface of the second sub-metal layer 214. Afterward, the acidic degreasing agent is rinsed off with clean water.

[0140] S18, the structure obtained in step S17 is immersed in an etchant at 25 degrees Celsius for 3 minutes to etch the surface of the first metal layer 210 away from the barrier layer 130. Afterwards, the etchant is washed away with water.

[0141] S19, Zinc Immersion. The structure obtained in S18 is immersed in a zinc immersion agent at 25 degrees Celsius for 20 seconds to replace some of the aluminum in the first metal layer 210 with zinc. Afterwards, the zinc immersion agent is washed away with water.

[0142] S20, Zinc washing. The structure obtained in S19 is immersed in a nitric acid solution at 25 degrees Celsius for 10 seconds to wash away the metallic zinc obtained after the first zinc precipitation. Then, the nitric acid solution is rinsed off with water.

[0143] Then, steps S19 and S20 are repeated three times, resulting in a total of four zinc immersion and four zinc washing processes, forming a zinc metal layer 260. Figure 26 As shown.

[0144] S21, the structure with the zinc metal layer 260 formed is placed in a nickel chloride solution at 85 degrees Celsius for 30 minutes to replace the zinc metal layer 260 with the first nickel metal layer 220, as shown. Figure 27 As shown. Afterwards, rinse off the nickel chloride solution with water.

[0145] S22, the structure with the first nickel metal layer 220 formed is placed in a potassium gold cyanide solution at 55 degrees Celsius for 25 minutes to replace a portion of the thickness of the first nickel metal layer 220 with the first gold metal layer 230, such as... Figure 28 As shown. Afterwards, rinse off the potassium gold cyanide solution with water.

[0146] S23, thinning of substrate 110.

[0147] S24, titanium metal is evaporated on the side of the Schottky diode chip 10 that does not have the barrier layer 130, forming a third sub-metal layer 242. Aluminum metal is evaporated on the side of the third sub-metal layer 242 away from the Schottky diode chip 10, forming a fourth sub-metal layer 244, as shown below. Figure 29 As shown.

[0148] In the second approach, a first metal layer 210 is first formed in the front electrode of the Schottky diode 20, followed by the formation of a second metal layer 240 in the back electrode of the Schottky diode 20. Then, the first metal layer 210 and the second metal layer 240 are simultaneously electroless plated with nickel and electroless plated with gold. This second approach includes Examples 4 and 5.

[0149] Example 4:

[0150] Figures 30 to 33 This is a flowchart illustrating the fabrication process of a Schottky diode 20 according to Embodiment 4 of this application. Figures 30 to 33 As shown, the preparation method includes the following steps S210 to S250.

[0151] S210 provides Schottky diode chip 10.

[0152] The structure of the Schottky diode chip 10 can be as follows: Figure 30As shown. Step S210 is the same as step S110, and will not be described again. In some specific embodiments, step S210 also includes steps S1101 to S1111 in the above embodiment two.

[0153] S220, a first metal layer 210 is formed on one side of the Schottky diode chip 10 having a barrier layer 130, at least covering the barrier layer 130.

[0154] Step S220 is the same as step S120 and will not be described again. In some specific embodiments, step S220 also includes steps S121 to S125 in the above embodiment two. These will not be described again.

[0155] S230, a second metal layer 240 is formed on the side of the Schottky diode chip 10 that does not have a barrier layer 130.

[0156] like Figure 31 As shown, in the illustrated direction, a second metal layer 240 is formed below the Schottky diode chip 10. The second metal layer 240 can be formed by evaporating a metal material. In this embodiment, the material of the second metal layer 240 includes aluminum to facilitate subsequent electroless nickel plating of the second metal layer 240; and the material of the second metal layer 240 does not include silver. In this step, the second metal layer 240 is not limited to a single metal film layer, but may include multiple sub-metal layers.

[0157] In some embodiments, the second metal layer 240 includes a third sub-metal layer 242 and a fourth sub-metal layer 244 stacked in the opposite direction to a predetermined direction (i.e., the third third direction Z). The third sub-metal layer 242 is made of titanium. The fourth sub-metal layer 244 is made of aluminum. The thickness of the third sub-metal layer 242 can be from 1000 angstroms to 3000 angstroms, and the thickness of the fourth sub-metal layer 244 can be from 20000 angstroms to 45000 angstroms.

[0158] S240, electroless nickel plating is performed on the side of the first metal layer 210 and the second metal layer 240 away from the barrier layer 130 to form a first nickel metal layer 220 and a second nickel metal layer 270.

[0159] like Figure 32As shown, nickel is electrolessly plated onto the upper surface of the first metal layer 210 away from the barrier layer 130, thereby forming a first nickel metal layer 220 on the upper surface of the first metal layer 210 away from the barrier layer 130. Nickel is electrolessly plated onto the lower surface of the second metal layer 240 away from the barrier layer 130, thereby forming a second nickel metal layer 270 on the lower surface of the second metal layer 240 away from the barrier layer 130. In some specific embodiments, the thickness of both the first nickel metal layer 220 and the second nickel metal layer 270 after electroless nickel plating is 15,000 angstroms to 25,000 angstroms (1 angstrom is 0.1 nanometers).

[0160] S250, chemical gold plating is performed on the side of the first nickel metal layer 220 and the second nickel metal layer 270 away from the barrier layer 130 to form the first gold metal layer 230 and the second gold metal layer 280.

[0161] like Figure 33 As shown, the first nickel metal layer 220 is electrolessly gold-plated on its upper surface away from the first metal layer 210, thereby forming a first gold metal layer 230 on the upper surface of the first nickel metal layer 220 away from the first metal layer 210. The second nickel metal layer 270 is electrolessly gold-plated on its lower surface away from the second metal layer 240, thereby forming a second gold metal layer 280 on the lower surface of the second nickel metal layer 270 away from the second metal layer 240. In some specific embodiments, the thickness of both the first gold metal layer 230 and the second gold metal layer 280 formed after electroless gold plating is 300 to 500 angstroms.

[0162] In this embodiment, when fabricating the Schottky diode 20, a Schottky diode chip 10 is first provided, which has a barrier layer 130. Then, a front electrode is formed on the side of the Schottky diode chip 10 with the barrier layer 130. The front electrode includes a first metal layer 210, a first nickel metal layer 220, and a first gold metal layer 230. A second metal layer 240 is formed on the side of the Schottky diode chip 10 without the barrier layer 130 as a back electrode. The first metal layer 210 does not include silver. Thus, the front electrode of the fabricated Schottky diode 20 does not contain silver ions, preventing silver ion migration and extending the lifespan of the Schottky diode 20.

[0163] Furthermore, by using electroless nickel plating to form the first nickel metal layer 220, the nickel metal can be formed only on the upper surface of the first metal layer 210. This avoids the waste of nickel ions caused by nickel metal evaporating to other locations besides the upper surface of the first metal layer 210, compared to evaporation. This reduces manufacturing costs. Similarly, using electroless gold plating to form the first gold metal layer 230 also avoids gold ion waste and reduces manufacturing costs. Electroless gold plating eliminates the need for etching the first gold metal layer 230, thus eliminating the risk of gold ion contamination.

[0164] Example 5:

[0165] The fabrication method of Schottky diode 20 includes the following steps:

[0166] S31, an epitaxial prefabricated layer 1202 of a certain thickness is deposited on the substrate layer 110, such as Figure 7 As shown.

[0167] S32, the epitaxial preform 1202 is oxidized to form a silicon dioxide film 1402 on the surface of the epitaxial preform 1202 away from the substrate layer 110, such as Figure 8 As shown.

[0168] S33, photoresist 101 is formed on the surface of silicon dioxide film 1402 away from substrate layer 110, and photolithography is performed on photoresist 101 to form window pattern 1404, such as... Figure 9 and Figure 10 As shown.

[0169] S34, etching is performed on the silicon dioxide film 1402 from the window pattern 1404 to form a protective ring 140, such as Figure 11 As shown.

[0170] S35, boron implantation is performed on the epitaxial prefabricated layer 1202, such as Figure 12 As shown.

[0171] S36, Annealing.

[0172] S37, a photoresist 101 is formed on the surface of the silicon dioxide film 1402 away from the substrate layer 110, and photolithography is performed on the photoresist 101 to form a contact area pattern 1302, such as... Figure 13 and Figure 14 As shown.

[0173] S38, etching of silicon dioxide is performed from the contact area pattern 1302, such as... Figure 15 As shown.

[0174] S39, in the first region 102 of the epitaxial prefabricated layer 1202, a barrier metal 1304 is deposited, such as Figure 16 As shown.

[0175] S40, the structure formed after the precipitation of barrier metal 1304 is subjected to low temperature treatment so that the barrier metal 1304 and the epitaxial prefabricated layer 1202 are combined to form barrier layer 130.

[0176] S41, the structure formed after the formation of barrier layer 130 is etched to remove the barrier metal 1304 that has not formed an alloy, to obtain as follows. Figure 17 The structure shown.

[0177] S42. Use standard No. 3 solution or hydrofluoric acid to clean the Schottky diode chip 10 to ensure the cleanliness of the surface of the Schottky diode chip 10.

[0178] S43, metallic titanium is evaporated on one side of the Schottky diode chip 10 where the barrier layer 130 is located, forming a titanium metal layer 2122, as shown below. Figure 19 As shown, aluminum is evaporated on the side of the titanium metal layer 2122 away from the Schottky diode chip 10 to form an aluminum metal layer 2142, which covers the titanium metal layer 2122, as shown. Figure 20 As shown.

[0179] S44, a photoresist 101 covering the aluminum metal layer 2142 is formed, and photolithography is performed on the photoresist 101 to form a patterned structure 213, such as... Figure 21 and Figure 22 As shown.

[0180] S45, the aluminum metal layer 2142 and the titanium metal layer 2122 are etched through the patterned structure 213 to obtain the second sub-metal layer 214 and the first sub-metal layer 212, as shown. Figure 23 As shown. Remove photoresist 101, as... Figure 24 As shown.

[0181] S46, a passivation layer 250 is formed on the side of the first metal layer 210 away from the barrier layer 130. The passivation layer 250 has a via 252, which exposes a portion of the surface of the first metal layer 210. The orthographic projection of the via 252 onto the plane of the barrier layer 130 lies within the barrier layer 130. Figure 25 As shown.

[0182] S47, thinning of substrate 110.

[0183] S48, titanium metal is evaporated on the side of the Schottky diode chip 10 that does not have the barrier layer 130, forming a third sub-metal layer 242. Aluminum metal is evaporated on the side of the third sub-metal layer 242 away from the Schottky diode chip 10, forming a fourth sub-metal layer 244, as shown below. Figure 34 As shown.

[0184] S49,Figure 34 The structure shown is placed in an acidic degreasing agent at 25 degrees Celsius for 3 to 6 minutes to remove oil, oxide layers, and other impurities from the surfaces of the second sub-metal layer 214 and the fourth sub-metal layer 244. Afterward, the acidic degreasing agent is rinsed off with clean water.

[0185] S50, the structure obtained in step S49 is immersed in an etchant at 25 degrees Celsius for 3 minutes to etch the first metal layer 210 and the second metal layer 240 away from the barrier layer 130 to roughen the surface. Afterwards, the etchant is washed away with water.

[0186] S51, Zinc Immersion. The structure obtained in step S50 is immersed in a zinc immersion agent at 25 degrees Celsius for 20 seconds to replace some of the aluminum in the first metal layer 210 and the second metal layer 240 with zinc. Afterwards, the zinc immersion agent is washed away with water.

[0187] S52, Zinc washing. Immerse the structure obtained in step S51 in a nitric acid solution at 25°C for 10 seconds to wash away the metallic zinc obtained after the first zinc precipitation. Then, rinse off the nitric acid solution with water.

[0188] Then, steps S51 and S52 are repeated three times, that is, a total of four zinc immersion and four zinc washing are performed, thereby forming a zinc metal layer 260 on the upper surface of the second sub-metal layer 214 and a zinc metal layer on the lower surface of the fourth sub-metal layer 244.

[0189] S53, the structure obtained in step S52 is placed in a nickel chloride solution at 85 degrees Celsius for 30 minutes to replace the zinc metal layer 260 with the first nickel metal layer 220, and to replace the zinc metal on the lower surface of the fourth sub-metal layer 244 with the second nickel metal layer 270.

[0190] S54, the structure obtained in step S53 is placed in a potassium gold cyanide solution at 55 degrees Celsius for 25 minutes to replace a portion of the first nickel metal layer 220 with a first gold metal layer 230, and a portion of the second nickel metal layer 270 with a second gold metal layer 280, as shown. Figure 35 As shown.

[0191] The biggest difference between the second and first schemes lies in the order of "forming the second metal layer 240" and "chemical nickel plating and chemical gold plating". Apart from this, all other undescribed embodiments in the second scheme are the same as those in the first scheme.

[0192] The second approach also has the following advantages: In the first approach, as described in Example 2, the first metal layer 210 is first electrolessly plated with nickel (steps S19 to S21) and then electrolessly plated with gold (step S22), followed by thinning of the substrate layer 110 (step S23), and then fabrication of the back electrode of the Schottky diode 20 (step S24). In this case, during electroless nickel plating (steps S19 to S21), the back side of the Schottky diode chip 10 is bare silicon, resulting in a layer of nickel metal being plated on the back side of the Schottky diode chip 10. Similarly, during electroless gold plating (step S22), a layer of gold metal is also plated on the back side of the Schottky diode 20. However, during the thinning of the substrate layer 110 (step S23), the gold metal on the back side of the Schottky diode 20 is ground off, resulting in a waste of gold metal. In the second approach, as described in Example 5, the first metal layer 210 is formed first (steps S43 to S45), then the substrate layer 110 is thinned (step S47), followed by the preparation of the second metal layer 240 (step S48). Then, the first metal layer 210 and the second metal layer 240 are simultaneously electroless plated with nickel and electroless plated with gold (steps S51 to S54). Thus, the second gold metal layer 280 formed on the back side of the Schottky diode chip 10 does not need to be removed by polishing, preventing waste of gold metal.

[0193] Example 6:

[0194] This application also provides a Schottky diode 20, which is prepared by the preparation method in any of the above embodiments. For example... Figure 30 As shown, the Schottky diode 20 includes a Schottky diode chip 10, a first metal layer 210, a first nickel metal layer 220, a first gold metal layer 230, and a second metal layer 240.

[0195] The Schottky diode chip 10 includes a substrate layer 110, an epitaxial layer 120, and a barrier layer 130, wherein the epitaxial layer 120 and the substrate layer 110 are stacked along a predetermined direction. Along a direction perpendicular to the predetermined direction, the epitaxial layer 120 has a first region 102 and a second region 104 surrounding the first region 102. The barrier layer 130 is located on the side of the epitaxial layer 120 away from the substrate layer 110 and is embedded in the first region 102 of the epitaxial layer 120.

[0196] The first metal layer 210 is located on the side of the barrier layer 130 away from the Schottky diode chip 10, and the first metal layer 210 at least covers the barrier layer 130. The first nickel metal layer 220 is located on the side of the first metal layer 210 away from the barrier layer 130. The first gold metal layer 230 is located on the side of the first nickel metal layer 220 away from the first metal layer 210. The second metal layer 240 is located on the side of the Schottky diode chip 10 that does not have the barrier layer 130.

[0197] In some embodiments, such as Figure 30 As shown, the Schottky diode 20 also includes a passivation layer 250. The passivation layer 250 is located on the side of the first metal layer 210 away from the barrier layer 130. The passivation layer 250 has a via 252. The via 252 is used to expose a portion of the surface of the first metal layer 210, and the orthographic projection of the via 252 onto the plane of the barrier layer 130 lies within the barrier layer 130. The first nickel metal layer 220 and the first gold metal layer 230 are both located within the via 252.

[0198] In some embodiments, such as Figure 35 As shown, the Schottky diode 20 also includes a second nickel metal layer 270 and a second gold metal layer 280. The second nickel metal layer 270 is located on the side of the second metal layer 240 away from the Schottky diode chip 10. The second gold metal layer 280 is located on the side of the second nickel metal layer 270 away from the second metal layer 240.

[0199] The embodiments described above are only used to illustrate the technical solutions of this application, and are not intended to limit them. Those skilled in the art should understand that modifications can be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method of fabricating a Schottky diode, characterized by, The application relates to a Schottky diode chip, which comprises a substrate layer, an epitaxial layer and a barrier layer, wherein the epitaxial layer and the substrate layer are arranged in a preset direction; the epitaxial layer has a first region and a second region surrounding the first region along a direction perpendicular to the preset direction, and the barrier layer is located on a side of the epitaxial layer away from the substrate layer and embedded in the first region of the epitaxial layer; a first metal layer covering at least the barrier layer is formed on a side of the Schottky diode chip with the barrier layer, the material of the first metal layer comprises metal aluminum and does not comprise metal silver; a nickel metal layer is formed on a side of the first metal layer away from the barrier layer by electroless plating; a gold metal layer is formed on a side of the nickel metal layer away from the first metal layer by electroless plating; a second metal layer is formed on a side of the Schottky diode chip without the barrier layer; wherein the electroless plating of the first metal layer with nickel on a side of the first metal layer away from the barrier layer comprises electroless plating of the first metal layer with zinc on a side of the first metal layer away from the barrier layer to form a zinc metal layer, and the structure with the zinc metal layer is placed in a solution containing nickel ions to replace the zinc metal layer with a nickel metal layer; before the electroless plating of the first metal layer with zinc on a side of the first metal layer away from the barrier layer, the structure with the first metal layer is placed in an acid degreasing agent to remove impurities on the surface of the first metal layer, and the first metal layer is etched from a side of the first metal layer away from the barrier layer to make the first metal layer have a rough surface away from the barrier layer. The Schottky diode chip further comprises a guard ring located on a side of the epitaxial layer away from the substrate layer and covering the second region of the epitaxial layer; along the preset direction, the height of the barrier layer is lower than the height of the guard ring; along a direction perpendicular to the preset direction, the guard ring comprises a third region and a fourth region surrounding the third region; the first metal layer comprises a first sub-metal layer and a second sub-metal layer stacked along the preset direction, and the first metal layer covering at least the barrier layer is formed on a side of the Schottky diode chip with the barrier layer, which comprises the following steps: titanium metal is evaporated on a side of the Schottky diode chip with the barrier layer to form a titanium metal layer covering the surface of the barrier layer away from the substrate layer, the surface of the guard ring away from the epitaxial layer and the inner surface of the guard ring; aluminum metal is evaporated on a side of the titanium metal layer away from the Schottky diode chip to form an aluminum metal layer covering the titanium metal layer; a photoresist covering the aluminum metal layer is formed, and the photoresist is subjected to photolithography to form a patterned structure, wherein the projection of the patterned structure overlaps with the projection of the fourth region along the preset direction; the aluminum metal layer is etched through the patterned structure to obtain the second sub-metal layer. ​ ​ ​ ​ ​ ​ ​ 2. The method of manufacturing a Schottky diode according to claim 1, wherein ​ ​ ​ ​ ​ ​ Corrode the titanium metal layer through the patterned structure to obtain a first sub-metal layer.

3. The method for fabricating a Schottky diode as described in claim 1, characterized in that, Before the electroless nickel plating on the first metal layer away from the barrier layer side, further comprising: forming a passivation layer on the first metal layer away from the barrier layer side, the passivation layer having a through hole for exposing part of the surface of the first metal layer, the through hole being in the barrier layer in the orthographic projection of the plane where the barrier layer is located.

4. The method for fabricating a Schottky diode as described in claim 1, characterized in that, The electroless zinc plating on the first metal layer away from the barrier layer side comprises: placing the structure formed with the first metal layer in a zinc deposition agent to perform primary zinc deposition on the first metal layer away from the barrier layer side; using a nitric acid solution to wash the structure formed after the primary zinc deposition once; placing the structure formed after the primary zinc deposition in the zinc deposition agent to perform secondary zinc deposition on the first metal layer away from the barrier layer side to obtain a zinc metal layer.

5. The method for fabricating a Schottky diode as described in claim 1, characterized in that, The structure formed with the zinc metal layer is placed in a solution containing nickel ions to replace the zinc metal layer with a nickel metal layer, comprising: immersing the structure formed with the zinc metal layer in a nickel chloride solution at 80-90 degrees Celsius for 25-35 minutes to completely replace the zinc metal layer with a nickel metal layer.

6. The method of manufacturing a Schottky diode according to any one of claims 1 to 3, wherein The electroless gold plating on the nickel metal layer away from the first metal layer side comprises: placing the structure formed with the nickel metal layer in a solution containing gold ions to replace part of the thickness of the nickel metal layer with a gold metal layer.

7. A method of fabricating a Schottky diode, characterized by, Comprising: providing a Schottky diode chip, the Schottky diode chip comprising a substrate layer, an epitaxial layer and a barrier layer, the epitaxial layer and the substrate layer being stacked along a preset direction; along a direction perpendicular to the preset direction, the epitaxial layer has a first region and a second region surrounding the first region, the barrier layer is located on the side of the epitaxial layer away from the substrate layer and is embedded in the first region of the epitaxial layer; forming a first metal layer covering at least the barrier layer on the side of the Schottky diode chip with the barrier layer, the material of the first metal layer comprising metal aluminum; forming a second metal layer on the side of the Schottky diode chip without the barrier layer, the material of the second metal layer comprising metal aluminum; respectively electroless nickel plating on the first metal layer and the second metal layer away from the barrier layer side to form a first nickel metal layer and a second nickel metal layer; respectively electroless gold plating on the first nickel metal layer and the second nickel metal layer away from the barrier layer side to form a first gold metal layer and a second gold metal layer; The chemical nickel plating on the first metal layer and the second metal layer away from the barrier layer respectively to form the first nickel metal layer and the second nickel metal layer comprises: chemical zinc plating on the first metal layer away from the barrier layer and chemical zinc plating on the second metal layer away from the barrier layer to form two zinc metal layers; and placing the structure formed with the two zinc metal layers in a solution containing nickel ions to replace the two zinc metal layers into the first nickel metal layer and the second nickel metal layer respectively. Before the chemical zinc plating on the first metal layer away from the barrier layer and the chemical zinc plating on the second metal layer away from the barrier layer, the method further comprises: placing the structure formed with the first metal layer and the second metal layer in an acidic degreasing agent to remove impurities on the surfaces of the first metal layer and the second metal layer; and etching the first metal layer away from the barrier layer and etching the second metal layer away from the barrier layer to make the first metal layer and the second metal layer have rough surfaces away from the barrier layer.

8. A Schottky diode prepared by the method of any one of claims 1 to 7, characterized in that The Schottky diode comprises a Schottky diode chip, a first metal layer, a nickel metal layer, a gold metal layer and a second metal layer. The Schottky diode chip comprises a substrate layer, an epitaxial layer and a barrier layer, and the epitaxial layer and the substrate layer are stacked along a preset direction; along a direction perpendicular to the preset direction, the epitaxial layer has a first region and a second region surrounding the first region, and the barrier layer is located on a side of the epitaxial layer away from the substrate layer and is embedded in the first region of the epitaxial layer. The first metal layer is located on a side of the barrier layer away from the Schottky diode chip, and the first metal layer covers at least the barrier layer; The nickel metal layer is located on a side of the first metal layer away from the barrier layer; The gold metal layer is located on a side of the nickel metal layer away from the first metal layer; The second metal layer is located on a side of the Schottky diode chip without the barrier layer; The first metal layer has a rough surface away from the barrier layer, or the first metal layer and the second metal layer both have rough surfaces away from the barrier layer.

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