A gain amplifier based on multiple stages of gain

CN116131775BActive Publication Date: 2026-09-08CHENGDU SICORE SEMICON CORP LTD
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Patent Information

Application Number
CN202310023838.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-01-09
Publication Date
2026-09-08
Estimated Expiration
2043-01-09

AI Technical Summary

Technical Problem

[0006]为了获得高增益,现有的做法是多个增益放大器合成能够获得更高的增益,但是多个增益放大器的结合导致了使用的器件数量增加,使得最终增益放大器的体积变大成本变高

Benefits of technology

[0031] The high-gain single device in this invention can replace the traditional combination of multiple devices, reducing the number of devices used. The traditional approach is to use two or more devices to synthesize the gain. The high gain of a single device can solve the high gain requirement of some links. Since the number of devices is reduced, the component area is smaller and the cost is also reduced.

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Abstract

The application discloses a gain amplifier based on multi-stage gain, and relates to the field of amplifiers.The gain amplifier comprises an input signal processing circuit, a first-stage gain circuit, a second-stage gain circuit, a third-stage gain circuit, and an output signal processing circuit.The input signal processing circuit is used for processing an input signal.The first-stage gain circuit is used for gain amplification processing of the signal processed by the input signal processing circuit to obtain a first signal.The second-stage gain circuit is used for gain amplification processing of the first signal to obtain a second signal.The third-stage gain circuit is used for gain amplification processing of the second signal to obtain a third signal.The output signal processing circuit is used for outputting the third signal after processing.The feedback circuit is used for adjusting the gain amplification processing effect of the first-stage gain circuit, the second-stage gain circuit and the third-stage gain circuit.The application can improve the gain of the gain amplifier, improve the linearity and bandwidth of the gain amplifier, and effectively control the size and cost of the gain amplifier.
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Description

Technical Field

[0001] This invention relates to the field of gain amplifiers, and more specifically, to a gain amplifier based on multi-stage gain. Background Technology

[0002] Amplifiers designed using the Darlington structure with GaAs HBT (GaAs-gallium arsenide, HBT-heterojunction bipolar transistor) technology have advantages such as ultra-wide bandwidth, high linearity, small area, and simpler external matching circuitry. At the same time, the cost of using HBT technology is also relatively low. Currently, this type of product is widely used in radio frequency and microwave systems.

[0003] Gallium arsenide (GaAs) HBT technology also has its drawbacks, including low integration density, poor noise, and poor thermal conductivity. GaAs has a much lower hole mobility than electron mobility, making it difficult to form bipolar circuit structures similar to those in silicon (Si). Furthermore, the interface state density between GaAs and its bulk oxide or other insulating layers is high, making it difficult to find dielectric materials with the same good adhesion and insulating properties as those found in Si devices.

[0004] The most significant difference between heterojunction bipolar transistors (HBTs) and homojunction bipolar transistors (HBTs) is that in a heterojunction HBT, the emitter junction is a heterojunction, and the emitter material has a wider bandgap. A wider bandgap emitter region can suppress minority carrier injection from the base region to the emitter region, improving the emitter injection efficiency and resulting in higher gain.

[0005] Although existing gain amplifiers can provide good gain for multiple signals, the following technical solutions are used to achieve even greater gain:

[0006] To achieve high gain, the current approach is to combine multiple gain amplifiers to obtain higher gain. However, combining multiple gain amplifiers increases the number of components used, making the final gain amplifier larger and more expensive. Summary of the Invention

[0007] The purpose of this invention is to improve the linearity and bandwidth of a gain amplifier while increasing its gain, and to effectively control its size and cost.

[0008] To achieve the above objectives, the present invention provides a gain amplifier based on multi-stage gain, the gain amplifier comprising:

[0009] Input signal processing circuit, used to process input signals;

[0010] The first-stage gain circuit is used to amplify the signal processed by the input signal processing circuit to obtain the first signal.

[0011] The second-stage gain circuit is used to amplify the first signal to obtain the second signal.

[0012] The third-stage gain circuit is used to amplify the second signal to obtain the third signal.

[0013] The output signal processing circuit is used to process the third signal and then output it.

[0014] The feedback circuit is used to adjust the gain amplification effect of the first-stage gain circuit, the second-stage gain circuit, and the third-stage gain circuit.

[0015] The principle of this invention is as follows: A first-stage gain circuit performs a first-stage gain amplification, followed by a second-stage gain circuit for a second-stage gain amplification, and then a third-stage gain circuit for a third-stage gain amplification. This three-stage gain amplification effectively improves the gain of the gain amplifier. Furthermore, instead of using multiple gain amplifiers in combination as in traditional methods, a three-stage gain circuit is employed, resulting in effective control over the amplifier's size and lower cost. The multi-stage synthesis allows each stage to provide current, leading to higher linearity, a higher 1dB compression point, and a higher third-order intermodulation point, thus enhancing the linearity and bandwidth of the gain amplifier.

[0016] Preferably, the first-stage gain circuit, the second-stage gain circuit, and the third-stage gain circuit in this invention each include two mutually symmetrical sub-circuits. The mutually symmetrical sub-circuits enable uniform current distribution, facilitate the synthesis of various parameters, and result in better and more stable gain performance.

[0017] Preferably, in this invention, the first-stage gain circuit and the second-stage gain circuit each include two heterojunction bipolar transistors, and the third-stage gain circuit includes four heterojunction bipolar transistors.

[0018] Preferably, in this invention, all heterojunction bipolar transistors are BEB transistors. BEB transistors are base-emitter-base transistors, and at a frequency of 6GHz, BEB transistors exhibit superior performance across various parameters.

[0019] Preferably, in this invention, the total length of the heterojunction bipolar transistor in the first-stage gain circuit is three times the total length of the heterojunction bipolar transistor in the second-stage gain circuit, and the total length of the heterojunction bipolar transistor in the third-stage gain circuit is twice the total length of the heterojunction bipolar transistor in the second-stage gain circuit.

[0020] Preferably, in this invention, the input signal processing circuit includes a first branch and a second branch. The first branch processes the input signal and outputs it to a first sub-circuit in a first-stage gain circuit for gain amplification. The second branch processes the input signal and outputs it to a second sub-circuit in a first-stage gain circuit for gain amplification. The signal processed by the first sub-circuit is output to a third sub-circuit in a second-stage gain circuit for gain amplification. The signal processed by the second sub-circuit is output to a fourth sub-circuit in a second-stage gain circuit for gain amplification. The signal processed by the third sub-circuit is output to a fifth sub-circuit in a third-stage gain circuit for gain amplification. The signal processed by the fourth sub-circuit is output to a sixth sub-circuit in a third-stage gain circuit for gain amplification. The signals processed by the fifth and sixth sub-circuits converge to the output signal processing circuit.

[0021] The input signal processing circuit is designed as two branches. The first-stage gain circuit, the second-stage gain circuit, and the third-stage gain circuit are all designed to include corresponding sub-branches. This is to achieve a symmetrical effect and to use the sub-branches to amplify the gain, thereby improving the amplification effect.

[0022] Preferably, in this invention, the first-stage gain circuit includes: resistors R2a and R2b, microstrip line TL2a and TL2b, heterojunction bipolar transistor (HJT1a) and HJT1b; the second-stage gain circuit includes: resistors R4a and R4b, microstrip line TL3a and TL3b, HJT2a and HJT2b; the third-stage gain circuit includes: resistors R6a and R6b, microstrip line TL4a and TL4b, HJT3a, HJT3b, HJT3c and HJT3d; the HJT is the active transistor of the circuit, and the other resistors and microstrip lines serve a matching function to match the impedance point of the transistor to the optimal impedance point.

[0023] The input signal processing circuit includes a first branch and a second branch. One end of the first branch is connected to the input terminal of the gain amplifier, and the other end of the first branch is connected to the feedback circuit and the base of BJT1a. The collector of BJT1a is connected to the feedback circuit. The emitter of BJT1a is connected to one end of TL2a and the base of BJT2a. The other end of TL2a is connected to one end of R2a, and the other end of R2a is grounded. The collector of BJT2a is connected to the feedback circuit. The emitter of BJT2a is connected to one end of TL3a, the base of BJT3a, and the base of BJT3b. The other end of TL3a is connected to one end of R4a, and the other end of R4a is grounded.

[0024] The emitter of BJT3a and the emitter of BJT3b are both connected to one end of TL4a. The other end of TL4a is connected to one end of R6a. The other end of R6a is grounded. The collectors of BJT3a, BJT3b, BJT3c and BJT3d are all connected to the feedback circuit.

[0025] One end of the second branch is connected to the input of the gain amplifier, and the other end of the second branch is connected to the feedback circuit and the base of BJT1b. The collector of BJT1b is connected to the feedback circuit. The emitter of BJT1b is connected to one end of TL2b and the base of BJT2b. The other end of TL2b is connected to one end of R2b, and the other end of R2b is grounded. The collector of BJT2b is connected to the feedback circuit. The emitter of BJT2b is connected to one end of TL3b, the base of BJT3c, and the base of BJT3d. The other end of TL3b is connected to one end of R4b, and the other end of R4b is grounded. The emitters of BJT3c and BJT3d are both connected to one end of TL4b. The other end of TL4b is connected to one end of R6b, and the other end of R6b is grounded.

[0026] Preferably, in this invention, the first branch includes a microstrip line TL1a, and the second branch includes a microstrip line TL1b, which serves as a circuit matching function. One end of TL1a is connected to the input terminal of the gain amplifier, and the other end of TL1a is connected to the feedback circuit and the base of BJT1a. One end of TL1b is connected to the input terminal of the gain amplifier, and the other end of TL1b is connected to the feedback circuit and the base of BJT1b.

[0027] Preferably, in this invention, the output signal processing circuit includes a microstrip line TL5 for circuit matching. One end of TL5 is connected to the collectors of BJT3a and BJT3b, the collectors of BJT3c and BJT3d, and the feedback circuit. The other end of TL5 is connected to the output of the gain amplifier.

[0028] Preferably, in this invention, the feedback circuit includes resistors R1, R3, and R5; it serves as a feedback mechanism, adjusting the current at the corresponding circuit node by adjusting the resistance values.

[0029] One end of R1 is connected to the first branch, the second branch, the base of BJT1a, and the base of BJT1b; the other end of R1 is connected to one end of R3, the collector of BJT1a, and the collector of BJT1b; the other end of R3 is connected to one end of R5, the collector of BJT2a, and the collector of BJT2b; the other end of R5 is connected to the output signal processing circuit, the collector of BJT3a, the collector of BJT3b, the collector of BJT3c, and the collector of BJT3d.

[0030] One or more technical solutions provided by this invention have at least the following technical effects or advantages:

[0031] The high-gain single device in this invention can replace the traditional combination of multiple devices, reducing the number of devices used. The traditional approach is to use two or more devices to synthesize the gain. The high gain of a single device can solve the high gain requirement of some links. Since the number of devices is reduced, the component area is smaller and the cost is also reduced.

[0032] The gain amplifier in this invention uses multi-stage synthesis to achieve higher linearity, higher output P1dB (1dB compression point) and output OIP3 (third-order intermodulation point), and multi-stage cascading can achieve wider impedance matching, resulting in a wider bandwidth that can be adapted to broadband applications. Attached Figure Description

[0033] The accompanying drawings, which are provided to further illustrate embodiments of the invention and constitute a part of this invention, are not intended to limit the scope of the invention.

[0034] Figure 1 This is a schematic diagram of a gain amplifier based on multi-stage gain. Detailed Implementation

[0035] To better understand the above-mentioned objectives, features, and advantages of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that, where there is no conflict, the embodiments of the present invention and the features thereof can be combined with each other.

[0036] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and therefore the scope of protection of the invention is not limited to the specific embodiments disclosed below.

[0037] Example 1

[0038] Please refer to Figure 1 , Figure 1 This invention provides a gain amplifier based on multi-stage gain, as shown in the schematic diagram below. The gain amplifier includes:

[0039] Input signal processing circuit, used to process input signals;

[0040] The first-stage gain circuit is used to amplify the signal processed by the input signal processing circuit to obtain the first signal.

[0041] The second-stage gain circuit is used to amplify the first signal to obtain the second signal.

[0042] The third-stage gain circuit is used to amplify the second signal to obtain the third signal.

[0043] The output signal processing circuit is used to process the third signal and then output it.

[0044] The feedback circuit is used to adjust the gain amplification effect of the first-stage gain circuit, the second-stage gain circuit, and the third-stage gain circuit.

[0045] The main circuit of the gain amplifier based on the three-stage Darlington technology includes eight HBT transistors: BEB transistors (base-emitter-base transistors). A BEB transistor is a base transistor that includes an emitter transistor and is suitable for frequencies below 6 GHz (the operating frequency, where the performance of BEB transistors is superior at 6 GHz). This is different from an EBE transistor (emitter-base-emitter transistor), where the emitter transistor includes a base transistor and is suitable for frequencies below 2.7 GHz.

[0046] The gain amplifier circuit is divided into three stages. The purpose of this three-stage design is to achieve higher gain, better linearity, and reduce the number of chips required by the user. The first stage consists of two identical symmetrical transistors, one above the other. This perfect symmetry results in uniform current distribution, facilitates performance synthesis, and improves the layout's aesthetics. The collectors of the two transistors are connected, and their bases are connected to the RF input ports. The emitters are connected to ground via a microstrip line and a resistor, and are also connected to the base of the second stage. The second stage also consists of two identical symmetrical BEB transistors, with their collectors connected and their bases connected to the RF input ports. The emitters are connected to ground via a microstrip line and a resistor, and are also connected to the base of the third stage. The third stage differs from the first two in that it contains four transistors. The top two transistors have identical parameters, with their bases, emitters, and collectors connected. The bottom two transistors have identical parameters and are symmetrical to the top transistors, with the same connection relationships. The ratio of the total length of the first-stage transistor to the second-stage transistor is 3:1, and the ratio of the total length of the second-stage transistor to the third-stage transistor is 1:2. Both stages have the same size transistors, but the third stage consists of two transistors on one side. The resistor in the middle of the circuit acts as feedback, allowing adjustment of various parameters.

[0047] The gain amplifier of this invention employs a three-stage Darlington technique. Through the series connection and stacking of transistors, each stage of transistors generates gain independently. By stacking, the gains are combined, enabling the entire circuit to provide a significant increase in gain.

[0048] Compared to traditional gain amplifiers, this invention has a simple structure, is easy to implement, and greatly reduces design complexity. By using a completely symmetrical approach to synthesize the amplifier, the layout area is reduced (if the symmetrical approach is not used, the gain cannot reach the target value when there is only one side of the circuit, and to achieve the ideal value, the number of circuit stages must be increased, which will increase the horizontal area), thus improving the gain.

[0049] The circuit structure and connection relationships in this invention are described below with reference to the accompanying drawings. The circuit structure in this invention is not limited to the following structures and connection methods:

[0050] In this embodiment of the invention, the first-stage gain circuit includes: resistors R2a and R2b, microstrip line TL2a and TL2b, heterojunction bipolar transistor BJT1a and BJT1b; the second-stage gain circuit includes: resistors R4a and R4b, microstrip line TL3a and TL3b, heterojunction bipolar transistor BJT2a and BJT2b; the third-stage gain circuit includes: resistors R6a and R6b, microstrip line TL4a and TL4b, heterojunction bipolar transistor BJT3a, BJT3b, BJT3c and BJT3d.

[0051] The input signal processing circuit includes a first branch and a second branch. One end of the first branch is connected to the input terminal of the gain amplifier, and the other end of the first branch is connected to the feedback circuit and the base of BJT1a. The collector of BJT1a is connected to the feedback circuit. The emitter of BJT1a is connected to one end of TL2a and the base of BJT2a. The other end of TL2a is connected to one end of R2a, and the other end of R2a is grounded. The collector of BJT2a is connected to the feedback circuit. The emitter of BJT2a is connected to one end of TL3a, the base of BJT3a, and the base of BJT3b. The other end of TL3a is connected to one end of R4a, and the other end of R4a is grounded.

[0052] The emitter of BJT3a and the emitter of BJT3b are both connected to one end of TL4a. The other end of TL4a is connected to one end of R6a. The other end of R6a is grounded. The collectors of BJT3a, BJT3b, BJT3c and BJT3d are all connected to the feedback circuit.

[0053] One end of the second branch is connected to the input of the gain amplifier, and the other end of the second branch is connected to the feedback circuit and the base of BJT1b. The collector of BJT1b is connected to the feedback circuit. The emitter of BJT1b is connected to one end of TL2b and the base of BJT2b. The other end of TL2b is connected to one end of R2b, and the other end of R2b is grounded. The collector of BJT2b is connected to the feedback circuit. The emitter of BJT2b is connected to one end of TL3b, the base of BJT3c, and the base of BJT3d. The other end of TL3b is connected to one end of R4b, and the other end of R4b is grounded. The emitters of BJT3c and BJT3d are both connected to one end of TL4b. The other end of TL4b is connected to one end of R6b, and the other end of R6b is grounded.

[0054] In this embodiment of the invention, the first branch includes a microstrip line TL1a, and the second branch includes a microstrip line TL1b. One end of TL1a is connected to the input terminal of the gain amplifier, and the other end of TL1a is connected to the feedback circuit and the base of BJT1a. One end of TL1b is connected to the input terminal of the gain amplifier, and the other end of TL1b is connected to the feedback circuit and the base of BJT1b.

[0055] In this embodiment of the invention, the output signal processing circuit includes a microstrip line TL5. One end of TL5 is connected to the collectors of BJT3a and BJT3b, the collectors of BJT3c and BJT3d, and the feedback circuit. The other end of TL5 is connected to the output of the gain amplifier.

[0056] In this embodiment of the invention, the feedback circuit includes: resistor R1, resistor R3 and resistor R5;

[0057] One end of R1 is connected to the first branch, the second branch, the base of BJT1a, and the base of BJT1b; the other end of R1 is connected to one end of R3, the collector of BJT1a, and the collector of BJT1b; the other end of R3 is connected to one end of R5, the collector of BJT2a, and the collector of BJT2b; the other end of R5 is connected to the output signal processing circuit, the collector of BJT3a, the collector of BJT3b, the collector of BJT3c, and the collector of BJT3d.

[0058] In this embodiment of the invention, the gain amplifier signal is input from the pad at the RFIN port, passes through the microstrip line to the base of the first-stage transistor, and a current is generated at the emitter of the first stage, which is connected to the base of the second stage. A current is generated at the emitter of the second stage, which is connected to the base of the third stage. The collectors of the three stages are connected together to the RFOUT radio frequency signal output terminal, which also serves as the power supply port.

[0059] The power supply for the gain amplifier is input from the pad at the RFOUT terminal through the external circuit. DC current enters the output pad after passing through the resistors and inductors of the external circuit. There is a small current distribution in the feedback branch R5, R3, and R1, and the main current is distributed at the emitter of each transistor.

[0060] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0061] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A gain amplifier based on multi-stage gain, characterized in that, The gain amplifier includes: Input signal processing circuit, used to process input signals; The first-stage gain circuit is used to amplify the signal processed by the input signal processing circuit to obtain the first signal. The second-stage gain circuit is used to amplify the first signal to obtain the second signal. The third-stage gain circuit is used to amplify the second signal to obtain the third signal. The output signal processing circuit is used to process the third signal and then output it. The feedback circuit is used to adjust the gain amplification effect of the first-stage gain circuit, the second-stage gain circuit, and the third-stage gain circuit. The first-stage gain circuit includes: resistors R2a and R2b, microstrip line TL2a and TL2b, heterojunction bipolar transistor (HJT1a) and HJT1b; the second-stage gain circuit includes: resistors R4a and R4b, microstrip line TL3a and TL3b, HJT2a and HJT2b; the third-stage gain circuit includes: resistors R6a and R6b, microstrip line TL4a and TL4b, HJT3a, HJT3b, HJT3c and HJT3d. The input signal processing circuit includes a first branch and a second branch. One end of the first branch is connected to the input terminal of the gain amplifier, and the other end of the first branch is connected to the feedback circuit and the base of BJT1a. The collector of BJT1a is connected to the feedback circuit. The emitter of BJT1a is connected to one end of TL2a and the base of BJT2a. The other end of TL2a is connected to one end of R2a, and the other end of R2a is grounded. The collector of BJT2a is connected to the feedback circuit. The emitter of BJT2a is connected to one end of TL3a, the base of BJT3a, and the base of BJT3b. The other end of TL3a is connected to one end of R4a, and the other end of R4a is grounded. The emitter of BJT3a and the emitter of BJT3b are both connected to one end of TL4a. The other end of TL4a is connected to one end of R6a. The other end of R6a is grounded. The collectors of BJT3a, BJT3b, BJT3c and BJT3d are all connected to the feedback circuit. One end of the second branch is connected to the input of the gain amplifier, and the other end of the second branch is connected to the feedback circuit and the base of BJT1b. The collector of BJT1b is connected to the feedback circuit. The emitter of BJT1b is connected to one end of TL2b and the base of BJT2b. The other end of TL2b is connected to one end of R2b, and the other end of R2b is grounded. The collector of BJT2b is connected to the feedback circuit. The emitter of BJT2b is connected to one end of TL3b, the base of BJT3c, and the base of BJT3d. The other end of TL3b is connected to one end of R4b, and the other end of R4b is grounded. The emitters of BJT3c and BJT3d are both connected to one end of TL4b. The other end of TL4b is connected to one end of R6b, and the other end of R6b is grounded.

2. The gain amplifier based on multi-stage gain according to claim 1, characterized in that, The first-stage gain circuit, the second-stage gain circuit, and the third-stage gain circuit each consist of two mutually symmetrical sub-circuits.

3. A gain amplifier based on multi-stage gain according to claim 1, characterized in that, The first-stage gain circuit and the second-stage gain circuit each include two heterojunction bipolar transistors, while the third-stage gain circuit includes four heterojunction bipolar transistors.

4. A gain amplifier based on multi-stage gain according to claim 3, characterized in that, All heterojunction bipolar transistors are BEB transistors.

5. A gain amplifier based on multi-stage gain according to claim 1, characterized in that, The total length of the heterojunction bipolar transistor in the first-stage gain circuit is three times that of the heterojunction bipolar transistor in the second-stage gain circuit, and the total length of the heterojunction bipolar transistor in the third-stage gain circuit is twice that of the heterojunction bipolar transistor in the second-stage gain circuit.

6. A gain amplifier based on multi-stage gain according to claim 2, characterized in that, The input signal processing circuit includes a first branch and a second branch. The first branch processes the input signal and outputs it to the first sub-circuit of the first-stage gain circuit for gain amplification. The second branch processes the input signal and outputs it to the second sub-circuit of the first-stage gain circuit for gain amplification. The signal processed by the first sub-circuit is output to the third sub-circuit of the second-stage gain circuit for gain amplification. The signal processed by the second sub-circuit is output to the fourth sub-circuit of the second-stage gain circuit for gain amplification. The signal processed by the third sub-circuit is output to the fifth sub-circuit of the third-stage gain circuit for gain amplification. The signal processed by the fourth sub-circuit is output to the sixth sub-circuit of the third-stage gain circuit for gain amplification. The signals processed by the fifth and sixth sub-circuits converge to the output signal processing circuit.

7. A gain amplifier based on multi-stage gain according to claim 1, characterized in that, The first branch includes a microstrip line TL1a, and the second branch includes a microstrip line TL1b. One end of TL1a is connected to the input of the gain amplifier, and the other end of TL1a is connected to the feedback circuit and the base of BJT1a. One end of TL1b is connected to the input of the gain amplifier, and the other end of TL1b is connected to the feedback circuit and the base of BJT1b.

8. A gain amplifier based on multi-stage gain according to claim 1, characterized in that, The output signal processing circuit includes a microstrip line TL5. One end of TL5 is connected to the collectors of BJT3a and BJT3b, the collectors of BJT3c and BJT3d, and the feedback circuit. The other end of TL5 is connected to the output of the gain amplifier.

9. A gain amplifier based on multi-stage gain according to claim 1, characterized in that, The feedback circuit includes: resistors R1, R3, and R5; One end of R1 is connected to the first branch, the second branch, the base of BJT1a, and the base of BJT1b; the other end of R1 is connected to one end of R3, the collector of BJT1a, and the collector of BJT1b; the other end of R3 is connected to one end of R5, the collector of BJT2a, and the collector of BJT2b; the other end of R5 is connected to the output signal processing circuit, the collector of BJT3a, the collector of BJT3b, the collector of BJT3c, and the collector of BJT3d.

Citation Information

Patent Citations

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