An IAP upgrading method and device, electronic equipment and storage medium

By partitioning and locking the physical address of the Boot program during the IAP upgrade process, the problem of upgrade failure caused by accidental erasure of the Boot program is solved, thereby improving the success rate of IAP upgrades and system stability.

CN117289977BActive Publication Date: 2026-08-04XIAN BYD SEMICON CO LTD
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Patent Information

Application Number
CN202210698278.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-06-20
Publication Date
2026-08-04
Estimated Expiration
2042-06-20

AI Technical Summary

Technical Problem

In existing IAP upgrade methods, the MCU's boot program may be accidentally erased due to program pointer operation errors, leading to IAP upgrade failure, frequent product malfunctions, and the boot area program cannot run normally again.

Method used

During the startup process, when reading upgrade instructions, the application is obtained and the program storage usage information of the startup program is read. The corresponding physical address range is determined, and the application is burned to that address range to avoid erasing or rewriting the Boot program. By partitioning and locking its physical address, the risk of failure is reduced.

Benefits of technology

It improved the success rate of IAP upgrades, ensured the upgrade process was completed, prevented boot program failures, and enhanced development efficiency and project stability.

✦ Generated by Eureka AI based on patent content.

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Abstract

Embodiments of the present application provide an IAP upgrading method, device, electronic equipment and storage medium. The IAP upgrading method comprises: during running a starting program, when a upgrading instruction is read, acquiring an application program; reading program storage occupation information of the starting program; determining a first physical address range corresponding to the starting program based on the program storage occupation information, the first physical address range comprising a first physical end address; and offsetting to the first physical end address to burn the application program. In the embodiments of the present application, the first physical address range corresponding to the starting program is determined based on the program storage occupation information of the starting program, the starting program and the application program are partitioned in the physical address, the application program is burned by offsetting to the end address, the physical address of the starting program is locked, the starting program is prevented from being erased by the application program, the invalidation risk of the starting program is reduced, the implementation of the upgrading process is ensured, and the IAP upgrading success rate is improved.
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Description

Technical Field

[0001] This invention relates to the field of software upgrade technology, and in particular to an IAP upgrade method, an IAP upgrade device, an electronic device, and a storage medium. Background Technology

[0002] With the continuous upgrading and replacement of electronic products such as home appliances, and the accelerated iteration and upgrading of product functions, many MCUs (Microcontroller Units) now support the IAP (In Application Programming) function to upgrade user programs online, so as to update user programs quickly and conveniently without the need for ICP (In Circuit Programming).

[0003] The current implementation of IAP upgrade method is to integrate IAP function into MCU to perform IAP operation on the entire Flash program area. When the program is running in the Boot area, due to program pointer operation error or other factors, the IAP operation may accidentally erase and rewrite its own Boot program, which will cause IAP upgrade failure and the Boot area program will not be able to run normally again, resulting in product failure. Summary of the Invention

[0004] In view of the above problems, embodiments of the present invention are proposed to provide an IAP upgrade method, an IAP upgrade device, an electronic device, and a storage medium that overcome or at least partially solve the above problems.

[0005] In a first aspect, embodiments of the present invention disclose an IAP upgrade method, comprising:

[0006] When an upgrade command is read during the startup process, the application is retrieved;

[0007] Read the program storage usage information of the startup program;

[0008] Based on the program storage occupancy information, a first physical address range corresponding to the startup program is determined, and the first physical address range includes the first physical end address;

[0009] The application is burned to the first physical end address.

[0010] Optionally, the method further includes:

[0011] Obtain the startup program;

[0012] The boot program is programmed based on the physical zero address.

[0013] Optionally, the program storage usage information is stored in the system area; the step of reading the program storage usage information of the startup program includes:

[0014] Redirecting to the geographical address corresponding to the system area;

[0015] Read the program storage usage information from the geographical address corresponding to the system area.

[0016] Optionally, the step of determining the first physical address range corresponding to the startup program based on the program storage occupancy information includes:

[0017] The program storage occupancy information is superimposed on the physical zero address to generate the first physical end address;

[0018] The physical address from the physical zero address to the first physical end address is determined as the first physical address range corresponding to the startup program.

[0019] Optionally, the step of burning the application to the first physical end address includes:

[0020] Jump to the first physical end address;

[0021] A second physical address range is determined based on the first physical end address, and the second physical address range includes the second physical start address;

[0022] The application is burned starting from the second physical address.

[0023] Optionally, the method is used with a microcontroller, the microcontroller corresponding to a flash memory end address; the step of determining the second physical address range based on the first physical end address includes:

[0024] Add one to the first physical end address to obtain the second physical start address;

[0025] The range from the second physical starting address to the last address of the flash memory is defined as the second physical address range.

[0026] Optionally, the method further includes:

[0027] When the application is running, obtain the current program address;

[0028] The first physical end address is superimposed on the current program address to generate the pointer address corresponding to the application program.

[0029] The application's program instructions are executed based on the pointer address.

[0030] In a second aspect, embodiments of the present invention also disclose an IAP upgrade device, comprising:

[0031] The application acquisition module is used to acquire the application when an upgrade instruction is read during the execution of the startup program;

[0032] The reading module is used to read the program storage usage information of the startup program;

[0033] The first physical address range determination module is used to determine the first physical address range corresponding to the startup program based on the program storage occupancy information, wherein the first physical address range includes the end address;

[0034] The programming module is used to program the application by offsetting to the first physical end address.

[0035] In a third aspect, embodiments of the present invention also disclose an electronic device, including a processor, a memory, and a computer program stored in the memory and capable of running on the processor, wherein the computer program, when executed by the processor, implements the steps of the IAP upgrade method as described above.

[0036] In a fourth aspect, embodiments of the present invention also disclose a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the IAP upgrade method as described above.

[0037] The embodiments of the present invention have the following advantages:

[0038] In this embodiment of the invention, during the execution of the startup program, when an upgrade instruction is read, the application is acquired; the program storage occupancy information of the startup program is read; based on the program storage occupancy information, a first physical address range corresponding to the startup program is determined, the first physical address range including a first physical end address; and the application program is burned to the first physical end address. By determining the first physical address range corresponding to the startup program based on the program storage occupancy information of the startup program, the startup program and the application program are partitioned in the physical address space, and the physical address of the startup program is locked, preventing the application program from erasing or rewriting the startup program, reducing the risk of startup program failure, ensuring the success of the upgrade process, and improving the success rate of IAP upgrades. Attached Figure Description

[0039] Figure 1 This is a schematic diagram of a Flash partitioning operation in the prior art;

[0040] Figure 2 This is a schematic diagram of the existing technology boot process;

[0041] Figure 3 This is a schematic diagram of the existing technology APP processing flow;

[0042] Figure 4 This is a flowchart illustrating the steps of an embodiment of the IAP upgrade method of the present invention;

[0043] Figure 5 This is a flowchart illustrating the steps of another embodiment of the IAP upgrade method of the present invention;

[0044] Figure 6 This is a schematic diagram of a Flash partition according to the present invention;

[0045] Figure 7 This is a schematic diagram illustrating the correspondence between physical addresses and program addresses according to the present invention;

[0046] Figure 8 This is another schematic diagram illustrating the correspondence between physical addresses and program addresses according to the present invention;

[0047] Figure 9 A flowchart of the boot program burning process of the present invention;

[0048] Figure 10 A flowchart of APP program burning according to the present invention;

[0049] Figure 11 A flowchart of one embodiment of the Boot area and APP area jump operation of the present invention;

[0050] Figure 12 This is a structural block diagram of an embodiment of the IAP upgrade device of the present invention. Detailed Implementation

[0051] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0052] Reference Figure 1 The diagram illustrates a Flash partitioning operation in the prior art. In the prior art, the IAP upgrade method integrates the IAP function into the MCU and performs IAP operation on the entire Flash program area. The MCU is divided into a boot area and an application area (APP). When the program is running in the boot area, the IAP operation may accidentally erase and rewrite its own boot program due to program pointer operation errors or other factors, which will cause the IAP upgrade to fail. The boot area program will also be unable to run normally again unless ICP in-circuit programming is performed to reprogram the boot area program.

[0053] Reference Figure 2This illustrates a schematic diagram of the existing boot process, for reference. Figure 3 The diagram illustrates the existing APP processing flow. Based on the aforementioned Flash partitioning, since the 8-bit MCU based on the 8051 architecture cannot redirect interrupt vectors, space needs to be reserved for interrupt handling code and the interrupt vector offset address needs to be specified when developing the Boot project. When developing the APP application, the compilation start address and interrupt vector start address need to be configured and specified, which increases the difficulty of project development and reduces the efficiency of project development.

[0054] Reference Figure 4 The diagram illustrates a flowchart of an embodiment of the IAP upgrade method of the present invention, which may specifically include the following steps:

[0055] Step 401: When an upgrade instruction is read during the startup process, obtain the application.

[0056] After the MCU chip powers on and resets, the startup program begins running at physical address 0x0000 in the MCU chip's Flash area. During the startup program's execution, the application's upgrade flag line is read. When the upgrade flag bit in the upgrade flag line has a specified value, it is determined that an upgrade instruction has been read, and the application is retrieved from the specified address. The specified address can be a physical address in the chip's read-only memory or a physical address in an access memory connected to the chip; this embodiment of the invention does not impose any limitations.

[0057] Step 402: Read the program storage usage information of the startup program;

[0058] The program storage occupancy information is used to record the amount of storage space required for the startup program to run in the startup area. The program storage occupancy information of the startup program is stored in a reserved area in the MCU. When an upgrade command is received, it is read from this reserved area.

[0059] Step 403: Based on the program storage occupancy information, determine the first physical address range corresponding to the startup program, wherein the first physical address range includes the first physical end address;

[0060] The physical address range occupied by the startup program is determined according to the program storage occupancy information of the startup program, namely the first physical address range, and the first physical end address is the physical end address occupied by the startup program.

[0061] Step 404: Offset to the first physical end address and burn the application.

[0062] When the application is being burned, the burning process begins at the next physical address after the first physical address, locking the erase / write of the boot program. During the application burning process, the program will not jump to the first physical address range where the boot program is located, thus avoiding accidental operation.

[0063] In this embodiment of the invention, when an upgrade instruction is read during the running of the startup program, the application is obtained; the program storage occupancy information of the startup program is read; based on the program storage occupancy information, a first physical address range corresponding to the startup program is determined, the first physical address range including a first physical end address; the application is burned to the first physical end address, thereby partitioning the startup program and the application in the physical address and locking the physical address of the startup program, preventing the application from erasing or rewriting the startup program, reducing the risk of startup program failure, ensuring the implementation of the upgrade process, and improving the success rate of IAP upgrade.

[0064] Reference Figure 5 The diagram illustrates a flowchart of an embodiment of the IAP upgrade method of the present invention, which may specifically include the following steps:

[0065] Step 501: When an upgrade instruction is read during the startup process, obtain the application.

[0066] Figure 6 This is a schematic diagram of a Flash partition according to the present invention. The Flash partition includes a BOOT partition (startup program partition) and an APP partition (application program partition); the two partitions are switched by offset address.

[0067] In addition, the MCU has a system area. It's important to note that the physical address of the system area is different from the physical address where the boot program is stored. The system area stores program memory usage information, which indicates the size of the boot program's data. The MCU also has a Flash area, which corresponds to the end address of the flash memory.

[0068] For example, such as Figure 7 As shown, when the MCU chip runs the Boot program area, the address offset register {ROM_OFFSET_H,ROM_OFFSET_L} = 0x0000, the program execution offset address is 0x0000, and the MCU system performs program execution and interrupt vector lookup table processing interrupt service routine according to the offset address 0x0000.

[0069] Step 502: Redirect to the geographical address corresponding to the system area;

[0070] The MCU chip also has an address register, which is used to store offset addresses. The physical address corresponding to the system area can be loaded into the address register, and the address register can be used to jump to the corresponding geographical address in the system area.

[0071] Step 503: Read the program storage occupancy information from the geographical address corresponding to the system area; the geographical address corresponding to the system area.

[0072] After navigating to the geographic address corresponding to the system area, the system information is read line by line from the geographic address. From these physical addresses, the program memory usage information of the startup program is read. The size of the data in the program memory usage information of the startup program can be represented in hexadecimal.

[0073] Step 504: Overlay the program storage occupancy information onto the physical zero address to generate the first physical end address;

[0074] Physical address zero is the physical address 0x0000 of the Flash area in the MCU chip, which is the starting address of the Flash area.

[0075] Program memory usage information can be overlaid on physical address zero; that is, the size of the startup program can be overlaid on 0x0000 to generate the first physical end address. For example, if the specific value in the program memory usage information is 0x1FFF, overlaying 0x1FFF on 0x0000 will result in 0x1FFF as the first physical end address.

[0076] Step 505: Determine the range from the physical zero address to the first physical end address as the first physical address range corresponding to the startup program;

[0077] After determining the physical zero address and the first physical end address, the physical zero address is used as the starting address of the startup program and the first physical end address is used as the ending address to determine the range of the first physical address corresponding to the startup program.

[0078] Step 506, jump to the first physical end address;

[0079] In practical applications, the first physical end address is loaded into the address register, and the address register is used to jump to the geographical address corresponding to the system area.

[0080] Step 507: Determine a second physical address range based on the first physical end address, wherein the second physical address range includes the second physical start address;

[0081] The maximum range of the boot program is determined based on the first physical end address. Subtracting this first physical end address from the flash memory end address yields the second physical start address, which is the physical start address of the application program. The range from the second physical start address to the flash memory end address is defined as the second physical address range. This second physical address range is the physical address range occupied by the application program.

[0082] Specifically, the step of determining the second physical address range based on the first physical end address includes:

[0083] Sub-step S5071: Increment the first physical end address by one to obtain the second physical start address;

[0084] Sub-step S5072: Determine the range from the second physical starting address value to the end address of the flash memory as the second physical address range.

[0085] In practical applications, the first physical address can be incremented by one to obtain the second physical address. For example, if the first physical address is 0x1FFF, incrementing it by one gives 0x2000, and the second physical address is 0x2000. Then, the physical address range from the determined second physical address to the end address of the flash memory is defined as the second physical address range.

[0086] Step 508: Start burning the application from the second physical address.

[0087] When burning an application, the burning process can start from the second physical address and lock the erase / write of the boot program. During the application burning process, the program will not jump to the first physical address range where the boot program is located, thus avoiding accidental operation.

[0088] In an optional embodiment of the present invention, the method further includes:

[0089] Step S1: Obtain the startup program;

[0090] Step S2: Burn the boot program based on the physical zero address.

[0091] When it is necessary to burn the boot program, the boot program file can be obtained from a specified address. This specified address can be the same as or different from the address used to obtain the application program; there is no specific limitation on this. After obtaining the boot program file, the boot program can be burned from physical address zero. When the MCU is reset and powered on, it always starts from physical address zero, making full use of the physical address space of the MCU's Flash memory.

[0092] In an optional embodiment of the present invention, the method further includes:

[0093] Step S3: When the application is running, obtain the current program address;

[0094] During application runtime, the application's current address can be read. The current address is the application's current location.

[0095] Step S4: Superimpose the first physical end address onto the current program address to generate the pointer address corresponding to the application program;

[0096] The first physical end address is superimposed on the current program address to generate the pointer address corresponding to the application. This keeps the pointer address of the application within the second physical address range corresponding to the application and prevents it from entering the first physical address range of the startup program, thus ensuring the erase and write lock of the startup program.

[0097] Step S5: Execute the program instructions of the application based on the pointer address.

[0098] After determining the pointer address, the pointer address can be loaded using the address offset register, and the program instructions of the application can be executed to realize the function of the application.

[0099] For example, you can refer to Figure 7 When the MCU chip jumps from the Boot program area to the APP program area, during APP program execution, the address offset register {ROM_OFFSET_H, ROM_OFFSET_L} equals the address size corresponding to the configuration option. The program execution offset address is the address size corresponding to the configuration option. The MCU system executes the program and handles interrupt service routines according to the address size corresponding to the configuration option. When running the APP program, the address offset register {ROM_OFFSET_H, ROM_OFFSET_L} equals the address size corresponding to the configuration option. When an IAP update instruction is received through the communication interface, the MCU jumps to the Boot program area to run the Boot program, receives data from the APP program, performs IAP operations to update the APP program, and after the update is completed and verified as OK, it determines whether to jump back to the APP program area.

[0100] In this embodiment of the invention, the first physical address range corresponding to the startup program is determined by the program storage occupancy information of the startup program, thereby partitioning the startup program and the application program in the physical address and locking the physical address of the startup program to prevent the application program from erasing or rewriting the startup program, reducing the risk of startup program failure, ensuring the implementation of the upgrade process, and improving the success rate of IAP upgrade.

[0101] Reference Figure 8 The diagram illustrates another physical address-program address correspondence of the present invention.

[0102] The boot size is stored in the System area, the Information area is used to store other MCU parameter information, and the registers (ROM_OFFSET_H, ROM_OFFSET_L) are used to store the offset address.

[0103] When developing the startup area program functionality, the program compilation starts from address 0x0000.

[0104] The startup program is within the BOOT Size, and the interrupt vector address of the program is fixed within the range of 0x00000x0003 to 0x00FB.

[0105] When developing APP program functions, the program compilation starts from address 0x0000. The size of the application area program is 64Kbytes minus the BOOT Size address. The interrupt vector address of the program is fixed within the range of 0x0000 to 0x00FB.

[0106] During program burning, the BOOT Size can be determined by reading the Boot configuration option parameters in the System area. This allows the calculation of the physical address range of the boot area and the application area. Then, the burning tool burns the boot area data to the corresponding physical address in the boot area and the application area data to the corresponding physical address in the application area. The registers (ROM_OFFSET_H, ROM_OFFSET_L) are used to store the current offset address. If the program is currently being executed in the boot area, then (ROM_OFFSET_H, ROM_OFFSET_L) = 0x0000. If the program is currently being executed in the application area, then (ROM_OFFSET_H, ROM_OFFSET_L) = BOOT Size.

[0107] When the chip powers on, a power-on reset occurs, and the chip program starts running from address 0x0000. The program initially runs the boot area program, so registers (ROM_OFFSET_H, ROM_OFFSET_L) = 0x0000, and the current PC pointer address = current PC pointer address + (ROM_OFFSET_H, ROM_OFFSET_L) offset address. When the boot program decides to jump to the APP program area, the actual physical address is offset, so registers (ROM_OFFSET_H, ROM_OFFSET_L) = BOOT Size, and the current PC pointer address = current PC pointer address + (ROM_OFFSET_H, ROM_OFFSET_L) offset address. This allows the jump between the boot area and the APP to be performed according to the actual physical address.

[0108] Reference Figure 9 The diagram illustrates a boot program burning flowchart of the present invention, which includes the following steps:

[0109] Step 901: Read the BOOT_Size option.

[0110] Step 902: Check if the BOOT_Size option is 0. If yes, proceed to steps 903-805; otherwise, proceed to steps 907-808.

[0111] Step 903: Start burning from physical address 0x0000.

[0112] Step 904, Read the programming data

[0113] Step 905: Determine if the burning was successful. If yes, proceed to step 906; otherwise, return to step 903.

[0114] Step 906, burning successful.

[0115] Step 907: Determine whether BOOT_program size (program storage usage information) is greater than BOOT_Size. If yes, proceed to step 908; otherwise, proceed to steps 903-805.

[0116] Step 908: A message appears indicating insufficient space; exit the burning process.

[0117] Reference Figure 10 The present invention illustrates an APP program burning flowchart, which includes the following steps:

[0118] Step 1001: Read the BOOT_Size option.

[0119] Step 1002: Check if the BOOT_Size option is 0. If yes, proceed to steps 1003-905; otherwise, proceed to steps 1007-909.

[0120] Step 1003: Start programming from the physical address of BOOT_Size.

[0121] Step 1004: Read the programming data.

[0122] Step 1005: Determine whether the burning was successful. If yes, proceed to step 1006; otherwise, proceed to step 1003.

[0123] Step 1006, burning successful.

[0124] Step 1007: Start burning from physical address 0x0000.

[0125] Step 1008: Read the programming data.

[0126] Step 1009: Determine whether the burning was successful. If yes, proceed to step 1006; otherwise, proceed to step 1007.

[0127] Reference Figure 11 The flowchart of one embodiment of the Boot area and APP area jump operation of the present invention includes the following steps:

[0128] Step 1101: MCU resets and enters the Boot area.

[0129] Step 1102: Determine if an IAP upgrade is required. If yes, proceed to steps 1103-1005; otherwise, proceed to steps 1107-1009.

[0130] Step 1103: Execute the IAP upgrade mode command.

[0131] Step 1104: Receive upgrade data and perform erase / write operations.

[0132] Step 1105: Determine if the IAP upgrade is complete. If so, proceed to steps 1106-1009.

[0133] Step 1106: Execute the command to exit IAP upgrade mode.

[0134] Step 1107: Execute the APP jump command.

[0135] Step 1108: Execute the APP program.

[0136] Step 1109: Determine if an IAP upgrade is required. If yes, proceed to step 1110; otherwise, proceed to step 1108.

[0137] Step 1110: Execute the Boot jump instruction and return to step 1101.

[0138] It should be noted that, for the sake of simplicity, the method embodiments are all described as a series of actions. However, those skilled in the art should understand that the embodiments of the present invention are not limited to the described order of actions, because according to the embodiments of the present invention, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions involved are not necessarily essential to the embodiments of the present invention.

[0139] Reference Figure 12 The diagram shows a structural block diagram of an embodiment of the IAP upgrade device of the present invention, which may specifically include the following modules:

[0140] The application acquisition module 1201 is used to acquire the application when an upgrade instruction is read during the running of the startup program;

[0141] The reading module 1202 is used to read the program storage usage information of the startup program;

[0142] The first physical address range determination module 1203 is used to determine the first physical address range corresponding to the startup program based on the program storage occupancy information, wherein the first physical address range includes the end address;

[0143] The programming module 1204 is used to program the application by offsetting to the first physical end address.

[0144] In an optional embodiment of the present invention, the device further includes:

[0145] A startup program acquisition module is used to acquire the startup program;

[0146] The boot program burning module is used to burn the boot program based on the physical zero address.

[0147] In an optional embodiment of the present invention, the reading module 1202 includes:

[0148] The first jump rotor module is used to jump to the geographical address corresponding to the system area;

[0149] The program storage occupancy information reading submodule is used to read the program storage occupancy information from the geographical address corresponding to the system area.

[0150] In an optional embodiment of the present invention, the first physical address range determination module 1203 includes:

[0151] The first physical end address generation submodule is used to superimpose the program storage occupancy information onto the physical zero address to generate the first physical end address;

[0152] The first physical address range determination submodule is used to determine the first physical address range from the physical zero address to the first physical end address as the first physical address range corresponding to the startup program.

[0153] In an optional embodiment of the present invention, the programming module 1204 includes:

[0154] The second jump rotor module is used to jump to the first physical end address;

[0155] The second physical address range determination submodule is used to determine a second physical address range based on the first physical end address, wherein the second physical address range includes the second physical start address;

[0156] The programming submodule is used to program the application starting from the second physical address.

[0157] In an optional embodiment of the present invention, the method is used with a microcontroller, the microcontroller corresponding to a flash memory end address; the step of determining a second physical address range based on the first physical end address includes:

[0158] Add one to the first physical end address to obtain the second physical start address;

[0159] The range from the second physical starting address to the last address of the flash memory is defined as the second physical address range.

[0160] In an optional embodiment of the present invention, the device further includes:

[0161] The current program address acquisition module is used to acquire the current program address when the application is running;

[0162] A pointer address generation module is used to superimpose the first physical end address onto the current program address to generate a pointer address corresponding to the application program.

[0163] A program instruction execution module is used to execute program instructions of the application based on the pointer address.

[0164] As the device embodiment is basically similar to the method embodiment, the description is relatively simple, and relevant parts can be found in the description of the method embodiment.

[0165] This invention also discloses an electronic device, including a processor, a memory, and a computer program stored in the memory and capable of running on the processor. When the computer program is executed by the processor, it implements the steps of the IAP upgrade method as described above.

[0166] This invention also discloses a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the IAP upgrade method described above.

[0167] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0168] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, apparatus, or computer program products. Therefore, embodiments of the present invention can take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, embodiments of the present invention can take the form of computer program products implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0169] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0170] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing terminal device to operate in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0171] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal equipment, causing a series of operational steps to be performed on the computer or other programmable terminal equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable terminal equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0172] Although preferred embodiments of the present invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present invention.

[0173] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes said element.

[0174] The above provides a detailed description of an IAP upgrade method, an IAP upgrade device, an electronic device, and a storage medium provided by the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. An IAP upgrade method, characterized by, include: When an upgrade command is read during the startup process, the application is retrieved; Read the program storage usage information of the startup program; Based on the program storage occupancy information, a first physical address range corresponding to the startup program is determined, and the first physical address range includes the first physical end address; Offset to the first physical end address and burn the application program; When the application is running, obtain the current program address; The first physical end address is superimposed on the current program address to generate the pointer address corresponding to the application program. The pointer address is loaded using an address offset register, and the program instructions of the application are executed to realize the function of the application. The method further includes: When the chip is powered on and reset, the boot program starts running from physical address 0x0000 in the Flash area of ​​the chip. Then the address offset register (ROM_OFFSET_H, ROM_OFFSET_L) = 0x0000, and the current PC pointer address = current PC pointer address + (ROM_OFFSET_H, ROM_OFFSET_L) offset address.

2. The method according to claim 1, characterized in that, The method further includes: Obtain the startup program; The boot program is programmed based on the physical zero address.

3. The method of claim 1, wherein, The program storage usage information is stored in the system area; the step of reading the program storage usage information of the startup program includes: Jump to the physical address corresponding to the system area; Read the program storage occupancy information from the physical address corresponding to the system area.

4. The method of claim 1, wherein, The step of determining the first physical address range corresponding to the startup program based on the program storage occupancy information includes: The program storage occupancy information is superimposed on the physical zero address to generate the first physical end address; The physical address from the physical zero address to the first physical end address is determined as the first physical address range corresponding to the startup program.

5. The method of claim 1, wherein, The step of offsetting to the first physical end address and burning the application includes: Jump to the first physical end address; A second physical address range is determined based on the first physical end address, and the second physical address range includes the second physical start address; The application is burned starting from the second physical address.

6. The method according to claim 5, characterized in that, The method is used with a microcontroller, the microcontroller corresponding to a flash memory end address; the step of determining the second physical address range based on the first physical end address includes: Add one to the first physical end address to obtain the second physical start address; The range from the second physical starting address to the last address of the flash memory is defined as the second physical address range.

7. An IAP upgrade device, characterized in that, include: The application acquisition module is used to acquire the application when an upgrade instruction is read during the execution of the startup program; The reading module is used to read the program storage usage information of the startup program; The first physical address range determination module is used to determine the first physical address range corresponding to the startup program based on the program storage occupancy information, wherein the first physical address range includes the first physical end address; The programming module is used to program the application by offsetting to the first physical end address; The current program address acquisition module is used to acquire the current program address when the application is running; A pointer address generation module is used to superimpose the first physical end address onto the current program address to generate a pointer address corresponding to the application program. The program instruction execution module is used to load the pointer address using an address offset register and execute the program instructions of the application to realize the function of the application. The device is also used for: When the chip is powered on and reset, the boot program starts running from physical address 0x0000 in the Flash area of ​​the chip. Then the address offset register (ROM_OFFSET_H, ROM_OFFSET_L) = 0x0000, and the current PC pointer address = current PC pointer address + (ROM_OFFSET_H, ROM_OFFSET_L) offset address.

8. An electronic device, characterized in that, It includes a processor, a memory, and a computer program stored in the memory and capable of running on the processor, wherein the computer program, when executed by the processor, implements the steps of the IAP upgrade method as described in any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that, A computer program is stored on the computer-readable storage medium, which, when executed by a processor, implements the steps of the IAP upgrade method as described in any one of claims 1 to 6.