A fast-start current generating circuit

Abstract

The present invention discloses a fast-start current generating circuit. The circuit comprises: a fast-start circuit, comprising a plurality of MOS tubes, the on / off of the plurality of MOS tubes is controlled by a control signal pdb, thereby controlling the on / off of the fast-start circuit; a current generating circuit, comprising a positive temperature coefficient current module, a negative temperature coefficient current module and a constant temperature coefficient current module. The present invention controls the on / off of the fast-start circuit by a control signal pdb, thereby controlling the on / off of the current generating circuit. When the fast-start circuit is turned on, the node Nb drops from a high level, and a large current is generated instantly, so that the voltage of the node Na is rapidly reduced, thereby realizing a fast-start current generating circuit. After the current generating circuit is started, the fast-start circuit is rapidly closed, thereby shortening the time interval from the on-off of the fast-start circuit, reducing the duty cycle of the control signal pdb, thereby reducing the power consumption of the fast-start circuit.

Description

Technical Field

[0001] The present invention belongs to the field of integrated circuits, and more specifically, relates to a fast-start current generating circuit. Background Art

[0002] At present, with the increasing abundance of portable consumer devices, people have put forward higher and higher demands on the use of portable devices. On the one hand, the devices are required to have rich and latest functions, which often consume a lot of power; on the other hand, the demand for ultra-long standby is also increasing. This will pose a great challenge to designers. Therefore, power management of static and dynamic power is very important. In the case where the power consumption of the system or circuit itself is difficult to reduce, using PWM to control whether the circuit works or not has become a breakthrough. In some systems that emphasize the relationship between power consumption rate (such as some SAR-type analog-to-digital converters), the circuit is required to start and shut down quickly to achieve a perfect linear relationship between power consumption and duty cycle. As shown in the figure below, the normalized power consumption is 1, and as the duty cycle decreases, the power consumption can approach 0. Figure 5 In the circuit, pdb is used to control whether the circuit is working, that is, when pdb is 1, the circuit is in working state, and when pdb is 0, it is in off state. In order to achieve lower system power consumption, a low duty cycle PWM waveform is needed to control whether the circuit is working or not, which requires the circuit to have a faster startup rate. Therefore, it is necessary to start the current generating circuit to a normal working state in a very short time to reduce the duty cycle of pdb and the power consumption of the circuit.

[0003] The information disclosed in the background technology section of the present invention is only intended to deepen the understanding of the general background technology of the present invention, and should not be regarded as acknowledging or suggesting in any form that the information constitutes the prior art already known to those skilled in the art. Summary of the invention

[0004] The purpose of the present invention is to provide a fast-start current generating circuit, so as to start the current generating circuit to a normal working state in a very short time, so as to reduce the duty cycle of the PDB and the power consumption of the circuit.

[0005] To achieve the above object, the present invention proposes a fast-start current generating circuit, comprising:

[0006] A fast start-up circuit includes a plurality of MOS tubes, and the on / off of the plurality of MOS tubes is controlled by a control signal pdb, thereby controlling the on / off of the fast start-up circuit; when the fast start-up circuit is turned on, the node Nb drops from a high level, and a large current is generated instantly to rapidly reduce the voltage of the node Na, so as to rapidly start the current generating circuit; after the current generating circuit is started, the voltage of the node Nc is pulled up, so that the voltage of the node Na is pulled up, and the connection between the fast start-up circuit and the current generating circuit is disconnected;

[0007] The current generating circuit includes a positive temperature coefficient current module, a negative temperature coefficient current module and a constant temperature coefficient current module, wherein the output terminal Iout1 is used to output a positive temperature coefficient current, and the output terminal Iout2 is used to output a constant temperature coefficient current; the current output of the output terminal Iout1 and the output terminal Iout2 is controlled by a control signal pdb, a control signal pd and the quick start circuit.

[0008] Optionally, the fast start circuit includes:

[0009] The gate of the NMOS transistor M0 is electrically connected to the gate of the NMOS transistor M1 and the first end of the capacitor C1, and is electrically connected to the first end of the resistor R0, and the connection point is the node Nb. The source of the NMOS transistor M0 and the source of the NMOS transistor M1 are grounded, and the second end of the capacitor C1 is grounded.

[0010] The gate of the NMOS tube M2 is electrically connected to the gate of the NMOS tube M3, and the control signal pdb is connected. The source of the NMOS tube M2 is electrically connected to the drain of the NMOS tube M0. The source of the NMOS tube M3 is electrically connected to the drain of the NMOS tube M1. The drain of the NMOS tube M3 is electrically connected to the first end of the resistor R0. The second end of the resistor R0 is electrically connected to VDD.

[0011] The gate of the PMOS tube M4 is connected to the control signal pdb, the source of the PMOS tube M4 and the source of the PMOS tube M5 are electrically connected to VDD respectively, the drain of the PMOS tube M4 is electrically connected to the drain of the PMOS tube M5, and is electrically connected to the gate of the PMOS tube M6 and the drain of the NMOS tube M2, the connection point is the node Na, and the source of the PMOS tube M6 is electrically connected to VDD.

[0012] Optionally, the quick start circuit further includes:

[0013] The resistor R0 is replaced by the PMOS tube Mr, the gate of the NMOS tube M0 is electrically connected to the gate of the NMOS tube M1 and the first end of the capacitor C1, and is electrically connected to the drain of the PMOS tube Mr, and the connection point is the node Nb, the drain of the NMOS tube M3 is electrically connected to the drain of the PMOS tube Mr, the source of the PMOS tube Mr is electrically connected to VDD, and the gate of the PMOS tube Mr is grounded.

[0014] Optionally, the positive temperature coefficient current module includes:

[0015] The drain of the PMOS tube M7 is electrically connected to the gate of the PMOS tube M5, and is also electrically connected to the gate of the PMOS tube M7. The gate of the PMOS tube M7 is electrically connected to the drain of the PMOS tube M8, and is also electrically connected to the gates of the PMOS tube M9, the gates of the PMOS tube M10, and the gates of the PMOS tube M11. The source of the PMOS tube M7, the source of the PMOS tube M8, the source of the PMOS tube M9, the source of the PMOS tube M10, and the source of the PMOS tube M11 are electrically connected to VDD respectively. The gate of the PMOS tube M8 is connected to the control signal pdb. The drain of the PMOS tube M10 is electrically connected to the output terminal IOUT1. The drain of the NMOS tube M12 is electrically connected to the drain of the PMOS tube M7. The gate of the NMOS tube M12 is electrically connected to the gate of the NMOS tube M13 and the gate of the NMOS tube M14. The drain of the PMOS tube M6 is electrically connected to the gate of the NMOS tube M12, and is electrically connected to the drain of the NMOS tube M13 and the drain of the PMOS tube M9. The connection point is the node Nc. The source of the NMOS tube M12 is electrically connected to the first end of the resistor R1. The second end of the resistor R1 is electrically connected to the emitter of the transistor Q1. The collector and the base of the transistor Q1 are grounded. The source of the NMOS tube M13 is electrically connected to the emitter of the transistor Q2. The collector and the base of the transistor Q2 are grounded. The gate of the NMOS tube M15 is connected to the control signal pd, and the source of the NMOS tube M15 is grounded.

[0016] Optionally, the negative temperature coefficient current module includes:

[0017] The source of the NMOS tube M14 is electrically connected to the first end of the resistor R2, the gate of the NMOS tube M14 is electrically connected to the drain of the NMOS tube M15, the second end of the resistor R2 is grounded, the drain of the PMOS tube M16 is electrically connected to the gate of the PMOS tube M16 and the drain of the NMOS tube M14, the gate of the PMOS tube M16 is electrically connected to the drain of the PMOS tube M17 and the gate of the PMOS tube M18, the drain of the PMOS tube M18 is electrically connected to the drain of the PMOS tube M19, the drain of the PMOS tube M11 and the drain of the NMOS tube M20, the gate of the PMOS tube M19 is connected to the control signal pdb, and the source of the PMOS tube M16, the source of the PMOS tube M17, the source of the PMOS tube M18 and the source of the PMOS tube M19 are electrically connected to VDD respectively.

[0018] Optionally, the constant temperature coefficient current module includes:

[0019] The drain of the NMOS tube M20 is electrically connected to the gate of the NMOS tube M21 and the gate of the NMOS tube M22. The gate of the NMOS tube M20 is connected to the control signal pdb. The source of the NMOS tube M20 is electrically connected to the drain of the NMOS tube M21. The drain of the NMOS tube M22 is electrically connected to the output terminal IOUT2. The source of the NMOS tube M21 and the source of the NMOS tube M22 are grounded.

[0020] Optionally, when the control signal pdb is 0, the fast start circuit is in a closed state, the voltage of the node Nb is pulled up, the NMOS tube M2 and the NMOS tube M3 are not turned on, the NMOS tube M0 and the NMOS tube M1 have no current, the PMOS tube M4 is turned on, so that the voltage of the node Na is pulled up, and the PMOS tube M6 is not turned on;

[0021] When the control signal pdb is 0, the current generating circuit is in the off state, the PMOS tube M8 is turned on, so that the gate inputs of the PMOS tubes M7, M9, M10 and M11 are high level, and the PMOS tubes M7, M9, M10 and M11 are not turned on; the PMOS tube M17 is turned on, so that the gate inputs of the PMOS tubes M16 and M18 are high level, and the PMOS tubes M16 and M18 are not turned on. The control signal pd is the reverse of the control signal pdb. The control signal pd is 1. The NMOS tube M15 is turned on, so that the voltage of the node NC is pulled down. The gate inputs of the NMOS tubes M12, M13 and M14 are low level. The NMOS tubes M12, M13 and M14 are not turned on. The PMOS tube M19 is turned on, so that the gate inputs of the NMOS tubes M21 and M22 are high level. The NMOS tube M21 has no current.

[0022] When the control signal pdb is 1, the control signal pd is 0, the fast start-up circuit is in working state, the NMOS tubes M2 and M3 are turned on, the NMOS tubes M0 and M1 are turned on, the node Nb starts to drop from a high level, the voltage of the node Na is pulled down, the PMOS tube M6 is turned on, the voltage of the node Nc is pulled up, the PMOS tube M7, the PMOS tube M9, the NMOS tube M12 and the NMOS tube M13 are turned on, and the loop works, the current of the PMOS tube M5 mirroring the PMOS tube M7 is greater than the current of the NMOS tube M0, the voltage of the node Na is pulled up, the PMOS tube M6 is turned off, and the startup of the current generating circuit is completed.

[0023] Optionally, generating a positive temperature coefficient current includes:

[0024] The PMOS tube M7 and the PMOS tube M9 form a current mirror, and the generated current flows into the NMOS tube M12 and the NMOS tube M13 respectively to generate the same Vgs voltage, so that the NMOS tube M12 and the NMOS tube M13 have the same source voltage, so that the voltage across the resistor R1 is:

[0025] |Vbe_Q2|-|Vbe_Q1|=kT / q*ln(N);

[0026] i_ptat=(|Vbe_Q2|-|Vbe_Q1|) / R1;

[0027] Where N is the ratio of the current density flowing through transistor Q2 and transistor Q1, k is the Boltzmann constant, q is the electron charge, T is the temperature, kT / q is the voltage with a positive temperature coefficient, Vbe_Q2 is the voltage difference between the base and emitter of transistor Q2, Vbe_Q1 is the voltage difference between the base and emitter of transistor Q1, and i_ptat is the positive temperature coefficient current;

[0028] The current flowing through both ends of resistor R1 is the positive temperature coefficient current.

[0029] Optionally, generating a negative temperature coefficient current includes:

[0030] When the gates of NMOS tubes M13 and M14 are short-circuited, the voltage across resistor R2 is approximately equal to |Vbe_Q2|. The Vbe voltage of the transistor is negatively correlated with temperature. Therefore, the current flowing through PMOS tubes M16 and M18 is a negative temperature coefficient current, |Vbe_Q2|=VT*ln(Ic / Is). By taking the derivative, we can get ;

[0031] i_ctat=|Vbe_Q2| / R2;

[0032] Where, Eg is the band gap energy of silicon, Eg is 1.12eV, m=1.5, VT=kT / q, VBE is the negative temperature coefficient voltage, i_ctat is the negative temperature coefficient current, Ic is the collector current, and Is is the reverse saturation leakage current.

[0033] Optionally, generating a constant temperature coefficient current includes:

[0034] The currents flowing through the PMOS tube M11 and the PMOS tube M18 are superimposed in a suitable ratio to generate a constant temperature coefficient current;

[0035] i_ztat=a*i_ptat+b*i_ctat;

[0036] Among them, i_ztat is the constant temperature coefficient current, a is the proportional coefficient of the positive temperature coefficient current, and b is the proportional coefficient of the negative temperature coefficient current.

[0037] The beneficial effects of the present invention are as follows: the present invention controls the on / off of multiple MOS tubes of the fast start-up circuit through the control signal pdb, thereby controlling the on / off of the fast start-up circuit. When the fast start-up circuit is turned on, the node Nb drops from a high level, and a large current is generated instantly to rapidly reduce the voltage of the node Na, thereby realizing a fast start-up current generating circuit. After the current generating circuit is started, the voltage of the node Nc is pulled high, so that the voltage of the node Na is pulled high, and the fast start-up circuit is quickly turned off. The present invention can shorten the time interval from turning on to turning off the fast start-up circuit, reduce the duty cycle of the control signal pdb, and thereby reduce the power consumption of the fast start-up circuit; the output of the positive temperature coefficient current, the negative temperature coefficient current and the constant temperature coefficient current is realized through the current generating circuit.

[0038] The system of the present invention has other characteristics and advantages, which will be apparent from the drawings incorporated herein and the following detailed description, or will be described in detail in the drawings incorporated herein and the following detailed description, which together serve to explain the specific principles of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The above and other objects, features and advantages of the present invention will become more apparent through a more detailed description of exemplary embodiments of the present invention in conjunction with the accompanying drawings, in which like reference numerals generally represent like components.

[0040] Figure 1 A schematic diagram of a fast-start current generating circuit according to an embodiment of the present invention is shown.

[0041] Figure 2 A schematic diagram of a fast-start current generating circuit according to an embodiment of the present invention is shown.

[0042] Figure 3 A voltage waveform diagram of a fast-start current generating circuit according to an embodiment of the present invention is shown.

[0043] Figure 4 An enlarged diagram of a voltage waveform in a startup phase of a fast startup current generating circuit according to an embodiment of the present invention is shown.

[0044] Figure 5 A schematic diagram showing the linear relationship between power consumption and duty cycle according to the background technology of the present invention is shown. DETAILED DESCRIPTION

[0045] The present invention will be described in more detail below with reference to the accompanying drawings. Although preferred embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to make the present invention more thorough and complete, and to fully convey the scope of the present invention to those skilled in the art.

[0046] A fast-start current generating circuit according to the present invention comprises:

[0047] The fast start-up circuit includes a plurality of MOS tubes, and the on / off of the plurality of MOS tubes is controlled by a control signal pdb, thereby controlling the on / off of the fast start-up circuit; when the fast start-up circuit is turned on, the node Nb drops from a high level, and a large current is generated instantly to rapidly reduce the voltage of the node Na, so as to rapidly start the current generating circuit; after the current generating circuit is started, the voltage of the node Nc is pulled up, so that the voltage of the node Na is pulled up, and the connection between the fast start-up circuit and the current generating circuit is disconnected;

[0048] The current generating circuit includes a positive temperature coefficient current module, a negative temperature coefficient current module and a constant temperature coefficient current module. The output terminal Iout1 is used to output a positive temperature coefficient current, and the output terminal Iout2 is used to output a constant temperature coefficient current. The current output of the output terminal Iout1 and the output terminal Iout2 is controlled by a control signal pdb, a control signal pd and a quick start circuit.

[0049] Specifically, the present invention starts the current generating circuit through a fast start circuit, controls multiple MOS tubes of the fast start circuit through a control signal pdb, and then controls the on / off of the fast start circuit. When pdb is 0, the fast start circuit is in a closed state, at this time, the node Nb is at a high level, the voltage of the node Na is pulled up, pd is 1, the node Nc is pulled down by the switch controlled by pd, and each branch of the current generating circuit is in a closed state; when pdb is 1, the fast start circuit is in a working state, the node Nb drops from a high level, and a large current is generated instantly to quickly reduce the voltage of the node Na, so as to quickly start the current generating circuit. After the current generating circuit is started, , pd is 0, the voltage of the node Nc is pulled up, so that the voltage of the node Na is pulled up, the connection between the fast start circuit and the current generating circuit is disconnected, so that the fast start circuit no longer starts the current generating circuit, and the fast start circuit is quickly turned off, so as to shorten the time interval from turning on to turning off the fast start circuit, thereby reducing the duty cycle of the control signal pdb, and then reducing the power consumption of the fast start circuit; the positive temperature coefficient current, the negative temperature coefficient current and the constant temperature coefficient current are generated by the current generating circuit after startup, and the positive temperature coefficient current and the constant temperature coefficient current are output through the output terminal Iout1 and the output terminal Iout2 respectively.

[0050] In one example, the fast start-up circuit includes:

[0051] The gate of the NMOS transistor M0 is electrically connected to the gate of the NMOS transistor M1 and the first end of the capacitor C1, and is electrically connected to the first end of the resistor R0, and the connection point is the node Nb. The source of the NMOS transistor M0 and the source of the NMOS transistor M1 are grounded, and the second end of the capacitor C1 is grounded.

[0052] The gate of the NMOS tube M2 is electrically connected to the gate of the NMOS tube M3, and the control signal pdb is connected. The source of the NMOS tube M2 is electrically connected to the drain of the NMOS tube M0. The source of the NMOS tube M3 is electrically connected to the drain of the NMOS tube M1. The drain of the NMOS tube M3 is electrically connected to the first end of the resistor R0. The second end of the resistor R0 is electrically connected to VDD.

[0053] The gate of the PMOS tube M4 is connected to the control signal pdb, the source of the PMOS tube M4 and the source of the PMOS tube M5 are electrically connected to VDD respectively, the drain of the PMOS tube M4 is electrically connected to the drain of the PMOS tube M5, and is electrically connected to the gate of the PMOS tube M6 and the drain of the NMOS tube M2, the connection point is the node Na, and the source of the PMOS tube M6 is electrically connected to VDD.

[0054] Specifically, the fast start circuit includes 4 NMOS tubes, 3 PMOS tubes, a capacitor C1 and a resistor R0. When the control signal pdb is 0, the fast start circuit is in a closed state. Under the control of pdb, the gates of the NMOS tubes M2, M3 and M4 are low, and the node Nb connected to the NMOS tubes M0, M1 and the capacitor C1 is at a high level when the fast start circuit is in a closed state. No current flows through the NMOS tubes M0M0 and M0M1 branches, the PMOS tube M4 is turned on, and the node Na is pulled high by the PMOS tube M4; when the control signal pdb is 1, the fast start circuit is in a working state, the NMOS tubes M0 , the node Nb connected to the NMOS tube M1 and the capacitor C1 starts to drop from a high level, which is a discharge process. A relatively large current is generated instantly, causing the node Na to quickly become low, the PMOS tube M6 is turned on, and the node Nc is pulled high, generating a current from the power supply VDD to the ground. The current starts the circuit to work, pulls up the Na node, turns off the PMOS tube M6, and the quick start circuit is started.

[0055] In one example, the fast start circuit further includes:

[0056] The resistor R0 is replaced by the PMOS tube Mr, the gate of the NMOS tube M0 is electrically connected to the gate of the NMOS tube M1 and the first end of the capacitor C1, and is electrically connected to the drain of the PMOS tube Mr, and the connection point is the node Nb, the drain of the NMOS tube M3 is electrically connected to the drain of the PMOS tube Mr, the source of the PMOS tube Mr is electrically connected to VDD, and the gate of the PMOS tube Mr is grounded.

[0057] Specifically, the quick start circuit may also replace the resistor R0 with a PMOS transistor Mr, while other parts remain unchanged, and the function of the PMOS transistor Mr is equivalent to that of the resistor R0.

[0058] In one example, a positive temperature coefficient current module includes:

[0059] The drain of the PMOS tube M7 is electrically connected to the gate of the PMOS tube M5, and is also electrically connected to the gate of the PMOS tube M7. The gate of the PMOS tube M7 is electrically connected to the drain of the PMOS tube M8, and is also electrically connected to the gates of the PMOS tube M9, the gates of the PMOS tube M10, and the gates of the PMOS tube M11. The source of the PMOS tube M7, the source of the PMOS tube M8, the source of the PMOS tube M9, the source of the PMOS tube M10, and the source of the PMOS tube M11 are electrically connected to VDD respectively. The gate of the PMOS tube M8 is connected to the control signal pdb. The drain of the PMOS tube M10 is electrically connected to the output terminal IOUT1. The drain of the NMOS tube M12 is electrically connected to the drain of the PMOS tube M7. The gate of the NMOS tube M12 is electrically connected to the gate of the NMOS tube M13 and the gate of the NMOS tube M14. The drain of the PMOS tube M6 is electrically connected to the gate of the NMOS tube M12, and is electrically connected to the drain of the NMOS tube M13 and the drain of the PMOS tube M9. The connection point is the node Nc. The source of the NMOS tube M12 is electrically connected to the first end of the resistor R1. The second end of the resistor R1 is electrically connected to the emitter of the transistor Q1. The collector and the base of the transistor Q1 are grounded. The source of the NMOS tube M13 is electrically connected to the emitter of the transistor Q2. The collector and the base of the transistor Q2 are grounded. The gate of the NMOS tube M15 is connected to the control signal pd, and the source of the NMOS tube M15 is grounded.

[0060] Specifically, the positive temperature coefficient current module includes 5 PMOS tubes, 3 NMOS tubes, 2 triodes and resistor R1. The positive temperature coefficient current module is used to generate a positive temperature coefficient current (PTAT). The output terminal IOUT1 is used to output a positive temperature coefficient current. When pdb is 1, the fast start circuit works to make the PMOS tube M7, PMOS tube M9, NMOS tube M12 and NMOS tube M13 work in a loop. The PMOS tube M7 and the PMOS tube M9 form a current mirror, which flows into the NMOS tube M12 and the NMOS tube M13 to generate the same The Vgs voltage (the voltage of the gate relative to the source) makes the NMOS tube M12 and the NMOS tube M13 have the same source voltage, and the voltage across the resistor R1 is positively correlated with the positive temperature coefficient voltage, so the current flowing through the resistor R1 is a positive temperature coefficient current, that is, the current flowing through the PMOS tube M7 is a positive temperature coefficient current, and the PMOS tube M7 shares a gate with the PMOS tube M9, the PMOS tube M10 and the PMOS tube M11, so the current flowing through the PMOS tube M9, the PMOS tube M10 and the PMOS tube M11 is also a positive temperature coefficient current.

[0061] In one example, a negative temperature coefficient current module includes:

[0062] The source of the NMOS tube M14 is electrically connected to the first end of the resistor R2, the gate of the NMOS tube M14 is electrically connected to the drain of the NMOS tube M15, the second end of the resistor R2 is grounded, the drain of the PMOS tube M16 is electrically connected to the gate of the PMOS tube M16 and the drain of the NMOS tube M14, the gate of the PMOS tube M16 is electrically connected to the drain of the PMOS tube M17 and the gate of the PMOS tube M18, the drain of the PMOS tube M18 is electrically connected to the drain of the PMOS tube M19, the drain of the PMOS tube M11 and the drain of the NMOS tube M20, the gate of the PMOS tube M19 is connected to the control signal pdb, and the source of the PMOS tube M16, the source of the PMOS tube M17, the source of the PMOS tube M18 and the source of the PMOS tube M19 are electrically connected to VDD respectively.

[0063] Specifically, the negative temperature coefficient current module includes 4 PMOS tubes, 1 NMOS tube and resistor R2, and the negative temperature coefficient current module is used to generate a negative temperature coefficient current; when pdb is 1, since the gate of the NMOS tube M14 is short-circuited with the gate of the NMOS tube M13, the voltage across the resistor R2 is approximately equal to the voltage between the base and the emitter of the transistor Q2, and the voltage between the base and the emitter of the transistor Q2 is a voltage negatively correlated with the temperature, and the current passing through the resistor R2 is a negative temperature coefficient current, and the drain of the PMOS tube M16 is connected to the drain of the PMOS tube M13. The gate of the NMOS tube M16 and the drain of the NMOS tube M14 are electrically connected to the gate of the PMOS tube M16, the drain of the PMOS tube M17, and the gate of the PMOS tube M18. The PMOS tube M17 is turned off under the control of pdb, so that the gate of the PMOS tube M16 and the gate of the PMOS tube M18 are low level, the PMOS tubes M16 and the PMOS tube M18 are turned on, and the PMOS tube M19 is turned off and has no current. Therefore, the PMOS tube M16 has a negative temperature coefficient current, and the current flowing out of the mirror image PMOS tube M18 of the PMOS tube M16 is also a negative temperature coefficient current.

[0064] In one example, a constant temperature coefficient current module includes:

[0065] The drain of the NMOS tube M20 is electrically connected to the gate of the NMOS tube M21 and the gate of the NMOS tube M22. The gate of the NMOS tube M20 is connected to the control signal pdb. The source of the NMOS tube M20 is electrically connected to the drain of the NMOS tube M21. The drain of the NMOS tube M22 is electrically connected to the output terminal IOUT2. The source of the NMOS tube M21 and the source of the NMOS tube M22 are grounded.

[0066] Specifically, the constant temperature coefficient current module includes three NMOS tubes, the constant temperature coefficient current is used to generate a constant temperature coefficient current, and the output terminal IOUT2 ​​is used to output the constant temperature coefficient current. When pdf is 1, the NMOS tube M20 is turned on, and the positive temperature coefficient current flowing out of the PMOS tube M11 and the negative temperature coefficient current flowing out of the PMOS tube M18 are proportionally superimposed to generate a constant temperature coefficient current, which flows to the NMOS tube M21 through the NMOS tube M20. Because the NMOS tube M22 and the NMOS tube M21 are mirror images, the current flowing out of the NMOS tube M22 is also a constant temperature coefficient current, and the constant temperature coefficient current is output through the output terminal IOUT2.

[0067] In one example, when the control signal pdb is 0, the fast start circuit is in a closed state, the voltage of the node Nb is pulled up, the NMOS tube M2 and the NMOS tube M3 are not turned on, the NMOS tube M0 and the NMOS tube M1 have no current, the PMOS tube M4 is turned on, so that the voltage of the node Na is pulled up, and the PMOS tube M6 is not turned on;

[0068] When the control signal pdb is 0, the current generating circuit is in the off state, the PMOS tube M8 is turned on, so that the gate inputs of the PMOS tubes M7, M9, M10 and M11 are high level, and the PMOS tubes M7, M9, M10 and M11 are not turned on; the PMOS tube M17 is turned on, so that the gate inputs of the PMOS tubes M16 and M18 are high level, and the PMOS tubes M16 and M18 are not turned on. The control signal pd is the reverse of the control signal pdb. The control signal pd is 1. The NMOS tube M15 is turned on, so that the voltage of the node NC is pulled down. The gate inputs of the NMOS tubes M12, M13 and M14 are low level. The NMOS tubes M12, M13 and M14 are not turned on. The PMOS tube M19 is turned on, so that the gate inputs of the NMOS tubes M21 and M22 are high level. The NMOS tube M21 has no current.

[0069] When the control signal pdb is 1, the control signal pd is 0, the fast start-up circuit is in working state, the NMOS tubes M2 and M3 are turned on, the NMOS tubes M0 and M1 are turned on, the node Nb starts to drop from a high level, the voltage of the node Na is pulled down, the PMOS tube M6 is turned on, the voltage of the node Nc is pulled up, the PMOS tube M7, the PMOS tube M9, the NMOS tube M12 and the NMOS tube M13 are turned on, and the loop works, the current of the PMOS tube M5 mirroring the PMOS tube M7 is greater than the current of the NMOS tube M0, the voltage of the node Na is pulled up, the PMOS tube M6 is turned off, and the startup of the current generating circuit is completed.

[0070] In one example, generating a positive temperature coefficient current includes:

[0071] The PMOS tube M7 and the PMOS tube M9 form a current mirror, and the generated current flows into the NMOS tube M12 and the NMOS tube M13 respectively to generate the same Vgs voltage, so that the NMOS tube M12 and the NMOS tube M13 have the same source voltage, so that the voltage across the resistor R1 is:

[0072] |Vbe_Q2|-|Vbe_Q1|=kT / q*ln(N);

[0073] i_ptat=(|Vbe_Q2|-|Vbe_Q1|) / R1;

[0074] Where N is the ratio of the current density flowing through transistor Q2 and transistor Q1, k is the Boltzmann constant, q is the electron charge, T is the temperature, kT / q is the voltage with a positive temperature coefficient, Vbe_Q2 is the voltage difference between the base and emitter of transistor Q2, Vbe_Q1 is the voltage difference between the base and emitter of transistor Q1, and i_ptat is the positive temperature coefficient current;

[0075] The current flowing through both ends of resistor R1 is the positive temperature coefficient current.

[0076] In one example, generating a negative temperature coefficient current includes:

[0077] When the gates of NMOS tubes M13 and M14 are short-circuited, the voltage across resistor R2 is approximately equal to |Vbe_Q2|. The Vbe voltage of the transistor is negatively correlated with temperature. Therefore, the current flowing through PMOS tubes M16 and M18 is a negative temperature coefficient current, |Vbe_Q2|=VT*ln(Ic / Is). By taking the derivative, we can get ;

[0078] i_ctat=|Vbe_Q2| / R2;

[0079] Where, Eg is the band gap energy of silicon, Eg is 1.12eV, m=1.5, VT=kT / q, VBE is the negative temperature coefficient voltage, i_ctat is the negative temperature coefficient current, Ic is the collector current, and Is is the reverse saturation leakage current.

[0080] In one example, generating a constant temperature coefficient current includes:

[0081] The currents flowing through the PMOS tube M11 and the PMOS tube M18 are superimposed in a suitable ratio to generate a constant temperature coefficient current;

[0082] i_ztat=a*i_ptat+b*i_ctat;

[0083] Among them, i_ztat is the constant temperature coefficient current, a is the proportional coefficient of the positive temperature coefficient current, and b is the proportional coefficient of the negative temperature coefficient current.

[0084] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments, but is not intended to be limiting of the present invention. It should be noted that the embodiments and features in the embodiments of the present invention may be combined with each other without conflict.

[0085] Example

[0086] like Figure 1 As shown, this embodiment provides a fast-start current generating circuit, including:

[0087] The fast start-up circuit comprises a gate of the NMOS tube M0 electrically connected to the gate of the NMOS tube M1 and the first end of the capacitor C1, and electrically connected to the first end of the resistor R0, the connection point being the node Nb, the source of the NMOS tube M0 and the source of the NMOS tube M1 being grounded, and the second end of the capacitor C1 being grounded; the gate of the NMOS tube M2 being electrically connected to the gate of the NMOS tube M3, and receiving the control signal pdb, the source of the NMOS tube M2 being electrically connected to the drain of the NMOS tube M0, and the source of the NMOS tube M3 being electrically connected to the drain of the NMOS tube M1. The drain of the NMOS tube M3 is electrically connected to the first end of the resistor R0, and the second end of the resistor R0 is electrically connected to VDD; the gate of the PMOS tube M4 is connected to the control signal pdb, the source of the PMOS tube M4 and the source of the PMOS tube M5 are electrically connected to VDD respectively, the drain of the PMOS tube M4 is electrically connected to the drain of the PMOS tube M5, and is electrically connected to the gate of the PMOS tube M6 and the drain of the NMOS tube M2, the connection point is the node Na, and the source of the PMOS tube M6 is electrically connected to VDD; wherein, Figure 2 As shown, the resistor R0 can be replaced by a PMOS tube Mr, the gate of the NMOS tube M0 is electrically connected to the gate of the NMOS tube M1 and the first end of the capacitor C1, and is electrically connected to the drain of the PMOS tube Mr, the connection point is the node Nb, the drain of the NMOS tube M3 is electrically connected to the source of the PMOS tube Mr, and the gate of the PMOS tube Mr is grounded;

[0088] A current generating circuit, wherein the drain of the PMOS tube M7 is electrically connected to the gate of the PMOS tube M5 and to the gate of the PMOS tube M7, the gate of the PMOS tube M7 is electrically connected to the drain of the PMOS tube M8 and to the gate of the PMOS tube M9, the gate of the PMOS tube M10 and the gate of the PMOS tube M11, the source of the PMOS tube M7, the source of the PMOS tube M8, the source of the PMOS tube M9, the source of the PMOS tube M10 and the source of the PMOS tube M11 are electrically connected to VDD respectively, the gate of the PMOS tube M8 is connected to the control signal pdb, and the drain of the PMOS tube M10 is electrically connected to the output terminal IOUT1; The drain of the NMOS tube M12 is electrically connected to the drain of the PMOS tube M7, the gate of the NMOS tube M12 is electrically connected to the gate of the NMOS tube M13 and the gate of the NMOS tube M14, the drain of the PMOS tube M6 is electrically connected to the gate of the NMOS tube M12, and is electrically connected to the drain of the NMOS tube M13 and the drain of the PMOS tube M9, and the connection point is the node Nc, the source of the NMOS tube M12 is electrically connected to the first end of the resistor R1, the second end of the resistor R1 is electrically connected to the emitter of the transistor Q1, the collector and base of the transistor Q1 are grounded, the source of the NMOS tube M13 is electrically connected to the emitter of the transistor Q2, and the collector of the transistor Q2 is electrically connected to the emitter of the transistor Q2. The gate and base of the NMOS tube M15 are grounded, the gate of the NMOS tube M15 is connected to the control signal pd, and the source of the NMOS tube M15 is grounded; the source of the NMOS tube M14 is electrically connected to the first end of the resistor R2, the gate of the NMOS tube M14 is electrically connected to the drain of the NMOS tube M15, the second end of the resistor R2 is grounded, the drain of the PMOS tube M16 is electrically connected to the gate of the PMOS tube M16 and the drain of the NMOS tube M14, the gate of the PMOS tube M16 is electrically connected to the drain of the PMOS tube M17 and the gate of the PMOS tube M18, the drain of the PMOS tube M18 is electrically connected to the drain of the PMOS tube M19, the drain of the PMOS tube M11, and the drain of the NMOS tube M19. The drain of the NMOS tube M20 is electrically connected to the drain of the NMOS tube M20, the gate of the PMOS tube M19 is connected to the control signal pdb, the source of the PMOS tube M16, the source of the PMOS tube M17, the source of the PMOS tube M18 and the source of the PMOS tube M19 are electrically connected to VDD respectively; the drain of the NMOS tube M20 is electrically connected to the gate of the NMOS tube M21 and the gate of the NMOS tube M22, the gate of the NMOS tube M20 is connected to the control signal pdb, the source of the NMOS tube M20 is electrically connected to the drain of the NMOS tube M21, the drain of the NMOS tube M22 is electrically connected to the output terminal IOUT2, and the source of the NMOS tube M21 and the source of the NMOS tube M22 are grounded;

[0089] When the control signal pdb is 0, the fast start circuit is in the off state, the voltage of the node Nb is pulled up, the NMOS tube M2 and the NMOS tube M3 are not turned on, the NMOS tube M0 and the NMOS tube M1 have no current, the PMOS tube M4 is turned on, so that the voltage of the node Na is pulled up, and the PMOS tube M6 is not turned on; when the control signal pdb is 0, the current generating circuit is in the off state, the PMOS tube M8 is turned on, so that the PMOS tube M7, the PMOS tube M9, the PMOS tube M10 and The gate input of the PMOS tube M11 is high level, and the PMOS tubes M7, M9, M10 and M11 are not conducting; the PMOS tube M17 is conducting, so that the gate input of the PMOS tubes M16 and M18 is high level, and the PMOS tubes M16 and M18 are not conducting; the control signal pd is the reverse of the control signal pdb, the control signal pd is 1, the NMOS tube M15 is conducting, so that the voltage of the node NC is pulled down to NM The gate inputs of the OS transistor M12, the NMOS transistor M13 and the NMOS transistor M14 are at a low level, and the NMOS transistors M12, M13 and M14 are not conducting; the PMOS transistor M19 is conducting, so that the gate inputs of the NMOS transistors M21 and M22 are at a high level, and the NMOS transistor M21 has no current; when the control signal pdb is 1, the control signal pd is 0, the fast start circuit is in working state, the NMOS transistors M2 and M3 are conducting, The NMOS tubes M0 and M1 are turned on, the node Nb starts to drop from a high level, the voltage of the node Na is pulled down, the PMOS tube M6 is turned on, the voltage of the node Nc is pulled up, and the loop works after the PMOS tubes M7, M9, M12 and M13 are turned on. The current of the PMOS tube M5 mirroring the PMOS tube M7 is greater than the current of the NMOS tube M0, and the voltage of the node Na is pulled up, so that the PMOS tube M6 is not turned on, and the current generation circuit is started.

[0090] When pdb is 1, the fast start-up circuit works, making the PMOS tube M7, PMOS tube M9, NMOS tube M12 and NMOS tube M13 work in a loop. The PMOS tube M7 and the PMOS tube M9 form a current mirror, which flows into the NMOS tube M12 and the NMOS tube M13 to generate the same Vgs voltage (the voltage of the gate relative to the source), so that the NMOS tube M12 and the NMOS tube M13 have the same source voltage. The voltage across the resistor R1 is: |Vbe_Q2|- |Vbe_Q1|=kT / q*ln(N), it can be seen that the voltage across the resistor R1 is positively correlated with the positive temperature coefficient voltage, so the current flowing through the resistor R1 is a positive temperature coefficient current, that is, the current flowing through the PMOS tube M7 is a positive temperature coefficient current, and the PMOS tube M7 shares a gate with the PMOS tube M9, PMOS tube M10 and PMOS tube M11, so the current flowing through the PMOS tube M9, PMOS tube M10 and PMOS tube M11 is also a positive temperature coefficient current. i_ptat=(|Vbe_Q2|-|Vbe_Q1|) / R1; where N is the ratio of the current density flowing through transistor Q2 and transistor Q1, k is the Boltzmann constant, q is the electron charge, T is the temperature, kT / q is the voltage with a positive temperature coefficient, Vbe_Q2 is the voltage difference between the base and emitter of transistor Q2, Vbe_Q1 is the voltage difference between the base and emitter of transistor Q1, and i_ptat is the positive temperature coefficient current.

[0091] Since the gate of NMOS tube M14 is short-circuited with the gate of NMOS tube M13, the voltage across resistor R2 is approximately equal to the voltage between the base and emitter of transistor Q2 |Vbe_Q2|, |Vbe_Q2|=VT*ln(Ic / Is), and the derivative can be obtained It can be seen that the voltage between the base and the emitter of the transistor Q2 is a voltage negatively correlated with the temperature, and the current passing through the resistor R2 is a negative temperature coefficient current, and the drain of the PMOS tube M16 is electrically connected to the gate of the PMOS tube M16 and the drain of the NMOS tube M14, and the gate of the PMOS tube M16 is electrically connected to the drain of the PMOS tube M17 and the gate of the PMOS tube M18. The PMOS tube M17 is turned off under the control of pdb, so that the gate of the PMOS tube M16 and the gate of the PMOS tube M18 are low level, the PMOS tube M16 and the PMOS tube M18 are turned on, and the PMOS tube M19 is turned off and has no current. Therefore, the PMOS tube M16 is a negative temperature coefficient current, and the current flowing out of the mirror image PMOS tube M18 of the PMOS tube M16 is also a negative temperature coefficient current. i_ctat=|Vbe_Q2| / R2; where Eg is the band gap energy of silicon, Eg is 1.12eV, m=1.5, VT=kT / q, VBE is the negative temperature coefficient voltage, i_ctat is the negative temperature coefficient current, Ic is the collector current, and Is is the reverse saturation leakage current.

[0092] The NMOS tube M20 is turned on, and the positive temperature coefficient current flowing out of the PMOS tube M11 and the negative temperature coefficient current flowing out of the PMOS tube M18 are proportionally superimposed to generate a constant temperature coefficient current, which flows to the NMOS tube M21 through the NMOS tube M20. Since the NMOS tube M22 and the NMOS tube M21 are mirror images, the current flowing out of the NMOS tube M22 is also a constant temperature coefficient current, and the constant temperature coefficient current is output through the output terminal IOUT2; i_ztat=a*i_ptat+b*i_ctat; wherein, i_ztat is the constant temperature coefficient current, a is the proportional coefficient of the positive temperature coefficient current, and b is the proportional coefficient of the negative temperature coefficient current.

[0093] The voltage waveform of the fast start current generating circuit is as follows: Figure 3 As shown in the figure, the boxed part is the voltage waveform during the startup phase, and the enlarged figure is shown in the figure. Figure 4 As shown, by observing the voltage change of the Na node, it can be seen that the fast start current generation circuit takes 8ns ( Figure 4 dx) to complete the startup.

[0094] The embodiments of the present invention have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments.

Claims

1. A fast-start current generating circuit, characterized in that: include: A fast start-up circuit includes a plurality of MOS tubes, and the on / off of the plurality of MOS tubes is controlled by a control signal pdb, thereby controlling the on / off of the fast start-up circuit; when the fast start-up circuit is turned on, the node Nb drops from a high level, and a large current is generated instantly to rapidly reduce the voltage of the node Na, so as to rapidly start the current generating circuit; After the current generating circuit is started, the voltage of the node Nc is pulled up, so that the voltage of the node Na is pulled up, and the connection between the fast start circuit and the current generating circuit is disconnected; A current generating circuit, comprising a positive temperature coefficient current module, a negative temperature coefficient current module and a constant temperature coefficient current module, wherein an output terminal IOUT 1 is used to output a positive temperature coefficient current, and an output terminal IOUT 2 is used to output a constant temperature coefficient current; the current outputs of the output terminals IOUT 1 and IOUT 2 are controlled by a control signal pdb, a control signal pd and the quick start circuit; The fast start circuit includes: NMOS tubes M0-M3, PMOS tubes M4-M6, capacitor C1 and resistor R0; The gate of the NMOS transistor M0 is electrically connected to the gate of the NMOS transistor M1 and the first end of the capacitor C1, and is electrically connected to the first end of the resistor R0, and the connection point is the node Nb. The source of the NMOS transistor M0 and the source of the NMOS transistor M1 are grounded, and the second end of the capacitor C1 is grounded. The gate of the NMOS tube M2 is electrically connected to the gate of the NMOS tube M3, and the control signal pdb is connected. The source of the NMOS tube M2 is electrically connected to the drain of the NMOS tube M0. The source of the NMOS tube M3 is electrically connected to the drain of the NMOS tube M1. The drain of the NMOS tube M3 is electrically connected to the first end of the resistor R0. The second end of the resistor R0 is electrically connected to VDD. The gate of the PMOS tube M4 is connected to the control signal pdb, the source of the PMOS tube M4 and the source of the PMOS tube M5 are electrically connected to VDD respectively, the drain of the PMOS tube M4 is electrically connected to the drain of the PMOS tube M5, and is electrically connected to the gate of the PMOS tube M6 and the drain of the NMOS tube M2, the connection point is the node Na, and the source of the PMOS tube M6 is electrically connected to VDD; The positive temperature coefficient current module includes: PMOS tubes M7-M11, NMOS tubes M12-M13, NMOS tube M15, resistor R1 and triodes Q1-Q2; The drain of the PMOS tube M7 is electrically connected to the gate of the PMOS tube M5, and is also electrically connected to the gate of the PMOS tube M7. The gate of the PMOS tube M7 is electrically connected to the drain of the PMOS tube M8, and is also electrically connected to the gates of the PMOS tube M9, the gates of the PMOS tube M10, and the gates of the PMOS tube M11. The source of the PMOS tube M7, the source of the PMOS tube M8, the source of the PMOS tube M9, the source of the PMOS tube M10, and the source of the PMOS tube M11 are electrically connected to VDD respectively. The gate of the PMOS tube M8 is connected to the control signal pdb. The drain of the PMOS tube M10 is electrically connected to the output terminal IOUT1. The drain of the NMOS tube M12 is electrically connected to the drain of the PMOS tube M7. The gate of the NMOS tube M12 is electrically connected to the gate of the NMOS tube M13 and the gate of the NMOS tube M14, the drain of the PMOS tube M6 is electrically connected to the gate of the NMOS tube M12, and is electrically connected to the drain of the NMOS tube M13 and the drain of the PMOS tube M9, the connection point is the node Nc, the source of the NMOS tube M12 is electrically connected to the first end of the resistor R1, the second end of the resistor R1 is electrically connected to the emitter of the transistor Q1, the collector and the base of the transistor Q1 are grounded, the source of the NMOS tube M13 is electrically connected to the emitter of the transistor Q2, the collector and the base of the transistor Q2 are grounded, the gate of the NMOS tube M15 is connected to the control signal pd, and the source of the NMOS tube M15 is grounded; The negative temperature coefficient current module includes: PMOS tubes M16-M19, NMOS tube M14 and resistor R2; The source of the NMOS tube M14 is electrically connected to the first end of the resistor R2, the gate of the NMOS tube M14 is electrically connected to the drain of the NMOS tube M15, the second end of the resistor R2 is grounded, the drain of the PMOS tube M16 is electrically connected to the gate of the PMOS tube M16 and the drain of the NMOS tube M14, the gate of the PMOS tube M16 is electrically connected to the drain of the PMOS tube M17 and the gate of the PMOS tube M18, the drain of the PMOS tube M18 is electrically connected to the drain of the PMOS tube M19, the drain of the PMOS tube M11 and the drain of the NMOS tube M20, the gate of the PMOS tube M19 is connected to the control signal pdb, and the source of the PMOS tube M16, the source of the PMOS tube M17, the source of the PMOS tube M18 and the source of the PMOS tube M19 are electrically connected to VDD respectively; The constant temperature coefficient current module includes: NMOS tubes M20 to M22; The drain of the NMOS tube M20 is electrically connected to the gate of the NMOS tube M21 and the gate of the NMOS tube M22. The gate of the NMOS tube M20 is connected to the control signal pdb. The source of the NMOS tube M20 is electrically connected to the drain of the NMOS tube M21. The drain of the NMOS tube M22 is electrically connected to the output terminal IOUT2. The source of the NMOS tube M21 and the source of the NMOS tube M22 are grounded.

2. The fast start current generating circuit according to claim 1, characterized in that: The quick start circuit also includes: The resistor R0 is replaced by the PMOS tube Mr, the gate of the NMOS tube M0 is electrically connected to the gate of the NMOS tube M1 and the first end of the capacitor C1, and is electrically connected to the drain of the PMOS tube Mr, and the connection point is the node Nb, the drain of the NMOS tube M3 is electrically connected to the drain of the PMOS tube Mr, the source of the PMOS tube Mr is electrically connected to VDD, and the gate of the PMOS tube Mr is grounded.

3. The fast start current generating circuit according to claim 2, characterized in that: When the control signal pdb is 0, the fast start circuit is in the off state, the voltage of the node Nb is pulled up, the NMOS tube M2 and the NMOS tube M3 are not turned on, the NMOS tube M0 and the NMOS tube M1 have no current, the PMOS tube M4 is turned on, so that the voltage of the node Na is pulled up, and the PMOS tube M6 is not turned on; When the control signal pdb is 0, the current generating circuit is in the off state, the PMOS tube M8 is turned on, so that the gate inputs of the PMOS tubes M7, M9, M10 and M11 are high level, and the PMOS tubes M7, M9, M10 and M11 are not turned on; the PMOS tube M17 is turned on, so that the gate inputs of the PMOS tubes M16 and M18 are high level, and the PMOS tubes M16 and M18 are not turned on. 8 is not conducting; the control signal pd is the reverse of the control signal pdb, the control signal pd is 1, the NMOS tube M15 is conducting, so that the voltage of the node Nc is pulled down, the gate inputs of the NMOS tubes M12, M13 and M14 are low level, and the NMOS tubes M12, M13 and M14 are not conducting; the PMOS tube M19 is conducting, so that the gate inputs of the NMOS tubes M21 and M22 are high level, and the NMOS tube M21 has no current; When the control signal pdb is 1, the control signal pd is 0, the fast start-up circuit is in working state, the NMOS tubes M2 and M3 are turned on, the NMOS tubes M0 and M1 are turned on, the node Nb starts to drop from a high level, the voltage of the node Na is pulled down, the PMOS tube M6 is turned on, the voltage of the node Nc is pulled up, the PMOS tube M7, the PMOS tube M9, the NMOS tube M12 and the NMOS tube M13 are turned on, and the loop works, the current of the PMOS tube M5 mirroring the PMOS tube M7 is greater than the current of the NMOS tube M0, the voltage of the node Na is pulled up, the PMOS tube M6 is turned off, and the startup of the current generating circuit is completed.

4. The fast start current generating circuit according to claim 3, characterized in that: Generating positive temperature coefficient current includes: The PMOS tube M7 and the PMOS tube M9 form a current mirror, and the generated current flows into the NMOS tube M12 and the NMOS tube M13 respectively to generate the same Vgs voltage, so that the NMOS tube M12 and the NMOS tube M13 have the same source voltage, so that the voltage across the resistor R1 is: |Vbe_Q2|-|Vbe_Q1|=kT / q*ln(N); i_ptat=(|Vbe_Q2|-|Vbe_Q1|) / R1; Where N is the ratio of the current density flowing through transistor Q2 and transistor Q1, k is the Boltzmann constant, q is the electron charge, T is the temperature, kT / q is the voltage with a positive temperature coefficient, Vbe_Q2 is the voltage difference between the base and emitter of transistor Q2, Vbe_Q1 is the voltage difference between the base and emitter of transistor Q1, and i_ptat is the positive temperature coefficient current; The current flowing through both ends of resistor R1 is the positive temperature coefficient current.

5. The fast start current generating circuit according to claim 4, characterized in that: Generating negative temperature coefficient current includes: When the gates of NMOS tubes M13 and M14 are short-circuited, the voltage across resistor R2 is approximately equal to |Vbe_Q2|. The Vbe voltage of the transistor is negatively correlated with temperature. Therefore, the current flowing through PMOS tubes M16 and M18 is a negative temperature coefficient current, |Vbe_Q2|=V T *ln(Ic / Is), taking the derivative, we get i_ctat = |Vbe_Q2| / R2; Among them, E g is the band gap energy of silicon, E g is 1.12eV, m=1.5, V T =kT / q, Vbe is the negative temperature coefficient voltage, i_ctat is the negative temperature coefficient current, Ic is the collector current, and Is is the reverse saturation leakage current.

6. The fast start current generating circuit according to claim 5, characterized in that: Generating a constant temperature coefficient current includes: The currents flowing through the PMOS tube M11 and the PMOS tube M18 are superimposed in a suitable ratio to generate a constant temperature coefficient current; i_ztat=a*i_ptat+b*i_ctat; Among them, i_ztat is the constant temperature coefficient current, a is the proportional coefficient of the positive temperature coefficient current, and b is the proportional coefficient of the negative temperature coefficient current.

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