A driving circuit for improving the displacement control accuracy of a scanning tunneling microscope, a scanning tunneling microscope, and a driving method

Abstract

The present invention relates to the field of electronic science and technology, and in particular to a drive circuit for improving the displacement control accuracy of a scanning tunneling microscope, comprising a main control unit, a drive waveform generating circuit, and a drive waveform shaping circuit; the main control unit is connected to the drive waveform generating circuit to output a drive waveform to a piezoelectric ceramic block; the main control unit is connected to the drive waveform shaping circuit to shape the drive waveform output to the piezoelectric ceramic block; the drive waveform shaping circuit comprises a first drive waveform shaping circuit and a second drive waveform shaping circuit. The present invention outputs a drive waveform through the drive waveform generating circuit and shapes the output drive waveform using the drive waveform shaping circuit, wherein the first drive waveform shaping circuit is used to control the enabling of the falling edge of the drive waveform, and the second drive waveform shaping circuit is used to control the enabling of the rising edge of the drive waveform, to ensure that the output drive waveform meets the requirements of the piezoelectric ceramic block, thereby making the displacement control of the piezoelectric ceramic more precise.

Description

Technical Field

[0001] The present invention relates to the field of electronic science and technology, and in particular to a driving circuit for improving the displacement control accuracy of a scanning tunneling microscope, a scanning tunneling microscope and a driving method. Background Art

[0002] A scanning microscope is a microscopic instrument that uses scanning technology to obtain information about a sample's surface morphology and properties. By precisely controlling the movement of the sample or probe across the surface, combined with various detection methods, it can obtain high-resolution images of the sample surface. Piezoelectric displacement control plays a central role in scanning microscopes, enabling high-resolution surface imaging and analysis by precisely controlling the position of the sample or probe. Traditional commercial scanning microscopes require a dedicated main controller and high-voltage piezoelectric displacement controller, which are bulky and costly. Commercial high-voltage amplifiers offer a wide range of voltage and current capabilities and are therefore widely applicable.

[0003] Traditional piezoelectric high-voltage drivers typically use high-voltage op amps from APEX. APEX is the only company on the market that offers ±200V and ±400V high-voltage op amps, but these are expensive and have long lead times. For example, the common PA85 op amp, with an output voltage of ±225V and an output current of 200mA, costs nearly 2,000 yuan per chip. Educational scanning microscopes require a five-channel high-voltage amplifier circuit: X+ / X- / Y+ / Y- / Z. This is prohibitively expensive and unsuitable for educational STMs. Therefore, educational STMs often use the LTC6090 high-voltage op amp, which offers an output voltage of ±70V (or 0-140V) and an output current of 50mA. This significantly reduces costs while still meeting the smaller needle insertion and scanning range of educational STMs. However, the LTC6090's low output current results in extended rise and fall times when driving piezoelectric ceramics with large capacitive loads. This prolonged rise and fall time can affect the displacement accuracy of the piezoelectric ceramics. Summary of the Invention

[0004] To address the deficiencies in the prior art, the present invention provides a drive circuit for improving the displacement control accuracy of a scanning tunneling microscope, comprising a main control unit, a drive waveform generating circuit, and a drive waveform shaping circuit; the main control unit is connected to the drive waveform generating circuit to output a drive waveform to a piezoelectric ceramic block; the main control unit is connected to the drive waveform shaping circuit to shape the drive waveform output to the piezoelectric ceramic block; the drive waveform shaping circuit comprises a first drive waveform shaping circuit and a second drive waveform shaping circuit; the first drive waveform shaping circuit comprises a first level conversion circuit, a first bias circuit, and a first MOS transistor control circuit connected in sequence, the first drive waveform shaping circuit being used to control the falling edge enable of the drive waveform; the second drive waveform shaping circuit comprises a second level conversion circuit, a second bias circuit, and a second MOS transistor control circuit connected in sequence, the second drive waveform shaping circuit being used to control the rising edge enable of the drive waveform.

[0005] Furthermore, the driving waveform generating circuit includes a DAC circuit, a voltage amplifying circuit, a current amplifying circuit, a first switch and a second switch; the output end of the main control unit is connected to the input end of the DAC circuit, the output end of the DAC circuit is connected to the output end of the voltage amplifying circuit, the output end of the voltage amplifying circuit is connected to the piezoelectric ceramic block through the first switch, the output end of the voltage amplifying circuit is connected to the input end of the current amplifying circuit through the second switch, and the output end of the current amplifying circuit is connected to the piezoelectric ceramic block; when the capacitive load of the piezoelectric ceramic is less than a first preset value, the first switch is turned on; when the capacitive load is greater than the first preset value and less than the second preset value, one of the first switch or the second switch is turned on; when the capacitive load is greater than the second preset value, the first switch and the second switch are turned on at the same time.

[0006] Furthermore, the voltage amplification circuit includes a primary voltage amplification circuit and a secondary voltage amplification circuit.

[0007] Furthermore, the secondary voltage amplification circuit includes an operational amplifier U1, a resistor R1, and a resistor R2. The non-inverting input pin of the operational amplifier U1 is connected to the output end of the primary voltage amplification circuit, the resistor R1 is connected between the output pin and the inverting input pin of the operational amplifier U1, and the resistor R2 is connected to the inverting input pin of the operational amplifier U1.

[0008] Furthermore, the current amplification circuit includes a resistor R3, a transistor Q1, and a transistor Q2. One end of the resistor R3 is connected to the output end of the voltage amplification circuit and the base of the transistor Q1 and the base of the transistor Q2. The other end of the resistor R3 is connected to the emitter of the transistor Q1 and the emitter of the transistor Q2.

[0009] Furthermore, the first level conversion circuit includes a transistor Q6, a resistor R18, a transistor Q3 and a second operational amplifier U3, the base of the transistor Q6 is connected to the output end of the main control unit, the collector of the transistor Q6 is connected to the base of the transistor Q3 through the resistor R18, the collector of the transistor Q3 is connected to the non-inverting input pin of the second operational amplifier U3, and the output pin of the second operational amplifier U3 is connected to the inverting input pin of the second operational amplifier U3; the second level conversion circuit includes a transistor Q8, a resistor R29, a transistor Q7 and a third operational amplifier U5, the base of the transistor Q8 is connected to the output end of the main control unit, the collector of the transistor Q8 is connected to the base of the transistor Q7 through the resistor R29, the collector of the transistor Q7 is connected to the non-inverting input pin of the third operational amplifier U5, and the output pin of the third operational amplifier U5 is connected to the inverting input pin of the third operational amplifier U5.

[0010] Furthermore, the first bias circuit includes a fourth operational amplifier U2, a non-inverting input pin of the fourth operational amplifier U2 is connected to the output end of the first level conversion circuit, and the non-inverting input pin of the fourth operational amplifier U2 is connected to a voltage of -70V, and an output pin of the fourth operational amplifier U2 is connected to the first MOS transistor control circuit;

[0011] The second bias circuit includes a fifth operational amplifier U4, a non-inverting input pin of the fifth operational amplifier U4 is connected to the output end of the second level conversion circuit, and the non-inverting input pin of the fifth operational amplifier U4 is connected to a voltage of +70V, and the output pin of the fifth operational amplifier U4 is connected to the second MOS transistor control circuit.

[0012] Furthermore, the first MOS transistor control circuit includes a first MOS transistor Q5, a gate of the first MOS transistor Q5 is connected to the first bias circuit, a drain of the first MOS transistor Q5 is connected to the piezoelectric ceramic block, and a source of the first MOS transistor Q5 is connected to a voltage of -70V;

[0013] The second MOS transistor control circuit includes a second MOS transistor Q4 , a gate of the second MOS transistor Q4 is connected to the second bias circuit, a drain of the second MOS transistor Q4 is connected to the piezoelectric ceramic block, and a source of the second MOS transistor Q4 is connected to a voltage of +70V.

[0014] The present invention further provides a scanning tunneling microscope, which uses the driving circuit for improving the displacement control accuracy of the scanning tunneling microscope as described in any of the above embodiments.

[0015] The present invention provides a driving method for improving the displacement control accuracy of a scanning tunneling microscope, using the driving circuit for improving the displacement control accuracy of a scanning tunneling microscope as described in any of the above embodiments;

[0016] The driving method includes the following steps:

[0017] S100, monitoring the capacitive load of the piezoelectric ceramic block;

[0018] S200, selecting the first switch and / or the second switch to be turned on according to the capacitive load of the piezoelectric ceramic block to provide a driving waveform for the piezoelectric ceramic block;

[0019] S300 , selecting a first driving waveform shaping circuit or a second driving waveform shaping circuit according to the type of the driving waveform to shape the driving waveform to drive the piezoelectric ceramic block to operate.

[0020] Compared with the prior art, the driving circuit provided by the present invention improves the displacement control accuracy of the scanning tunneling microscope, outputs the driving waveform through a driving waveform generating circuit, and uses a driving waveform shaping circuit to shape the output driving waveform, wherein the first driving waveform shaping circuit is used to control the driving waveform falling edge enable, and the second driving waveform shaping circuit is used to control the driving waveform rising edge enable, so as to ensure that the output driving waveform meets the requirements of the piezoelectric ceramic block, so that the displacement control of the piezoelectric ceramic is more precise. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following is a brief introduction to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0022] Figure 1 This is a waveform diagram of the unipolar needle driving waveform provided by the present invention;

[0023] Figure 2 A waveform diagram of the unipolar pin-retraction drive waveform provided by the present invention;

[0024] Figure 3 A waveform diagram of the bipolar needle driving waveform provided by the present invention;

[0025] Figure 4 A waveform diagram of the bipolar pin-retraction drive waveform provided by the present invention;

[0026] Figure 5 The bipolar needle drive waveform diagram of different capacitive loads provided by the present invention without using the circuit of the present invention;

[0027] Figure 6 A structural block diagram of a driving circuit for improving the displacement control accuracy of a scanning tunneling microscope provided by the present invention;

[0028] Figure 7A partial circuit schematic diagram of a driving circuit for improving the displacement control accuracy of a scanning tunneling microscope provided by the present invention;

[0029] Figure 8 The waveform diagram of the bipolar needle driving waveform with different capacitive loads without using the current amplification circuit provided by the present invention;

[0030] Figure 9 A circuit schematic diagram of a first level conversion circuit and a first bias circuit provided by the present invention;

[0031] Figure 10 A circuit schematic diagram of the second level conversion circuit and the second bias circuit provided by the present invention;

[0032] Figure 11 A waveform diagram of a control signal obtained by conversion between the first bias circuit and the second bias circuit provided by the present invention;

[0033] Figure 12 A bipolar needle driving waveform diagram after being processed by a driving circuit for improving the displacement control accuracy of a scanning tunneling microscope provided by the present invention;

[0034] Figure 13 A structural diagram of the scanning tunneling microscope provided by the present invention;

[0035] Figure 14 This is a flow chart of a driving method for improving the displacement control accuracy of a scanning tunneling microscope provided by the present invention. DETAILED DESCRIPTION

[0036] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0037] In the description of the present invention, it should be noted that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "back," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer" and the like, indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate and simplify the description of the present invention. They are not intended to indicate or imply that the devices or components referred to must have, be constructed, or operate in a specific orientation, and therefore should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0038] When a scanning microscope tip approaches a sample, it primarily uses piezoelectric ceramic blocks to control displacement, exploiting their stick-slip motion. Piezoelectric stick-slip is a nonlinear motion phenomenon that occurs when a piezoelectric material is stimulated by a voltage. This phenomenon is crucial in precision actuation, particularly in applications requiring high-precision positioning. Piezoelectric stick-slip typically occurs in piezoelectric materials, such as piezoelectric ceramic blocks. When the applied voltage exceeds a certain threshold, the material undergoes a small displacement. When the voltage is removed, the material does not immediately return to its original position, but instead maintains a hysteresis for a period of time after the voltage is removed. This phenomenon is known as the stick-slip effect.

[0039] This invention develops a specialized piezoelectric drive circuit specifically for educational scanning tunneling microscopes. It is compact and low-cost, yet still meets required precision. Using ADI's LTC6090 high-voltage operational amplifier, it delivers an output voltage of ±70V (or 0-140V) and a 50mA output current, significantly reducing costs while still meeting the narrow needle insertion and scanning range of educational scanning tunneling microscopes.

[0040] In order to realize piezoelectric stick-slip motion, the high-voltage driver needs to provide a suitable driving waveform. The driving waveform is divided into unipolar driving waveform and bipolar driving waveform. According to the needle insertion and withdrawal methods, it is further divided into needle insertion driving waveform and needle withdrawal driving waveform. Therefore, there are four different driving waveforms, namely unipolar needle insertion driving waveform, unipolar needle withdrawal driving waveform, bipolar needle insertion driving waveform and bipolar needle withdrawal driving waveform. Figure 1 As shown, under ideal conditions, the falling edge of the unipolar needle drive waveform needs to drop from Vset to 0V instantly, such as from 60V to 0V instantly; Figure 2 As shown in the figure, under ideal conditions of unipolar pin-withdrawing drive waveform, its rising edge needs to rise from 0V to Vset instantaneously, such as from 0V to 60V instantaneously; Figure 3 As shown, under ideal bipolar needle drive waveform, its falling edge needs to drop from Vset to -Vset instantly, such as from 60V to -60V instantly; Figure 4 As shown in FIG, under ideal bipolar pin-withdrawing drive waveform, its rising edge needs to rise from -Vset to Vset instantaneously, such as from -60V to 60V instantaneously.

[0041] Because the piezoelectric ceramic block is a capacitive load, the rising and falling edges of the driving waveform will become slow. The degree of slowness is related to the capacitance of the piezoelectric ceramic block. For example, Figure 5 As shown in the figure, the larger the capacitance of the piezoelectric ceramic block, the slower the rising and falling edges; the smaller the capacitance of the piezoelectric ceramic block, the faster the rising and falling edges. The LTC6090's output current is relatively small. When driving a piezoelectric ceramic block with a large capacitive load, the rise and fall times of the drive waveform will be longer, which will affect the accuracy of the piezoelectric displacement.

[0042] To obtain a steep edge, such as Figure 6 As shown, the present invention provides a driving circuit for improving the displacement control accuracy of a scanning tunneling microscope, including a main control unit, a driving waveform generating circuit, and a driving waveform shaping circuit; the main control unit is connected to the driving waveform generating circuit to output a driving waveform to a piezoelectric ceramic block; the main control unit is connected to the driving waveform shaping circuit to shape the driving waveform output to the piezoelectric ceramic block.

[0043] In one embodiment, the drive waveform generation circuit includes a DAC circuit, a voltage amplifier circuit, a current amplifier circuit, a first switch, and a second switch. The output of the main control unit is connected to the input of the DAC circuit, and the output of the DAC circuit is connected to the output of the voltage amplifier circuit. The output of the voltage amplifier circuit is connected to the piezoelectric ceramic block via the first switch, and the output of the voltage amplifier circuit is connected to the input of the current amplifier circuit via the second switch. The output of the current amplifier circuit is connected to the piezoelectric ceramic block. The voltage amplifier circuit includes a primary voltage amplifier circuit and a secondary voltage amplifier circuit.

[0044] In a specific implementation, the signal voltage output by the main control unit is 0 to 3.3V. The DAC circuit converts the signal voltage output by the main control unit from digital to analog, amplifies the voltage output by the main control unit to 0 to 5V, and outputs it to the first-level voltage amplifier circuit. The first-level voltage amplifier circuit amplifies the 0 to 5V voltage to ±10V and performs noise reduction on the voltage. The ±10V voltage is then input to the second-level voltage amplifier circuit. Because the second-level voltage amplifier circuit cannot perform noise reduction on the voltage after significantly amplifying it, a first-level voltage amplifier circuit is placed before the second-level voltage amplifier circuit to perform noise reduction, making the output voltage signal clearer and the circuit configuration more reasonable. Preferably, the DAC circuit uses a multi-channel DAC.

[0045] In one embodiment, if Figure 7 As shown, the secondary voltage amplifier circuit includes a first operational amplifier U1, a resistor R1, and a resistor R2. The non-inverting input pin of the first operational amplifier U1 is connected to the output end of the primary voltage amplifier circuit, the resistor R1 is connected between the output pin and the inverting input pin of the first operational amplifier U1, and the resistor R2 is connected to the inverting input pin of the first operational amplifier U1.

[0046] Specifically, the amplification ratio of the secondary voltage amplifier circuit is determined by the resistance values ​​of the resistors R1 and R2. In this embodiment, the secondary voltage amplifier circuit amplifies the ±10V voltage output by the primary voltage amplifier circuit to ±70V.

[0047] Specifically, if Figure 7As shown, the current amplifier circuit includes a resistor R3, a transistor Q1, and a transistor Q2. One end of the resistor R3 is connected to the output end of the voltage amplifier circuit and the base of the transistor Q1 and the base of the transistor Q2. The other end of the resistor R3 is connected to the emitter of the transistor Q1 and the emitter of the transistor Q2.

[0048] When the capacitive load of the piezoelectric ceramic block is less than a first preset value, the first switch is turned on and the second switch is turned off, and the voltage amplification circuit provides a driving waveform for the piezoelectric ceramic block; preferably, the first preset value is 1uF.

[0049] When the capacitive load is greater than a first preset value and less than a second preset value, either the first switch or the second switch is opened. When the capacitive load of the piezoelectric ceramic block is greater than the first preset value and less than the second preset value, the first switch is opened and the second switch is closed, and the voltage amplifier circuit provides the driving waveform for the piezoelectric ceramic block; or the second switch is opened and the first switch is closed, and the current amplifier circuit provides the driving waveform for the piezoelectric ceramic block. Preferably, the second preset value is 10uF. Optionally, when the capacitive load is less than 10uF, either the voltage amplifier circuit or the current amplifier circuit can be used alone to provide the driving waveform. When the first switch is opened and the second switch is closed, the voltage amplifier circuit provides the waveform; when the first switch is closed and the second switch is opened, the current amplifier circuit provides the waveform. However, the addition of the current amplifier circuit to the high-voltage op amp increases power consumption. The current amplifier circuit is enabled only when the capacitive load is greater than 1uF; it is not required when the capacitive load is less than 1uF, thus saving power. Furthermore, when the capacitive load is greater than 1uF and less than 10uF, the voltage amplifier circuit is preferably used to provide the waveform.

[0050] When the capacitive load is greater than the second preset value, the first switch and the second switch are opened at the same time. When the capacitive load of the piezoelectric ceramic block is too large, the voltage amplifier circuit alone cannot provide a sufficient driving waveform for the piezoelectric ceramic block, such as Figure 8 As shown in the figure, the driving waveforms of different capacitive loads are obtained without enabling the current amplifier circuit. When the capacitive load is 10uF, the driving waveform is distorted. Therefore, it is necessary to add a current amplifier circuit to assist the voltage amplifier circuit in providing sufficient driving waveform for the piezoelectric ceramic block. At this time, both the first switch and the second switch are open.

[0051] In one embodiment, the drive waveform shaping circuit includes a first drive waveform shaping circuit and a second drive waveform shaping circuit. The first drive waveform shaping circuit includes a first level shifting circuit, a first biasing circuit, and a first MOS transistor control circuit connected in sequence, and the first drive waveform shaping circuit is used to control the falling edge enable of the drive waveform. The second drive waveform shaping circuit includes a second level shifting circuit, a second biasing circuit, and a second MOS transistor control circuit connected in sequence, and the second drive waveform shaping circuit is used to control the rising edge enable of the drive waveform.

[0052] In specific implementation, when the driving waveform is a unipolar needle-feeding driving waveform and a bipolar needle-feeding driving waveform, a first driving waveform shaping circuit is used, such as Figure 9 As shown, the first level conversion circuit converts the 0-3.3V voltage output by the main control unit into a 0-10V voltage and outputs it to the first bias circuit. The first bias circuit converts the voltage into a -70V--60V voltage and supplies it to the first MOS tube control circuit. The first MOS tube control circuit directly loads the -60V voltage on the 60V piezoelectric ceramic block. The unipolar needle drive waveform performs a voltage neutralization operation once to directly reduce it to the required 0V; the bipolar needle drive waveform performs two voltage neutralization operations to reduce it to the required -60V.

[0053] When the driving waveform is a unipolar pin-withdrawing driving waveform and a bipolar pin-withdrawing driving waveform, a second driving waveform shaping circuit is used, such as Figure 10 As shown, the second level conversion circuit converts the 0-3.3V voltage output by the main control unit into a 0-10V voltage and outputs it to the second bias circuit. The second bias circuit converts the voltage into a 60V-70V voltage and outputs it to the second MOS tube control circuit. The second MOS tube control circuit directly loads the 60V voltage on the -60V piezoelectric ceramic block. The unipolar needle drive waveform performs a voltage neutralization operation once to directly increase it to the required 0V; the bipolar needle drive waveform performs two voltage neutralization operations to increase it to the required 60V.

[0054] In one embodiment, if Figure 9 As shown, the first level conversion circuit includes a transistor Q6, a resistor R18, a transistor Q3 and a second operational amplifier U3. The base of the transistor Q6 is connected to the output end of the main control unit, the collector of the transistor Q6 is connected to the base of the transistor Q3 through the resistor R18, the collector of the transistor Q3 is connected to the non-inverting input pin of the second operational amplifier U3, and the output pin of the second operational amplifier U3 is connected across the inverting input pin of the second operational amplifier U3.

[0055] During specific implementation, the transistor Q6 performs reverse amplification processing on the 0~3.3V voltage output by the main control unit, that is, converting 0V to 10V and converting 3.3V to 0V. Then the transistor Q3 performs forward operation on the voltage, converting 10V to 0V and converting 0V to 10V, generating a 0~10V voltage which is input to the second operational amplifier U3. The second operational amplifier U3 performs follow-up isolation driving processing on the voltage so that it is not affected by changes in load size.

[0056] In one embodiment, if Figure 10 As shown, the second level conversion circuit includes a transistor Q8, a resistor R29, a transistor Q7 and a third operational amplifier U5. The base of the transistor Q8 is connected to the output end of the main control unit, the collector of the transistor Q8 is connected to the base of the transistor Q7 through the resistor R29, the collector of the transistor Q7 is connected to the non-inverting input pin of the third operational amplifier U5, and the output pin of the third operational amplifier U5 is connected across the inverting input pin of the third operational amplifier U5.

[0057] During specific implementation, the transistor Q8 performs reverse amplification processing on the 0~3.3V voltage output by the main control unit, that is, converting 0V to 10V and converting 3.3V to 0V. Then the transistor Q7 performs forward operation on the voltage, converting 10V to 0V and converting 0V to 10V, generating a 0~10V voltage which is input to the third operational amplifier U5. The third operational amplifier U5 performs follow-up isolation drive processing on the voltage so that it is not affected by changes in load size.

[0058] In one embodiment, if Figure 9 As shown, the first bias circuit includes a fourth operational amplifier U2, the non-inverting input pin of the fourth operational amplifier U2 is connected to the output end of the first level conversion circuit, and the non-inverting input pin of the fourth operational amplifier U2 is connected to a voltage of -70V, and the output pin of the fourth operational amplifier U2 is connected to the first MOS tube control circuit.

[0059] Specifically, the -70V voltage connected to the first bias circuit and the 0-10V voltage outputted from the first level conversion circuit to the first bias circuit by the fourth operational amplifier U2 perform an addition operation to obtain a voltage of -70V to -60V.

[0060] In one embodiment, if Figure 10 As shown, the second bias circuit includes a fifth operational amplifier U4, the non-inverting input pin of the fifth operational amplifier U4 is connected to the output end of the second level conversion circuit, and the non-inverting input pin of the fifth operational amplifier U4 is connected to the voltage of +70V, and the output pin of the fifth operational amplifier U4 is connected to the second MOS tube control circuit.

[0061] Specifically, the 70V voltage connected to the first bias circuit and the 0-10V voltage outputted from the first level conversion circuit to the first bias circuit by the fourth operational amplifier U2 perform an addition operation to obtain a 60V-70V voltage.

[0062] In one embodiment, if Figure 9 As shown, the first MOS transistor control circuit includes a first MOS transistor Q5, a gate of the first MOS transistor Q5 is connected to the first bias circuit, a drain of the first MOS transistor Q5 is connected to the piezoelectric ceramic block, and a source of the first MOS transistor Q5 is connected to a voltage of -70V.

[0063] In a specific implementation, the first MOS transistor control circuit receives a voltage between -70V and -60V output by the first bias circuit and applies it directly to both ends of the piezoelectric ceramic block, causing the 60V driving waveform of the piezoelectric ceramic block to drop sharply to 0V or -60V, thereby performing the needle insertion operation. Preferably, the first MOS transistor Q5 is an N-type MOS transistor.

[0064] In one embodiment, if Figure 10 As shown, the second MOS transistor control circuit includes a second MOS transistor Q4, a gate of the second MOS transistor Q4 is connected to the second bias circuit, a drain of the second MOS transistor Q4 is connected to the piezoelectric ceramic block, and a source of the second MOS transistor Q4 is connected to a voltage of +70V.

[0065] In a specific implementation, the second MOS transistor control circuit receives a 60V to 70V voltage output by the second bias circuit and applies it directly to both ends of the piezoelectric ceramic block, causing the drive waveform of the piezoelectric ceramic block to rise sharply from -60V or 0V to 60V, thereby performing the pin withdrawal operation. Preferably, the second MOS transistor Q4 is a P-type MOS transistor.

[0066] like Figure 11 As shown in Figure 1, Switch 1 and Switch 2 need to be biased by high voltage to drive the MOS tube. According to the frequency of the driving waveform, the frequency and duty cycle of Switch 1 and Switch 2 are adjusted. Figure 12 As shown, when the circuit designed by the present invention is used under conditions of different capacitive loads, the falling edge time of the waveform is basically the same.

[0067] The present invention also provides a scanning tunneling microscope, such as Figure 13 As shown, a driving circuit as described above is used to improve the displacement control accuracy of a scanning tunneling microscope.

[0068] The present invention also provides a driving method for improving the displacement control accuracy of a scanning tunneling microscope, such as Figure 14 As shown, the driving circuit described above is used to improve the displacement control accuracy of the scanning tunneling microscope.

[0069] The driving method includes the following steps:

[0070] S100, monitoring the capacitive load of the piezoelectric ceramic block;

[0071] S200, selecting the first switch and / or the second switch to be turned on according to the capacitive load of the piezoelectric ceramic block to provide a driving waveform for the piezoelectric ceramic block;

[0072] S300 , selecting a first driving waveform shaping circuit or a second driving waveform shaping circuit according to the type of the driving waveform to shape the driving waveform to drive the piezoelectric ceramic block to operate.

[0073] In specific implementation, the capacitive load of the piezoelectric ceramic block is first monitored, and a voltage amplification circuit and / or a current amplification circuit are selected according to the monitored capacitive load of the piezoelectric ceramic block to provide a driving waveform for the piezoelectric ceramic block.

[0074] Specifically, when the capacitive load of the piezoelectric ceramic block is less than a first preset value, the first switch is turned on and the second switch is turned off, and the voltage amplification circuit provides a driving waveform for the piezoelectric ceramic block.

[0075] When the capacitive load of the piezoelectric ceramic block is greater than a first preset value and less than a second preset value, the first switch is opened and the second switch is closed, and the voltage amplification circuit provides a driving waveform for the piezoelectric ceramic block; or the second switch is opened and the first switch is closed, and the current amplification circuit provides a driving waveform for the piezoelectric ceramic block.

[0076] When the capacitive load of the piezoelectric ceramic block is greater than a second preset value, the first switch and the second switch are both turned on, and the voltage amplifying circuit and the current amplifying circuit simultaneously provide driving waveforms for the piezoelectric ceramic block.

[0077] Preferably, the first preset value is 1 uF, and the second preset value is 10 uF.

[0078] After the drive waveform is output, the corresponding first drive waveform shaping circuit and second drive waveform shaping circuit are selected according to the drive waveform's driving mode to shape the drive waveform to drive the piezoelectric ceramic block. The first drive waveform shaping circuit shapes the unipolar needle-entry drive waveform and the bipolar needle-entry drive waveform; the second drive waveform shaping circuit shapes the unipolar needle-retraction drive waveform and the bipolar needle-retraction drive waveform.

[0079] Although this document frequently uses terms such as main control unit, DAC circuit, voltage amplifier circuit, first level conversion circuit, second level conversion circuit, drive waveform, piezoelectric ceramic block, first MOS transistor control circuit, and second MOS transistor control circuit, the use of other terms is not excluded. These terms are used solely to more conveniently describe and explain the essence of the present invention; interpreting them as any additional limitations would be contrary to the spirit of the present invention.

[0080] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A drive circuit for improving the displacement control accuracy of a scanning tunneling microscope, characterized by: The device comprises a main control unit, a drive waveform generating circuit, and a drive waveform shaping circuit; the main control unit is connected to the drive waveform generating circuit to output a drive waveform to the piezoelectric ceramic block; the main control unit is connected to the drive waveform shaping circuit to shape the drive waveform output to the piezoelectric ceramic block; The driving waveform shaping circuit includes a first driving waveform shaping circuit and a second driving waveform shaping circuit; The first drive waveform shaping circuit includes a first level conversion circuit, a first bias circuit, and a first MOS transistor control circuit connected in sequence, and the first drive waveform shaping circuit is used to control the driving waveform to be enabled at a falling edge; the second drive waveform shaping circuit includes a second level conversion circuit, a second bias circuit, and a second MOS transistor control circuit connected in sequence, and the second drive waveform shaping circuit is used to control the driving waveform to be enabled at a rising edge; The driving waveform generating circuit includes a DAC circuit, a voltage amplifying circuit, a current amplifying circuit, a first switch, and a second switch; the output end of the main control unit is connected to the input end of the DAC circuit, the output end of the DAC circuit is connected to the output end of the voltage amplifying circuit, the output end of the voltage amplifying circuit is connected to the piezoelectric ceramic block via the first switch, the output end of the voltage amplifying circuit is connected to the input end of the current amplifying circuit via the second switch, and the output end of the current amplifying circuit is connected to the piezoelectric ceramic block; When the capacitive load of the piezoelectric ceramic is less than a first preset value, the first switch is turned on; When the capacitive load is greater than a first preset value and less than a second preset value, either the first switch or the second switch is selectively turned on; When the capacitive load is greater than a second preset value, the first switch and the second switch are turned on simultaneously.

2. The driving circuit for improving the displacement control accuracy of a scanning tunneling microscope according to claim 1, characterized in that: The voltage amplifying circuit includes a primary voltage amplifying circuit and a secondary voltage amplifying circuit.

3. The driving circuit for improving the displacement control accuracy of a scanning tunneling microscope according to claim 2, characterized in that: The secondary voltage amplification circuit includes a first operational amplifier U1, a resistor R1, and a resistor R2. The non-inverting input pin of the first operational amplifier U1 is connected to the output end of the primary voltage amplification circuit. The resistor R1 is connected between the output pin and the inverting input pin of the first operational amplifier U1. The resistor R2 is connected to the inverting input pin of the first operational amplifier U1.

4. The driving circuit for improving the displacement control accuracy of a scanning tunneling microscope according to claim 1, characterized in that: The current amplification circuit includes a resistor R3, a transistor Q1, and a transistor Q2. One end of the resistor R3 is connected to the output end of the voltage amplification circuit and the base of the transistor Q1 and the base of the transistor Q2. The other end of the resistor R3 is connected to the emitter of the transistor Q1 and the emitter of the transistor Q2.

5. The driving circuit for improving the displacement control accuracy of a scanning tunneling microscope according to claim 1, characterized in that: The first level conversion circuit includes a transistor Q6, a resistor R18, a transistor Q3 and a second operational amplifier U3, the base of the transistor Q6 is connected to the output end of the main control unit, the collector of the transistor Q6 is connected to the base of the transistor Q3 through the resistor R18, the collector of the transistor Q3 is connected to the non-inverting input pin of the second operational amplifier U3, and the output pin of the second operational amplifier U3 is connected across the inverting input pin of the second operational amplifier U3; The second level conversion circuit includes a transistor Q8, a resistor R29, a transistor Q7 and a third operational amplifier U5. The base of the transistor Q8 is connected to the output end of the main control unit, the collector of the transistor Q8 is connected to the base of the transistor Q7 through the resistor R29, the collector of the transistor Q7 is connected to the non-inverting input pin of the third operational amplifier U5, and the output pin of the third operational amplifier U5 is connected across the inverting input pin of the third operational amplifier U5.

6. The driving circuit for improving the displacement control accuracy of a scanning tunneling microscope according to claim 1, characterized in that: The first bias circuit includes a fourth operational amplifier U2, a non-inverting input pin of the fourth operational amplifier U2 is connected to the output end of the first level conversion circuit, and the non-inverting input pin of the fourth operational amplifier U2 is connected to a voltage of -70V, and an output pin of the fourth operational amplifier U2 is connected to the first MOS transistor control circuit; The second bias circuit includes a fifth operational amplifier U4, a non-inverting input pin of the fifth operational amplifier U4 is connected to the output end of the second level conversion circuit, and the non-inverting input pin of the fifth operational amplifier U4 is connected to a voltage of +70V, and the output pin of the fifth operational amplifier U4 is connected to the second MOS transistor control circuit.

7. The driving circuit for improving the displacement control accuracy of a scanning tunneling microscope according to claim 2, characterized in that: The first MOS transistor control circuit includes a first MOS transistor Q5, a gate of the first MOS transistor Q5 is connected to the first bias circuit, a drain of the first MOS transistor Q5 is connected to the piezoelectric ceramic block, and a source of the first MOS transistor Q5 is connected to a voltage of -70V; The second MOS transistor control circuit includes a second MOS transistor Q4 , a gate of the second MOS transistor Q4 is connected to the second bias circuit, a drain of the second MOS transistor Q4 is connected to the piezoelectric ceramic block, and a source of the second MOS transistor Q4 is connected to a voltage of +70V.

8. A scanning tunneling microscope, characterized in that: A driving circuit for improving the displacement control accuracy of a scanning tunneling microscope is used as described in any one of claims 1 to 7.

9. A driving method for improving the displacement control accuracy of a scanning tunneling microscope, characterized by: Using the driving circuit for improving the displacement control accuracy of a scanning tunneling microscope as described in any one of claims 1 to 7; The driving method comprises the following steps: S100, monitoring the capacitive load of the piezoelectric ceramic block; S200, selecting a first switch and / or a second switch to be turned on according to the capacitive load of the piezoelectric ceramic block to provide a driving waveform for the piezoelectric ceramic block; S300 , selecting a first driving waveform shaping circuit or a second driving waveform shaping circuit according to the type of the driving waveform to shape the driving waveform to drive the piezoelectric ceramic block to operate.

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