Improved performance of flyback converter

Abstract

Disclosed is a flyback converter comprising: a transformer having a primary side winding and a secondary side winding; a primary side switch located on a primary side of the transformer; the two secondary side switches are positioned on the secondary side of the transformer; wherein the two secondary side switches are connected in parallel and have different characteristics; and a control unit configured to generate a rectified signal and a zero voltage switching (ZVS) pulse and to drive the two secondary side switches; wherein the secondary side switch is driven by a rectified signal, and the other secondary side switch is driven by a ZVS pulse. At the end of the switching cycle, prior to turning on the primary side switch: the control unit is configured to generate a ZVS pulse in the secondary side winding such that a parasitic capacitor of the primary side switch is discharged and thus turn on the primary side switch under ZVS conditions or near ZVS conditions.

Description

Technical Field

[0001] The field of the invention relates to flyback converters and related systems and methods for operating the converters.

[0002] A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all copyright rights whatsoever. Background Art

[0003] The flyback power converter is a widely used topology for low to medium output power applications. A common switching operation mode is the quasi-resonant mode, where switching (primary side switch turn-on) occurs at the lowest drain voltage valley generated by the resonance between the primary inductance and parasitic capacitance of the circuit.

[0004] Existing flyback converters, while low cost, are typically not very efficient and are bulky.

[0005] Existing flyback converters may include synchronous MOSFET rectification, which combines a MOSFET with a control device for switching the device on or off. However, the rectifier portion typically operates in a hard-switching mode, thus incurring high losses both when the primary-side MOSFET is turned on and off.

[0006] Furthermore, EMI emissions are usually not negligible, resulting in the use of relatively large filters and thus a significant circuit size.

[0007] Therefore, there is a need to optimize existing flyback and quasi-resonant flyback designs to improve efficiency, size and cost. In addition, it is desirable to improve the performance and efficiency of the flyback converter under any load condition.

[0008] The present invention solves the above-mentioned weaknesses and other problems not described above. Summary of the invention

[0009] The present invention relates to an improved flyback converter as defined in the accompanying claims.

[0010] A consolidated list of key features is given in the Appendix. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Aspects of the present invention will now be described by way of one or more examples with reference to the following drawings, which illustrate features of the present invention respectively:

[0012] Figure 1 The general topology of a quasi-resonant flyback converter is shown.

[0013] Figure 2 Shows Figure 1 The corresponding waveform diagram.

[0014] Figure 3 A flyback converter topology is shown, wherein the primary-side control unit is located on the primary-side circuit of the transformer.

[0015] Figure 4 A waveform diagram of a flyback converter is shown, wherein the primary-side control unit is located on the primary-side circuit of the transformer.

[0016] Figure 5 Another example of a flyback converter topology with a valley synchronizer unit located on the secondary side circuit of the transformer is shown.

[0017] Figure 6 A waveform diagram of a flyback converter having a valley synchronizer unit located on the secondary side circuit of a transformer is shown.

[0018] Figure 7 Another example of a flyback converter topology including a control unit on the secondary side of the transformer is shown.

[0019] Figure 8 The effect on the primary side switch when a pulse request is received from the secondary side is shown.

[0020] Fig. 9 Another example of a flyback converter topology is shown which also includes a control unit on the secondary side of the transformer.

[0021] Fig.10 A ZVS pulse signature that can be used for pulse detection in the case of a flyback converter comprising a control unit on the secondary side of the transformer is shown.

[0022] Fig.11 A single transformer is shown integrating power and signal transmission.

[0023] Fig.12 A flyback converter topology is shown, wherein a signal transformer ensures communication between the primary side and the secondary side, wherein a control unit is located on the primary side circuit.

[0024] Fig.13 A flyback converter topology is shown, wherein a signal transformer ensures communication between the primary side and the secondary side, wherein a control unit is located on the primary side circuit and a valley synchronizer unit is located on the secondary side circuit.

[0025] Fig.14 A flyback converter topology is shown, wherein a signal transformer ensures communication between the primary side and the secondary side in case a primary-side control unit is located on the primary-side circuit and a control unit is located on the secondary side.

[0026] FIG. 15 shows an example of a simplified AC / DC converter capable of inducing primary-side ZVS switching.

[0027] Fig.16 The proposed flyback architecture with regenerative clamping is shown.

[0028] FIG. 17 shows a diagram of a five-winding configuration and bifilar wire.

[0029] Fig.18 Standard regulation is shown, where the rectifying MOSFET is commanded as an ideal diode.

[0030] Fig.19 Phase shift regulation is shown, where the secondary FET turns on as soon as the body diode starts conducting current, and turns off after the current changes sign.

[0031] Fig. 20 A simple possible implementation of phase shift regulation is shown, where the output voltage control loop is implemented on the secondary side.

[0032] Fig.21 A flyback converter using two auxiliary windings is shown.

[0033] Fig. 22 An example of an auxiliary voltage circuit based on a rectifier that can be enabled or disabled by a FET is shown.

[0034] Fig.23 Shows Fig. 22 An example of a closed loop solution for the circuit in which the "enable" signal is high when Vaux is greater than the threshold.

[0035] Fig.24 An example of a rectifier capable of extracting an auxiliary voltage from a switch or resonant network is shown.

[0036] Fig.25 The voltage output of the auxiliary circuit is shown.

[0037] Fig.26 A half-bridge implementation of an LLC converter including a switching network and a full-wave rectifier is shown.

[0038] 27 shows a circuit diagram of an AC / DC converter including a transformer having a primary winding L6 and a secondary winding L8 and an auxiliary storage winding L1 arranged in a flyback-like ( 27A) or forward-like ( 27B) configuration.

[0039] 28 shows a circuit diagram of an AC / DC converter having a three-wire configuration consisting of one main primary winding and two auxiliary windings ( 28A) and having a two-wire configuration consisting of two primary windings and two auxiliary windings ( 28B).

[0040] Figure 29 shows a graph of input voltage VBUS and different power signals compared to threshold voltage VTH. Two control methods are shown.

[0041] Fig.30 Graphs showing electrical signals during the main phases of a single magnetic AC / DC converter.

[0042] Fig.31 Shown is a graph of electrical signals during the auxiliary phase of a single magnetic AC / DC converter.

[0043] Fig.32 A circuit diagram of a single-stage AC / DC converter including a battery pack as a storage element is shown.

[0044] Fig.33 A circuit diagram for active parallel storage in combination with a modified flyback with 2 primary windings is shown.

[0045] Fig.34 An AC-DC converter is shown including an energy storage element on the secondary side of the converter.

[0046] Fig.35 An AC-DC converter including a boost PFC and an isolation converter is shown.

[0047] Fig.36 An AC-DC converter comprising an isolated power converter, a storage element and a DC / DC stage is shown.

[0048] Fig.37 An AC / DC converter is shown for providing several output voltages.

[0049] Fig.38 A conventional AC / DC converter for providing several output voltages is shown.

[0050] Fig.39 A circuit diagram of an isolated PFC implemented using a resonant architecture including magnetic coupling is shown.

[0051] Fig.40 A circuit diagram of an isolated PFC implemented using a resonant architecture including capacitive coupling is shown.

[0052] Fig.41 A circuit diagram of an isolated PFC implemented using a bridgeless PFC architecture is shown.

[0053] Fig.42 A circuit diagram of a non-inverting buck-boost converter is shown.

[0054] Fig.43A circuit diagram of an AC / DC converter including an isolated PFC and a non-inverting buck-boost converter is shown.

[0055] Fig.44 Another circuit diagram is shown including several non-inverting buck-boost converters in parallel providing multiple independent output voltages.

[0056] Fig.45 A multi-output AC / DC converter implemented with an isolated buck-boost is shown, with a buck-boost followed by a DC / DC converter for each output rail.

[0057] Fig.46 A multi-output AC / DC converter implemented with an isolated PFC converter is shown, where the main output is generated by filtering the output voltage of the PFC, while the other outputs are generated by dedicated DC / DC converters.

[0058] Fig.47 A circuit diagram of a two-stage parallel architecture including a converter in parallel with an isolated PFC is shown.

[0059] Fig.48 Shows the corresponding Fig.47 The waveform diagram of the circuit.

[0060] Fig.49 A resonant non-isolated DC-DC bidirectional converter is shown.

[0061] Fig.50 shows a parallel storage circuit including a resonant capacitor circuit,

[0062] Fig.51 A parallel reservoir including a weakly coupled inductor in a flyback configuration is shown.

[0063] Fig.52 A parallel reservoir including a weakly coupled inductor is shown in a forward configuration.

[0064] Fig.53 A parallel reservoir including a bidirectional flyback is shown.

[0065] Fig.54 A circuit diagram of a parallel architecture including a converter in parallel with an isolated PFC is shown.

[0066] Fig.55 A diagram of an isolated converter with a secondary side circuit configured as a voltage doubler is shown.

[0067] Fig.56 A diagram of an isolated converter with a secondary side circuit configured as a full bridge circuit is shown.

[0068] Fig.57 A diagram illustrating different stages of an isolation converter is shown.

[0069] Fig.58 A diagram illustrating different stages of an isolation converter is shown.

[0070] Fig.59 A diagram illustrating different stages of an isolation converter is shown.

[0071] Fig.60 A diagram illustrating different stages of an isolation converter is shown.

[0072] Fig.61 A diagram illustrating different stages of an isolation converter is shown.

[0073] Fig.62 A diagram illustrating different stages of an isolation converter is shown.

[0074] Fig.63 A diagram illustrating different stages of an isolation converter is shown.

[0075] Fig.64 A diagram illustrating different stages of an isolation converter is shown.

[0076] Fig.65 A diagram showing an isolated converter used as an isolated PFC.

[0077] FIG66 shows a circuit diagram of a single-stage bridgeless and capacitor-less wireless architecture.

[0078] Fig.67 A general block diagram showing a typical architecture of a <75W input AC-DC converter.

[0079] Fig.68 A block diagram of a simplified AC / DC converter is shown.

[0080] Fig.69 An example of a high voltage startup circuit is shown.

[0081] Fig.70 Shows Fig.69 Graph of the signal.

[0082] Fig.71 A flyback converter architecture is shown, including a secondary side rectifier switch driven by a rectified signal and a secondary side ZVS pulse switch configured to induce ZVS on the primary switch.

[0083] Fig.72 Graphs of the secondary-side current, the combined signal, the rectified signal, and the ZVS pulse signal are shown.

[0084] Fig.73 Graphs showing the voltage at the gate of the primary side switch, the voltage at the gate of the secondary side switch, the current at the secondary side and the voltage at the primary side switch are shown. DETAILED DESCRIPTION

[0085] The instructions are organized around the following categories or core technologies:

[0086] Part I. Flyback Converter

[0087] Part II. Active Storage

[0088] Part III. Active Shunt Filters

[0089] Part IV. Isolation Converters

[0090] Part V. Simplified AC / DC

[0091] Section VI. Additional Features of Flyback Converters

[0092] Part I. Flyback Converter

[0093] A method for improving the performance of a flyback converter is described herein.

[0094] refer to Figure 1 , shows the topology of a conventional quasi-resonant flyback converter. It includes: a transformer consisting of two highly coupled inductors L6 and L8 (located on the primary and secondary sides of the transformer, respectively), the two inductors are ideally coupled in a k=1 and flyback coupling manner; a primary side switch or MOSFET M1, which is connected in series with L6; a secondary side switch M2; a secondary side diode, which is connected in series with L8; a primary side AC voltage source; an input capacitor Cin; and a secondary side capacitor Cout, which is connected in parallel with the load R_load.

[0095] Figure 2 Shows Figure 1 The corresponding waveform diagram.

[0096] Forced primary side ZVS

[0097] A method for generating or causing ZVS (zero voltage switching) turn-on of the primary side switch or MOSFET (M1) of a flyback converter in order to increase its efficiency is now described. The objective is to cause ZVS turn-on of the primary side switch or MOSFET without using an additional switch under the widest range of load conditions.

[0098] Additionally, it is desirable to recover the primary leakage inductance energy that occurs when the primary-side MOSFET is turned off, rather than dissipating it in an RCD snubber. In fact, the reduction in the energy dissipated in each switching cycle will allow an increase in the operating frequency, which in turn will allow the use of smaller inductors and capacitors, with direct benefits to the overall power density of the converter.

[0099] Optionally, the secondary side switch or MOSFET M2 may also operate as a synchronous rectifier, wherein the gate terminal of the secondary side switch is activated during the transformer secondary energy transfer phase.

[0100] Example of implementation

[0101] It is now described how the switches or MOSFETs may be correctly synchronized in order to achieve the desired behavior.All solutions proposed below may also be referred to as "QuarEgg" architectures, as a unified class.

[0102] A) Secondary-side induced ZVS flyback control scheme, where a ZVS pulse is generated by a primary-side controller, transmitted to the secondary side using a signal coupling or communication link (capacitive, inductive via a signal transformer, proximity antenna, etc.), and used to ultimately drive the secondary-side switch in conjunction with a synchronous rectifier control signal.

[0103] refer to Figure 3 , shows a flyback converter topology, wherein a primary side control unit 41 is connected to a primary side switch or MOSFET 42 of a transformer 40. The secondary side of the transformer 40 includes an OR logic gate 43, which is connected to a secondary side switch or MOSFET 44, in order to ensure that the secondary side MOSFET can act as both a rectifier and a ZVS pulse generator to force ZVS on the primary side. Communication between the primary and secondary sides is achieved using a communication link such as a capacitive coupling 45.

[0104] Figure 4 Shows the corresponding Figure 3 The characteristic waveforms of the flyback converter, especially the voltages at the gate and drain terminals of the primary side switch or MOSFET, and the generated ZVS pulse. The generated ZVS pulse is sent to the secondary switch via an OR logic gate. As can be seen, when the voltage at the drain terminal of the primary switch becomes zero or close to zero, the primary switch is then turned on under ZVS conditions.

[0105] With the proposed control scheme, the primary side controller 41 sends a ZVS pulse 47 across the secondary side rectifier before turning on the primary side MOSFET 42, thereby turning on the secondary side MOSFET for a short pulse.

[0106] During the ZVS pulse, the voltage on the drain terminal of the primary side MOSFET 42 is forced to a high value (roughly equal to the output voltage of the converter multiplied by the turns ratio of the transformer), and some energy is stored in the transformer. When the ZVS pulse is released, there is a dead time in which both MOSFETs are off. During the dead time, the previously pre-charged transformer pushes the primary side switch node down, thereby reducing the voltage until it reaches zero or close to zero volts. The primary side switch 42 is then turned on under zero voltage switching conditions.

[0107] B) A secondary side valley synchronized ZVS flyback control scheme, in which a ZVS pulse request is generated by the primary side controller and transmitted to the secondary side circuit of the transformer using a communication link. The ZVS pulse request is used to enable a valley synchronizer circuit placed on the secondary side. The valley synchronizer circuit then synchronizes the ZVS pulse with the secondary side drain valley synchronizer unit.

[0108] In addition, the ZVS pulse can also be used to drive the secondary side switch in conjunction with the synchronous rectifier control signal.

[0109] Therefore, instead of turning on the secondary side switch or MOSFET at a typical moment (e.g., hard switching mode), the secondary side MOSFET is also turned on under ZVS or near ZVS conditions while minimizing its switching losses. Therefore, by detecting the secondary side valley, the secondary side switch hard switching losses are also minimized.

[0110] refer to Figure 5 , shows another example of a flyback converter topology, in which a valley synchronizer unit 51 is included on a secondary side circuit of a transformer 50. The valley synchronizer unit 51 is configured to synchronize a primary side circuit and a secondary side circuit.

[0111] In this implementation, the controller 52 on the primary side sends a ZVS request signal to the secondary side of the transformer via the communication channel 54 before turning on the primary side switch or MOSFET 53. When a secondary side valley is detected, the valley synchronizer 51 adds a delay that enables the start of the ZVS pulse 55, rather than immediately turning on the secondary side MOSFET.

[0112] After the ZVS pulse ends, both the primary-side and secondary-side MOSFETs are turned off for a certain dead time, and then the primary-side switch can be turned on under ZVS conditions.

[0113] Then as Figure 5 The circuit shown is Figure 3 The circuit shown operates similarly.

[0114] Figure 6 Shows Figure 51 shows a waveform diagram of a circuit with primary MOSFET drain and gate voltages, secondary MOSFET drain and ZVS pulse gate signals. For simplicity, the secondary MOSFET synchronous rectification gate signal is not shown. It illustrates the valley synchronization of the secondary drain voltage and the secondary current reduction.

[0115] C) ZVS flyback control scheme, where the main controller is located on the secondary side. Figure 7 , shows another example of a flyback converter topology, including a control unit 71 on the secondary side of a transformer 70 .

[0116] The secondary side control unit 71 uses a pulse density modulation method to determine the switching frequency to control the output power. When an excitation pulse is requested, the control unit 71 first performs a ZVS pulse and then sends a turn-on request to the primary side switch or MOSFET 73 via capacitive coupling 73 (or any other signal coupling, such as inductive coupling or proximity antenna).

[0117] Figure 8 The effect on the primary side switch when a pulse request is received from the secondary side is shown. The primary side controller executes the requested pulses and selects the turn-off current level by the received pulse density. A higher density means more power requested and an increased peak current and / or duty cycle.

[0118] Alternatively, if Figure 7 As shown, a valley synchronizer unit 74 may also be included.

[0119] Thus, in this implementation, the controller 71 is located on the secondary side circuit of the transformer 70, and the simpler controller 72 on the primary side simply "obeys" the secondary side controller 71 by turning on the primary side MOSFET when the ZVS pulse is complete (and therefore when the voltage across the primary side MOSFET is zero).

[0120] D) ZVS flyback control scheme, where the main controller is located on the secondary side.

[0121] refer to Fig. 9 , shows another example of a flyback converter topology, including a control unit 91 on the secondary side of a transformer 90 and an indirect pulse detection mechanism unit 92 connected to a primary side control unit 93 .

[0122] The secondary side controller uses a pulse density modulation method to determine the switching frequency to control the output power. When a pulse is requested, the secondary side performs a ZVS pulse. The primary side control unit 93 detects the ZVS pulse through an "indirect pulse detection mechanism", performs the requested excitation pulse, and selects the turn-off current level by the received pulse density.

[0123] refer to Fig.10The switching voltage curve shown, different ZVS pulse marks can be used for pulse detection. In particular, the "indirect pulse detection mechanism" can be implemented on the primary side, including but not limited to one of the following mechanisms or technologies:

[0124] 1. Valley sensing performed directly on the drain terminal (Vdrain) of the primary side MOSFET or through an auxiliary winding. When the voltage drops to zero (or close to zero), the controller detects the ZVS generated on the secondary side.

[0125] 2. Same as point 1, with an additional filter mechanism configured to enable the deep valley sensor only after a high level is detected on the MOSFET Vdrain or through the auxiliary winding in order to avoid confusion of deep quasi-resonant valleys with forced ZVS pulses.

[0126] 3. Same as point 1, with an additional filter mechanism configured to enable the valley sensor only after a high dv / dt is detected on the MOSFET Vdrain or through the auxiliary winding and then a high level is detected.

[0127] 4. Same as point 1, with an additional filter mechanism configured to enable the valley sensor only after a high negative dv / dt is detected on the MOSFET Vdrain or through the auxiliary winding.

[0128] 5. Same as point 1, with an additional filter configured to blank out the time after the main power switch is turned off.

[0129] 6. Any combination of points 1, 2, 3, 4 and 5 above.

[0130] Signal coupling or communication link

[0131] The communication link between the primary and secondary sides of the transformer can be implemented in a variety of ways, for example:

[0132] Capacitive coupling, where the signal is transmitted via a capacitive interface. Capacitors can also provide safe insulation between the primary and secondary sides.

[0133] Parasitic capacitive coupling, where one or more signaling capacitors are replaced by parasitic capacitances between the primary winding and / or the auxiliary winding and / or the secondary winding of the power transformer.

[0134] • Inductive coupling, where a signal transformer consisting of two or more windings is used to transfer signals between the primary and secondary sides.

[0135] ·like Fig.11An integrated power and signal transformer is shown, wherein the signal winding can be wound on the power transformer to benefit from the benefits of a ferrite core based transformer without the need to use an additional core. Each signal winding can be implemented by two series windings that are wound on the core to be sensitive to the magnetic flux generated by the other signal winding and to cancel and reject the magnetic flux generated by the power winding, which would otherwise add noise to the signal.

[0136] Figure 12 to Figure 14 The inductive signal link implementation method of the above scheme in point A, point B and point C is also illustrated.

[0137] Hardware Configuration

[0138] like FIG. 15A to FIG. 15E As shown in the examples, a variety of circuit configurations can be used to implement the above control scheme.

[0139] Although the drawings presented in different parts of this document generally show general ground symbols for primary circuits, secondary circuits, and auxiliary circuits for illustrative purposes, the primary circuits, secondary circuits, and auxiliary circuits may not always share the same electrical ground, and the presented architectures may also be applied to isolated converters including independent circuits that do not share the same ground.

[0140] One or more additional MOSFETs (and / or any other electrical switches) are configured to connect / disconnect the auxiliary winding from the dedicated circuit or also to short-circuit the auxiliary winding. The auxiliary winding may be located on the primary side of the transformer (see Fig.15A and Fig. 15B ) or on the secondary side of the transformer (see Fig. 15C and Fig.15D ).

[0141] The secondary winding can be driven by a combination of the rectified signal and a signal configured to induce ZVS on the primary switch. Fig.15E As shown, OR logic gates are used to achieve signal combination.

[0142] The other winding (ie the winding for rectifying the auxiliary voltage) may also be driven by combining the rectified signal and a signal configured to induce ZVS on the main switch.

[0143] Additional control schemes are described in Section VI below and are described in Section VI below. Figure 71 to Figure 73 Example.

[0144] Flyback Converter with Regenerative Clamp

[0145] Fig.16 The proposed flyback architecture with regenerative clamping is shown. The architecture comprises a transformer including a primary winding, an auxiliary winding and a secondary winding.

[0146] The auxiliary winding is configured to have a high (almost ideal (K=1)) mutual coupling with the primary winding.

[0147] The primary winding (P1, P2) and the auxiliary winding (A1, A2) can be made of bifilar wire and divided into two asymmetric halves, for example NP1:NA1=1, NP2:NA2=1, NP1:NP2>1. The main primary has two halves in series, while the auxiliary primary has two halves in reverse series, thus resulting in a low voltage winding with a very high coupling coefficient with the main primary.

[0148] In this configuration:

[0149] The two primary sub-windings P1 and P2 form a flyback configuration with the secondary winding;

[0150] Auxiliary sub-winding with higher number of turns is in forward configuration with secondary winding;

[0151] An auxiliary sub-winding with a lower number of turns is used in a flyback configuration with the secondary winding;

[0152] Fig.17A A possible solution for such a five-winding configuration is shown in FIG.

[0153] Since the main primary winding and the auxiliary winding are configured to have a high coupling, the required clamping action on the primary side is performed by simply rectifying the voltage on the auxiliary primary winding. In this way, all energy that cannot be coupled to the secondary winding is simply recovered into the auxiliary capacitor C_aux.

[0154] The energy stored in the auxiliary capacitor C_aux can then be used to power the primary side logic and / or controller.

[0155] The anti-series configuration between A1 and A2 is intended to generate an auxiliary voltage that is approximately equal to the output voltage multiplied by the difference in the number of turns of the two auxiliary windings (NA1-NA2) and the turns ratio between the number of turns of the secondary winding NS1, so Vaux = Vout × (NAL-NA2) / NS1. The ratio NA1: NA2 can be selected according to the output voltage and the desired auxiliary voltage.

[0156] The rectifier switch M2 of the auxiliary circuit may be a diode, or a synchronously controlled switch, or a switch controlled by an ideal diode controller.

[0157] If a switch is used, the auxiliary circuit can do double duty, operating both as a regenerative clamp (as described in this section) and as a circuit that should force a ZVS pulse on the primary-side switch (as described in the Forced Primary ZVS section).

[0158] Implementation of two-strand or n-strand wire

[0159] Two or n-strand wires may be used for the primary and auxiliary windings to ensure high coupling.

[0160] "N-strand wire" refers to a wire obtained by pairing n individual wires. Each of the n individual wires can be implemented in a variety of ways, including but not limited to: single-strand / multi-strand wire; insulated / non-insulated wire strands; copper / other metal wire strands; Litz / standard wire; externally coated / uncoated wire, triple insulation / non-triple insulation wire coating.

[0161] Examples of primary and secondary pair implementations include:

[0162] Primary winding: Litz wire with external coating; Auxiliary winding: Single strand wire with external coating; the two coatings can be joined to provide a reliable mechanical pairing between the two windings;

[0163] ·like Fig. 17B As shown, primary winding: Litz wire composed of multiple individually insulated wire strands; auxiliary winding: single strand of indifferently insulated or non-insulated wire; the primary winding and auxiliary winding are grouped together and protected by an external triple insulation coating, thus providing safe insulation to the core and other windings of the transformer;

[0164] Primary winding: Litz wire consisting of multiple individually insulated wire strands; Auxiliary winding: Single strand of indifferently insulated or non-insulated wire; The primary winding and auxiliary winding are grouped together and coated with a simple non-triple insulation coating. Safe insulation between the primary and secondary sides of the converter is ensured, thus realizing a secondary winding with triple insulated wire;

[0165] Primary winding: standard (non-Litz) wire with external coating; Auxiliary winding: single strand wire without external coating; The primary and auxiliary windings are grouped together and protected by an external triple insulation coating, providing safe insulation to the core and other windings of the transformer.

[0166] Phase shift adjustment

[0167] refer to Figure 1 In the flyback scheme in Figure 1, standard control and phase-shift control are compared. Note that although the primary-side switch M1 is driven by the same signal in both cases, the output voltage is different: The phase-shift control technique is explained below.

[0168] Fig.18 The waveforms illustrating standard regulation are shown, wherein the rectifier switch M2 (see Figure 1 ) acts as an ideal diode, so that M2 turns on when the secondary winding will force current through the body diode of the switch, and turns off when the current approaches zero and is about to start flowing in the other direction.

[0169] Fig.192 shows waveforms illustrating phase shift regulation, where the secondary switch M2 (see Figure 1 ) is turned on, and turned off after the current changes sign. The more the turn-off leading edge is delayed from the current zero crossing, the more reactive energy is sent back into the transformer, thereby delivering less power to the load.

[0170] The technique can be implemented in a number of different ways, such as a secondary-side fast control unit coupled with an open-loop (unregulated) primary switch drive or a slow primary switch control loop. For "fast" or "slow" control, the converter's loop crossover frequency is referred to: Whereas the crossover frequency of a conventional converter is typically limited by the low-frequency pole introduced by optocoupler-based feedback, and is rarely greater than 5kHz, secondary-side regulation can overcome this limitation and achieve converter crossover frequencies as high as 10kHz or more.

[0171] Fig. 20 The implementation of phase shift regulation is shown, where the output voltage control loop is implemented on the secondary side. The secondary side rectifier switch M2 is driven by combining the following two signals using an OR logic gate:

[0172] a signal generated with a "standard" ideal diode or synchronous control method, i.e. a signal that is high during a specific amount of time that the current of the secondary switch flows between the source to drain terminals ("diode on"),

[0173] A control signal or a pulse signal or a pulse control signal whose positive leading edge corresponds to the negative leading edge of another signal and has a duration defined by a PI, PID or another controller. The control or pulse duration is then used for output voltage regulation, because the longer it is, the more energy will be reflected back to the primary side, thus resulting in a lower output voltage.

[0174] Auxiliary voltage generation

[0175] While the primary role of a power converter is to generate one or more AC or DC output voltages starting from an AC or DC input, the converter can also be configured to generate one or more low voltage rails to power the analog and digital portions of the control circuitry. These low voltage rails (usually low voltage and low power) are referred to as "auxiliary voltages".

[0176] The auxiliary voltage is usually generated due to one or more auxiliary windings connected to a dedicated circuit. The auxiliary winding can be connected to the other windings of the transformer in a forward configuration or a flyback configuration.

[0177] A flyback converter typically includes an auxiliary winding in a forward configuration with the secondary winding in order to generate an auxiliary voltage, wherein the auxiliary voltage is proportional to the converter output voltage. In the case of a converter with a variable output voltage (i.e., a USB power delivery AC / DC adapter providing a negotiable output voltage of 5V, 9V, 15V, 20V, 48V, etc.), the auxiliary voltage can assume a wide range of values ​​depending on the operating point of the converter. To obtain a fixed voltage, an inefficient linear regulator is required.

[0178] Fig.21 A solution using two auxiliary windings (L3 and L4, while L1 and L2 are primary and secondary windings respectively) is shown in order to improve the efficiency of the circuit at high and low output voltages.

[0179] Auxiliary windings L3 and L4 are in a forward configuration with the secondary winding L2. When the secondary winding L2 conducts current toward the output capacitor C1, both L3 and L4 replicate a voltage proportional to the output voltage.

[0180] In the case of high output voltage, L4 is able to generate an acceptable Vaux voltage, so M2 can shut L3 off from the circuit. Therefore, the L4 voltage is rectified to the auxiliary capacitor C2.

[0181] In the case of low output voltage, the voltage generated by L4 is insufficient, but the series connection of L3 and L4 can generate the correct voltage, and M2 is turned on. Therefore, the sum of the voltages of L3 and L4 is rectified into auxiliary capacitor C2.

[0182] A similar approach can be used with an auxiliary winding connected in a forward configuration with the primary winding: in this case, the dual winding approach (using both L3 and L4 in a forward configuration with L1) also provides an acceptable auxiliary voltage at different input voltages in an efficient manner.

[0183] Auxiliary voltage single winding solution (for transformer based converters)

[0184] Although the dual winding approach can be used to generate the auxiliary voltage in applications where the input and output voltages have a wide range, the single winding approach can also be used to provide a low cost solution.

[0185] The single winding approach can help reduce the cost of the transformer as well as reduce wasted space in the transformer winding area. In this case, the diameter of the wire can also be increased in the winding.

[0186] The single winding approach may use a switch (or MOSFET, BJT, etc.) to activate and deactivate the winding from the rectifier circuit. When the switch is off, no current flows in the circuit, so no power needs to be limited or dissipated.

[0187] Fig. 22 and Fig.23 An example of an auxiliary voltage circuit based on a rectifier that can be enabled or disabled by MOSFET M4 and the corresponding voltage graph are shown. The "enable" signal can be generated by an external controller or using dedicated circuitry.

[0188] Fig.23 An example of a closed loop solution is shown, where the "enable" signal is high when Vaux is greater than a threshold and vice versa.

[0189] Hysteresis can be present (provided by R11 and D2 in this example): setting higher hysteresis (small R11 value) will generate a lower frequency "enable" signal, resulting in larger output ripple. Therefore, in this configuration, M3 should neither switch at high frequency (as in a switching regulator) nor be driven in the saturation region (as in a linear regulator), but only enable or disable switching at low frequency.

[0190] Auxiliary voltage capacitive solutions (for switching and resonant circuits)

[0191] Due to the circuit connected to the hard-switching and / or soft-switching and / or resonant network, an auxiliary voltage can be obtained without the need for an auxiliary winding in the transformer. Therefore, the proposed method can be generally applied to transformer-based converters and transformerless converters.

[0192] Fig.24 and Fig.25 shows that VSW or VRES can be obtained from a switch or resonant network (e.g., an LLC converter, such as Fig.26 An example of a rectifier for extracting an auxiliary voltage is shown in FIG. During the positive leading edge of VSW, C4 charges until the voltage is equal to VSW-VD5 (current through D5 and C4), and during the negative leading edge, C4 discharges until VSW-VAUX_A-VD6 (current through C4 and D6), where VD5, VD6 are the forward voltages of diodes D5, D6. Diodes D5, D6 can be replaced by FETs to reduce turn-on losses.

[0193] To control the output voltage, one or more capacitors in parallel with D5 may be connected and / or disconnected. One or more switches (including but not limited to FETs (M1, M2)) may be opened / closed to connect the associated capacitors (C8, C10). The capacitors in parallel with D5 will generate parallel current paths during the VSW rising edge (current path in parallel with D5) and during the VSW falling edge (current path in parallel with D6), so the C4 charge / discharge capability will be reduced and it will deliver less current to the output.

[0194] Part II. Active Storage

[0195] A single magnetic AC / DC converter with PFC capability and improved efficiency is now described.

[0196] Auxiliary storage winding (flyback configuration)

[0197] refer to Fig.27A , a single magnetic AC / DC converter is provided including a transformer, the transformer including a primary winding L6, a secondary winding L8 and an auxiliary storage winding L1.

[0198] Note that the auxiliary storage winding (or simply auxiliary winding) described in this section must not be confused with the concept of an auxiliary winding used to generate an auxiliary voltage (a low-power voltage rail used to power control circuits).

[0199] The architecture is based on a flyback derived topology. Different switching operation modes are possible, such as quasi-resonant and induced ZVS drive.

[0200] The auxiliary side circuit 122 has several objectives, including but not limited to:

[0201] It allows the creation of parallel PFC circuits.

[0202] · It allows to control the output voltage.

[0203] • It allows ZVS turn-on of the primary switch or MOSFET 123 on the primary side circuit 120, because a ZVS pulse can be created that can discharge the drain of the primary MOSFET 123. We also refer to the primary MOSFET as M1. The primary side circuit can also be referred to as the main circuit.

[0204] Because the auxiliary circuit 122 is on the primary side with the primary circuit, no safety isolation is required. Therefore, driving and communication are easier and cost effective compared to other architectures. To achieve this feature, the auxiliary circuit includes a bidirectional switch, which includes two switches or MOSFETs 124 and 125 connected in reverse series. Alternatively, another bidirectional switch can be used. We also refer to the two MOSFETs of the auxiliary control unit as the first auxiliary MOSFET or M2 and the second auxiliary MOSFET or M3.

[0205] If the coupling between the primary winding L6 and the auxiliary winding L1 is very good (coupling factor k close to 1), energy can be stored which would otherwise be lost due to the leakage inductance between the primary and secondary side windings. In this case, a bifilar winding can be used to ensure very high coupling between the primary and auxiliary windings.

[0206] These different use cases can also be combined depending on the application requirements.

[0207] Depending on the required application and specifications, any turns ratio between the different windings can be used. Fig.27A , the turns ratio is as follows: between the primary winding and the secondary winding: Npri:Nsec=6.67, and between the primary winding and the auxiliary winding: Npri:Naux=l.

[0208] The choice of Npri:Naux=1 can be easily implemented using bifilar wire, thus ensuring a very low leakage inductance between the two windings.

[0209] Alternatively, use a three-strand wire (such as Fig.28A As shown, a main primary winding and two auxiliary windings connected in series) can allow Npri:Naux=2 to be achieved in order to increase the auxiliary voltage. Higher voltages are usually available for PFC to store energy in capacitors, thereby maximizing energy density. The individual wires that make up the bifilar or trifilar wires can be equal to each other (in terms of material, diameter, number of strands, insulation between strands, etc.).

[0210] Depending on the application, when Npri:Naux<1 is required (which means the main primary voltage is higher than the auxiliary voltage), the two-strand auxiliary winding can also be connected partly in series and partly in anti-series (see Fig.28B ) in order to achieve both a high coupling factor k (and therefore high efficiency) and a lower auxiliary winding inductance.

[0211] Converter Operation Phases

[0212] refer to Fig.29A , the circuit is analyzed in two different phases, namely the main phase or "MAINphase" and the auxiliary phase or "AUXphase", depending on the voltage level of the rectified input voltage "VBUS" compared to the threshold voltage "VTH". When the input voltage "VBUS" is higher than the predetermined threshold voltage "VTH", the converter operates in the "MAINphase"; when "VBUS" is lower than "VTH", the converter operates in the "AUXphase".

[0213] The value of "VTH" can be related to the energy absorbed by the load and the energy provided by the grid at each moment:

[0214] The converter operates in the “MAIN phase” when the rectified sinusoidal input voltage (VBUS) is high enough for the converter to deliver the full power requested by the output load from the primary side.

[0215] The converter operates in “AUX phase” when the input voltage (VBUS) is too low and the converter cannot deliver the full power requested by the output load from the primary side.

[0216] We will now describe how the converter works during two phases:

[0217] During the “MAINphase”, the primary power stage (L6-M1) both supplies power to the secondary stage (L8-M4-Rload) and simultaneously stores some additional energy in the auxiliary stage (L1-M2-M3-C1).

[0218] In particular

[0219] o The main power stage draws current from the mains like a PFC controller, thus ensuring a high power factor (close to 1),

[0220] o The auxiliary stage is controlled to absorb the energy difference between the energy requested by the load and the excess energy from the input,

[0221] oStoring excess energy in storage capacitor C1.

[0222] During the "AUXphase", the main power stage is switched off, so no energy is absorbed by the mains; the energy requested by the load is given entirely by the auxiliary stage, delivering energy previously stored in the storage capacitors.

[0223] In "MAINphase":

[0224] M1 is driven by a PFC controller to achieve unity power factor. As in a flyback converter, energy is stored in the transformer during the switch on-time (and will be rectified later by the secondary and / or auxiliary stages);

[0225] M4 is driven as an “ideal diode” (turned on when the secondary winding L8 will force current to flow from source to drain) so that the L8 voltage is rectified to the C6 output capacitor.

[0226] From a logical point of view, an ideal diode controlled switch can be considered as a diode, and the ideal diode drive can reduce the voltage drop across the switch, thus reducing the turn-on loss.

[0227] M2 and M3 are connected in reverse series so that their positions can be switched. Specifically:

[0228] оM2 is driven as an ideal diode (same comments as discussed for M4) to rectify the L1 voltage to the C1 storage capacitor.

[0229] оM3 is driven to direct power from the primary side to the secondary side and / or storage capacitor.

[0230] When M3 is off, the auxiliary winding remains floating and no energy is rectified from it. Therefore, the input energy from the main power stage is fully delivered to the load.

[0231] When M3 is on, the input energy is shared between the secondary stage (load) and the auxiliary stage (storage).

[0232] Therefore, the M3 duty cycle can be used to regulate the output voltage: a higher duty cycle will keep the auxiliary stage enabled longer, resulting in a lower output voltage and a higher storage voltage.

[0233] exist Fig.30 The electrical signals during the "MAINphase" are shown in the graph provided in FIG.

[0234] In "AUXphase":

[0235] • M1 is off. From a logical point of view, the primary winding L6 plays no relevant role in the power transfer phase.

[0236] M2 is driven to provide regulated output power. In effect, the coupling between the auxiliary winding L1 and the secondary winding L8 behaves like a forward converter, where the storage capacitor is the power source and M2 and L1 are the excitation elements that send power to the rectifier composed of L8, M4 and C6.

[0237] Freewheeling of the energy stored in the parasitic leakage inductance of the L1 - L8 forward transformer is accomplished through M1 due to its embedded diode (or any equivalent source-to-drain turn-on mechanism).

[0238] M3 is always on so that M2 is never disabled, or it can be driven with the same M2 drive signal.

[0239] Fig.31 A graph of the electrical signal during the "AUXphase" is shown.

[0240] Explanation of Control

[0241] One goal of an AC / DC converter is to ensure constant power is delivered to the load (usually the load is supplied with a constant voltage or constant current) while absorbing energy sinusoidally to ensure a high power factor. Traditionally, this result is achieved using a PFC converter in series with an isolation converter.

[0242] The proposed implementation is able to achieve the same goal with a single converter.

[0243] Considering the power balance among the three networks, we have:

[0244] P IN (t) = P AUX (t)+P OUT (t)

[0245] Under the assumption that the load draws constant power, we have:

[0246] P IN (t) = P AUX (t)+P OUT

[0247] To implement a simple PFC, the controller on the main power stage (M1) absorbs the voltage that is proportional to the input line voltage (f line The sine wave at ) is proportional to the input power, so rearranging the terms of the previous equation, we have:

[0248] P AUX (t) = P IN (t)-P OUT

[0249] In other words, the controllers on the auxiliary stages (M2, M3) will be controlled by P OUT Given a constant offset absorption with P IN (t) is proportional to the power. Fig.29A The phase and power signals of the converter for two different control methods are clearly depicted:

[0250] Control method A( Fig.29A )

[0251] оWhen V BUS (t)≥V TH When the converter works in "MAIN phase",

[0252] During this phase, P IN (t)≥P OUT ; At this stage, following the previous equation, P AUX Absorption of (t) and P IN (t) minus P OUT proportional;

[0253] оWhen V BUS (t)≥V TH When the converter works in "AUX phase",

[0254] During this phase, P IN (t) = 0; following the previous equation, we have:

[0255] 0=P AUX (t)+P OUT →P AUX (t)=-P OUT , the negative sign means that power is supplied and power is not absorbed.

[0256] Control method B( Fig.29B )

[0257] оWhen VBUS (t)≥V TH When the converter works in "MAIN phase",

[0258] During this phase, P IN (t)≥P OUT ; At this stage, following the previous equation, P AUX Absorption of (t) and P IN (t) minus P OUT proportional;

[0259] оWhen V BUS (t)≥V TH The converter works in mixed mode, between "MAINphase" and "AUXphase".

[0260] Switching. During two sub-phases:

[0261] - Subphase “MAINphase”: The main power stage draws low (0 <P IN (t) <P OUT ) amount of power and transmits it to the auxiliary stage and / or secondary stage.

[0262] - Subphase “AUXphase”: The auxiliary stage transfers power to the secondary side.

[0263] Alternative loop control technologies

[0264] As long as two control loops must be closed (the input current control loop for power factor and the output voltage control loop for output regulation), and the driving of both the primary and the auxiliary stage may have an impact on the absorbed and delivered power, two different control approaches can be followed:

[0265] • As already described, one possible control method is to drive the primary side MOSFET in order to ensure PFC, and drive the auxiliary MOSFET in order to absorb excess energy during the primary phase (thus controlling the output voltage).

[0266] An alternative approach is to drive the primary-side MOSFET to control the output voltage and drive the auxiliary MOSFET to ensure PFC control.

[0267] Compared to standard PFC solutions, e.g. based on a boost PFC followed by an isolated DC / DC stage, this circuit has several advantages, including but not limited to:

[0268] The auxiliary stage can be modeled as a PFC in parallel with the main primary-to-secondary isolated flyback converter. In contrast, a standard PFC is usually in series with the main isolated converter.

[0269] When the PFC is connected in series, the global efficiency is given by the efficiency of the PFC multiplied by the efficiency of the main converter.

[0270] In contrast, this circuit is able to achieve higher efficiency because, for example:

[0271] o Most of the energy is transferred directly from the input to the output, just as if it were a single-stage (no PFC) converter.

[0272] oOnly the energy difference between output and input passes through the PFC auxiliary winding.

[0273] o The auxiliary stage operates at high voltage (hence low current and high efficiency).

[0274] The auxiliary winding and the primary winding have very high coupling, resulting in low leakage inductance and low losses due to the freewheeling of the leakage inductance current, further improving efficiency.

[0275] We now describe some possible alternatives to the above architecture.

[0276] Auxiliary storage winding (forward configuration)

[0277] The auxiliary winding can be connected to the primary winding in a forward configuration ( Fig.27B ).in this case:

[0278] During the primary phase, the auxiliary side stores energy in the storage element, acts as the secondary side of a forward converter, and the secondary winding acts as a secondary side standard flyback.

[0279] • During the auxiliary phase, the auxiliary stage is driven like the primary side of a flyback converter (the switch is turned on to transfer energy from the storage capacitor to the transformer), and the secondary stage simply rectifies the power as a conventional flyback rectifier would.

[0280] Batteries or supercapacitors as storage elements

[0281] refer to Fig.32 , illustrates a single-stage AC / DC converter, wherein the storage element 201 is a battery pack including one or more battery cells and / or supercapacitors. Advantages of using a battery pack as a storage element include improved efficiency, reduced size of the storage element, and reduced voltage ripple on the storage element due to the greater capacity of the battery compared to capacitors.

[0282] Auxiliary Winding and Forced ZVS

[0283] The described shunt converter can be combined with the modified flyback described in Part I. Fig.33 A possible implementation is shown, where the auxiliary switch is driven by the logical OR of two signals:

[0284] The ZVS pulse can be set to force depletion of the parasitic capacitance of the primary-side switch drain, allowing it to be turned on at ZVS.

[0285] • Active storage control signals are used to enable or disable the auxiliary circuits in both MAINphase and AUXphase to store or withdraw power in or to the storage capacitors.

[0286] Thus, any winding of the converter (including but not limited to a parallel storage auxiliary winding) can be driven so as to force a deep voltage valley at the primary side switch, allowing it to be turned on under ZVS conditions or close to ZVS conditions.

[0287] Part III. Active Shunt Filters

[0288] Secondary-side storage element

[0289] Typical architectures for less than 75W input AC-DC converters usually include an isolated power converter, which is optionally connected to an output converter.

[0290] A typical architecture of an AC-DC converter above 75W input with high power factor also includes a PFC stage, which is positioned before the isolated power converter in order to deliver more power.

[0291] refer to Fig.34 , an implementation of the present invention is an AC-DC converter that includes an energy storage element on the secondary side of the converter. The storage element is implemented in various technologies, including but not limited to batteries and / or supercapacitors.

[0292] In the case of <75W input converters, the key advantages of this topology include but are not limited to the following:

[0293] The ability to provide high levels of output power (>75W) for a period of time determined by the state of charge (SOC) of the storage element without being forced to introduce a PFC stage: this makes it possible to limit the power drawn from the mains to a value below 75W and to provide all the additional power delivered to the load from the energy stored in the storage element on the secondary side. If the energy stored in the storage element is higher than the difference between the output power and the input power multiplied by the time integral of the efficiency of the converter, then based on the principle that when the load requires less energy, more energy is drawn on average, and when the device has a higher peak power, the stored energy is used, PFC can be avoided, ensuring the same performance of the device with PFC.

[0294] • The ability to provide output power for a period of time determined by the state of charge (SOC) of the storage element even when no AC input is present (ie, mobile power functionality).

[0295] A cheaper isolated power converter, as it can be designed for average output power instead of peak output power. In fact, the isolated power converter only needs to deliver the average output power to the secondary side, while the load power peaks can be handled on the secondary side thanks to the storage element, which is able to provide additional power when needed.

[0296] In the case of >75W input converters, the key advantages of this topology include but are not limited to the following:

[0297] • The ability to provide output power for a period of time determined by the state of charge (SOC) of the storage element even when there is no AC input (mobile power function).

[0298] A cheaper and very simple isolated power converter designed to achieve high power factor, thus eliminating the need for an additional PFC stage.

[0299] A cheaper isolated power converter, since it can be designed for average output power rather than peak output power.

[0300] Use Case Example - Converter without PFC

[0301] To charge the 1OOWh battery of a 16-inch MacBook Pro, the following adapters can be used:

[0302] A regular 96W Apple power adapter (including PFC), such as Fig.35 As shown;

[0303] The proposed power adapter without PFC, which consists of an isolated power converter with a nominal continuous output power of 70W, includes an integrated 18.5Wh / 5000mAh lithium battery, such as Fig.36 Note:

[0304] - Input power is limited to less than 75W, so PFC regulations do not have to be followed.

[0305] - The battery provides additional power to speed up charging of the device delivering the maximum power required by the device.

[0306] - When the output power required by the device reduces the input power to less than 75W, the available additional input power is used to charge the battery.

[0307] - Since the PFC circuit is completely removed, the overall efficiency is higher.

[0308] The proposed power adapter without PFC has the same size as the 96W adapter or even smaller, charges the device in a similar amount of time. In addition, the overall cost of the adapter is reduced, and even when not plugged into the AC mains, it essentially behaves like a small 5000mAh portable power bank.

[0309] There are many alternatives to the proposed power adapter without PFC, such as a power adapter including a larger battery.

[0310] Insulation PFC

[0311] refer to Fig.37 , presents an AC / DC converter for providing several output voltages. The AC / DC converter comprises a bridge rectifier for rectifying an AC input voltage, a single-stage isolated PFC for providing power factor correction, a storage element connected in parallel with the PFC, and several DC to DC converters providing multiple output voltages (Out1, Out2, ..., Outn).

[0312] The storage element may consist of one or more capacitors and / or a battery comprising one or more battery cells and / or supercapacitors.

[0313] The main idea is to remove the stages in series in order to improve efficiency. Because PFC is specifically configured as an isolated circuit, the number of stages in series is reduced. In contrast, Fig.38 The conventional circuit in uses a non-isolated PFC, an isolation stage, and a DC / DC converter. The conventional circuit includes more components and more series stages, so the efficiency is lower.

[0314] Fig.37 The architecture presented in allows both reducing the number of stages in series and achieving high efficiency levels.

[0315] By simply changing the control loop (specifically controlling the input current instead of the output voltage), isolated PFC can be implemented using any available isolated converter.

[0316] This architecture can use low voltage storage capacitors on the secondary side, which can be much larger (in both capacitance and physical size) than the storage capacitors operating at high voltage in traditional solutions (E=1 / 2C*V^2).

[0317] The energy that must be stored is always a function of the maximum output power and the requested hold-up time. In fact, when the input voltage is missing, the converter should supply the load for a certain amount of time (the hold-up time). This can be achieved by retrieving the energy previously stored in the storage capacitor. Of course, a longer hold-up time will require a larger energy reservoir.

[0318] Moreover, for a fixed DC output power, the AC input power of the converter is fixed (and has the same average value), so the power ripple in the storage capacitor is also fixed. A lower storage capacitor voltage will then require a higher ripple current on the storage capacitor. A larger ripple current means a larger voltage ripple and higher losses in the equivalent series resistance (ESR) of the capacitor.

[0319] Even though lower voltage capacitors may offer higher capacitance density and lower ESR compared to higher voltage capacitors, the energy density will generally be lower and ohmic losses will generally be higher due to the higher current.

[0320] The choice of storage capacitor voltage can depend on several factors:

[0321] Maximize energy density.

[0322] - A higher storage voltage would be preferred. Whenever the storage is on the secondary side and can therefore be accessed by the end user (ie in the case of a handheld appliance), the required safety standards must be followed.

[0323] - The maximum voltage will then probably be chosen so as not to overcome the extra low voltage (ELV) safety level.

[0324] Minimize voltage drops on subsequent stages.

[0325] -The voltage should be high enough to ensure the minimum voltage required by the subsequent stage.

[0326] - Let us assume, for example, Fig.37 The output DC / DC is a step-down converter, which should generate 20V, 15V

[0327] and an output voltage of 12V, and they all require an input voltage equal to the output voltage +3V. In this case, the storage voltage must be selected to be equal to or higher than 23V.

[0328] Various architectures for implementing isolated PFC are now described.

[0329] Other single-stage isolated PFC architectures are currently available. However, due to the low voltage storage, they are usually quite large. In contrast, the number of components of the architecture presented below has been greatly reduced.

[0330] Any flyback converter (hard-switched, active clamped, quasi-resonant or other variations) or forward converter may be used, as well as LLC, LCC or asymmetric flyback converters.

[0331] Likewise, a resonant architecture (also called "Egg class" because it has a similar operating principle to a modified Class E amplifier) ​​may be used, as proposed in patent application No. PCT / IB2019 / 057523. These kinds of architectures are based on a primary side switch for providing and suppressing a current path between the input voltage and the primary side inductor, and a rectifier on the secondary side. The primary side inductor may be weakly coupled to the secondary side inductor. Power is transferred to the secondary side by magnetic and / or capacitive coupling. When the primary switch is turned off, the primary inductor resonates with the primary side parasitic or discrete capacitance, allowing the next primary side switch to be turned on to be in a ZVS or quasi-ZVS condition.

[0332] refer to Fig.39 , shows an isolated PFC implemented using an “Egg-like” architecture including magnetic coupling.

[0333] refer to Fig.40 , shows an isolated PFC implemented using an "Egg-like" architecture including capacitive coupling.

[0334] Fig.41 Representation Implementation Fig.39 An alternative architecture of an isolated PFC converter: Here, the "Egg-like" primary switch is replaced by a pair of switches connected in reverse series. The effect of this replacement is to allow a bridgeless primary side, where the switch can be turned on to provide a current path between the input voltage and the primary winding, and can be turned off to disable the current path. As long as the AC input voltage is positive during a half cycle and negative during the other half cycle, when the switch is turned off, one of the two reverse series embedded body diodes will be in direct polarization and the other will be in indirect polarization. Therefore, the two reverse series switches allow AC input bridgeless operation.

[0335] Rectifiers can be half-wave or full-wave, such as single switch, push-pull, voltage doubler, and current doubler rectifiers.

[0336] An interleaved version of the converter can also be implemented using one or more additional primary-side branches, each of which comprises a primary winding and two series switches. Each additional primary winding can be independently configured with the first primary winding in a flyback or forward configuration.

[0337] Many other architectures can be used to create an isolated PFC, such as but not limited to:

[0338] • "Egg-like" architectures, which include capacitive coupling or inductive coupling.

[0339] • The “QuarEgg” architecture, which is described in Section I.

[0340] Class E architecture.

[0341] Non-inverting buck-boost converter.

[0342] • Isolation converters, which are described in Section IV.

[0343] Non-Inverting Buck-Boost Converter (Optionally Isolation)

[0344] refer to Fig.42 , a non-inverting buck-boost converter is provided. The converter is based on a Cuk converter, in which the Cuk storage capacitor is divided into two storage capacitors C2 and C3, and the node at the junction between the storage capacitor and the DC load is inverted (by twisting the wires) so that power is transferred from the DC voltage source to the DC load in a non-inverting manner.

[0345] M1 can be driven in PWM or similar mode. When it is on, it charges energy in L1. When it is off, L1 pushes current through the capacitive barrier to the secondary side. M3 acts as a diode: it turns on when C2 current flows to the secondary, creating a path towards the upper (positive) node of C4.

[0346] C1 and C2 divide the circuit into two subcircuits: the primary side and the secondary side.

[0347] The secondary side ground may be referenced to any node including, but not limited to, the C4 low side node (negative node) or the M3 source node (in order to drive M3 with a low side driver).

[0348] It is easy to notice that the converter is bidirectional: by simply driving M3 (using PWM or similar mode) and driving M1 as an ideal diode, power can be withdrawn from C4 and rectified by the primary side.

[0349] Compared to a conventional non-inverting buck-boost made with 2 stages (boost and buck stages) and 4 MOSFETs (2 high-side MOSFETs and 2 low-side MOSFETs), the presented architecture is able to achieve substantially similar performance with only 2 low-side MOSFETs.

[0350] The converter may optionally be isolated or non-isolated: in the second case, any node on the secondary side may be connected directly or through one or more components and / or circuits to any node on the primary side, for example so as to share the same ground.

[0351] The converter may include a double isolation barrier so that the primary side can be connected to the mains or other hazardous voltage rail and the secondary side may be an extra-low voltage (ELV) rail accessible to the user according to safety regulations.

[0352] Fig.43A circuit diagram of an AC / DC converter is shown, which includes an isolated PFC for providing power factor correction, a storage element in parallel with the PFC, and a non-inverting buck-boost converter providing an output voltage to a load.

[0353] Fig.44 Another circuit diagram is shown including several non-inverting buck-boost converters in parallel providing multiple independent output voltages.

[0354] Fig.45 A multi-output AC / DC converter implemented with an isolated buck-boost is shown, with a buck-boost followed by a DC / DC converter for each output rail.

[0355] Fig.46 A multi-output AC / DC converter implemented with an isolated PFC converter (i.e., isolated buck-boost) is shown, where the main output is generated by simply filtering the output voltage of the PFC, while the other outputs are generated by dedicated DC / DC converters (i.e., non-inverting buck-boost).

[0356] Parallel Converter Architecture

[0357] Due to the non-constant power absorption from the input, the output of the PFC is typically present in a storage element (ie, one or more capacitors) that is subject to a high voltage ripple.

[0358] refer to Fig.47 , instead of adding a second converter in series (as in conventional solutions), we now add a converter in parallel with the PFC output capacitor (for simplicity we indicate this as “in parallel with the PFC”).

[0359] A shunt converter is a bidirectional converter that includes a power storage device and it mainly operates in two modes:

[0360] -When the instantaneous PFC output power is greater than the power requested by the load, the parallel converter stores the excess power in the parallel storage ( Fig.48 positive P PAR values ​​in ).

[0361] -When the instantaneous PFC output power is less than the power requested by the load, the parallel converter withdraws the required power from the parallel storage and delivers it to the load ( Fig.48 negative P PAR values ​​in ).

[0362] Advantages include but are not limited to:

[0363] The average energy goes directly from input to output with a single insulation stage, thus having an efficiency that can be as high as 97%-98%.

[0364] • The ripple energy (needed to ensure the PFC effect) is handled by a shunt reservoir which acts as a shunt filter capable of removing the voltage ripple, thus reducing the need for a large LC filter on the output.

[0365] This means that the current in this parallel converter is much smaller than in a standard DC-DC converter placed in series, so the efficiency can be higher (or smaller devices can be used to achieve the same efficiency).

[0366] Most of the energy (at whatever voltage) is stored in the parallel storage capacitor, so it is stored in a very efficient way because the storage is done at a voltage that may be different from the output voltage. This is also another way to further reduce the current, thus improving efficiency. Therefore, very small storage capacitors can be used compared to the low voltage storage required by other isolated PFC implementations.

[0367] There are several different parallel storage converters that can be used. Some examples are listed below.

[0368] As an example, Fig.49 A non-isolated DC-DC bidirectional converter is shown. This architecture can be easily implemented at low cost. The parallel solution achieves a much smaller converter compared to the same circuit placed in series because the current is only the ripple current (i.e., the main current flows directly to the load). When energy is absorbed and stored, the circuit can be driven as a boost converter. When energy is delivered from the storage to the output, the circuit can be driven as a buck converter.

[0369] Fig.50 An "Egg-like" resonant capacitor circuit is shown, which functions in a similar manner to a Class E amplifier. Resonance is obtained between L1, L2 and C in order to obtain ZVS (and optionally ZCS operation). The circuit acts as an isolated non-inverting buck-boost. Fig.49 Compared to the circuit shown, this has 2 low-side MOSFETs (easier to drive).

[0370] Fig.51 and Fig.52 An "Egg-like" parallel storage comprising weakly coupled inductors is shown, wherein the mutual coupling k between the primary and secondary inductors is less than 1. The two inductors are configured to have mutual coupling and leakage inductance and provide a galvanic isolation barrier between the input terminals and the storage capacitor. Fig.51 and Fig.52 A flyback-like and forward-like configuration between coupled inductors are shown respectively.

[0371] Weak coupling between inductors is added to reduce peak voltages on active devices. Alternatively, a single magnetic component (sometimes a transformer and 2 inductors at the same time) can be used.

[0372] Fig.42 The bidirectional dual FET buck-boost converter shown can be used simply to store energy into and retrieve energy from storage capacitor C4.

[0373] Finally, if Fig.53 As shown, a bidirectional flyback can also be used. This small parallel flyback can be used in a very compact implementation because it consists of very small magnetic components, two low current MOSFETs and a storage capacitor. The characteristic of using this flyback is that critical conduction mode can be achieved, which leads to ZVS operation. Moreover, DCM can be achieved, which leads to ZCS operation.

[0374] Primary-side shunt converter

[0375] Another feature of the shunt converter architecture is that the shunt converter can be placed on the secondary side ( Fig.47 ) or primary side ( Fig.54 ).

[0376] The primary side shunt converter architecture benefits from all the advantages of the secondary side shunt converter architecture while allowing it to overcome the maximum voltage limitations of the storage elements. For example, while the secondary side storage capacitor may be limited to a maximum of 50V due to extra low voltage (ELV) safety levels, the primary side storage capacitor will not be affected by this limitation.

[0377] Part IV. Isolation Converters

[0378] Bridgeless converters and forward converters have been used. However, they are uncommon because they require many additional components and increase the stress on the active components compared to a flyback converter.

[0379] 4.1 Isolation Converter Topology

[0380] An isolation converter comprising a weakly coupled transformer including a primary winding and a secondary winding arranged in a forward configuration is now described. Fig.55 and Fig.56 The proposed improved architecture is shown in , which relates to an isolated converter (including PFC function and isolated regulator, or just isolated regulator, or isolated PFC) with a storage element C2 located on the secondary side circuit and a storage element C10 located on the primary side. The transformer includes a primary winding L2 and a secondary winding L3 arranged in a forward configuration.

[0381] It can be used as follows but not limited to:

[0382] Insulation PFC

[0383] ·Isolated converters with single or multiple outputs, with or without PFC.

[0384] • Using storage on the secondary side of the battery, high voltage storage on the primary side.

[0385] The primary side circuit is a bridgeless circuit with M1 and M2 (at 50Hz) acting as diodes. By removing two diodes compared to a standard circuit including a bridge, the power loss is halved (as two diodes are required compared to four diodes). Of course, M1 and M2 can be replaced with standard diodes. Also, a standard diode bridge can be used for low current converters where the performance difference compared to a bridgeless solution is low.

[0386] The architecture is bridgeless to increase power efficiency and reduce bill of materials. Therefore:

[0387] The drain of the upper switch (ie, the drain of the upper MOSFET) is connected to the second terminal of the input source through a diode, wherein the anode of the diode is connected to the drain of the upper MOSFET.

[0388] The source of the lower switch (ie the source of the lower MOSFET) is connected to the second terminal of the input voltage source via a diode, wherein the cathode of the diode is connected to the source of the switch.

[0389] A MOSFET driven as an ideal diode can also be used to replace the diode and further improve efficiency.

[0390] The secondary side rectification circuit can be configured as Fig.55 The voltage doubler circuit shown or Fig.56 The full bridge circuit shown.

[0391] On the primary side, M3 and M4 are fast switching MOSFETs with high switching frequency (eg, 1 MHz or 500 KHz). A capacitor C10 on the primary side circuit is connected in parallel with the switching branch including M3 and M4.

[0392] The two inductors L2 and L3 are arranged on the same core and have a mutual coupling k less than 1. In the examples provided in the following section, k is selected to be equal to about 0.8 to 0.95. Therefore, the transformer including the primary side winding L2 and the secondary side winding L3 is not an ideal transformer designed intentionally. The two inductors L2 and L3 are also arranged in a forward configuration so that the current flowing in L2 has the same direction.

[0393] The proposed isolation converter provides many important advantages, such as but not limited to:

[0394] The forward configuration of the transformer minimizes the amount of magnetic energy that needs to be stored, thereby reducing the physical size of the transformer. Compared to a standard forward converter, the proposed architecture does not require an auxiliary reset winding nor a reset diode, thereby reducing the number of components and simplifying the architecture. Moreover, compared to a standard forward converter, the architecture is zero voltage switching, thereby significantly improving the efficiency of the converter.

[0395] L2 and L3 are weakly coupled. Therefore, although most of the energy is delivered to the load (similar to a standard forward converter), a small amount of energy is stored in L2 because k < L. This energy is used to ensure zero voltage switching transitions in the primary side MOSFET.

[0396] In the following description, a positive half-wave of a sinusoidal AC input from the grid is considered (50-60 Hz 90-260 VAC). During this half-wave, M1 is on and M2 is on.

[0397] In Phase 1 ( Fig.57 ), the primary side switch M4 is turned on. Since L2 and L3 have windings of the same polarity (forward mode), energy is transferred to the secondary side and rectified by D1 (in the case of a full-bridge rectifier, it is rectified by D1 and D4). At the same time, because the coupling between L2 and L3 is below 1, a small amount of energy is stored in L2 (similar to the charging phase of a boost converter). The longer the switch is turned on, the more energy is transferred to the load and stored in L2.

[0398] When switch M4 is turned off ( Fig.58 ), L2 acts as a current generator (because a small amount of energy is stored in L2). In this phase, the primary side circuit acts as a boost converter, which discharges L2 and charges C10 through switch M3, which is driven as a diode (similar to the diode of a boost converter). As a result, the voltage on C10 rises to a voltage higher than the grid voltage, and the current in L2 gradually decreases to OA. In addition and at the same time, in phase 2, energy is still transferred to the secondary side due to the coupling between L2 and L3, while D1 is still turned on.

[0399] The voltage at C10 can be determined or selected based on the mutual coupling of the inductors. The lower the coupling, the higher the voltage on C10 will be because more energy is stored in L2 during phase 1 ( Fig.58 ). Moreover, the converter can be designed to ensure that after the initial transient, the voltage at C10 is almost constant and above the grid, acting as a storage element, or the voltage at C10 can be highly variable, oscillating from a minimum value to a maximum value.

[0400] When L2 is fully discharged, switch M3 remains on ( Fig.59) (This is the difference between the proposed converter and the boost converter). Therefore, the current is reversed in L3 (phase 3). Therefore, there is no need to reset the diode as described above. In this phase, the energy still passes through diode D2 (in the case of a full-bridge rectifier, through D2 and D3, in Fig.56 (in) to the load.

[0401] When switch M3 is turned off, the current in L2 is still not zero and flows through M4 ( Fig.60 ) flows to the grid. Therefore, the parasitic capacitance of M4 is fully discharged and the voltage on the drain of M4 drops to 0V, thereby ensuring zero voltage switching operation.

[0402] When the voltage on M4 is 0V, a new switching cycle can begin.

[0403] When the AC input reverses (negative input half-wave), the same cycle occurs, with M2 replacing M1, and M3 and M4 driven in a complementary manner to that described above ( Figure 61 to Figure 64 ).

[0404] 4.2 Bridgeless Isolated Converter for Isolated PFC

[0405] The proposed converter can be used as an isolated PFC, as Fig.65 shown.

[0406] Energy can be stored on the secondary side:

[0407] At the output capacitor of the secondary side rectifier

[0408] At a battery or supercapacitor as the output of the secondary side rectifier.

[0409] Energy can be stored at high voltage on the primary side of the C10 high voltage capacitor. The lower the coupling between L2 and L3, the higher the energy stored on C10. If the converter is used as a PFC, another DC / DC converter (or multiple DC / DC converters) in series may be required to power each load in order to easily achieve PFC and output load regulation. However, it is also possible to implement a single-stage solution using one degree of freedom (i.e., Ton of M4) to control the input current and thus achieve power factor correction, and another degree of freedom (i.e., Toff of M3) to control the output voltage

[0410] Additional degrees of freedom can also be added without increasing the number of active devices. In particular, the delay in the turn-off instant of the secondary-side FETs D1 and D2 can be used to reduce the ratio between the active energy delivered to the load and the reactive energy in the converter, thereby regulating the output voltage very quickly and efficiently, avoiding additional converters in series.

[0411] 4.3 Bridgeless Isolation Converter as a PFC-Free Converter

[0412] When PFC is not required, Fig.56 The degree of freedom of the converter in can be used, for example, to ensure output voltage / current regulation without the need for an additional DC / DC converter in series. Of course, in this case the input current is not in phase with the input voltage.

[0413] In both configurations (with or without PFC), the converter has several advantages, such as one or more of the following:

[0414] Compared to standard high-power converters with PFC (usually implemented with PFC+LLC+DC / DC converter or PFC+flyback converter), there are only 1 or 2 series stages, which improves efficiency.

[0415] The circuit has better performance at light loads than the standard LLC-based circuit.

[0416] The size of the main magnetic components is much smaller than that of a flyback converter (similar to a standard forward converter).

[0417] The circuit has a reduced number of components compared to a standard forward converter.

[0418] Compared to other bridgeless architectures, the circuit has a smaller number of components.

[0419] The circuit is zero voltage switching, resulting in very high efficiency.

[0420] The circuit does not resonate like an LLC or Class E converter, so light load efficiency is much higher.

[0421] 4.4 Batteries or supercapacitors as storage elements

[0422] When batteries or supercapacitors are used as storage elements on the secondary side, there are some significant advantages compared to standard capacitors:

[0423] The energy density in batteries (J / cm^3) is much higher than standard capacitors. This means that the same amount of energy can be stored in a much smaller size, significantly reducing the size of the converter.

[0424] If the size of the battery is large enough (i.e., consider a 3.7V lithium battery, greater than a few thousand mah - i.e., 10,000 mah), the converter will function as both an AC / DC converter and a power bank, creating a hybrid device that saves size and cost compared to 2 separate accessories (AC / DC adapter + power bank) or an accessory with internally integrated standard AC / DC circuitry + standard power bank circuitry.

[0425] 4.5 Primary-side C10 capacitor used as storage element

[0426] Therefore, by reducing the mutual coupling, for example to a mutual coupling k of about 0.5, less energy will be stored on the secondary side and in turn more voltage will be stored on the storage element C10 on the primary side. In this case, there are some advantages compared to storing energy on the secondary side:

[0427] • This method has the advantage of high voltage energy storage (hence the storage capacitance is reduced since the energy follows the E=1 / 2*C*V^2 rule). This results in a reduced size of the storage capacitor compared to secondary side storage.

[0428] Another advantage of this storage is that the same high voltage C10 capacitor can be used to store energy at high voltage, regardless of the input AC voltage, compared to a regular adapter without PFC. In contrast, in a standard adapter the input capacitor is very inefficient, as it has to resist the high voltage of the EU grid (hence low efficiency in terms of F / cm^3), and at the same time has to have a large capacitance and low resistance to store energy at the low voltage and higher current when connected to the US grid (hence the input capacitor is very bulky). Instead, using C10 as a storage element means that it will be regulated as the output of a standard boost converter, thus storing energy at high voltage in a very efficient way, regardless of the input voltage (similar to a standard boost PFC - but with only 1 or 2 series stages instead of 3).

[0429] 4.6 Light load conditions

[0430] When the load increases, the duty cycle increases. Conversely, for light load conditions, the duty cycle decreases.

[0431] When light loads occur, there may be a problem of over-reducing the duty cycle of M1. Typically, controlling the duty cycle for light load conditions is very complex or very expensive because it requires the use of expensive timers.

[0432] The proposed solution for reducing the duty cycle is to turn off the high-side MOSFET M2 on the primary side when the current in the transmitting coil is 0 A and the voltage in the capacitor is at its maximum (at the moment before the current reverses from the capacitor to the input source).

[0433] The system can then remain off for a long period of time and then restart under ZVS conditions when a new cycle is required.

[0434] Benefits of this solution include:

[0435] ·High efficiency is achieved.

[0436] ZVS is achieved even at light load conditions. In comparison, this is not possible with standard burst mode controllers.

[0437] ·Zero current condition is also achieved.

[0438] The off time can be varied in a continuous manner.

[0439] Alternatively, this may also be applied to other non-isolated topologies with the load coupled directly in parallel to C10.

[0440] 4.7 Surge diode

[0441] Depending on the technology used to implement the electronic switch, the topology may embed a body diode (eg, silicon FET) or any other mechanism that allows current to flow from source to drain even with low drive signals (ie, gallium nitride FET).

[0442] When a DC or AC voltage is first applied to the input of a circuit, the body diode can provide a current path from the input voltage to the initially discharged capacitor. The capacitor can then begin to charge rapidly at a very high current, which in turn can overload the switch. To protect the switch, surge diodes are added to the circuit in order to carry the surge current that could otherwise damage the switch.

[0443] Several solutions are proposed: in case of AC input, both FETs have to be protected, while in case of DC input, only one switch has to be protected since the other switch does not provide a capacitor charging current path.

[0444] To protect the low-side FET, the anode of the diode must be connected to the source of the FET and the cathode can be connected to one of the two terminals of the primary winding ( Fig.66A and Fig.66B ).

[0445] To protect the high side or upper MOSFET, the cathode of the diode must be connected to the drain of the FET and the anode can be connected to one of the two terminals of the primary side winding ( Fig.65 A and Fig.65 C).

[0446] 4.8 Clamping diode

[0447] During startup, light load conditions, reversible and irreversible fault conditions, or for other reasons, the high frequency switching FET can be turned off for an indeterminate time (up to several seconds). In addition, if the FET exhibits an embedded body diode or similar behavior, the body diode behaves like a voltage doubler rectifier to the AC input voltage. In this case, the voltage on the capacitor will be equal to twice the input voltage.

[0448] In many countries the upper tolerance on a 230VAC nominal mains is about 265VAC, which means a peak voltage of 373V, and twice the peak would be 747V.

[0449] If both the FET and the output capacitor can sustain this voltage alone, no additional protection is needed. If this is not the case, some voltage clamps (such as Zener diodes, transient voltage suppressors, or MOVs) may be needed.

[0450] A single clamping diode can be connected in parallel with the half-bridge ( Fig.66D , option “c”), or two clamping diodes can clamp the voltage at each FET, with the same options described for the inrush current limiting diodes ( Fig.66D , options “a” and “b”).

[0451] Part V. Simplified AC / DC

[0452] Fig.67 A conventional block diagram of a typical architecture for a <75W input AC-DC converter is shown. The architecture includes a primary-side ASIC controller, a feedback device (usually an opto-isolator), a rectifier, some feedback logic (usually with a shunt regulator), and an optional output controller to support charging protocols such as power delivery (PD) or quick charging (QC). As shown, a typical architecture can typically consist of five integrated circuits, not counting the power switches. These components may easily add up to 40% of the BOM cost.

[0453] refer to Fig.68 , a block diagram of a simplified AC / DC converter is provided. The secondary side circuit is configured to operate at low voltage and includes an ASIC (application specific integrated circuit) controller. The primary side circuit includes a high voltage ASIC with integrated switches. Simple primary side logic is embedded on one or more primary side switches DIE, forming a single high voltage IC (i.e., made of silicon, GaN or SiC).

[0454] Compared to conventional architectures, the proposed simplified AC / DC converter eliminates the need to send feedback signals to the primary side controller. The primary side circuit is simple, and all control logic is located in a single IC on the secondary side. Optionally, the secondary side controller can also include support for charging algorithms such as PD (power delivery) or QC (fast charging) or other proprietary charging algorithms.

[0455] Advantageously, the proposed architecture can significantly reduce the IC cost in AC / DC power adapters and battery chargers, as well as the overall cost.

[0456] Additional optional features include, but are not limited to:

[0457] Depending on the application requirements in terms of cost and efficiency, the primary side HV IC can be implemented with silicon or wide bandgap semiconductor materials (including but not limited to GaN, SiC, GaAs).

[0458] • The primary side HV IC is equipped with an internal HV startup system with an internal (or external) HV startup switch that can provide stable power to the primary side even before the converter has started. The corresponding optional features are described in the following paragraphs.

[0459] The communication between the primary side ASIC and the secondary side ASIC is digital. It can be performed with the help of but not limited to the following:

[0460] - Capacitive interface (modulation or baseband communication).

[0461] -Digital Opto-isolators.

[0462] -Integrated power and signal transformers.

[0463] -Proximity antenna.

[0464] -Signal transformer.

[0465] • The secondary side ASIC may include support for protocols (eg, PD, QC, or other protocols).

[0466] The secondary side IC can include a control scheme capable of inducing primary side ZVS commutation from the secondary side, with many possible HW configurations, as described in Part I. This can be done by appropriately driving synchronous rectifiers or by auxiliary MOSFETs that can be placed on the auxiliary winding on the primary or secondary side.

[0467] The secondary side IC can actuate “fine” output voltage or current control by processing the turn-off delay (phase-shift control) of the secondary side rectifier, thus reflecting some of the excess energy back to the primary side in a non-dissipative manner, as described in Part I.

[0468] As described in Part I, auxiliary voltage generation can be achieved.

[0469] The primary side IC includes a rectifying circuit for rectifying the auxiliary winding voltage to generate the auxiliary voltage.

[0470] • The primary side IC includes a DC / DC converter, which is used to generate an auxiliary voltage from the input rail or from another rail.

[0471] The primary side IC includes current sensing capability for the power switch to enable current control and overcurrent protection. The current sensing mechanism can be implemented with various technologies, including but not limited to: low-side shunt current sensing, high-side shunt current sensing, senseFET current sensing, current sensing transformer, etc.

[0472] • The primary side IC may include one or more additional switches, for example, it may include two switches in a half-bridge configuration.

[0473] The primary side IC may include one or more switching gate drivers.

[0474] The system architecture can be applied to a variety of power topologies including but not limited to: flyback and flyback variants (QR flyback, active clamp flyback, ZVS induced flyback), LLC / LCC / other half-bridge or full-bridge based resonant converters or asymmetric half-bridge flyback (AHBF).

[0475] The system architecture can be easily applied to both PFC-free and PFC-based architectures, possibly with the addition of a battery on the secondary or auxiliary branch, as described in Section III.

[0476] Technology for high voltage starting

[0477] The high voltage startup system can be implemented with a circuit for charging the auxiliary power capacitor on the primary side during startup, thereby draining current from the main high voltage input rail. It can also be triggered when the auxiliary voltage drops below a safe level to ensure that the control circuit is powered also in abnormal situations.

[0478] The circuit can be based on an electronic switch, such as a BJT, MOSFET (Si or SiC), or GaN HEMT. The switch can be enhancement mode or even depletion mode so that it is turned on by default during startup. GaN devices are convenient because they are naturally depletion mode.

[0479] During operation, auxiliary power is generated using various mechanisms, including but not limited to: an auxiliary winding on a transformer, an auxiliary switching power supply that may be integrated into the primary side HV IC.

[0480] Figures 69 to 70 An example of a high voltage startup circuit and the corresponding waveforms are shown. At startup, M1 (depletion mode) turns on and charges C1 with a constant current determined by R1 and the input voltage. out When the voltage at is high enough to start the power supply, the C1 voltage can be kept charged by different mechanisms (auxiliary switching power supply, auxiliary winding on the transformer, etc.), represented by a universal current source II, and the "HVS stop" signal can be used to stop the current from the high voltage source.

[0481] The circuit is retriggerable: if an event during normal operation causes the auxiliary voltage (V out ) drops, the signal “HVS Stop” can be released to re-enable the current path between the input rail and C1 in order to compensate for the voltage drop.

[0482] The primary side HV IC can be equipped with a simple quasi-open loop startup process. When the main secondary side controller is still shut down due to insufficient secondary side energy, the primary side HV IC starts switching to regulate the output voltage to a safe value in a quasi-open loop mode in order to trigger the secondary side controller to start. During this phase, feedback information about the output voltage can be indirectly inferred from features extracted on the primary side (e.g., the voltage on the auxiliary winding or the back reflection of the output voltage).

[0483] With this configuration, the secondary-side ASIC controller controls the converter as soon as power is applied. The secondary-side controller is able to measure all the information required to perform good-quality converter control, including synchronous rectifier drive, accurate voltage sensing, over-current protection, etc.

[0484] Section VI. Additional Features of Flyback Converters

[0485] We now describe additional features that can be implemented with any of the flyback converter features described in Section I above.

[0486] ZVS control scheme using the primary controller on the secondary side

[0487] As previously in Fig. 9 As shown, the flyback converter topology may include a control unit on the secondary side. FIG. 15A to FIG. 15E Different control schemes are also presented.

[0488] Fig.15E An example is provided in which a secondary winding is driven by combining a rectified signal and a signal configured to cause ZVS on a primary switch. The combination of signals is achieved using an OR logic gate. Alternatively, the OR logic gate may be implemented using a different device or circuit.

[0489] The improvements described in this section relate to how to implement the combination of a rectified signal and a signal configured to induce ZVS on the primary switch (ZVS_SEC or ZVS pulse).

[0490] 1) ZVS pulse and SYNC_RECT pulse from two parallel MOSFETs

[0491] like Fig.71As shown, an implementation is provided, wherein the control unit is located on the secondary side of the transformer. The transformer has a primary side winding (PRI) and a secondary side winding (SEC). The primary side switch (M1) is located on the primary side of the transformer. Two secondary side switches (M6, M2) are located on the secondary side of the transformer.

[0492] The control circuit generates signals for driving two switches or MOSFETs (M6, M2). The control unit generates a rectifier signal (SYNC_RECT) and a signal (ZVS_SEC) or "ZVS pulse" configured to cause a ZVS pulse on the primary switch M1. The two switches or MOSFETs (M6, M2) are connected in parallel and have different characteristics from each other.

[0493] As described above, at the end of the switching cycle, before turning on the primary side switch: the control unit is configured to generate a ZVS pulse in the secondary side winding via the secondary side switch so that the parasitic capacitor of the primary side switch is discharged and thus the primary side switch is turned on under ZVS conditions or close to ZVS conditions.

[0494] In particular, when the voltage at the drain terminal of the primary side switch becomes zero or close to zero, the primary side switch is then turned on under the ZVS condition.

[0495] The two switches (M6, M2) may have different characteristics based on the signal used to drive each switch. The secondary side switch or MOSFET (M6) is driven by a ZVS pulse while the other secondary side switch or MOSFET (M2) is driven by a rectified signal.

[0496] As an example, one of the switches may be a power MOSFET and the other switch may be a low power MOSFET.

[0497] As an example, a ZVS pulse switch or MOSFET (M6) driven by a ZVS pulse can have a much larger resistance than a rectifier switch or MOSFET (M2) driven by a rectifier signal, and a much smaller capacitance (i.e., gate and source capacitance) than a rectifier switch or MOSFET (M2) driving the rectifier signal.

[0498] Therefore, the rectifying MOSFET (M2) may be a power MOSFET capable of supporting high current conduction.

[0499] The ZVS pulse MOSFET (M6) may be a low power MOSFET and less power is required to drive the ZVS pulse MOSFET. Advantageously, M6 therefore requires less energy to turn on or off compared to other switches such as power MOSFETs.

[0500] Fig.71A flyback converter architecture is shown, including a secondary side rectifier switch driven by a rectifier signal and a secondary side ZVS pulse switch configured to induce ZVS or "ZVS pulse" on the primary switch. In the implementation shown, the rectifier and ZVS pulse switches are coupled to the low voltage side / secondary side of the transformer. Alternatively, the ZVS pulse switch can also be coupled to the medium voltage or low voltage winding of the transformer located on the primary or secondary side of the converter.

[0501] Some components of the control unit may also be located on the primary side, such as a microcontroller.

[0502] Alternatively, the rectifier switch M2 may also be a diode, or a synchronously controlled switch, or a switch controlled by an ideal diode controller.

[0503] This technique is logically equivalent to reference Fig.15E Advantageously, an imbalance between switches, such as an imbalance between drain-source on-resistances (Rds,on) of the switches, allows for a flyback converter with improved efficiency.

[0504] M2 is a MOSFET with low drain-source on-resistance, ranging from 1.5 milliohms to 50 milliohms. This is because M2 conducts substantially all of the output current. On the other hand, M2 may have high gate capacitance (1-10nF) and output capacitance (0.05nF-2nF). Therefore, the rectifier switch M2 may therefore be "energy expensive" in terms of switching on / off.

[0505] M6 is a medium to high drain-source on-resistance MOSFET, ranging between 100 milliohms and 5 ohms, so it has low gate capacitance (0.03-lnF) and output capacitance (10-50pF). Therefore, M6 can be a ZVS actuated MOSFET, which is "energetically cheap" to operate or switch on / off. The static losses are contained (despite the high resistance) because the currents involved in the ZVS pulse are typically low, such as less than or equal to 0.5Arms (amperes root mean square).

[0506] The advantage of this configuration is improved efficiency at medium and light loads. Compared to other flyback converters, using the second MOSFET M6 to actuate the ZVS pulse costs much less energy, improving efficiency, especially at medium and light loads.

[0507] An advantage is that improved efficiency and ZVS are also achieved at or near zero load conditions.

[0508] A light load condition may refer to a load less than 10% of the rated output power. A medium load condition may refer to a load less than or equal to 50% of the rated output power.

[0509] Current flyback converters typically achieve high efficiency at higher loads, while the efficiency drops significantly at light load conditions. In comparison, the described architecture achieves high efficiency or substantially similar efficiency for any type of load condition. This has a significant impact on consumer electronics that often operate at zero or near zero load conditions. Therefore, the described architecture is not only cost-effective, but also provides a greener solution.

[0510] 2) ZVS pulse as an extension of SYNC_RECT pulse

[0511] Now, another implementation similar to 1) above is described, such as Fig.71 As described above, however, the second MOSFET M6 is not used. Alternatively, M6 may also be deactivated or even not present at all (e.g. FIG. 15A to FIG. 15D of the program).

[0512] In this implementation, a single switch, such as M2, can be used and the signals (mainly the rectified signal and the ZVS pulse) are combined internally by the microcontroller. In this case, the ZVS pulse is added to the rectified signal using, for example, an embedded digital timer, such as Fig.72 The example waveform is shown in Figure 1. In this example, the ZVS pulse starts when the rectified signal ends.

[0513] An example of inducing ZVS on the primary side switch is to simply use the main secondary MOSFET (M2) by extending its on-time outside the synchronous rectification window that allows current reversal (conceptually "attaching" a ZVS pulse to the end of the rectification pulse).

[0514] Some advantages include, but are not limited to: a) using a less active switch (no ZVS MOSFET); b) achieving smaller drive losses (since only one MOSFET needs to be driven on the secondary side instead of two).

[0515] Therefore, at medium or low loads, such as loads equal to or less than 50% of the rated output power, the switching frequency may need to be higher.

[0516] Fig.73 Graphs showing the voltage at the gate of the primary side switch, the voltage at the gate of the secondary side switch, the corresponding switch voltage vsw and the current at the secondary side.

[0517] In the above two implementations, the duration of the ZVS pulse can be predetermined or predefined by the user. zvs Refers to the approximate pulse width of the ZVS pulse.

[0518] To achieve zero voltage switching of the primary-side switch, a certain amount of energy is introduced into the transformer to essentially “clear” the drain node of the primary-side switch.

[0519] The system is then configured to achieve the peak current value (n*I zvs ), so that the corresponding primary peak current value (I zvs ) is sufficient to clear the primary node. The conditions to be met are as follows:

[0520]

[0521] therefore: Among them, V i Refers to the input voltage (or Fig.71 V4), V out Refers to the output voltage, L pri Refers to the inductance of the primary winding of the transformer, C eq Refers to the total equivalent drain-to-ground capacitance (C eq Not present Fig.71 ), and n refers to the transformer turns ratio between the primary winding and the secondary winding.

[0522] The equivalent total capacitance C eq Contributors may include: the total capacitance on the output side of the primary-side MOSFET or C oss , transformer winding capacitance and any other stray capacitance.

[0523] In order to reach the peak current I zvs , the necessary pulse T can be determined using the following formula zvs Duration:

[0524]

[0525] Therefore, in the formula, zvs Integrate the target value:

[0526]

[0527] As an example, if the input voltage V i is 300V and the output voltage V out is 15V, the flyback converter can be designed as the primary winding inductor L pri is equal to 400μH and the equivalent total capacitance C eq Basically equal to 30μF. Using the above equation, at the peak current I zvs For a case of approximately 106.8ms, the necessary pulse T zvs can be determined to be approximately 475ns.

[0528] Since the above calculation does not take into account the C oss The overall parasitic or nonlinear phenomenon, so when fine-tuning the pulse T zvs Some manual tuning may be necessary when the width is too small. Tuning can also be done automatically via a microcontroller.

[0529] 3) Combination of two technologies

[0530] The circuit scheme is the same as indicated above for example 1), where there are two MOSFETs (M2) and (M6) on the secondary side. Depending on the desired application, several combinations of the two configurations described above can be implemented.

[0531] As an example, to handle light loads, MOSFETs (M2) and (M6) may be driven according to Example 1; to handle medium and high load conditions, according to Example 2, MOSFET (M6) may be deactivated and only MOSFET (M2) may be driven.

[0532] Therefore, for lower load conditions, a MOSFET (M6) can be used to provide greater flexibility as to when the ZVS pulse is generated. This provides better frequency control, lowers the switching frequency, and reduces overall losses.

[0533] For higher load conditions, only one MOSFET can be used. This optimizes the total operating time of the transformer, ensuring that no idle time is introduced during the switching cycle with quasi-zero current flowing in the transformer. This in turn results in an overall reduction in transformer RMS current and losses.

[0534] Alternatively, the flyback converter can be configured to automatically detect the load condition and activate or deactivate the ZVSMOSFET (M6) according to the detected load condition. This can be done automatically by the control unit and can be implemented as a microcontroller or ASIC.

[0535] Appendix - Key Features

[0536] In this appendix, we list the key features as well as many optional features. The key features are organized using the same categories or core technologies as described in the previous sections. Note that any key feature of any category can be combined with one or more other features and any optional feature of any category. Any optional feature can be combined with one or more other optional features.

[0537] Part I. Flyback Converter

[0538] 1.1 Improved performance of flyback using a control unit with two different MOSFETs connected in parallel

[0539] We can summarize it as follows:

[0540] A flyback converter, comprising:

[0541] a) a transformer having a primary winding and a secondary winding;

[0542] b) a primary-side switch located on the primary side of the transformer;

[0543] c) two secondary side switches located on the secondary side of the transformer; wherein the two secondary side switches are connected in parallel and have different characteristics;

[0544] d) a control unit configured to generate a rectified signal and a zero voltage switching (ZVS) pulse and drive two secondary side switches; wherein one secondary side switch is driven by the rectified signal and the other secondary side switch is driven by the ZVS pulse;

[0545] And wherein, at the end of the switching cycle, before turning on the primary side switch: the control unit is configured to generate a ZVS pulse in the secondary side winding so that the parasitic capacitor of the primary side switch is discharged and thus the primary side switch is turned on under ZVS conditions or close to ZVS conditions.

[0546] A method of operating a flyback converter, the flyback converter comprising:

[0547] a) a transformer having a primary winding and a secondary winding;

[0548] b) a primary-side switch located on the primary side of the transformer;

[0549] c) two secondary side switches located on the secondary side of the transformer; wherein the two secondary side switches are connected in parallel and have different characteristics;

[0550] d) a control unit at the secondary side of the transformer; and wherein the control unit is configured to generate a rectified signal and a zero voltage switching (ZVS) pulse and drive two secondary side switches; wherein one secondary side switch is driven by the rectified signal and the other secondary side switch is driven by the ZVS pulse;

[0551] And wherein, at the end of the switching cycle, before turning on the primary side switch: the control unit is configured to generate a ZVS pulse in the secondary side winding so that the parasitic capacitor of the primary side switch is discharged and thus the primary side switch is turned on under ZVS conditions or close to ZVS conditions.

[0552] The advantage is that the efficiency of the flyback converter is improved at medium and light loads.

[0553] Another advantage is that the flyback converter provides fairly high efficiency at any load condition from zero load conditions to high load conditions.

[0554] Optional features:

[0555] • Selecting characteristics of the secondary-side switches based on the signals used to drive each secondary-side switch.

[0556] One secondary side switch is a high power MOSFET and the other secondary side switch is a low power MOSFET.

[0557] The secondary side switches are any combination of silicon MOSFETs, GaN or SiC transistors with different drain to source on-resistances. (This provides an imbalance between the parallel connected MOSFETs).

[0558] The first secondary side switch or MOSFET (M2) is configured as a power rectifier and is driven by the rectified signal.

[0559] The secondary side switch or MOSFET (M6) is driven by a ZVS pulse.

[0560] • The secondary side switch characteristics are determined such that the switch requires less energy to operate (and therefore also generates less heat).

[0561] • The first secondary side switch or MOSFET (M2) has a lower drain-source on-resistance than the second control unit switch or MOSFET (M6).

[0562] One of the secondary side switches has a drain-source on-resistance value in the range of 1.5 milliohms to 50 milliohms, and the other secondary side switch has a drain-source on-resistance value in the range of 100 milliohms to 5 ohms.

[0563] • The first secondary side switch or MOSFET (M2) has a higher gate to source capacitance than the second control unit switch or MOSFET (M6).

[0564] One secondary side switch has a gate to source capacitance value in the range of 1 nanofarad to 10 nanofarads and the other secondary side switch has a gate to source capacitance value in the range of 0.03 nanofarad to 1 nanofarad.

[0565] • The first secondary side switch or MOSFET (M2) has a higher output capacitance than the second control unit switch or MOSFET (M6).

[0566] One secondary side switch has an output capacitance value in the range of 0.05 nanofarads to 2 nanofarads, and the other secondary side switch has an output capacitance value in the range of 10 picofarads to 50 picofarads.

[0567] • The transformer is connected to the load. The secondary side switch (M6) is configured to be deactivated according to load conditions (eg medium load and high load).

[0568] When the load condition is above a predetermined threshold (eg, above 10% of the rated output power or 50% of the rated power), the secondary side switch is deactivated.

[0569] When the load condition is above a predetermined threshold (eg, above 10% of the rated output power or 50% of the rated power), the secondary side switch is automatically deactivated.

[0570] • When the secondary side switch (M6) is deactivated or turned off, the control unit is configured to digitally add a ZVS pulse to the rectified signal.

[0571] The control unit is located on the secondary side of the transformer.

[0572] The control unit is located on the primary side of the transformer.

[0573] The control unit comprises a first control subunit on the primary side and a second control subunit on the secondary side.

[0574] 1.2 Improved performance of flyback using a control unit with a MOSFET configured to drive a ZVS pulse

[0575] We can summarize it as follows:

[0576] A flyback converter, comprising:

[0577] a) a transformer having a primary winding and a secondary winding;

[0578] b) a primary side switch on the primary side of the transformer;

[0579] c) a secondary side switch on the secondary side of the transformer;

[0580] d) a control unit on the secondary side of the transformer;

[0581] And wherein the control unit is configured to digitally add a ZVS pulse to the rectified signal, and wherein the ZVS pulse is configured to discharge a parasitic capacitor of the primary side switch, thereby allowing the primary side switch to be turned on under a ZVS condition or close to a ZVS condition.

[0582] A method of operating a flyback converter, the flyback converter comprising:

[0583] a) a transformer having a primary winding and a secondary winding;

[0584] b) a primary side switch on the primary side of the transformer;

[0585] c) a secondary side switch on the secondary side of the transformer;

[0586] d) A control unit configured to digitally add a ZVS pulse to the rectified signal, and wherein the ZVS pulse is configured to discharge a parasitic capacitor of the primary side switch, thereby allowing the primary side switch to be turned on under a ZVS condition or close to a ZVS condition.

[0587] Optional features:

[0588] Determine the characteristics of the secondary-side switch, primarily the drain-source on-resistance, gate-to-source capacitor, or output capacitance, so that the secondary-side switch optimizes the total operating time of the transformer.

[0589] The secondary side switch has a source-drain on-resistance value ranging between 1.5 milliohms and 50 milliohms.

[0590] The secondary side switch has a gate capacitance value in the range of 1 nanofarad to 10 nanofarad.

[0591] The secondary switch has an output capacitance value in the range of 0.05 nanofarad to 2 nanofarad.

[0592] The duration of the ZVS pulse is configured to achieve a peak current value (I zvs ), causing the voltage at the drain of the primary-side switch to drop to zero or close to zero volts.

[0593] The duration of the ZVS pulse is calculated as a function of the input voltage, output voltage, inductance of the primary winding, equivalent drain-to-ground capacitance at the primary switch, and number of turns of the transformer winding.

[0594] ·ZVS pulse duration T zvs Determine using the following equation: Among them, V i Refers to the input voltage, V out Refers to the output voltage, L pri Refers to the inductance of the primary winding of the transformer, C eq is the total equivalent drain-to-ground capacitance at the primary-side switch, and n is the transformer turns ratio between the primary and secondary windings.

[0595] The control unit is located on the secondary side of the transformer.

[0596] The control unit is located on the primary side of the transformer.

[0597] The control unit comprises a first control subunit on the primary side and a second control subunit on the secondary side.

[0598] The advantage is the ability to cause a ZVS pulse by simply turning off the rectifier switch or MOSFET after a "standard controller" without the need for dedicated switches or MOSFETs and signals. This in turn results in a power converter with a cheaper BOM. Another advantage is that this configuration optimizes the overall operating time of the transformer.

[0599] The above-mentioned flyback converter may be implemented together with any one or more of the following features or sub-features.

[0600] 2.1 Improving flyback performance by forcing ZVS on the primary-side switch

[0601] Concept A - Method of generating secondary side pulses to force ZVS on the primary side switch

[0602] A method of operating a flyback converter,

[0603] The flyback converter includes:

[0604] A transformer having a primary side winding and a secondary side winding; a primary switch on the primary side of the transformer; a secondary switch on the secondary side of the transformer; and a control unit;

[0605] Methods include:

[0606] At the end of the switching cycle, before turning on the primary side switch: the control unit is configured to generate a zero voltage switching (ZVS) pulse in the secondary side winding so that the parasitic capacitor of the primary switch is discharged and thus the primary side switch is turned on under ZVS conditions or near ZVS conditions.

[0607] Concept B - A method of generating secondary side pulses to force ZVS on the primary side, wherein the secondary switch is turned on when a minimum voltage at the drain terminal of the secondary switch is detected.

[0608] A method of operating a flyback converter, the flyback converter comprising:

[0609] a transformer having a primary side winding and a secondary side winding; a primary switch on the primary side of the transformer; a secondary switch on the secondary side of the transformer; a primary side controller connected to the primary switch; and a control unit;

[0610] The method comprises:

[0611] At the end of the switching cycle, before turning on the primary side switch: the control unit is configured to generate a ZVS pulse in the secondary winding when a local minimum voltage at the drain terminal of the secondary side switch is detected, so that the parasitic capacitor of the primary switch is discharged, and thus the primary side switch is turned on under ZVS or near ZVS conditions.

[0612] Concept C - Phase Shift Regulation of Flyback Converter

[0613] A method of operating a flyback converter,

[0614] The flyback converter includes: (i) a transformer having a primary winding and a secondary winding; a primary switch connected in series with the primary side of the transformer; and a secondary switch connected in series with the secondary side of the transformer; (ii) a control unit; (iii) a synchronizer unit located on the secondary side of the transformer and including a rectifier or an ideal diode; and (iv) an output;

[0615] The method includes driving a secondary switch using a synchronous rectification signal and regulating power delivered to an output of a flyback converter by adjusting a duration of a pulse control signal.

[0616] Concept D - Methods of generating secondary side pulses or auxiliary side pulses to force ZVS on the primary side switch

[0617] The methods and related systems described in this section can also be applied to flyback converters that include an auxiliary winding. In this case, a ZVS pulse can be generated on the auxiliary winding itself in order to force the primary switch to turn on under ZVS or near ZVS conditions. We can summarize as follows:

[0618] A method of operating a flyback converter,

[0619] The flyback converter includes:

[0620] A transformer having a primary side winding, a secondary side winding and an auxiliary winding; a primary switch on the primary side of the transformer; a secondary switch on the secondary side of the transformer; an auxiliary switch on the auxiliary side; and a control unit;

[0621] The method comprises:

[0622] At the end of the switching cycle, before turning on the primary side switch: the control unit is configured to generate a ZVS pulse in the secondary winding or in the auxiliary winding so that the parasitic capacitor of the primary switch is discharged and thus the primary side switch is turned on under zero voltage switching conditions or close to ZVS conditions.

[0623] Generally applicable optional features:

[0624] The flyback converter is a quasi-resonant flyback.

[0625] • A ZVS pulse consists in switching on the secondary side switch or the auxiliary side switch for a predefined duration.

[0626] The ZVS pulse duration depends on converter parameters, such as input voltage or output power.

[0627] The predefined duration is smaller than a switching period or cycle of the converter, for example smaller than 10% of the switching period.

[0628] The ZVS pulse is configured to discharge the primary side parasitic capacitor until the voltage at the drain of the primary side switch drops to a predetermined minimum voltage, such as zero or near zero volts.

[0629] The parasitic capacitance of the primary switch is discharged to a value less than 50% of the input voltage of the converter.

[0630] Turn-on hard switching losses are reduced to almost zero or close to zero.

[0631] The control unit implements the control scheme at a fixed frequency.

[0632] The primary and secondary switches are MOSFETs.

[0633] The switches are GaN FETs.

[0634] The switch is SiC FET.

[0635] The switches are SiFETs.

[0636] • There is no communication link between the primary and secondary sides.

[0637] • There is a communication link between the primary side and the secondary side.

[0638] The communication link uses one or a combination of the following: capacitive link, inductive link, proximity antenna, integrated power and signal transformer.

[0639] The control unit is located on the primary side circuit.

[0640] The control unit is located on the secondary side circuit.

[0641] The control unit comprises a first control subunit on the primary side and a second control subunit on the secondary side.

[0642] The control unit includes a digital controller.

[0643] The converter comprises a synchronizer unit configured to detect an optimal moment to switch on the secondary switch.

[0644] The synchronizer unit is configured to synchronize the ZVS pulse with the secondary side drain valley.

[0645] The synchronizer unit on the secondary side is configured to synchronize the ZVS pulse to detect the secondary side drain valley when sensing the voltage on the secondary side.

[0646] The synchronizer unit side is configured to synchronize the ZVS pulse with the local peak of the primary side drain voltage.

[0647] The synchronizer unit is configured to synchronize the ZVS pulse with the auxiliary side drain voltage valley or local peak.

[0648] The secondary side switch is driven by combining two signals: a synchronous rectification signal and a pulse control signal.

[0649] The pulse control signal is configured to rise at the falling edge of the synchronous rectification signal.

[0650] When the synchronous rectification signal is high, the secondary switch conducts current from its source terminal to its drain terminal, transferring power from the transformer to the output capacitor, and when the pulse control signal is high, the switch conducts current from its drain terminal to its source terminal, reflecting power from the output capacitor to the transformer.

[0651] The secondary side rectifier is configured to control the secondary switch.

[0652] The secondary side switch is driven by combining the secondary rectification signal with the ZVS pulse signal and / or the pulse control signal.

[0653] The auxiliary side switch is driven by combining the secondary rectification signal with the ZVS pulse signal and / or the pulse control signal.

[0654] The combination of signals is implemented in hardware.

[0655] • The combination of signals is achieved by a digital control device (ie a microcontroller with an embedded digital timer).

[0656] The control unit is configured to send a ZVS request.

[0657] The control unit is configured to send a switch-on request to the primary-side switch.

[0658] The control unit is configured to send a pulse or a switch-on request to the primary side, wherein the parameters of the pulse define the primary side switch duty cycle.

[0659] The control unit is configured to send a pulse or a switch-on request to the primary side, wherein the parameters of the pulse define a current threshold at which the primary side switch must switch off.

[0660] • This method uses an indirect pulse detection technique, where the primary side switch is turned on after the ZVS pulse is detected.

[0661] The indirect pulse detection technology is implemented on the primary side circuit of the transformer.

[0662] Indirect pulse detection technique senses the primary switch drain voltage to detect deep valleys.

[0663] • Indirect pulse detection techniques sense the primary switch drain voltage to detect a voltage that is above a predefined threshold and maintained for a duration longer than the predefined threshold.

[0664] Indirect pulse detection technique senses the dv / dt slope of the primary switch drain voltage.

[0665] The primary side switch on time is calculated from the frequency of the ZVS pulse.

[0666] The control unit is configured to vary the frequency of the ZVS pulses.

[0667] The parasitic capacitance corresponds to the drain-to-source parasitic capacitance of the primary-side switch.

[0668] The control unit is proportional integral derivative (PID).

[0669] · The control unit is either digital or analog.

[0670] Concept E - Implementation of a flyback converter using any of the above concepts or sub-concepts

[0671] A flyback converter, comprising:

[0672] A transformer including a primary winding and a secondary winding;

[0673] an input port coupled to a voltage source and connected to a primary winding of the transformer;

[0674] a primary switch disposed between the primary winding of the transformer and ground;

[0675] The secondary switch is arranged in series between the secondary winding of the transformer and the output port.

[0676] The control unit is configured to turn on the secondary side switch using a ZVS pulse before turning on the primary side switch so as to discharge the parasitic capacitor of the primary side switch.

[0677] Optional features:

[0678] Flyback converter without PFC delivers up to 75W.

[0679] • A flyback converter with PFC typically delivers up to 100W-500W.

[0680] A flyback converter is used for USB power delivery.

[0681] 2.2 Improved Performance of Flyback Converter Using Auxiliary Winding

[0682] Concept A - Flyback converter with a bifilar winding between the primary and auxiliary windings.

[0683] A flyback converter, comprising:

[0684] (i) A transformer comprising a primary side winding, a secondary side winding and an auxiliary winding, wherein the auxiliary winding is configured to have a high (almost ideal (k=1)) mutual coupling with the primary side winding; and

[0685] (ii) Primary switches, secondary switches and auxiliary switches are located on the primary side, secondary side and auxiliary side of the transformer respectively; wherein two or n wires are used for the primary winding and the auxiliary winding to ensure high coupling.

[0686] Optional features:

[0687] There is zero or near zero leakage inductance between the primary and auxiliary windings.

[0688] The winding configuration of the auxiliary winding determines the auxiliary voltage at the auxiliary winding.

[0689] The primary winding consists of two series windings.

[0690] The auxiliary winding consists of two reverse series windings.

[0691] The auxiliary winding is partially wound in series and partially wound in anti-series with respect to the primary winding.

[0692] The wire of the primary winding is made of one or more individually insulated wire strands and is grouped together with the auxiliary winding.

[0693] The wire of the auxiliary winding is made of one or more individually insulated wire strands and is grouped together with the primary winding.

[0694] Primary and auxiliary windings are grouped together and protected by the same coating. The coating can provide triple insulation.

[0695] • The auxiliary winding is configured to ensure lower auxiliary inductance compared to the primary inductance (the reverse series inductance cancels the series inductance, so the difference between series and reverse series is used to define the resulting auxiliary inductance).

[0696] • The auxiliary winding is configured to ensure a lower auxiliary inductance compared to the primary inductance in order to obtain a low auxiliary voltage (recovered energy) useful for powering the converter.

[0697] The auxiliary winding is configured to discharge the parasitic capacitor of the primary side switch.

[0698] The flyback converter is configured to store the energy recovered by the auxiliary winding.

[0699] Using the auxiliary winding to discharge the parasitic capacitors of the primary-side switch forces ZVS on the primary side of the transformer to turn on the flyback converter.

[0700] The energy recovered by the auxiliary winding is used to power components of the converter, such as the controller or driver or any other peripheral device.

[0701] • The capacitor is used to store the energy recovered by the auxiliary winding (otherwise this energy has to be dissipated due to k<1 between the primary and secondary sides, which results in the leakage inductance on the primary side not being coupled to the secondary side).

[0702] · Dissipative clamping is avoided or reduced due to the recovered energy.

[0703] The parasitic capacitor is discharged at the end of the switching cycle before turning on the primary-side switch.

[0704] The parasitic capacitor is discharged until the voltage at the drain of the primary side switch drops to zero or close to zero volts.

[0705] • Hard switching of the switch (MOSFET) is avoided or reduced due to the parasitic capacitor being discharged before the primary side switch is turned on.

[0706] Concept B - Auxiliary voltage generation for transformer based converters

[0707] A method for generating an auxiliary voltage in a converter, the converter comprising: a transformer including a primary winding, a secondary winding and an auxiliary winding, wherein the auxiliary winding is connected to a rectifier circuit and an auxiliary switch,

[0708] The method comprises the step of generating an auxiliary voltage by enabling or disabling a rectification circuit using an auxiliary switch.

[0709] Optional features:

[0710] The converter does not require fixed input and / or output.

[0711] • The auxiliary winding is connected between the local ground and the anode terminal of the first diode.

[0712] the auxiliary switch is connected between the ground terminal and a node of the first inductor, and wherein the second node of the first inductor is connected to the cathode terminal of the first diode, the first capacitor is connected between the cathode terminals of the first diode and the second diode, the anode of the second diode is connected to the local ground, the second capacitor is connected to the local ground and to the auxiliary voltage rail, the second inductor is connected to the auxiliary voltage and the cathode terminal of the second diode,

[0713] The auxiliary circuit is coupled to a feedback circuit configured to enable / disable the switch when the auxiliary voltage is below or / above a certain threshold.

[0714] The converter includes an external linear regulator.

[0715] ·The auxiliary switch is driven by an analog circuit.

[0716] ·The auxiliary switch is driven by a digital controller.

[0717] Concept C - Auxiliary voltage generation for switching and resonant circuits

[0718] A method of generating an auxiliary voltage in a converter including an auxiliary voltage circuit, the method comprising: generating the auxiliary voltage from an input voltage at a switch or resonant node, wherein a capacitor is configured to charge during a positive leading edge of the input voltage and deliver current to the auxiliary voltage during a negative leading edge of the input voltage.

[0719] Optional features:

[0720] • The converter does not include magnetic components such as inductors and transformers.

[0721] ·Capacitors are connected directly to the switch or resonant node.

[0722] • The auxiliary voltage circuit comprises 1) a first diode connected between the local ground and a center node connected to the capacitor, and 2) a second diode connected between the center node and an output delivering the auxiliary voltage.

[0723] • One or more additional capacitors, each connected in series with the switch, are added in parallel with the first diode.

[0724] To regulate the output voltage, the control circuit enables or disables a switch in series with an additional capacitor.

[0725] Part II. Active Storage

[0726] Concept A: Magnetic Single-Stage PEC AC / DC Converter

[0727] A single-stage PFC AC / DC converter system comprises a transformer, the transformer comprising a primary winding, a secondary winding and an auxiliary winding, and wherein:

[0728] (i) The primary winding is coupled to the AC input voltage,

[0729] (ii) The secondary winding provides output voltage to the load,

[0730] (iii) the auxiliary side circuit is configured to store and release energy;

[0731] And wherein the system is configured to (a) regulate the output voltage or current so that the output voltage or current is substantially free of ripple, and (b) regulate the input current so that the input current is substantially in phase with the input voltage.

[0732] Concept B: Magnetic single-stage PFC AC / DC converter, where the primary side provides the PFC function and the auxiliary side provides the converter function.

[0733] A single-stage PFC AC / DC converter system comprises a transformer, the transformer comprising a primary winding, a secondary winding and an auxiliary winding, and wherein:

[0734] (i) The primary winding is coupled to the AC input voltage,

[0735] (ii) The secondary winding provides output voltage to the load,

[0736] (iii) the auxiliary side circuit is configured to store and release energy, wherein the auxiliary side circuit is configured to regulate the output voltage or current so that the output voltage or current is substantially free of ripple,

[0737] And wherein the primary side circuit is configured to regulate the input current so that the input current is substantially in phase with the input voltage.

[0738] Concept C: Magnetic single-stage PFC AC / DC converter, where the primary side provides the converter function and the auxiliary side provides the PFC function.

[0739] A single-stage PFC AC / DC converter system includes a transformer, the transformer including a primary winding, a secondary winding and an auxiliary winding, wherein:

[0740] (i) The primary winding is coupled to the AC input voltage,

[0741] (ii) The secondary winding provides output voltage to the load,

[0742] (iii) the auxiliary side circuit is configured to store and release energy, wherein the auxiliary side circuit is configured to regulate the input current so that the input current is substantially in phase with the input voltage,

[0743] And wherein the primary side circuit is configured to regulate the output voltage or current so that the output voltage or current is substantially free of ripple.

[0744] Concept D: Magnetic single-stage PFC AC / DC converter where the output voltage is regulated by sensing the output voltage

[0745] A single-stage PFC AC / DC converter system includes a transformer, the transformer including a primary winding, a secondary winding and an auxiliary winding, wherein:

[0746] The primary winding is coupled to the AC input voltage and the secondary winding provides the output voltage to the load.

[0747] And wherein, based on continuously sensing the input voltage and the output voltage: (a) the primary side or the auxiliary side of the transformer powers the secondary side of the transformer so that the output voltage or current is substantially free of ripple, and (b) the primary side powers the storage capacitor on the auxiliary side and the load on the secondary side so that the input voltage and the input current are substantially in phase.

[0748] Concept E: Active storage PFC using parallel storage capacitors

[0749] A single-stage PFC AC / DC converter system includes a transformer, the transformer including a primary winding, a secondary winding and an auxiliary winding, wherein:

[0750] (i) The primary winding is coupled to the AC input voltage,

[0751] (ii) the auxiliary winding is coupled to a storage capacitor,

[0752] (iii) The secondary winding provides output voltage to the load,

[0753] And wherein the storage capacitor is configured to (a) charge during a primary phase, wherein the primary side of the transformer powers the secondary side of the transformer, and (b) discharge during an auxiliary phase, wherein the auxiliary side of the transformer powers the secondary side of the transformer.

[0754] Concept F: Single-Stage PFC AC / DC Converter System with Zero Voltage Switching (as defined in Section I above)

[0755] Generally applicable optional features:

[0756] • There is no direct connection between the AC input voltage / power and the DC output voltage / power (thus providing an isolation barrier).

[0757] The primary side circuit includes a rectifier configured to rectify the AC input voltage.

[0758] The sensing unit on the primary side is configured to sense the rectified voltage and compare the rectified voltage with a threshold voltage.

[0759] • The method comprises the step of sensing an input current.

[0760] Auxiliary Winding Characteristics

[0761] The auxiliary winding is configured to have high mutual coupling with the primary winding.

[0762] • Two or n-strand wires are used for the primary and auxiliary windings to ensure high coupling.

[0763] The auxiliary winding may be wound partly in series and partly in anti-series with respect to the main winding in order to obtain a desired winding ratio between the main winding and the auxiliary winding (hence the desired voltage on the auxiliary winding being lower than the voltage on the main winding) while ensuring a very high coupling between the main winding and the auxiliary winding.

[0764] The auxiliary winding and the main winding may be wound with n-strand windings such that for every turn of the main winding there are n turns of the auxiliary winding in order to obtain a desired winding ratio between the main and auxiliary windings (hence a desired voltage on the auxiliary winding being higher than the voltage on the main winding) while ensuring a very high coupling between the main and auxiliary windings.

[0765] The auxiliary winding is configured to simultaneously achieve a high coupling factor k with the primary winding and a low auxiliary winding inductance in order to step down the voltage across the auxiliary winding.

[0766] • The auxiliary winding is configured to achieve both a high coupling factor k with the primary winding and a high auxiliary winding inductance in order to step up the voltage on the auxiliary winding.

[0767] ·The auxiliary winding is located on the primary side of the transformer.

[0768] · The auxiliary winding is located on the secondary side of the transformer.

[0769] The auxiliary winding and the primary winding are in a flyback configuration.

[0770] The auxiliary winding and the primary winding are in forward configuration.

[0771] Storage capacitor

[0772] Excess energy between the primary and secondary windings is stored by an auxiliary winding on the primary side of the transformer (the excess energy is the energy difference between the energy requested by the load and the excess energy absorbed by the system to ensure that the input current is in phase with the input voltage).

[0773] • Excess energy is the difference between the energy delivered by the system to the load and the energy absorbed by the system from the grid (AC input).

[0774] The auxiliary side circuit includes a storage (or bulk) capacitor.

[0775] The auxiliary side uses a storage capacitor to store excess energy.

[0776] The auxiliary side stores energy from the leakage inductance between the primary and secondary windings.

[0777] • The storage capacitor is charged during the primary phase and discharged during the auxiliary phase.

[0778] Primary side

[0779] A primary control unit coupled to the primary winding is configured to adjust a duty cycle of the primary side switch.

[0780] The primary control unit comprises a switch connected in series with the primary winding.

[0781] Secondary side

[0782] • A rectifier switch or diode is coupled to the secondary winding.

[0783] Auxiliary side

[0784] The auxiliary control unit includes a two-way switch.

[0785] An auxiliary control unit coupled to the auxiliary winding is configured to switch the bidirectional switch on and off.

[0786] The bidirectional switch includes two switches or MOSFETs connected in series in opposite directions. (We refer to the two MOSFETs of the auxiliary control unit as the first auxiliary MOSFET or M2 and the second auxiliary MOSFET or M3.)

[0787] Battery pack or supercapacitor

[0788] Auxiliary winding coupled to a battery pack or supercapacitor.

[0789] The secondary winding is coupled to a battery pack or supercapacitor.

[0790] Single-stage PFC AC / DC converter used as a combined mobile power supply and power adapter.

[0791] Main Stages

[0792] In the main stage, the primary side of the transformer supplies power to the secondary side of the transformer.

[0793] • During the main phase, the primary side of the transformer also supplies power to the auxiliary side of the transformer, thereby charging the storage capacitor.

[0794] Auxiliary Phase

[0795] During the auxiliary phase, the auxiliary side supplies power to the secondary side of the transformer.

[0796] • During the auxiliary phase, the storage capacitor is discharged to supply power to the secondary side.

[0797] Threshold voltage

[0798] When the rectified input voltage is below the threshold voltage, the converter operates in the main stage.

[0799] When the rectified input voltage is below the threshold voltage, the converter operates in the auxiliary phase or switches between the main phase and the auxiliary phase.

[0800] An optional feature of Concept B above, wherein the primary side provides the PFC function and the auxiliary side provides the voltage converter function.

[0801] Main Stages

[0802] The primary control unit adjusts the duty cycle during the main phase to ensure that the input current is in phase with the input voltage, thus acting as a PFC.

[0803] • During the main phase, M2 acts as a diode. This can be obtained by just keeping the MOSFET off or driving it as an ideal diode (switching on when current flows from source to drain).

[0804] During the main phase, M3 is driven to adjust the duty cycle and control the amount of energy stored in the storage capacitor based on the sensed output voltage (i.e., if the output voltage is above a predetermined output voltage, the storage capacitor charges - the storage capacitor is therefore configured to store any excess energy in order to regulate the output voltage - the higher the difference between the power absorbed by the load and the power absorbed by the converter, the higher the duty cycle of M3 in order to store more energy on the storage capacitor).

[0805] Auxiliary Phase

[0806] The primary control unit is switched off during the assistance phase.

[0807] • During the assist phase, M3 is on.

[0808] • During the auxiliary phase, M2 and M3 are driven with the same signal.

[0809] • During the auxiliary phase, M2 is driven with a duty cycle proportional to the amount of energy provided by the storage capacitor to the secondary side. Thus, during the auxiliary phase, the storage capacitor supplies energy to the load.

[0810] An optional feature of Concept C above wherein the primary side provides a voltage converter function and the auxiliary side provides a PFC function.

[0811] Main Stages

[0812] The primary control unit adjusts the duty cycle during the main phase in order to ensure that the output voltage or current is stable, acting as a voltage or current controller.

[0813] • During the main phase, M2 acts as a diode. This can be obtained by just keeping the MOSFET off or driving it as an ideal diode (switching on when current flows from source to drain).

[0814] • During the main phase, based on sensing the input voltage being in phase with the input voltage (hence, the auxiliary control device functions as a PFC), driving M3 adjusts the duty cycle to control the amount of energy stored in the storage capacitor.

[0815] Auxiliary Phase

[0816] The primary control unit is switched off during the assistance phase.

[0817] • During the assist phase, M3 is on.

[0818] • During the auxiliary phase, M2 and M3 are driven with the same signal.

[0819] • During the auxiliary phase, M2 is driven with a duty cycle proportional to the amount of energy provided by the storage capacitor to the secondary side. Thus, during the auxiliary phase, the storage capacitor supplies energy to the load.

[0820] Examples of advantages are, but are not limited to: Compared to standard PFC for similar requirements (input AC, output voltage or current, delivered power):

[0821] Higher efficiency (partly due to the reduction in average current in the PFC auxiliary circuit).

[0822] • The size of the storage capacitor is reduced (this is because with a normal converter, energy flows continuously from the input to the output, however here the amount of energy flowing through the capacitor is much smaller).

[0823] Cost reduction due to the use of inexpensive single magnetic flyback topology.

[0824] Improved safety because there is no direct connection between the main power supply and the output power supply.

[0825] Single-stage PFC converter provides a simple configuration with high efficiency.

[0826] Single-stage PFC acts as both PFC and regulator.

[0827] Usage Application

[0828] 【300W TV Panel Power Supply】, 110-230VAC input, 22V 200W primary output rail, 12V 100W secondary output rail. Each output rail is generated by a converter based on this architecture.

[0829] 150W power supply - general details provided, 110-230VAC input, 40V single output rail generated by a converter based on this architecture

[0830] Concept G: Single-stage AC / DC converter where the storage element is a battery pack or supercapacitor

[0831] A single-stage AC / DC converter system includes a transformer having a primary winding, a secondary winding, and an auxiliary winding, wherein the primary winding and the auxiliary winding are configured to have high mutual coupling,

[0832] And wherein the primary winding is coupled to an AC input voltage and the secondary winding is coupled to a battery pack or one or more supercapacitors and provides an output voltage to a load.

[0833] Optional features:

[0834] • A battery pack comprises a plurality of lithium-ion battery cells (advantages of using a battery pack as a storage element include increased efficiency and reduced size of the storage element and reduced ripple size as more energy can be stored).

[0835] The battery pack is connected to a DC / DC converter configured to regulate the output voltage at the load.

[0836] The system functions as a PFC (configured to (a) regulate the output voltage or current such that the output voltage or current has substantially no ripple, and (b) regulate the input current such that the input current is substantially in phase with the input voltage).

[0837] Single-stage AC / DC converter system used as a combined mobile power source and power adapter.

[0838] Single-stage AC / DC converter system implemented on a single chip.

[0839] The primary and secondary windings are configured to have low mutual coupling.

[0840] • The system is configured to implement ZVS or nearly ZVS conditions on the primary side.

[0841] Part III. Active Shunt Filters

[0842] Concept A: AC / DC converter including isolated PEC

[0843] An AC / DC converter for providing a plurality of output voltages, the AC / DC converter comprising:

[0844] (a) Single-stage isolated PFC, which is used to provide power factor correction;

[0845] (b) a storage element connected to the output of the PFC; and

[0846] (c) Multiple DC / DC converters providing multiple output voltages.

[0847] Optional features:

[0848] Eliminates the need to have an input storage capacitor (so energy can be absorbed sinusoidally).

[0849] The input bridge rectifier is placed before the isolated PFC stage.

[0850] The isolated PFC stage is bridgeless.

[0851] The AC / DC converter comprises a storage element consisting of one or more capacitors and / or supercapacitors and / or batteries.

[0852] Eliminates the need to have an LLC with an isolation barrier.

[0853] Eliminates the need for a flyback converter with an isolation barrier.

[0854] Transmit signals across the PFC isolation barrier.

[0855] The capacitor is a low voltage storage capacitor - <50V.

[0856] · When the required output voltage is lower than the storage voltage, a buck converter is used.

[0857] • Any converter may be used, such as flyback, forward, quasi-resonant, LLC or LCC converters, Egg class, Quar-Egg, E class or isolated converters as described in Section IV.

[0858] Select capacitors based on average voltage and ripple voltage.

[0859] · AC / DC converter is used as a combined power bank and power adapter.

[0860] The following optional concepts provide specific architectures that can be used to implement isolated PFC:

[0861] ·Isolated PFC is implemented using an Egg-like architecture and magnetic coupling;

[0862] Isolation PFC is implemented using an Egg-type architecture and capacitive coupling;

[0863] ·Isolated PFC is realized by bridgeless isolated PFC.

[0864] When implementing these architectures, the storage element can be a capacitor, supercapacitor, or battery pack.

[0865] Concept B: Idea of ​​a non-inverting buck-boost converter (optional isolation)

[0866] A method for transferring power from a DC voltage source to a DC load, wherein the converter is based on a Cuk converter, wherein the Cuk storage capacitor is split into two storage capacitors C1 and C3, and the node at the junction between the storage capacitor and the DC load is inverted (by twisting the wires) so that power is transferred from the DC voltage source to the DC load in a non-inverting manner.

[0867] Optional features:

[0868] • The converter can optionally be isolated or non-isolated.

[0869] ·Isolation converter provides safety insulation.

[0870] ·Isolated converter increases storage voltage.

[0871] The converter has no input voltage limitation.

[0872] The primary side circuit includes an input capacitor, a primary side inductor, and a primary switch. The secondary side circuit includes an output capacitor, a secondary inductor, and a secondary switch. The first insulating capacitor is connected to a common node between the primary side inductor and the primary circuit input capacitor and a common node between the secondary side switch and the secondary side inductor. The secondary insulating inductor is connected to a common node between the primary side switch and the primary side input capacitor and a common node between the secondary side switch and the secondary side output capacitor.

[0873] ·The converter is bidirectional.

[0874] Concept C: Single-stage AC / DC converter with parallel active energy storage

[0875] A single-stage AC / DC converter with a shunt active energy storage, wherein the converter includes an isolated PFC coupled to the active shunt storage, the active shunt storage including a control unit and a storage element, wherein the active shunt storage is configured to store and release energy to (a) regulate an output voltage or current such that the output voltage or current is substantially free of ripple, and (b) regulate an input current such that the input current is substantially in phase with the input voltage.

[0876] Optional features:

[0877] The storage element is made of one or more capacitors, batteries and / or supercapacitors.

[0878] Active shunt energy storage is placed on the primary side and connected to the isolated PFC input voltage rail.

[0879] Active shunt energy storage is placed on the secondary side and connected to the isolated PFC output voltage rail.

[0880] The following concepts (Concepts D through F) provide specific architectures that can be used to implement active parallel storage.

[0881] Concept D: Parallel storage with non-isolated DC-DC bidirectional converter

[0882] An active parallel storage device configured to act as a boost converter when the storage element is charged and as a buck converter when the storage element is releasing energy, or vice versa, to act as a buck converter when the storage element capacitor is charged and as a boost converter when the storage element capacitor is releasing energy

[0883] Optional features:

[0884] The active parallel storage circuit includes two switches.

[0885] Concept E: Parallel Storage with Resonant Capacitor Circuit

[0886] An active shunt reservoir is provided by a bidirectional circuit comprising two inductors, two low-side switches and a storage element, and wherein a galvanic isolation barrier is provided between an input terminal and a storage capacitor.

[0887] Optional features:

[0888] The galvanic isolation barrier is provided by one or more capacitors.

[0889] The circuit provides ZVS.

[0890] The control unit can be driven at very high frequencies.

[0891] The control unit includes two low-side switches.

[0892] Symmetrical circuits can provide energy transfer from rail to reservoir or from reservoir to rail.

[0893] ·Achieve bidirectional circuits by changing the drive of the switch.

[0894] Concept F: Parallel reservoirs with weak coupling between inductors

[0895] An active shunt reservoir provided by a bidirectional circuit comprising two inductors, two low-side switches and a storage element, wherein the two inductors are configured to have mutual coupling and leakage inductance, and wherein a galvanic isolation barrier is provided between an input terminal and the storage element.

[0896] Optional features:

[0897] The leakage inductance is configured to resonate with the switch parasitic capacitance.

[0898] Active shunt storage can be configured as a forward or flyback converter.

[0899] • The coupling between the inductors can be used to transfer energy to the reservoir.

[0900] · Two inductors are arranged on the same core.

[0901] Other architectures may be used to implement such an active shunt reservoir, such as a simple flyback converter (implementing ZVS or ZCS operation), a standard Cuk converter, or a modified Cuk converter as provided above.

[0902] Concept G - AC / DC including secondary side storage element

[0903] An AC / DC power converter system for receiving an input power supply voltage and for supplying power to at least one load, the system comprising:

[0904] (i) an isolated power converter connected to an input supply voltage; wherein the isolated power converter comprises a transformer having a primary winding and a secondary winding;

[0905] (ii) a storage element connected to the secondary side of the isolated power converter; and

[0906] (iii) A DC / DC converter connected to the storage element and configured to supply power to at least one load.

[0907] Optional features:

[0908] • The storage element comprises one or more batteries and / or supercapacitors.

[0909] AC / DC power converters operate efficiently over a wide range of power supply requirements.

[0910] The AC / DC power converter can have a peak input power of less than 75W.

[0911] The AC / DC power converter is capable of supplying a load greater than the input power multiplied by the converter efficiency, without exceeding the input power of 75W, so it is not necessary to use a PFC stage between the input voltage and the isolated power converter.

[0912] The AC / DC power converter is configured to provide a high level of output power (greater than 75W multiplied by the efficiency of the converter) for a period of time determined by the state of charge (SOC) of the storage element, thereby compensating for the 75W input power limit required to avoid PFC;

[0913] The AC / DC power converter is configured to power at least one load for a period of time determined by a state of charge (SOC) of the storage element even in the absence of an AC input voltage, thereby providing a mobile power supply function.

[0914] Part IV. Isolation Converters

[0915] Concept A - Isolation Converter

[0916] An isolation converter comprises: a transformer including a primary winding and a secondary winding arranged in a forward configuration;

[0917] wherein a first node of the primary winding is connected to an input source, such as an AC or DC input, and a second node of the primary winding is connected to an upper switch and a lower switch via a half-bridge node or a switch node;

[0918] And wherein the primary winding and the secondary winding are arranged on the same core and are configured to have a weak mutual coupling k.

[0919] Optional features:

[0920] • The transformer is a weakly coupled transformer, as achieved by any of the features listed above.

[0921] The half-bridge circuit is configured to provide the required switching frequency.

[0922] When the input source is an AC input, the drain terminal of the upper MOSFET is connected to the input source through a diode, and the source terminal of the upper MOSFET is connected to the second node of the primary winding.

[0923] The source terminal of the lower MOSFET is connected to the input source through a diode; the drain terminal of the lower MOSFET is connected to the second node of the primary winding.

[0924] The AC input is rectified by the input bridge rectifier followed by a large capacitor, so the input source of the converter is quasi-DC.

[0925] The AC input is rectified by an input bridge rectifier followed by a small (or no) capacitor, so the input source to the converter is a rectified sine.

[0926] When the input source is DC input, its positive terminal is connected to one node of the primary winding and its negative terminal is connected to the source terminal of the lower MOSFET.

[0927] When the input source is DC input, its negative terminal is connected to one node of the primary winding and its positive terminal is connected to the drain terminal of the upper MOSFET.

[0928] A capacitor is connected to the drain terminal of the upper MOSFET and the source terminal of the lower MOSFET.

[0929] A capacitor is connected to the drain terminal of the upper MOSFET and one terminal of the primary winding and another capacitor is connected to the same terminal of the primary winding and the source terminal of the lower MOSFET.

[0930] A bridgeless isolated converter is directly connected to the AC input voltage to provide a single-stage wireless charger.

[0931] The converter operates in forced continuous-conduction mode and can achieve ZVS. When the primary winding current flows to the half-bridge switch node, the low MOSFET is always off, so during the dead time, the leakage inductance of the winding pushes current to the node, increasing its voltage until the voltage across the high-side MOSFET is zero. The high-side MOSFET is then turned on in ZVS. When the primary winding drains current from the switch node, the high-side FET is turned off, so the node reaches zero volts and the low-side MOSFET is turned on in ZVS.

[0932] The secondary winding is connected to a rectifier, such as a voltage doubler circuit or a full bridge circuit or any other rectifier circuit.

[0933] The winding is a wire winding.

[0934] The winding is a planar winding printed on the substrate.

[0935] • The primary and secondary windings are planar windings printed on the same substrate.

[0936] • The primary winding is printed on one side of the substrate and the secondary winding is printed on the other side of the substrate.

[0937] The primary winding is printed on the inner layer of the substrate.

[0938] The secondary winding is printed on the inner layer of the substrate.

[0939] The winding is a combination of wire winding and planar winding.

[0940] A surge current diode is placed between the input terminal and the source terminal of the low-side MOSFET in order to limit the MOSFET stress due to the startup charging of the capacitor.

[0941] A surge current diode is placed between the input terminal and the drain terminal of the high-side MOSFET in order to limit the MOSFET stress due to the startup charging of the capacitor.

[0942] A surge current diode is placed between the switch node and the source terminal of the low-side MOSFET in order to limit the MOSFET stress due to the startup charging of the capacitor.

[0943] A surge current diode is placed between the switch node and the drain terminal of the high-side MOSFET in order to limit the MOSFET stress due to the startup charging of the capacitor.

[0944] A voltage clamping device (Zener diode, transient voltage suppressor, metal oxide varistor or similar) is placed between the input terminal and the source terminal of the low-side MOSFET.

[0945] A voltage clamp device (Zener diode, transient voltage suppressor, metal oxide varistor or similar) is placed between the input terminal and the drain of the high-side MOSFET.

[0946] A voltage clamp device (Zener diode, transient voltage suppressor, metal oxide varistor, or similar) is placed between the switch node and the source terminal of the low-side MOSFET.

[0947] A voltage clamp device (Zener diode, transient voltage suppressor, metal oxide varistor, or similar) is placed between the switch node and the drain terminal of the high-side MOSFET.

[0948] One or more diodes provide surge current protection and voltage clamping protection.

[0949] Concept B - Isolated converter used as PFC

[0950] A PFC includes an isolated converter including a transformer including a primary winding and a secondary winding arranged in a forward configuration;

[0951] wherein a first node of the primary winding is connected to an input source, such as an AC or DC input, and a second node of the primary winding is connected to an upper switch and a lower switch via a half-bridge node or a switch node;

[0952] Therein, the primary winding and the secondary winding are arranged on the same core and are configured to have a weak mutual coupling k.

[0953] And wherein power factor correction is obtained by controlling the converter so as to absorb a current having nearly the same waveform and phase as the input voltage and low harmonic content.

[0954] Optional features:

[0955] ·The input source is AC or rectified AC.

[0956] Concept C - Bridgeless Egg Class Converter

[0957] A single-stage PFC AC / DC converter system comprises a transformer having a primary winding and a secondary winding, and wherein:

[0958] (i) The primary winding is coupled to the AC input voltage,

[0959] (ii) The primary winding is connected in series with two switches in an anti-series configuration,

[0960] And wherein the system is configured to (a) provide power to the secondary side circuit, and (b) regulate the input current so that the input current is substantially in phase with the input voltage.

[0961] Optional features:

[0962] The coupling factor from primary winding to secondary winding is low (k < 0.95).

[0963] ·The converter is isolated.

[0964] The primary side circuit includes only two power switches.

[0965] The primary side switch is turned on under ZVS or quasi-ZVS condition due to the resonance between the capacitance between the primary winding and the common node between the switch and the primary winding.

[0966] • Rectifiers can be half-wave or full-wave, such as single switch, push-pull, voltage doubler and current doubler rectifiers.

[0967] • Using one or more additional primary-side branches to implement an interleaved version of the converter.

[0968] Concept D - Battery or supercapacitor as storage element

[0969] An isolated converter comprises: a transformer including a primary winding and a secondary winding arranged in a forward configuration;

[0970] wherein a first node of the primary winding is connected to an input source, such as an AC or DC input, and a second node of the primary winding is connected to an upper switch and a lower switch via a half-bridge node or a switch node;

[0971] And wherein the primary winding and the secondary winding are arranged on the same core and are configured to have a weak mutual coupling K, and wherein the storage element is located on the secondary side, after the rectifier circuit.

[0972] Optional features:

[0973] The storage element comprises one or more batteries.

[0974] The storage element is a supercapacitor.

[0975] Concept E - Primary-side capacitor used as storage element

[0976] An isolated converter comprises: a transformer including a primary winding and a secondary winding arranged in a forward configuration;

[0977] wherein a first node of the primary winding is connected to an input source, such as an AC or DC input, and a second node of the primary winding is connected to an upper switch and a lower switch via a half-bridge node or a switch node;

[0978] And wherein the primary winding and the secondary winding are arranged on the same core and are configured to have a weak mutual coupling k, and wherein one or more primary side capacitors are used as storage elements.

[0979] Optional features:

[0980] The mutual coupling k is about 0.5.

[0981] The mutual coupling k is about 0.9.

[0982] • A storage capacitor is connected to the drain terminal of the upper MOSFET and the source of the lower MOSFET.

[0983] • A storage capacitor is connected to the drain of the upper MOSFET and one terminal of the primary winding, and a second storage capacitor is connected to the same terminal of the primary winding and the source of the lower MOSFET.

[0984] The converter is supplied with an AC or rectified AC voltage and operates as a PFC. When the power absorbed from the input is higher (or lower) than the power delivered to the load, the excess (or required) power is stored in (or withdrawn from) the storage capacitor.

[0985] In the event of a temporary input voltage drop, the converter is able to provide power to the load by drawing power from a previously charged storage capacitor.

[0986] Concept F - Light Load Conditions

[0987] An isolation converter, comprising:

[0988] a transformer including a primary winding and a secondary winding arranged in a forward configuration;

[0989] wherein a first node of the primary winding is connected to an input source, such as an AC or DC input, and a second node of the primary winding is connected to an upper switch and a lower switch via a half-bridge node or a switch node;

[0990] a load, which is located in the secondary side circuit;

[0991] Therein, the off time of the isolated converter is adjusted or varied in a continuous manner.

[0992] Optional features:

[0993] The primary and secondary windings are arranged on the same core and are configured to have a weak mutual coupling k.

[0994] The primary winding is connected to two switching MOSFETs, an upper MOSFET and a lower MOSFET, and wherein the duty cycle of the primary side is reduced by controlling the upper MOSFET.

[0995] When the voltage at the capacitor is at its maximum value, the upper MOSFET turns off.

[0996] • The converter is configured to restart at zero volt or zero current conditions after an amount of time in which both the upper MOSFET and the lower MOSFET are off.

[0997] The converter is capable of achieving greater than 90% efficiency at light load conditions.

[0998] Light load condition refers to a load less than 10% of the peak load.

[0999] Concept G - Rectifier MOSFET with Delayed Turn-Off

[1000] An isolation converter, comprising:

[1001] a transformer including a primary winding and a secondary winding arranged in a forward configuration;

[1002] wherein a first node of the primary winding is connected to an input source, such as an AC or DC input, and a second node of the primary winding is connected to an upper switch and a lower switch via a half-bridge node or a switch node;

[1003] Wherein, the secondary side circuit includes a rectifier circuit and a load;

[1004] And wherein the turn-off time of the rectifying circuit is delayed so as to reflect a portion of the energy received on the secondary side circuit back to the primary side circuit via coupling between the primary winding and the secondary winding.

[1005] Optional Features

[1006] • The off time of the rectifier circuit is delayed by a specific duration determined in order to regulate the output voltage or current at the load.

[1007] The delay is implemented by a closed-loop controller, such as a proportional, integral, and derivative (PID) controller.

[1008] Adding delay to reduce output voltage or current at the load.

[1009] The delay is determined or calculated by the digital controller.

[1010] Delay is implemented using analog circuits.

[1011] One or more rectifier switches are turned off with a certain delay, and one or more switches are turned off without delay.

[1012] The converter is configured to provide PFC and output power regulation.

[1013] • The delayed shut-off technique is used to have an additional degree of freedom and is easy.

[1014] Part V. Simplified AC / DC

[1015] Concept A. An isolated AC / DC converter implemented using two ICs: a primary-side IC that includes high-voltage startup and high-voltage switching, and a low-voltage IC secondary-side controller

[1016] An isolated AC / DC converter, comprising:

[1017] a transformer comprising a primary winding and a secondary winding;

[1018] a primary side circuit including a switch coupled to the primary winding;

[1019] A secondary side circuit includes a controller coupled to a secondary winding; wherein the AC / DC converter is implemented using (i) a primary side IC including a high voltage startup and a high voltage switch and (ii) a low voltage IC secondary side controller.

[1020] Concept B. Isolated AC / DC converter using only two ICs

[1021] An isolated AC / DC converter, comprising:

[1022] a transformer comprising a primary winding and a secondary winding;

[1023] a primary side circuit including a switch coupled to the primary winding;

[1024] A secondary side circuit includes a controller coupled to a secondary winding; wherein only two integrated circuits are used to implement the AC / DC converter.

[1025] Generally applicable optional features:

[1026] The primary side switch is configured to enable the secondary side controller.

[1027] No additional primary-side power switch is required.

[1028] Primary side high voltage IC implemented in silicon.

[1029] The primary side high voltage IC is implemented with wide bandgap semiconductor materials such as GaN, SiC or GaAs.

[1030] Digital communication between the primary-side switch and the secondary-side controller includes:

[1031] oCapacitive interface (modulated or baseband).

[1032] oDigital Optical Isolator.

[1033] oPower transformer based signal transmission (signal passes through the transformer).

[1034] - The secondary side ASIC includes support for protocols (eg, PD, QC or other protocols).

[1035] The AC / DC converter can be configured as any flyback converter topology, such as QR flyback, active clamp flyback, ZVS induced flyback, asymmetric half-bridge flyback.

[1036] The AC / DC converter can be configured as any resonant converter topology, such as a half-bridge or full-bridge resonant converter or an asymmetric half-bridge flyback (AHBF).

[1037] • The AC / DC converter may be configured as a flyback converter topology, and wherein the flyback converter is capable of inducing ZVS switching on the primary side.

[1038] The startup circuit and high-voltage switch are implemented with a single IC on the primary side of the transformer.

[1039] Concept C - Primary-side IC with integrated high-voltage startup system and high-voltage switch

[1040] A single integrated circuit configured for use on a primary side circuit of a converter including a transformer, wherein the converter includes a primary side circuit and a secondary side circuit, and wherein the integrated circuit includes a high voltage startup circuit and a high voltage power switch.

[1041] Optional Features

[1042] ·The converter is an AC / DC converter.

[1043] The converter is a DC / DC power converter.

[1044] The integrated circuit also has one or more additional power switches embedded in it.

[1045] • The integrated circuit also includes one or more primary side switch gate drivers or any other primary side components, such as control circuitry.

[1046] The IC includes a rectifier circuit for rectifying the auxiliary winding voltage.

[1047] The IC includes a DC / DC converter to generate an auxiliary voltage from the input rail or from another rail.

[1048] The IC includes current sensing capability for the power switch.

[1049] The IC includes data transmission or reception peripherals.

[1050] The IC has a control circuit embedded therein, which is used to control the power switch, for example, in current mode.

[1051] One or more embedded switches are implemented with wide bandgap semiconductor materials, such as GaN, SiC, or GaAs.

[1052] Note that different concepts or methods and features can be combined with each other. For simplicity, we have organized features as being related to specific higher-level features or concepts; however, this is generally only a preferred implementation, and the skilled person will understand that features should not be interpreted as limited to the specific context in which they are introduced, but can be deployed independently.

[1053] Notes

[1054] It should be understood that the arrangement referred to above is merely an illustration of the application of the principles of the present invention. Many modifications and alternative arrangements may be devised without departing from the spirit and scope of the present invention. Although the present invention has been illustrated in the accompanying drawings and fully described above in detail in conjunction with what are currently considered to be the most practical and preferred examples of the present invention, it will be apparent to those of ordinary skill in the art that many modifications may be made without departing from the principles and concepts of the present invention as set forth herein.

Claims

1. A flyback converter, comprising: a) a transformer having a primary winding and a secondary winding; b) a primary-side switch located on the primary side of the transformer; c) two secondary side switches located on the secondary side of the transformer; wherein the two secondary side switches are connected in parallel and have different characteristics; and d) a control unit configured to generate a rectified signal and a zero voltage switching (ZVS) pulse and drive the two secondary side switches; wherein one secondary side switch is driven by the rectified signal and the other secondary side switch is driven by the ZVS pulse; And wherein, at the end of the switching cycle, before turning on the primary side switch: the control unit is configured to generate the ZVS pulse in the secondary side winding so that the parasitic capacitor of the primary side switch is discharged and thus the primary side switch is turned on under ZVS conditions or close to ZVS conditions.

2. The flyback converter according to claim 1, wherein: The characteristics of the secondary-side switches are selected based on the signal used to drive each secondary-side switch.

3. A flyback converter according to any preceding claim, wherein: One secondary side switch is a high power MOSFET and the other secondary side switch is a low power MOSFET.

4. A flyback converter according to any preceding claim, wherein: The secondary side switches are any combination of silicon MOSFETs, GaN or SiC transistors with different drain to source on-resistances.

5. A flyback converter according to any preceding claim, wherein: The first secondary side switch or MOSFET (M2) is configured as a power rectifier and is driven by the rectified signal.

6. A flyback converter according to any preceding claim, wherein: The secondary side switch or MOSFET (M6) is driven by the ZVS pulse and its characteristics are determined so that the switch requires less energy to switch on or off.

7. A flyback converter according to any preceding claim, wherein: One secondary side switch or MOSFET (M2) has a lower drain-source on-resistance value than another secondary side switch or MOSFET (M6).

8. The flyback converter according to claim 7, wherein: One secondary side switch has a drain-source on-resistance value ranging between 1.5 milliohms and 50 milliohms, and the other secondary side switch has a drain-source on-resistance value ranging between 100 milliohms and 5 ohms.

9. A flyback converter according to any preceding claim, wherein: One secondary side switch or MOSFET (M2) has a higher gate to source capacitance than the other secondary side switch or MOSFET (M6).

10. The flyback converter according to claim 9, wherein: One secondary side switch has a gate to source capacitance value in a range between 1 nanofarad and 10 nanofarad, and the other secondary side switch has a gate to source capacitance value in a range between 0.03 nanofarad and 1 nanofarad.

11. A flyback converter according to any preceding claim, wherein: One secondary side switch or MOSFET (M2) has a higher output capacitance than the other secondary side switch or MOSFET (M6).

12. The flyback converter according to claim 11, wherein: One secondary side switch has an output capacitance value in a range between 0.05 nanofarads and 2 nanofarads, and the other secondary side switch has an output capacitance value in a range between 10 picofarads and 50 picofarads.

13. A flyback converter according to any preceding claim, wherein: One secondary side switch (M6) is configured to be activated or turned on only under light load conditions, such as when the load is less than 10% of the rated output power.

14. A flyback converter according to any preceding claim, wherein: One secondary side switch (M6) is configured to be deactivated or turned off depending on load conditions, such as medium load and high load.

15. A flyback converter according to any preceding claim, wherein: A secondary side switch is configured to be deactivated when the load condition is above a predetermined threshold, for example, when the load condition is above 10% of the rated output power or 50% of the rated power.

16. A flyback converter according to any preceding claim, wherein A secondary side switch is configured to be automatically deactivated when the load condition is above a predetermined threshold, and is automatically deactivated when the load condition is above 10% of the rated output power or 50% of the rated power.

17. A flyback converter according to claims 14 to 16, wherein: When the secondary side switch (M6) is deactivated or turned off, the control unit is configured to digitally add the ZVS pulse to the rectified signal.

18. A flyback converter according to any preceding claim, wherein The ZVS pulse is generated when a local minimum voltage at the drain terminal of the secondary side switch (M6) is detected.

19. A flyback converter, comprising: a) a transformer having a primary winding and a secondary winding; b) a primary side switch on the primary side of the transformer; c) a secondary side switch on the secondary side of the transformer; d) a control unit configured to digitally add a ZVS pulse to the rectified signal, and wherein the ZVS pulse is configured to discharge a parasitic capacitor of the primary side switch, thereby allowing the primary side switch to be turned on under a ZVS condition or close to a ZVS condition.

20. The flyback converter according to claim 19, wherein The characteristics of the secondary side switch, primarily the drain-source on-resistance, the gate-to-source capacitor or the output capacitance, are determined such that the secondary side switch optimizes the overall operating time of the transformer.

21. The flyback converter according to claim 19 or 20, wherein: The secondary side switch has a source-drain on-resistance value ranging from 1.5 milliohms to 50 milliohms.

22. The flyback converter according to any one of claims 19 to 21, wherein: The secondary side switch has a gate capacitance value ranging from 1 nanofarad to 10 nanofarads.

23. The flyback converter according to any one of claims 19 to 22, wherein: The secondary switch has an output capacitance value in a range of 0.05 nanofarads to 2 nanofarads.

24. A flyback converter according to any preceding claim, wherein: The duration of the ZVS pulse is configured to enable the peak current value (I zvs ), so that the voltage at the drain of the primary side switch drops to zero or close to zero volts.

25. A flyback converter according to any preceding claim, wherein: The duration of the ZVS pulse is calculated as a function of input voltage, output voltage, inductance of the primary side winding, equivalent drain-to-ground capacitance at the primary side switch, and the number of turns of the winding of the transformer.

26. A flyback converter according to any preceding claim, wherein The duration of the ZVS pulse T zvs Determine using the following equation: Among them, V i refers to the input voltage, V out refers to the output voltage, L pri Refers to the inductance of the primary winding of the transformer, C eq refers to the total equivalent drain-to-ground capacitance at the primary side switch, and n refers to the transformer turns ratio between the primary and secondary windings.

27. A flyback converter according to any preceding claim, wherein: The primary side switch on-time is calculated from the frequency of the ZVS pulse.

28. A flyback converter according to any preceding claim, wherein The control unit also generates a pulse control signal.

29. A flyback converter according to any preceding claim, wherein When the rectified signal is high, the converter is configured to transfer power from the transformer to an output capacitor.

30. The flyback converter according to any one of claims 28 to 29, wherein: When the pulse control signal is high, the converter is configured to reflect power from an output capacitor to the transformer.

31. A flyback converter according to any one of claims 28 to 30, wherein: The pulse control signal is configured to rise at a falling edge of the rectified signal.

32. A flyback converter according to any one of claims 28 to 31, wherein: The power delivered to the output of the flyback converter is determined by adjusting the duration of the pulse control signal.

33. A flyback converter according to any preceding claim, wherein: A communication link exists between the primary side and the secondary side, and wherein the communication link uses one or a combination of: a capacitive link, an inductive link, a proximity antenna, or an integrated power and signal transformer.

34. A flyback converter according to any preceding claim, wherein: The synchronizer unit is configured to synchronize the ZVS pulse with a primary side drain voltage valley or local peak.

35. A flyback converter according to any preceding claim, wherein: The control unit is configured to send a ZVS request.

36. A flyback converter according to any preceding claim, wherein The control unit is configured to send a switch-on request to the primary-side switch.

37. A flyback converter according to any preceding claim, wherein: The control unit is configured to send a ZVS pulse or a switch-on request to the primary side, and wherein a parameter of the pulse defines a primary side switch duty cycle.

38. A method according to any preceding claim, wherein: The control unit is configured to send a ZVS pulse or a switch-on request to the primary side, wherein a parameter of the pulse defines a current threshold at which the primary side switch must switch off.

39. A method according to any preceding claim, wherein: The method uses an indirect pulse detection technique and wherein the primary side switch is turned on after a ZVS pulse is detected.

40. The flyback converter according to claim 39, wherein The indirect pulse detection technique senses the primary switch drain voltage to detect deep valleys.

41. A flyback converter according to claim 39 or 40, wherein: The indirect pulse detection technique senses the dv / dt slope of the primary switch drain voltage.

42. A method of operating a flyback converter, the flyback converter comprising: a) a transformer having a primary winding and a secondary winding; b) a primary-side switch located on the primary side of the transformer; c) two secondary side switches located on the secondary side of the transformer; wherein the two secondary side switches are connected in parallel and have different characteristics; d) a control unit configured to generate a rectified signal and a zero voltage switching (ZVS) pulse and drive the two secondary side switches; wherein one secondary side switch is driven by the rectified signal and the other secondary side switch is driven by the ZVS pulse; And wherein, at the end of the switching cycle, before turning on the primary side switch: the control unit is configured to generate the ZVS pulse in the secondary side winding so that the parasitic capacitor of the primary side switch is discharged and thus the primary side switch is turned on under ZVS conditions or close to ZVS conditions.

43. A method of operating a flyback converter, the flyback converter comprising: a) a transformer having a primary winding and a secondary winding; b) a primary side switch on the primary side of the transformer; c) a secondary side switch on the secondary side of the transformer; d) control unit; And wherein the control unit is configured to digitally add a ZVS pulse to the rectified signal, and wherein the ZVS pulse is configured to discharge a parasitic capacitor of the primary side switch, thereby allowing the primary side switch to be turned on under a ZVS condition or close to a ZVS condition.

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