Chip back appearance detection method and device based on file compilation

Abstract

The application discloses a chip back appearance detection method and device based on file filing, and the method comprises the following steps: obtaining an electrical test document of a product to be tested, establishing a standard filing file of the product to be tested according to the electrical test document, and the number and distribution of the dies, the size and position of the mask in the standard filing file are consistent with the electrical test document; after the back appearance detection scanning of the product to be tested is completed, a corresponding scanning result file is generated, the scanning result file and the standard filing file are simulated to file, and the size and position of the mask empty area after the simulation are calculated; whether the size and position of the mask empty area after the simulation change is judged, and when the size and position of the mask empty area do not change, it is determined that the back appearance detection of the product to be tested is qualified. The application solves the problem that the cost is increased due to the fact that whether the chip back appearance detection is qualified cannot be found in time in the prior art.

Description

TECHNICAL FIELD

[0001] The present application relates to the chip manufacturing technical field, in particular to a chip back appearance detection method and device based on file merging. BACKGROUND

[0002] In the field of LED chip manufacturing, in the AOI appearance detection link, part of the flip chip product with high back appearance requirement needs to be detected. After the back detection is completed, the document will be output for subsequent front detection. If the back document output is abnormal, it will cause yield loss or direct merging failure after front detection, which needs to be reworked, greatly increasing the labor cost and material cost.

[0003] At present, the chip product does not need to be merged with other test results during back appearance detection, which leads to that the document cannot be found in time when it is abnormal. Only when the back detection result is merged can the back file abnormality be found. Because the back detection and the front detection are separated by multiple processes, a large number of abnormal chips are produced when the abnormality is found. The rework of the above-mentioned abnormal chips needs to flip the film of the chip source at the front site, detect the back, and then flip the film to the front again, which greatly increases the labor cost, and the film flipping will cause the loss of the chip, finally leading to the increase of the cost. SUMMARY

[0004] Therefore, the present application aims to provide a chip back appearance detection method and device based on file merging, which aims to solve the problem of cost increase caused by the inability to find whether the chip back appearance detection is qualified in time in the prior art.

[0005] The embodiment of the present application is implemented as follows:

[0006] A chip back appearance detection method based on file merging, the method comprises:

[0007] Obtaining an electrical test document of a product to be tested, establishing a standard merging file of the product to be tested according to the electrical test document, the number and distribution of the chips, the size and position of the mask in the standard merging file are consistent with the electrical test document;

[0008] After the back appearance detection scanning of the product to be tested is completed, a corresponding scanning result file is generated, and the size and position of the mask empty area after the simulation merging of the scanning result file and the standard merging file are calculated;

[0009] Judging whether the size and position of the mask empty area after the simulation merging are changed, when the size and position of the mask empty area are not changed, it is determined that the back appearance detection of the product to be tested is qualified.

[0010] Further, the chip back appearance detection method based on file compilation, wherein the step of calculating the size and position of the mask empty area after the simulation compilation of the scanning result file and the standard compilation file comprises:

[0011] acquiring the coordinate information of a preset point of one of the mask empty areas in the standard compilation file, and setting the coordinates of the mask point at the same position in the scanning result file to be the same as the preset point;

[0012] calculating the coordinate information of all the dies according to the coordinates of the mask point, and acquiring the size and position of the empty area of each mask point after the calculation.

[0013] Further, the chip back appearance detection method based on file compilation, wherein the step of judging whether the size and position of the mask empty area after the simulation compilation change comprises:

[0014] judging whether there is an empty area with the same size as the mask empty area at the position of each mask point;

[0015] if yes, it is determined that the size and position of the mask empty area do not change;

[0016] if no, it is determined that the size and position of the mask empty area change.

[0017] Further, the chip back appearance detection method based on file compilation, wherein the step of acquiring the electrical test document of the product to be tested and establishing the standard compilation file of the product to be tested according to the electrical test document further comprises:

[0018] acquiring the electrical test documents of different models of products and establishing corresponding standard compilation files

[0019] storing the standard compilation files in the recipe path of each of the different models of products.

[0020] Further, the chip back appearance detection method based on file compilation, wherein the step of determining that the back appearance detection of the product to be tested is qualified further comprises:

[0021] acquiring a target product to be tested whose back appearance detection is qualified, and acquiring a target scanning result file of the target product to be tested, and uploading the target scanning result file to a specified directory of a network disk.

[0022] Further, the chip back appearance detection method based on file compilation, wherein the step of acquiring a target product to be tested whose back appearance detection is qualified, and acquiring a target scanning result file of the target product to be tested, and uploading the target scanning result file to a specified directory of a network disk further comprises:

[0023] When the product to be tested needs to be exported, it is determined whether there is a corresponding scanning result file of the product to be tested in a specified directory;

[0024] If yes, an export action is performed on the product to be tested;

[0025] If no, the product to be tested is intercepted at the current site.

[0026] Further, the chip back appearance detection method based on file profiling, wherein the step of determining whether the size and position of the mask empty area change after profiling further comprises:

[0027] When the size and position of the mask empty area change, it is determined that the back appearance detection of the product to be tested is unqualified.

[0028] Another object of the present application is to provide a chip back appearance detection device based on file profiling, which comprises:

[0029] An acquisition module is configured to acquire an electrical test document of a product to be tested, and establish a standard profiling file of the product to be tested according to the electrical test document, wherein the number and distribution of dies, the size and position of a mask in the standard profiling file are consistent with the electrical test document;

[0030] A profiling module is configured to generate a corresponding scanning result file after the back appearance detection scanning of the product to be tested is completed, and calculate the size and position of a mask empty area after simulating the profiling of the scanning result file and the standard profiling file;

[0031] A detection module is configured to determine whether the size and position of the mask empty area change after simulating the profiling, and determine that the back appearance detection of the product to be tested is qualified when the size and position of the mask empty area do not change.

[0032] Another object of the present application is to provide a readable storage medium having a computer program stored thereon, wherein the program is executed by a processor to implement the steps of the method according to any one of the above.

[0033] Another object of the present application is to provide an electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the method according to the above when executing the program.

[0034] The application acquires an electrical test document of a product to be tested, establishes a standard file of the product to be tested according to the electrical test document, and the number and distribution of the dies, the size and position of the mask in the standard file are consistent with the electrical test document; after the back appearance detection of the product to be tested is completed, a corresponding scanning result file is generated, the scanning result file and the standard file are simulated to establish a file, and the size and position of the mask empty area after the simulation are calculated; whether the size and position of the mask empty area after the simulation change is judged, when the size and position of the mask empty area do not change, it is determined that the back appearance detection of the product to be tested is qualified. Through the back appearance detection, the abnormality can be found and intercepted in the process, avoiding the situation that the abnormality is found after the die source is flipped to the front, greatly reducing the abnormality discovery time, reducing the abnormality output, and reducing the rework cost. The problem of cost increase caused by the failure to timely find whether the chip back appearance detection is qualified in the prior art is solved. BRIEF DESCRIPTION OF DRAWINGS

[0035] Figure 1 The flow chart of the chip back appearance detection method based on file filing in the first embodiment of the application;

[0036] Figure 2 The schematic diagram of the file filing of the scanning result file and the standard file in the chip back appearance detection method based on file filing in an embodiment of the application;

[0037] Figure 3 The structural block diagram of the chip back appearance detection device based on file filing in the third embodiment of the application.

[0038] The following specific embodiments will further illustrate the application in combination with the above drawings. DETAILED DESCRIPTION

[0039] In order to facilitate the understanding of the application, the application will be described more fully below with reference to the related drawings. Several embodiments of the application are shown in the drawings. However, the application can be realized in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the application more thorough and comprehensive.

[0040] It should be noted that when an element is referred to as being "fixed to" another element, it can be directly on the other element or there can be a middle element. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or there can be a middle element. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description herein is for describing particular embodiments only and is not intended to be limiting of the application. The use herein of the terms "and / or" includes a set of one or more associated listed items.

[0042] The following will be described in detail in conjunction with specific embodiments and drawings how to find the abnormality of the chip back appearance detection in time, thereby reducing the cost.

[0043] Embodiment one

[0044] Please refer to Figure 1 , which is a chip back appearance detection method based on file profiling in the first embodiment of the present application, and the method comprises steps S10-S12.

[0045] Step S10, the electrical test document of the product to be tested is obtained, and a standard profiling file of the product to be tested is established according to the electrical test document. The number and distribution of dies, the size and position of the mask in the standard profiling file are consistent with the electrical test document.

[0046] Among them, the product to be tested is a product that needs to be detected by AOI appearance, specifically, it can be an LED chip, specifically, each type of product to be tested has an electrical test document, which is a file used to record and verify the performance of the device in electronic manufacturing and semiconductor production. This kind of document describes the detailed information of the test and the product to be tested in detail. According to the electrical test document, a standard profiling file can be developed, and the number and distribution of dies in the file are consistent with the electrical test document, including the size and position of the mask.

[0047] In addition, in some optional embodiments of the present application, the electrical test documents of different models of products can be obtained, and corresponding standard profiling files can be established. Then the standard profiling files are stored in the formula path of each different model product, so as to distinguish the standard profiling files of different products.

[0048] Step S11, after the back appearance detection scanning of the product to be tested is completed, a corresponding scanning result file is generated, and the scanning result file and the standard profiling file are simulated to profile, and the size and position of the mask empty area after simulation are calculated.

[0049] Among them, after the back appearance detection scanning is completed, a scanning result file will be generated, which can be simulated to profile with the standard profiling file. According to the position and size of the mask empty area, point-to-point matching is carried out. After the matching is completed, the size and position of the mask empty area after simulation are calculated.

[0050] Specifically, the coordinate information of a preset point on one of the mask empty areas in the standard file is obtained, and the coordinates of the mask point at the same position in the scanning result file are set to be the same as the preset point. The coordinate information of all the dies is calculated according to the coordinates of the mask point, and after the calculation is completed, the size and position of each mask point are obtained. For example, as shown in FIG. 9, the upper left corner coordinates of the first mask point with a size of a*b in the standard file are (x, y), and the coordinates of the mask point at the same position in the scanning result file are also set to (x, y). Then, the X-axis and Y-axis coordinates of all the dies are calculated according to the coordinates of the mask point. After the calculation is completed, the size and position of each mask point are obtained. Figure 2

[0051] In step S12, it is judged whether the size and position of the mask empty area after the simulation filing change. When the size and position of the mask empty area do not change, it is determined that the back appearance detection of the product to be tested is qualified.

[0052] In the embodiment, point-to-point matching is performed according to the position and size of the mask empty area. After the matching is completed, the size and position of the mask empty area after the simulation filing are calculated. If the size and position do not change, it is determined that the filing is successful, that is, qualified. If the size and position change, it is determined that the filing fails, that is, unqualified. Specifically, it is determined whether there is an empty area with the same size of a*b at each mask point. If each mask point is successfully matched, it is determined that the filing is successful. Otherwise, it is determined that the filing fails.

[0053] In summary, in the chip back appearance detection method based on file filing in the above embodiment, the electrical test document of the product to be tested is obtained, and the standard filing file of the product to be tested is established according to the electrical test document. The number and distribution of dies, the size and position of the mask in the standard filing file are consistent with the electrical test document. After the back appearance detection of the product to be tested is completed, the corresponding scanning result file is generated. After the simulation filing of the scanning result file and the standard filing file is completed, the size and position of the mask empty area after the simulation filing are calculated. It is judged whether the size and position of the mask empty area after the simulation filing change. When the size and position of the mask empty area do not change, it is determined that the back appearance detection of the product to be tested is qualified. By detecting the abnormality after the back appearance detection is completed, the abnormality can be detected in the process, so that the chip source is not discovered until the film is turned to the front, which greatly reduces the time of discovering the abnormality, reduces the abnormal output, and reduces the cost of rework. The problem of cost increase due to the inability to timely discover whether the chip back appearance detection is qualified in the prior art is solved.

[0054] Embodiment Two

[0055] ​The embodiment also proposes a chip back appearance detection method based on file compilation. The chip back appearance detection method based on file compilation in the embodiment is different from the chip back appearance detection method based on file compilation in the first embodiment in that:

[0056] The step of determining that the back appearance of the product to be tested is qualified also includes:

[0057] After obtaining the target product to be tested with a qualified back appearance and the target scanning result file of the target product to be tested, the target scanning result file is uploaded to a specified directory of a network disk.

[0058] For a chip source with a successful compilation determination, the scanning result file is uploaded to the specified directory of the network disk, and a chip source with a failed compilation determination will not be subjected to the uploading operation.

[0059] In addition, in some optional embodiments of the present application, after the step of obtaining the target product to be tested with a qualified back appearance and the target scanning result file of the target product to be tested, and uploading the target scanning result file to a specified directory of a network disk, the step also includes:

[0060] When the product to be tested needs to be sent out, it is determined whether the product to be tested has a corresponding scanning result file in the specified directory;

[0061] If yes, the product to be tested is subjected to a sending-out action;

[0062] If no, the product to be tested is intercepted at the current station.

[0063] It can be understood that before a chip source is sent to the next process, the sending-out action needs to be performed. When the chip source is sent out, the system determines whether the chip source has a corresponding file in the specified directory. If there is no file, the chip source cannot be sent out. If there is a file, the sending-out action can be performed. Chip sources with a compilation anomaly are all intercepted at the current station.

[0064] In summary, the chip back appearance detection method based on file filing in the above embodiments of the present application, by obtaining the electrical test document of the product to be tested, the standard filing file of the product to be tested is established according to the electrical test document, the number and distribution of dies, the size and position of the mask in the standard filing file are consistent with the electrical test document; after the back appearance detection scanning of the product to be tested is completed, the corresponding scanning result file is generated, the mask empty area size and position after simulation filing are calculated after the simulation filing of the scanning result file and the standard filing file; whether the mask empty area size and position after simulation filing changes is judged, when the mask empty area size and position do not change, it is determined that the back appearance detection of the product to be tested is qualified. Through the detection after the back appearance detection is completed, the abnormality can be found and intercepted in the process, avoiding the film being found after the chip source is flipped to the front, greatly reducing the abnormality discovery time, reducing the abnormality output, and reducing the rework cost. The problem of increasing cost due to the inability to timely find whether the chip back appearance detection is qualified in the prior art is solved.

[0065] Embodiment three

[0066] Please refer to Figure 3 , which is a chip back appearance detection device based on file filing proposed in the third embodiment of the present application, the device comprises:

[0067] The acquisition module 100 is used for acquiring the electrical test document of the product to be tested, and establishing the standard filing file of the product to be tested according to the electrical test document, the number and distribution of dies, the size and position of the mask in the standard filing file are consistent with the electrical test document;

[0068] The filing module 200 is used for generating the corresponding scanning result file after the back appearance detection scanning of the product to be tested is completed, and calculating the mask empty area size and position after simulation filing after the simulation filing of the scanning result file and the standard filing file;

[0069] The detection module 300 is used for judging whether the mask empty area size and position after simulation filing changes, when the mask empty area size and position do not change, it is determined that the back appearance detection of the product to be tested is qualified.

[0070] Further, in some optional embodiments of the present application, wherein the filing module comprises:

[0071] The calculation unit is used for obtaining the coordinate information of the preset point of one of the mask empty areas in the standard filing file, and setting the coordinates of the mask point at the same position in the scanning result file to be the same as the preset point;

[0072] According to the coordinates of the mask point, the coordinate information of all dies is calculated, and after the calculation is completed, the empty area size and position of each mask point are obtained.

[0073] Further, in some optional embodiments of the present application, the detection module comprises:

[0074] a judging unit, configured to judge whether the position of each mask point has a space with the same size as the mask space size;

[0075] if yes, it is determined that the mask space size and position have not changed;

[0076] if no, it is determined that the mask space size and position have changed.

[0077] Further, in some optional embodiments of the present application, the device further comprises:

[0078] a storage module, configured to obtain the electrical test documents of different models of products, and establish corresponding standard recipe files and store the standard recipe files in the recipe paths of the different models of products.

[0079] Further, in some optional embodiments of the present application, the device further comprises:

[0080] an uploading module, configured to obtain a target product to be tested which passes the back appearance detection, and obtain a target scanning result file of the target product to be tested, and then upload the target scanning result file to a specified directory of a network disk.

[0081] Further, in some optional embodiments of the present application, the device further comprises:

[0082] an outbound module, configured to, when the product to be tested needs to be sent out, judge whether there is a corresponding scanning result file of the product to be tested in the specified directory;

[0083] if yes, perform an outbound action on the product to be tested;

[0084] if no, intercept the product to be tested to the current station.

[0085] Further, in some optional embodiments of the present application, the device further comprises:

[0086] a determining module, configured to, when the mask space size and position have changed, determine that the back appearance detection of the product to be tested is unqualified.

[0087] The functions or operation steps realized when each module is executed are basically the same as those of the above method embodiments, and will not be repeated here.

[0088] Embodiment Four

[0089] Another aspect of the present application provides a readable storage medium having stored thereon a computer program, which, when executed by a processor, implements the steps of the method according to any one of the above-mentioned embodiments 1 to 2.

[0090] Embodiment five

[0091] Another aspect of the present application provides an electronic device, which comprises a memory, a processor, and a computer program stored in the memory and executable in the processor, wherein the processor implements the steps of the method according to any one of the above-mentioned embodiments 1 to 2 when executing the program.

[0092] The technical features of each of the above embodiments can be combined in any manner. In order to make the description concise, all possible combinations of the technical features in the above embodiments are not described, however, as long as the combinations of the technical features do not exist contradictions, they should be considered as the scope of the present application.

[0093] Those skilled in the art can understand that the logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a list of executable instructions for implementing the logic function, which can be embodied in any computer-readable storage medium for use by or in connection with an instruction execution system, apparatus or device, such as a computer-based system, a system including a processor or other system that can fetch the instructions from the instruction execution system, apparatus or device and execute the instructions, or in conjunction with these instructions execution system, apparatus or device. For the present specification, the "computer-readable storage medium" can be any device that can contain, store, communicate, propagate or transport the program for use by or in connection with the instruction execution system, apparatus or device or in conjunction with these instruction execution system, apparatus or device.

[0094] More specific examples (a non-exhaustive list) of the computer-readable storage medium include the following: an electrical connection having one or more wires (electrical devices), a portable computer diskette (magnetic devices), a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). In addition, the computer-readable storage medium can even be paper or other suitable medium on which the program can be printed, because the program can be electronically obtained, for example, by optical scanning of the paper or other medium, followed by electronic conversion into a useable form, and then stored in computer memory.

[0095] It should be appreciated that portions of the present application can be implemented in hardware, software, firmware, or combinations thereof. In the embodiments described above, various steps or methods can be implemented, in part, or in whole, in software, or firmware that is stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any of the above-described functionality can be implemented with or without the use of

[0096] In the description of the present application, the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. The illustrative appearances of the above- described terms in various places in the specification are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0097] The above-described embodiments are merely illustrative of the present application and are not to be taken in a limiting sense. It is noted that, for one of ordinary skill in the art, many variations and modifications of the present application can be made without departing from the spirit and scope of the present application. Therefore, the scope of the present application should be determined not by the embodiments described above, but by the appended claims.

Claims

1. A chip backside appearance inspection method based on file collation, characterized by, The method comprises: Obtaining an electrical test document of a product to be tested, and establishing a standard file of the product to be tested according to the electrical test document, wherein the number and distribution of dies, the size and position of masks in the standard file are consistent with the electrical test document; After the back appearance detection scanning of the product to be tested is completed, a corresponding scanning result file is generated, and the size and position of a mask empty area after analog filing are calculated after the scanning result file and the standard file are analog filed; It is determined whether the size and position of the mask empty area after analog filing change, and when the size and position of the mask empty area do not change, it is determined that the back appearance detection of the product to be tested is qualified; The step of calculating the size and position of the mask empty area after analog filing after the scanning result file and the standard file are analog filed comprises: Obtaining coordinate information of a preset point of one mask empty area in the standard file, and setting the coordinates of the mask point at the same position in the scanning result file to be the same as the preset point; According to the coordinates of the mask point, the coordinate information of all dies is calculated, and after the calculation is completed, the size and position of the empty area of each mask point are obtained; The step of determining whether the size and position of the mask empty area after analog filing change comprises: It is determined whether the position of each mask point has an empty area with the same size as the mask empty area; If yes, it is determined that the size and position of the mask empty area do not change; If no, it is determined that the size and position of the mask empty area change; After the step of obtaining the electrical test document of the product to be tested and establishing the standard file of the product to be tested according to the electrical test document, the method further comprises: Obtaining electrical test documents of different types of products, and establishing corresponding standard files The standard files are stored in the formula paths of the different types of products.

2. The file-based collation-based chip backside appearance detection method according to claim 1, characterized by, After the step of determining that the back appearance detection of the product to be tested is qualified, the method further comprises: Obtaining a target product to be tested that passes the back appearance detection, and obtaining a target scanning result file of the target product to be tested, and uploading the target scanning result file to a specified directory of a network disk.

3. The file-based batch-based chip backside appearance inspection method according to claim 2, characterized by, After the step of obtaining a target product to be tested that passes the back appearance detection, and obtaining a target scanning result file of the target product to be tested, and uploading the target scanning result file to a specified directory of a network disk, the method further comprises: When the product to be tested needs to be sent out, it is determined whether there is a corresponding scanning result file in the specified directory; If yes, the product to be tested is executed to be sent out; If no, the product to be tested is intercepted at the current site.

4. The file-based collation-based chip backside appearance inspection method according to claim 1, characterized by, After the step of determining whether the size and position of the mask empty area after analog filing change, the method further comprises: When the size and position of the mask empty area change, it is determined that the back appearance detection of the product to be tested is unqualified.

5. A chip backside appearance inspection apparatus based on file batching, characterized by, The device for implementing the chip back appearance detection method based on file filing according to any one of claims 1 to 4 comprises: An acquisition module is configured to acquire an electrical test document of a product to be tested, and establish a standard profile file of the product to be tested according to the electrical test document, wherein the number and distribution of dies, and the size and position of a mask in the standard profile file are consistent with the electrical test document; A profile module is configured to generate a corresponding scanning result file after a back appearance detection scan of the product to be tested is completed, and calculate the size and position of a mask empty area after analog profile matching of the scanning result file and the standard profile file. A detection module is configured to determine whether the size and position of the mask empty area after analog profile matching are changed, and determine that the back appearance detection of the product to be tested is qualified when the size and position of the mask empty area are not changed.

6. A readable storage medium, having stored thereon a computer program, characterized in that, The program is executed by the processor to implement the steps of the method of any one of claims 1 to 4.

7. An electronic device, comprising: The computer program is stored in the memory and executable on the processor, and the processor implements the steps of the method of any one of claims 1 to 4 when executing the program.

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