Task processing method and device, electronic equipment and storage medium

Abstract

The invention provides a task processing method and device, electronic equipment and a storage medium, and relates to the technical field of computers. The method comprises the steps of obtaining at least one task request operation instruction from an upper-layer application; distributing each task request operation instruction to a password acceleration resource component according to the target scheduling mode, and processing the task request operation instructions by the password acceleration resource component; the password acceleration resource component comprises a coprocessor and encryption hardware, and the target scheduling mode comprises proportional scheduling or polling scheduling; and respectively reading a processing result of the task request operation instruction corresponding to the coprocessor and a processing result of the task request operation instruction corresponding to the encryption hardware, and returning the read processing results corresponding to the task request operation instructions to the upper-layer application. According to the scheme, idle resources can be effectively and reasonably utilized, the processing burden of a processing engine in an application layer is effectively relieved, the task processing speed is increased, and the effects of all high-performance acceleration resources in a platform are dynamically exerted.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a task processing method, device, electronic device and storage medium. Background Art

[0002] As information security incidents continue to emerge, the importance of cryptography technology in the field of cyberspace security has become increasingly prominent. Cryptography calculations include encryption, decryption, verification, signatures, and other calculations. The calculation process consumes a lot of CPU (Central Processing Unit) resources. Therefore, the computing power involved in cryptography calculations has become an issue that needs to be solved urgently.

[0003] At present, additional acceleration hardware is often used to offload encryption and decryption tasks to the acceleration hardware for processing, so as to achieve cryptographic acceleration processing and reduce the processing burden of dedicated cryptographic hardware.

[0004] However, the above method will increase additional costs, and the scenarios in which cryptographic processing is applied are also limited. Summary of the invention

[0005] The purpose of this application is to provide a task processing method, device, electronic device and storage medium to address the deficiencies in the above-mentioned prior art, so as to effectively utilize the idle computing power of the platform for task processing, improve the task processing speed and reduce the burden on the dedicated processing engine.

[0006] To achieve the above purpose, the technical solution adopted in the embodiment of the present application is as follows:

[0007] In a first aspect, an embodiment of the present application provides a task processing method, which is applied to an electronic device, including:

[0008] Obtaining at least one task request operation instruction from an upper layer application;

[0009] Allocate each task request operation instruction to a cryptographic acceleration resource component according to a target scheduling mode, and the cryptographic acceleration resource component processes the instruction; the cryptographic acceleration resource component includes: a coprocessor and encryption hardware, and the target scheduling mode includes: proportional scheduling or polling scheduling;

[0010] The processing results of the task request operation instructions corresponding to the coprocessor and the processing results of the task request operation instructions corresponding to the encryption hardware are read respectively, and the processing results corresponding to each task request operation instruction read are returned to the upper layer application.

[0011] Optionally, it also includes:

[0012] In the upper layer application, task request operation instructions corresponding to each type of task request are created, and the task request operation instructions at least include: context space, input data, length of input data, address of output data, and length of output data.

[0013] Optionally, allocating each task request operation instruction to a cryptographic acceleration resource component according to a target scheduling mode includes:

[0014] Each task request operation instruction is allocated to the coprocessor and the encryption hardware according to a preset allocation ratio; the allocation ratio is used to indicate the ratio of the tasks allocated to the coprocessor and the tasks allocated to the encryption hardware.

[0015] Optionally, the allocating each task request operation instruction to the coprocessor and the encryption hardware respectively according to a preset allocation ratio includes:

[0016] According to the allocation ratio and the number of received task request operation instructions, respectively determining the number of instructions to be processed corresponding to the coprocessor and the number of instructions to be processed corresponding to the acceleration hardware;

[0017] According to the number of pending instructions corresponding to the coprocessor and the number of pending instructions corresponding to the acceleration hardware, a corresponding number of task request operation instructions are respectively allocated to the coprocessor and a corresponding number of task request operation instructions are allocated to the encryption hardware.

[0018] Optionally, allocating each task request operation instruction to a cryptographic acceleration resource component according to a target scheduling mode includes:

[0019] The task request operation instructions are cross-distributed to the coprocessor and the encryption hardware in sequence.

[0020] Optionally, allocating each task request operation instruction to a cryptographic acceleration resource component according to a target scheduling mode includes:

[0021] Determine whether to enable a threshold unloading processing mode; wherein, in the threshold unloading processing mode, determine the processing object of the task request operation instruction based on the length of the input data in the task request operation instruction and a preset threshold;

[0022] If the threshold unloading processing mode is not enabled, each task request operation instruction is allocated to the cryptographic acceleration resource component according to the target scheduling mode.

[0023] Optionally, it also includes:

[0024] If the threshold unloading processing mode is turned on, it is determined whether to allocate each task request operation instruction to the cryptographic acceleration resource component according to the preset threshold and the length of the input data in the task request operation instruction;

[0025] If it is determined that each task request operation instruction is to be allocated to a cryptographic acceleration resource component, each task request operation instruction is allocated to the cryptographic acceleration resource component according to the target scheduling mode.

[0026] Optionally, judging whether to allocate each task request operation instruction to the cryptographic acceleration resource component according to a preset threshold and the length of input data in the task request operation instruction includes:

[0027] Determine whether to allocate each task request operation instruction to the cryptographic acceleration resource component according to the length of the input data in each task request operation instruction and the comparison result of the preset threshold value;

[0028] If the length of the input data in the task request operation instruction is greater than the preset threshold, it is determined to allocate the task request operation instruction to the cryptographic acceleration resource component.

[0029] Optionally, it also includes:

[0030] If the length of the input data in the task request operation instruction is less than the preset threshold, the task request operation instruction is allocated to the local processor for processing by the local processor.

[0031] Optionally, the respectively reading the processing result of the task request operation instruction corresponding to the coprocessor and the processing result of the task request operation instruction corresponding to the encryption hardware includes:

[0032] According to the pre-configured processing result reading strategy, the processing result of the task request operation instruction corresponding to the coprocessor and the processing result of the task request operation instruction corresponding to the encryption hardware are read respectively.

[0033] Optionally, the reading, according to a preconfigured processing result reading strategy, of the processing result of the task request operation instruction corresponding to the coprocessor and the processing result of the task request operation instruction corresponding to the encryption hardware respectively includes:

[0034] According to the processing result reading priority, the processing result of the task request operation instruction corresponding to the coprocessor and the processing result of the task request operation instruction corresponding to the encryption hardware are read respectively; wherein the processing result reading priority of the encryption hardware is higher than the processing result reading priority of the coprocessor.

[0035] Optionally, the processing by the cryptographic acceleration resource component includes:

[0036] The coprocessor determines the number of task request operation instructions to be processed currently according to the number of currently allocated task request operation instructions and the number of currently cached processing results;

[0037] The coprocessor determines, according to the number of the currently-processed task request operation instructions, each target task request operation instruction currently to be processed from the currently-allocated task request operation instructions;

[0038] The coprocessor calls the cryptographic library interface to process each target task request operation instruction.

[0039] Optionally, the calling of the cryptographic library interface to process the operation instructions of each target task request includes:

[0040] Determining whether each of the target task request operation instructions is to be processed in batches;

[0041] If yes, then initialize the relevant parameters of the batch processing task request, and call the relevant interface of batch processing to batch process the operation instructions of each target task request;

[0042] If not, then initialize the relevant parameters of the non-batch processing task request, and call the relevant interface of the non-batch processing to perform non-batch processing on each of the target task request operation instructions.

[0043] In a second aspect, an embodiment of the present application further provides a task processing device, including: an acquisition module, a processing module and a reading module;

[0044] The acquisition module is used to acquire at least one task request operation instruction from an upper layer application;

[0045] The processing module is used to allocate each task request operation instruction to the cryptographic acceleration resource component according to the target scheduling mode, and the cryptographic acceleration resource component processes it; the cryptographic acceleration resource component includes: a coprocessor and encryption hardware, and the target scheduling mode includes: proportional scheduling or polling scheduling;

[0046] The reading module is used to read the processing results of the task request operation instructions corresponding to the coprocessor and the processing results of the task request operation instructions corresponding to the encryption hardware, respectively, and return the processing results corresponding to each task request operation instruction read to the upper application.

[0047] Optionally, it also includes: creating a module;

[0048] The creation module is used to create task request operation instructions corresponding to various types of task requests in the upper-layer application, and the task request operation instructions at least include: context space, input data, length of input data, address of output data, and length of output data.

[0049] Optionally, the processing module is specifically used to allocate each task request operation instruction to the coprocessor and the encryption hardware according to a preset allocation ratio; the allocation ratio is used to indicate the ratio of tasks allocated to the coprocessor and to the encryption hardware.

[0050] Optionally, the processing module is specifically used to determine the number of instructions to be processed corresponding to the coprocessor and the number of instructions to be processed corresponding to the acceleration hardware according to the allocation ratio and the number of received task request operation instructions;

[0051] According to the number of pending instructions corresponding to the coprocessor and the number of pending instructions corresponding to the acceleration hardware, a corresponding number of task request operation instructions are respectively allocated to the coprocessor and a corresponding number of task request operation instructions are allocated to the encryption hardware.

[0052] Optionally, the processing module is specifically used to cross-distribute each task request operation instruction to the coprocessor and the encryption hardware in sequence.

[0053] Optionally, the processing module is specifically used to determine whether to turn on the threshold unloading processing mode; wherein, in the threshold unloading processing mode, the processing object of the task request operation instruction is determined based on the length of the input data in the task request operation instruction and a preset threshold;

[0054] If the threshold unloading processing mode is not enabled, each task request operation instruction is allocated to the cryptographic acceleration resource component according to the target scheduling mode.

[0055] Optionally, the processing module is further used to determine whether to allocate each task request operation instruction to the cryptographic acceleration resource component according to a preset threshold and the length of input data in the task request operation instruction if the threshold unloading processing mode is turned on;

[0056] If it is determined that each task request operation instruction is to be allocated to a cryptographic acceleration resource component, each task request operation instruction is allocated to the cryptographic acceleration resource component according to the target scheduling mode.

[0057] Optionally, the processing module is specifically used to determine whether to allocate each task request operation instruction to the cryptographic acceleration resource component according to the length of the input data in each task request operation instruction and the comparison result of the preset threshold value;

[0058] If the length of the input data in the task request operation instruction is greater than the preset threshold, it is determined to allocate the task request operation instruction to the cryptographic acceleration resource component.

[0059] Optionally, the processing module is further configured to distribute the task request operation instruction to a local processor for processing by the local processor if the length of the input data in the task request operation instruction is less than the preset threshold.

[0060] Optionally, the reading module is specifically used to read the processing result of the task request operation instruction corresponding to the coprocessor and the processing result of the task request operation instruction corresponding to the encryption hardware respectively according to a pre-configured processing result reading strategy.

[0061] Optionally, the reading module is specifically used to read the processing results of the task request operation instructions corresponding to the coprocessor and the processing results of the task request operation instructions corresponding to the encryption hardware according to the processing result reading priority; wherein the processing result reading priority of the encryption hardware is higher than the processing result reading priority of the coprocessor.

[0062] Optionally, the processing module is specifically configured to determine, by the coprocessor, the number of task request operation instructions currently to be processed according to the number of currently allocated task request operation instructions and the number of currently cached processing results;

[0063] The coprocessor determines, according to the number of the currently-processed task request operation instructions, each target task request operation instruction currently to be processed from the currently-allocated task request operation instructions;

[0064] The coprocessor calls the cryptographic library interface to process each target task request operation instruction.

[0065] Optionally, the processing module is specifically used to determine whether each target task request operation instruction is to be processed in batches;

[0066] If yes, then initialize the relevant parameters of the batch processing task request, and call the relevant interface of batch processing to batch process the operation instructions of each target task request;

[0067] If not, then initialize the relevant parameters of the non-batch processing task request, and call the relevant interface of the non-batch processing to perform non-batch processing on each of the target task request operation instructions.

[0068] In a third aspect, an embodiment of the present application provides an electronic device, comprising: a processor, a storage medium and a bus, wherein the storage medium stores machine-readable instructions executable by the processor. When the electronic device is running, the processor and the storage medium communicate through the bus, and the processor executes the machine-readable instructions to implement the task processing method provided in the first aspect.

[0069] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the task processing method provided in the first aspect is executed.

[0070] The beneficial effects of this application are:

[0071] The present application provides a task processing method, device, electronic device and storage medium, the method comprising: obtaining at least one task request operation instruction from an upper layer application; assigning each task request operation instruction to a cryptographic acceleration resource component according to a target scheduling mode, and the cryptographic acceleration resource component performs processing; the cryptographic acceleration resource component comprises: a coprocessor and encryption hardware, and the target scheduling mode comprises: proportional scheduling or polling scheduling; respectively reading the processing results of the task request operation instruction corresponding to the coprocessor and the processing results of the task request operation instruction corresponding to the encryption hardware, and returning the processing results corresponding to each task request operation instruction read to the upper layer application. This scheme can make effective and reasonable use of idle resources by abstracting idle resources into cryptographic acceleration resource components, and assigning the task request operation instructions of the application layer to the cryptographic acceleration resource component for processing through the set target scheduling mode, effectively alleviating the processing burden of the processing engine in the application layer, accelerating the processing speed of tasks, and dynamically exerting the effectiveness of each high-performance acceleration resource in the platform. BRIEF DESCRIPTION OF THE DRAWINGS

[0072] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0073] Figure 1 A schematic diagram of a task processing system architecture provided in an embodiment of the present application;

[0074] Figure 2 A flowchart of a task processing method provided in an embodiment of the present application;

[0075] Figure 3 A flowchart of another task processing method provided in an embodiment of the present application;

[0076] Figure 4 A flowchart of another task processing method provided in an embodiment of the present application;

[0077] Figure 5 A flowchart of another task processing method provided in an embodiment of the present application;

[0078] Figure 6 A flowchart of another task processing method provided in an embodiment of the present application;

[0079] Figure 7 A flowchart of another task processing method provided in an embodiment of the present application;

[0080] Figure 8 A complete flowchart of a task processing method provided in an embodiment of the present application;

[0081] Fig. 9 A schematic diagram of a scheduler scheduling process provided in an embodiment of the present application;

[0082] Fig.10 A flowchart of another task processing method provided in an embodiment of the present application;

[0083] Fig.11 A schematic diagram of a task processing device provided in an embodiment of the present application;

[0084] Fig.12 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0085] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. It should be understood that the drawings in the present application only serve the purpose of explanation and description and are not used to limit the scope of protection of the present application. In addition, it should be understood that the schematic drawings are not drawn in real proportion. The flowchart used in this application shows the operations implemented according to some embodiments of the present application. It should be understood that the operations of the flowchart can be implemented out of order, and the steps without logical context can be reversed in order or implemented simultaneously. In addition, those skilled in the art can add one or more other operations to the flowchart under the guidance of the content of the present application, or remove one or more operations from the flowchart.

[0086] In addition, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0087] It should be noted that the term "comprising" will be used in the embodiments of the present application to indicate the existence of the features declared thereafter, but does not exclude the addition of other features.

[0088] Cryptography is to ensure the reliability, confidentiality and integrity of information. Cryptography calculations include encryption, decryption, verification, signature and other calculations, which consume a lot of CPU resources. Therefore, various hardware manufacturers have launched many accelerated unloading solutions:

[0089] First: Cryptography offload based on QAT. QAT is a hardware card launched by Intel to accelerate conventional encryption and compression operations.

[0090] Second: Encapsulate the KAE (Kunpeng Accelerator Engine) dedicated cryptographic acceleration hardware into the CPU die.

[0091] Third: offloading some computations to the AWS Cloud HSM cluster reduces the computational burden on the web server. AWS Cloud HSM is a hardware security module (HSM) hosted by AWS that provides secure key storage and encryption operations in the cloud, helping customers protect sensitive data and meet compliance requirements.

[0092] Cryptography offloading can refer to allocating encryption and decryption tasks originally handled by professional encryption hardware to other devices that can perform encryption and decryption (such as CPU) for processing, so as to reduce the burden of professional encryption hardware processing.

[0093] Although the above solution can realize the accelerated unloading of passwords, the acceleration hardware requires additional costs, the expansion cost is high, the hardware support algorithm is fixed, and the hardware resources are limited, which limits the unloading capability.

[0094] Figure 1A schematic diagram of a task processing system architecture provided for an embodiment of the present application. The system can be divided into an application layer and a user-mode driver layer. The application layer is deployed with multiple processing engines, which can include, for example: DPDK (Data Plane Development Kit, a high-performance data plane development tool set) engine, OpenSSL (Open Secure Sockets Layer, an open source software library package). Of course, it is not limited to these two processing engines, and other engines can also be used. In the traditional task processing method, the tasks can be processed by each processing engine deployed in the application layer.

[0095] The user-mode driver layer can be deployed with a scheduler, CEU (Cipher Engine Unit) and at least one coprocessor. CEU and coprocessor can together constitute a cryptographic acceleration resource component. Among them, CEU belongs to the hardware encryption component, which can be collectively referred to as encryption hardware later, while the coprocessor belongs to the software encryption component. When the task is not an encryption and decryption task, the cryptographic engine in the user-mode driver layer can also be other hardware processing engines.

[0096] The scheduler can receive task request operation instructions issued by the application layer, so that the scheduler can offload the task request operation instructions to the cryptographic acceleration resource component for processing according to the set scheduling mode, so as to alleviate the burden of task processing on the processing engine in the application layer and effectively utilize the idle computing power of the platform.

[0097] Figure 2 A flowchart of a task processing method provided for an embodiment of the present application; the method can be applied to electronic devices, and the execution subject of the method can be a processing process created in the CPU of the electronic device, and the processing process can be used as a scheduler to unload the task request operation instructions issued by the upper-layer application to the cryptographic acceleration resource component for processing according to the target scheduling mode in the present solution. Among them, the cryptographic acceleration resource component may include: a coprocessor and encryption hardware, the coprocessor may be a software component created in the CPU, and the encryption hardware may be an idle hardware resource in the electronic device.

[0098] like Figure 2 As shown, the method may include:

[0099] S101. Obtain at least one task request operation instruction from an upper layer application.

[0100] In this embodiment, encryption and decryption tasks are mainly used as task examples, but in fact, this solution can also be applied to other types of task processing. Figure 1 The application layer shown in .

[0101] A memory pool may be pre-created in the upper-layer application to store different types of task request operation instructions. When processing tasks, the upper-layer application may take out a specified number of task request operation instructions from the memory pool and send them to the scheduler in the user-mode driver layer.

[0102] S102. Allocate each task request operation instruction to a cryptographic acceleration resource component according to a target scheduling mode, and process it by the cryptographic acceleration resource component; the cryptographic acceleration resource component includes: a coprocessor and encryption hardware, and the target scheduling mode includes: proportional scheduling or polling scheduling.

[0103] Based on the received task request operation instructions, the scheduler can allocate each task request operation instruction to the cryptographic acceleration resource component according to a preset target scheduling mode.

[0104] In this embodiment, the idle encryption computing power in the platform can be abstracted as a cryptographic acceleration resource component. The cryptographic acceleration resource component can include a coprocessor and cryptographic hardware. The coprocessor can be a software component in the CPU. The purpose of designing the coprocessor is to cooperate with the use of cryptographic hardware to improve the encryption processing capability of the platform. Therefore, the coprocessor needs to complete as many encryption requests as possible without affecting the hardware performance. The cryptographic hardware can be distinguished from professional cryptographic hardware and can be an idle encryption engine in the platform.

[0105] By allocating task request operation instructions to the cryptographic acceleration resource component for processing, the processing burden of professional encryption hardware can be reduced, idle resources can be effectively utilized, and the effect of task acceleration processing can be achieved.

[0106] In some embodiments, the target scheduling mode may include: proportional scheduling or polling scheduling. Proportional scheduling may refer to allocating each task request operation instruction to the coprocessor and the encryption hardware according to a set allocation ratio. Polling scheduling may refer to allocating each task request operation instruction to the coprocessor and the encryption hardware in sequence according to a certain polling ratio.

[0107] S103, respectively reading the processing results of the task request operation instructions corresponding to the coprocessor and the processing results of the task request operation instructions corresponding to the encryption hardware, and returning the processing results corresponding to the read task request operation instructions to the upper layer application.

[0108] After processing the task request operation instruction in the cryptographic acceleration resource component, the processing result obtained can be returned by the cryptographic acceleration resource component and stored in the specified cache, and then the scheduler reads each processing result from the specified cache and returns the processing result to the upper-level application.

[0109] In summary, the task processing method provided by this embodiment includes: obtaining at least one task request operation instruction from the upper layer application; assigning each task request operation instruction to the cryptographic acceleration resource component according to the target scheduling mode, and the cryptographic acceleration resource component performs processing; the cryptographic acceleration resource component includes: a coprocessor and encryption hardware, and the target scheduling mode includes: proportional scheduling or polling scheduling; respectively reading the processing results of the task request operation instruction corresponding to the coprocessor and the processing results of the task request operation instruction corresponding to the encryption hardware, and returning the processing results corresponding to each task request operation instruction read to the upper layer application. This scheme can make effective and reasonable use of idle resources by abstracting idle resources into cryptographic acceleration resource components, and assigning the task request operation instructions of the application layer to the cryptographic acceleration resource component for processing through the set target scheduling mode, effectively alleviating the processing burden of the processing engine in the application layer, accelerating the processing speed of tasks, and dynamically exerting the effectiveness of each high-performance acceleration resource in the platform.

[0110] Optionally, the method of the present application may also include: creating task request operation instructions corresponding to each type of task request in the upper-level application, and the task request operation instructions include at least: context space, input data, length of input data, address of output data, and length of output data.

[0111] In some embodiments, an op memory pool may be maintained in the upper layer application, and each op may be set according to the algorithm type. Taking encryption and decryption tasks as an example, op refers to an operation command for encryption and decryption.

[0112] Taking op as SM3 (block encryption algorithm) as an example, the task request operation instruction corresponding to SM3 may include: context space, input data, length of input data, address of output data; taking op as SM4 (block encryption algorithm) as an example, the task request operation instruction corresponding to SM3 may include: context space, input data, length of input data, address of output data, length of output data, key (key), iv (offset); taking op as SM2 (asymmetric encryption algorithm) as an example, the task request operation instruction corresponding to SM3 may include: context space, input data, length of input data, address of output data, and length of output data.

[0113] When performing encryption and decryption tasks, the upper-layer application can take out burst_size task request operation instructions from the op memory pool and store them in the array ops, and then send them to the queue of the scheduler. The default value of burst_size is 16, which can be adjusted according to the actual situation.

[0114] Optionally, in step S102, each task request operation instruction is allocated to the cryptographic acceleration resource component according to the target scheduling mode, which may include: according to a preset allocation ratio, each task request operation instruction is allocated to the coprocessor and the encryption hardware; the allocation ratio is used to indicate the ratio of tasks allocated to the coprocessor and to the encryption hardware.

[0115] After receiving burst_size task request operation instructions, the scheduler can allocate each task request operation instruction to the cryptographic acceleration resource component according to the target scheduling mode.

[0116] In an achievable manner, the scheduler can allocate each task request operation instruction to the coprocessor and the encryption hardware according to a preset allocation ratio. The preset allocation ratio indicates the ratio of tasks to be allocated to the coprocessor and to the encryption hardware.

[0117] For example, the preset allocation ratio may be: coprocessor-40%, encryption hardware-60%. Then, 40% of the multiple task request operation instructions received by the scheduler may be allocated to the coprocessor for processing, and the remaining 60% may be allocated to the encryption hardware for processing.

[0118] When allocating, it can be parallel batch allocation, or it can be allocated to the coprocessor first and then to the encryption hardware, or it can be allocated to the encryption hardware first and then to the coprocessor in sequence.

[0119] Figure 3 A flowchart of another task processing method provided by an embodiment of the present application; in the above steps, each task request operation instruction is respectively allocated to the coprocessor and the encryption hardware according to a preset allocation ratio, which may include:

[0120] S201. Determine the number of instructions to be processed corresponding to the coprocessor and the number of instructions to be processed corresponding to the acceleration hardware according to the allocation ratio and the number of received task request operation instructions.

[0121] According to the number of task request operation instructions received by the scheduler, the number of pending instructions that the coprocessor needs to allocate and the number of pending instructions corresponding to the acceleration hardware can be calculated according to a preset allocation ratio.

[0122] For example, the number of task request operation instructions received by the scheduler is 20, and the preset allocation ratio can be: coprocessor-40%, encryption hardware-60%. Then, it can be calculated that the number of pending instructions that need to be allocated to the coprocessor is 8, and the number of pending instructions that need to be allocated to the encryption hardware is 12.

[0123] S202, according to the number of pending instructions corresponding to the coprocessor and the number of pending instructions corresponding to the acceleration hardware, respectively assigning a corresponding number of task request operation instructions to the coprocessor and assigning a corresponding number of task request operation instructions to the encryption hardware.

[0124] Based on the calculated allocation quantity, a corresponding number of task request operation instructions may be allocated to the coprocessor and the encryption hardware respectively.

[0125] Continuing to refer to the example in step S201, when the number of pending instructions assigned to the coprocessor is calculated to be 8, and the number of pending instructions assigned to the encryption hardware is 12, the instructions can be assigned according to the calculated number. The scheduler can read all 20 task request operation instructions from the scheduler's queue at one time, and use a batch allocation method to assign 8 of the task request operation instructions to the coprocessor and the remaining 12 task request operation instructions to the encryption hardware.

[0126] The 8 task request operation instructions assigned to the coprocessor may be 8 randomly selected from the total 20 task request operation instructions, and the 12 task request operation instructions assigned to the encryption hardware may be the remaining 12 task request operation instructions. Alternatively, 12 randomly selected from the total 20 task request operation instructions may be assigned to the encryption hardware, and then the remaining 8 task request operation instructions may be all assigned to the coprocessor.

[0127] Optionally, in step S102, allocating each task request operation instruction to a cryptographic acceleration resource component according to a target scheduling mode may include: cross-allocating each task request operation instruction to a coprocessor and encryption hardware in sequence.

[0128] In another achievable manner, each task request operation instruction may be cross-distributed to the coprocessor and the encryption hardware in sequence according to a preset polling method. The preset polling method indicates the frequency of distributing the task request operation instructions to the coprocessor and the encryption hardware in sequence.

[0129] Exemplarily, assuming that the preset polling method indicates that the allocation frequency is 1, a task request operation instruction can be allocated to the coprocessor, and the next task request operation instruction can be allocated to the encryption hardware, that is, one is allocated to the coprocessor and one to the encryption hardware, and then allocated crosswise in sequence.

[0130] Or if the preset polling method indicates that the allocation frequency is 2, two task request operation instructions may be allocated to the coprocessor, and then two task request operation instructions may be allocated to the encryption hardware, and then the two task request operation instructions may be allocated crosswise in sequence.

[0131] There is no restriction on allocating to the coprocessor first or to the encryption hardware first. As long as the allocation frequency meets the requirement, the allocation can be cross-allocated in sequence.

[0132] For this polling allocation method, the scheduler can allocate task request operation instructions immediately when receiving them from the upper-level application. That is, each time the scheduler receives a task request operation instruction, it allocates the currently received task request operation instruction according to the allocation frequency indicated by the polling method.

[0133] Exemplarily, the preset polling method indicates that the allocation frequency is 1. When performing cross-allocation, the default is to allocate to the coprocessor first and then to the encryption hardware. Then, when the scheduler receives a task request operation instruction, it immediately allocates the task request operation instruction to the coprocessor, and when the scheduler receives the next task request operation instruction, it immediately allocates the task request operation instruction to the encryption hardware.

[0134] Alternatively, the scheduler may also receive multiple task request operation instructions sent by the upper layer application in batches, and store each task request operation instruction in a queue. When allocating in a polling manner, each task request operation instruction may be read from the queue in sequence, and cross-allocated to the coprocessor and the encryption hardware in sequence according to the allocation frequency indicated by the preset polling manner.

[0135] It is worth noting that in the polling allocation method, each task request operation instruction can be taken out from the scheduler queue in turn, and one is taken out and allocated. In the proportional allocation method, each task request operation instruction can be taken out from the scheduler queue at one time and allocated in batches at the same time.

[0136] Figure 4 A flowchart of another task processing method provided by an embodiment of the present application; optionally, in step S102, allocating each task request operation instruction to a cryptographic acceleration resource component according to a target scheduling mode may include:

[0137] S301, determining whether to enable a threshold value unloading processing mode; wherein, in the threshold value unloading processing mode, determining a processing object of the task request operation instruction based on the length of input data in the task request operation instruction and a preset threshold value.

[0138] This embodiment describes the triggering conditions for assigning a task request operation instruction to a cryptographic acceleration resource component.

[0139] In addition to allocating task request operation instructions to the cryptographic acceleration resource component for processing, some tasks with smaller processing resource computing power requirements can also be allocated to the local CPU for processing.

[0140] Optionally, after receiving the task request operation instruction, the scheduler may first determine whether to turn on the threshold unloading processing mode. The threshold unloading processing mode refers to determining the processing object to which the task request operation instruction is assigned according to the preset threshold. Under different judgment results, the processing object to which the task request operation instruction is assigned may be different. In one possible judgment result, when the judgment condition is met, the processing may be performed in accordance with the method of this solution, that is, the task request operation instruction is assigned to the cryptographic acceleration resource component for processing.

[0141] In the threshold offloading processing mode, the processing object to which the task request operation instruction is assigned can be determined according to the set unified threshold and the length of the input data in the task request operation instruction.

[0142] The processing object can be a cryptographic acceleration resource component or a local CPU.

[0143] S302: If the threshold unloading processing mode is not enabled, each task request operation instruction is allocated to the cryptographic acceleration resource component according to the target scheduling mode.

[0144] In one case, if the threshold offload processing mode is not enabled, each task request operation instruction may be allocated to a cryptographic acceleration resource component according to a target scheduling mode.

[0145] That is to say, when the threshold offloading processing mode is not enabled, the task request operation instruction can be allocated to the cryptographic acceleration resource component for processing according to the allocation method of this solution.

[0146] In some cases, if the threshold offloading processing mode is turned on, but no preset threshold is set, the task request operation instruction is also allocated to the cryptographic acceleration resource component for processing according to the allocation method of this solution.

[0147] Figure 5 A flowchart of another task processing method provided in an embodiment of the present application; the method may also include:

[0148] S401: If the threshold unloading processing mode is turned on, it is determined whether to allocate each task request operation instruction to the cryptographic acceleration resource component according to the preset threshold and the length of the input data in the task request operation instruction.

[0149] In another case, if the threshold unloading processing mode is turned on, it can be determined whether to allocate each task request operation instruction to the cryptographic acceleration resource component based on the preset threshold and the length of the input data in the task request operation instruction.

[0150] The preset threshold may be a threshold configured through a configuration file. If the preset threshold is not set, the threshold in the algorithm unloading table may be used as the preset threshold. The threshold in the unloading table may be a reasonable recommended value obtained after testing. Different tasks may have different thresholds in the algorithm unloading table. Of course, different tasks in the unloading table may correspond to the same threshold.

[0151] It is worth noting that when comparing the preset threshold with the length of the input data in the task request operation instruction, the judgment results corresponding to different task request operation instructions may be different. That is to say, each task request operation instruction is treated as an independent task, part of which may be assigned to the cryptographic acceleration resource component for processing, and the other part may be assigned to the local CPU for processing.

[0152] S402: If it is determined that each task request operation instruction is to be allocated to a cryptographic acceleration resource component, each task request operation instruction is allocated to the cryptographic acceleration resource component according to a target scheduling mode.

[0153] If the above judgment result is to allocate each task request operation instruction to the cryptographic acceleration resource component, the task allocation can be performed according to the allocation method of this scheme, that is, each task request operation instruction can be allocated to the cryptographic acceleration resource component according to the target scheduling mode.

[0154] Figure 6 A flowchart of another task processing method provided by an embodiment of the present application; optionally, in step S401, judging whether to allocate each task request operation instruction to a cryptographic acceleration resource component according to a preset threshold and the length of input data in the task request operation instruction may include:

[0155] S501. Determine whether to allocate each task request operation instruction to a cryptographic acceleration resource component based on the length of input data in each task request operation instruction and a comparison result of a preset threshold.

[0156] Optionally, the length of the input data in the task request operation instruction can be compared with a preset threshold, and based on the comparison result, it is determined whether to assign the task request operation instruction to the cryptographic acceleration resource component for processing or to assign the task request operation instruction to the local CPU for processing.

[0157] S502: If the length of the input data in the task request operation instruction is greater than a preset threshold, determine to allocate the task request operation instruction to the cryptographic acceleration resource component.

[0158] In some embodiments, if the length of the input data in the task request operation instruction is greater than a preset threshold, it can be considered that the computing power required to process the task request operation instruction is large. At this time, the task request operation instruction can be assigned to the cryptographic acceleration resource component for processing to alleviate the burden of processing through professional hardware.

[0159] Optionally, the method of the present application further includes: if the length of the input data in the task request operation instruction is less than a preset threshold, the task request operation instruction is allocated to a local processor for processing by the local processor.

[0160] In some embodiments, if the length of the input data in the task request operation instruction is less than a preset threshold, it can be considered that the computing power required to process the task request operation instruction is relatively small. At this time, the task request operation instruction can be assigned to the local CPU for processing. The local CPU can refer to the CPU where the task is located, because in this case it will not cause too much burden on the computing power of the CPU where the task is located.

[0161] Optionally, in step S103, respectively reading the processing results of the task request operation instructions corresponding to the coprocessor and the processing results of the task request operation instructions corresponding to the encryption hardware may include: reading the processing results of the task request operation instructions corresponding to the coprocessor and the processing results of the task request operation instructions corresponding to the encryption hardware according to a pre-configured processing result reading strategy.

[0162] In some embodiments, when the scheduler reads the processing results generated after the cryptographic acceleration resource component processes the task request operation instructions, it can read them according to a preconfigured processing result reading strategy to respectively read the processing results of each task request operation instruction processed by the coprocessor and the processing results of each task request operation instruction processed by the encryption hardware.

[0163] Optionally, according to a preconfigured processing result reading strategy, the processing results of the task request operation instructions corresponding to the coprocessor and the processing results of the task request operation instructions corresponding to the encryption hardware are read separately, which may include: according to the processing result reading priority, reading the processing results of the task request operation instructions corresponding to the coprocessor and the processing results of the task request operation instructions corresponding to the encryption hardware respectively; wherein the processing result reading priority of the encryption hardware is higher than the processing result reading priority of the coprocessor.

[0164] The processing result reading priority indicates the order of reading the processing results from the coprocessor and from the encryption hardware. In this embodiment, the processing result reading priority of the encryption hardware is higher than the processing result reading priority of the coprocessor. That is, when reading the processing results, the processing results processed by the encryption hardware can be read first, and then the processing results processed by the coprocessor can be read.

[0165] Among them, the processing results after encryption hardware processing can be stored in the corresponding hardware processing queue, and the processing results after coprocessor processing can be stored in the corresponding software processing queue. The scheduler can first read all processing results after encryption hardware processing from the hardware processing queue, and after reading, read all processing results after coprocessor processing from the software processing queue.

[0166] Of course, in addition to the method of reading according to priority, it is also possible to read the processing results corresponding to the tasks with high priority first and then read the processing results corresponding to the tasks with low priority according to the priority of each task. Of course, there can be other methods, not limited to the ones listed in this solution.

[0167] Figure 7 A flowchart of another task processing method provided in an embodiment of the present application; optionally, in step S102, the cryptographic acceleration resource component performs processing, which may include:

[0168] S601: The coprocessor determines the number of task request operation instructions to be processed according to the number of currently allocated task request operation instructions and the number of currently cached processing results.

[0169] In this embodiment, the process of task processing by the coprocessor is used as an example for explanation. The task request operation instruction assigned by the scheduler to the coprocessor can be stored in the command ring cmd_ring corresponding to the coprocessor. The coprocessor can first query the number of elements entries in the cmd_ring of the coprocessor and the number of elements free_enties that can be stored in the response ring buffer rsp_ring. Among them, rsp_ring can refer to a cache area used to cache the processing results of the coprocessor and the encryption hardware.

[0170] That is, the number of currently allocated task request operation instructions corresponds to entries, and the total number of processing results that can be stored in rsp_ring minus the number of currently cached processing results can be obtained to obtain the number of elements that can be stored in rsp_ring, free_enties.

[0171] Then, according to the number entries of the allocated task request operation instructions and the number free_enties of the elements that can be stored in the response ring buffer rsp_ring, the minimum value between entries and free_enties can be taken, and the determined minimum value is determined as the number of task request operation instructions currently to be processed by the coprocessor.

[0172] S602: The coprocessor determines, according to the number of task request operation instructions currently to be processed, from the currently allocated task request operation instructions, each target task request operation instruction currently to be processed.

[0173] Then, the coprocessor may take out the determined corresponding number of target task request operation instructions from all the task request operation instructions in the command ring cmd_ring corresponding to the coprocessor and store them in the array cmd_buf.

[0174] S603: The coprocessor calls the cryptographic library interface to process the operation instructions requested by each target task.

[0175] The coprocessor can call the CPU encryption and decryption resources of the platform to perform batch encryption processing on the target task request operation instructions in the array cmd_buf.

[0176] Figure 8 A complete flowchart of a task processing method provided in an embodiment of the present application. Figure 8 As shown in the figure, the upper-layer application maintains a memory pool, in which multiple task request operation instructions (op) are created. When performing encryption and decryption, the upper-layer application can take out burst_size task request operation instructions from the memory pool and store them in the array ops, and then send them to the queue pair of the scheduler. Figure 8 Step ①.

[0177] After receiving burst_size task request operation instructions, the scheduler can allocate burst_size task request operation instructions to the command ring (cmd ring) of the encryption hardware and the command ring of the coprocessor in the target scheduling mode. Figure 8 Step ②.

[0178] The coprocessor first queries the number of elements entries in the coprocessor's cmd_ring and the number of elements free_enties that can be stored in rsp_ring (Response Ring). Then it takes out MIN (entries, free_enties) target task request operation instructions from cmd_ring and stores them in the array cmd_buf, where MIN() means taking the minimum value. Then it calls the platform's CPU encryption and decryption resources, batch encrypts and processes the elements in cmd_buf, and then stores the addresses of the processed task request operation instructions and the status of the processing results in the array rsp_buf corresponding to the coprocessor. Figure 8 As shown in steps ③, ④, ⑤, and ⑥.

[0179] At the same time, after receiving the operation instructions of each task request, the encryption hardware calls the hardware encryption and decryption resources of the platform, and sends the batch encryption processing to the elements in cmd_buf of the encryption hardware, and then stores the address of each task request operation instruction after processing and the status of the processing result in the array rsp_buf corresponding to the encryption hardware. The process is as follows Figure 8 Steps ③, ④, ⑤, and ⑥ in are consistent.

[0180] The encryption processing unit reads the processing results from the array rsp_buf corresponding to the coprocessor and writes them into the response ring buffer rsp ring corresponding to the coprocessor, and reads the processing results from the array rsp_buf corresponding to the encryption hardware and writes them into the response ring buffer rsp ring corresponding to the encryption hardware. Figure 8 As shown in step ⑦ in .

[0181] The scheduler reads the priority of the processing results according to the preset processing result, takes out burst_size processing results from the rsp ring corresponding to the encryption hardware and the rsp_ring corresponding to the coprocessor, and then stores them in the array rsps, such as Figure 8 As shown in step ⑧ in .

[0182] The scheduler takes burst_size processing results from the array rsps and returns them to the upper-layer application, such as Figure 8 As shown in step ⑨.

[0183] Fig. 9 A flow chart of a scheduler scheduling provided in an embodiment of the present application, wherein the arrow direction from the application layer via the scheduler to the non-memory access node indicates the flow of the upper-layer application assigning a task request operation instruction to the cryptographic acceleration resource component via the scheduler; the arrow direction from the non-memory access node via the scheduler to the application layer indicates the flow of the cryptographic acceleration resource component returning the processing result to the application layer via the scheduler. Encryption hardware and coprocessors are deployed in the non-memory access node.

[0184] Fig.10 A flowchart of another task processing method provided by an embodiment of the present application; Optionally, in step S603, calling a cryptographic library interface to process each target task request operation instruction may include:

[0185] S701, determining whether each target task request operation instruction is to be processed in batches.

[0186] This embodiment takes the process of task processing by the coprocessor as an example to illustrate. The coprocessor uses the cryptographic library to perform encryption and decryption by filling in the relevant parameters of the cryptographic library interface.

[0187] Assuming that each target task request operation instruction is of a type supported by this solution, it is determined whether each target task request operation instruction needs to be processed in batches.

[0188] S702: If yes, initialize the relevant parameters of the batch processing task request, and call the relevant interface of batch processing to batch process the operation instructions of each target task request.

[0189] If batch processing is required, then initialize the relevant parameters of the batch processing task request. Taking the task as an encryption and decryption task as an example, initialize the relevant parameters of the batch processing encryption and decryption request, and call the relevant interface to perform encryption and decryption processing.

[0190] S703: If not, initialize the relevant parameters of the non-batch processing task request, and call the relevant interface of the non-batch processing to perform non-batch processing on each target task request operation instruction.

[0191] If batch processing is not required, the relevant parameters of the non-batch processing encryption and decryption request are initialized, and the relevant interface is called for encryption and decryption.

[0192] The process of encryption hardware processing tasks is similar to that of the coprocessor and will not be repeated here.

[0193] In summary, the task processing method provided by this embodiment includes: obtaining at least one task request operation instruction from the upper layer application; assigning each task request operation instruction to the cryptographic acceleration resource component according to the target scheduling mode, and the cryptographic acceleration resource component performs processing; the cryptographic acceleration resource component includes: a coprocessor and encryption hardware, and the target scheduling mode includes: proportional scheduling or polling scheduling; respectively reading the processing results of the task request operation instruction corresponding to the coprocessor and the processing results of the task request operation instruction corresponding to the encryption hardware, and returning the processing results corresponding to each task request operation instruction read to the upper layer application. This scheme can make effective and reasonable use of idle resources by abstracting idle resources into cryptographic acceleration resource components, and assigning the task request operation instructions of the application layer to the cryptographic acceleration resource component for processing through the set target scheduling mode, effectively alleviating the processing burden of the processing engine in the application layer, accelerating the processing speed of tasks, and dynamically exerting the effectiveness of each high-performance acceleration resource in the platform.

[0194] The following describes the apparatus, device, storage medium, etc. used to execute the task processing method provided in this application. The specific implementation process and technical effects are described above and will not be repeated below.

[0195] Fig.11 Schematic diagram of a task processing device provided in an embodiment of the present application, the functions implemented by the task processing device correspond to the steps performed by the above method. Fig.11As shown, the device may include: an acquisition module 110, a processing module 120 and a reading module 130;

[0196] The acquisition module 110 is used to acquire at least one task request operation instruction from an upper layer application;

[0197] The processing module 120 is used to allocate each task request operation instruction to the cryptographic acceleration resource component according to the target scheduling mode, and the cryptographic acceleration resource component processes it; the cryptographic acceleration resource component includes: a coprocessor and encryption hardware, and the target scheduling mode includes: proportional scheduling or polling scheduling;

[0198] The reading module 130 is used to read the processing results of the task request operation instructions corresponding to the coprocessor and the processing results of the task request operation instructions corresponding to the encryption hardware, and return the processing results corresponding to each task request operation instruction to the upper application.

[0199] Optionally, it also includes: creating a module;

[0200] The creation module is used to create task request operation instructions corresponding to various types of task requests in the upper layer application. The task request operation instructions at least include: context space, input data, length of input data, address of output data, and length of output data.

[0201] Optionally, the processing module 120 is specifically used to allocate each task request operation instruction to the coprocessor and the encryption hardware according to a preset allocation ratio; the allocation ratio is used to indicate the ratio of tasks allocated to the coprocessor and to the encryption hardware.

[0202] Optionally, the processing module 120 is specifically configured to determine the number of instructions to be processed corresponding to the coprocessor and the number of instructions to be processed corresponding to the acceleration hardware according to the allocation ratio and the number of received task request operation instructions;

[0203] According to the number of pending instructions corresponding to the coprocessor and the number of pending instructions corresponding to the acceleration hardware, a corresponding number of task request operation instructions are respectively allocated to the coprocessor and a corresponding number of task request operation instructions are allocated to the encryption hardware.

[0204] Optionally, the processing module 120 is specifically configured to cross-distribute each task request operation instruction to the coprocessor and the encryption hardware in sequence.

[0205] Optionally, the processing module 120 is specifically used to determine whether to turn on the threshold unloading processing mode; wherein, in the threshold unloading processing mode, the processing object of the task request operation instruction is determined based on the length of the input data in the task request operation instruction and a preset threshold;

[0206] If the threshold offloading processing mode is not enabled, each task request operation instruction is allocated to the cryptographic acceleration resource component according to the target scheduling mode.

[0207] Optionally, the processing module 120 is further configured to determine whether to allocate each task request operation instruction to the cryptographic acceleration resource component according to a preset threshold and the length of input data in the task request operation instruction if the threshold unloading processing mode is turned on;

[0208] If it is determined that each task request operation instruction is allocated to the cryptographic acceleration resource component, each task request operation instruction is allocated to the cryptographic acceleration resource component according to the target scheduling mode.

[0209] Optionally, the processing module 120 is specifically used to determine whether to allocate each task request operation instruction to the cryptographic acceleration resource component according to the length of the input data in each task request operation instruction and the comparison result of the preset threshold value;

[0210] If the length of the input data in the task request operation instruction is greater than a preset threshold, it is determined to allocate the task request operation instruction to the cryptographic acceleration resource component.

[0211] Optionally, the processing module 120 is further configured to distribute the task request operation instruction to a local processor for processing by the local processor if the length of the input data in the task request operation instruction is less than a preset threshold.

[0212] Optionally, the reading module 130 is specifically configured to read the processing result of the task request operation instruction corresponding to the coprocessor and the processing result of the task request operation instruction corresponding to the encryption hardware respectively according to a pre-configured processing result reading strategy.

[0213] Optionally, the reading module 130 is specifically used to read the processing results of the task request operation instructions corresponding to the coprocessor and the processing results of the task request operation instructions corresponding to the encryption hardware according to the processing result reading priority; wherein the processing result reading priority of the encryption hardware is higher than the processing result reading priority of the coprocessor.

[0214] Optionally, the processing module 120 is specifically configured to determine, by the coprocessor, the number of task request operation instructions currently to be processed according to the number of currently allocated task request operation instructions and the number of currently cached processing results;

[0215] The coprocessor determines the target task request operation instructions to be processed currently from the currently allocated task request operation instructions according to the number of the task request operation instructions to be processed currently;

[0216] The coprocessor calls the cryptographic library interface to process the operation instructions requested by each target task.

[0217] Optionally, the processing module 120 is specifically used to determine whether each target task request operation instruction is to be processed in batches;

[0218] If yes, then initialize the relevant parameters of the batch processing task request, and call the relevant interface of batch processing to batch process the operation instructions of each target task request;

[0219] If not, then initialize the relevant parameters of the non-batch processing task request, and call the relevant interface of the non-batch processing to perform non-batch processing on each target task request operation instruction.

[0220] The above modules may be one or more integrated circuits configured to implement the above methods, such as one or more application specific integrated circuits (ASIC), or one or more digital singnal processors (DSP), or one or more field programmable gate arrays (FPGA). For another example, when a module is implemented in the form of a processing element scheduling program code, the processing element may be a general-purpose processor, such as a central processing unit (CPU) or other processor that can call program code. For another example, these modules may be integrated together and implemented in the form of a system-on-a-chip (SOC).

[0221] The above modules can be connected or communicated with each other via a wired connection or a wireless connection. The wired connection may include a metal cable, an optical cable, a hybrid cable, etc., or any combination thereof. The wireless connection may include a connection in the form of a LAN, a WAN, Bluetooth, a ZigBee, or NFC, or any combination thereof. Two or more modules may be combined into a single module, and any one module may be divided into two or more units. Those skilled in the art will clearly understand that for the convenience and simplicity of description, the specific working process of the system and device described above can refer to the corresponding process in the method embodiment, and will not be repeated in this application.

[0222] Fig.12 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application, which may be a computing device with data processing capabilities.

[0223] The device may include: a processor 801 and a storage medium 802 .

[0224] The storage medium 802 is used to store programs, and the processor 801 calls the programs stored in the storage medium 802 to execute the above method embodiment. The specific implementation method and technical effect are similar and will not be repeated here.

[0225] The storage medium 802 stores program code, and when the program code is executed by the processor 801, the processor 801 executes various steps of the task processing method according to various exemplary embodiments of the present application described in the above “Exemplary Method” section of this specification.

[0226] Processor 801 can be a general-purpose processor, such as a central processing unit (CPU), a digital signal processor (DigitalSignal Processor, DSP), an application-specific integrated circuit (Application Specific Integrated Circuit, ASIC), a field programmable gate array (Field Programmable Gate Array, FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, and can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiments of the present application. A general-purpose processor can be a microprocessor or any conventional processor, etc. The steps of the method disclosed in conjunction with the embodiments of the present application can be directly embodied as a hardware processor to be executed, or a combination of hardware and software modules in the processor can be executed.

[0227] Storage medium 802, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer executable programs and modules. Storage medium may include at least one type of storage medium, such as flash memory, hard disk, multimedia card, card-type storage medium, random access storage medium (Random Access Memory, RAM), static random access storage medium (Static Random Access Memory, SRAM), programmable read-only storage medium (Programmable Read Only Memory, PROM), read-only storage medium (Read Only Memory, ROM), electrically erasable programmable read-only storage medium (Electrically Erasable Programmable Read-Only Memory, EEPROM), magnetic storage medium, disk, optical disk, etc. Storage medium is any other medium that can be used to carry or store a desired program code in the form of an instruction or data structure and can be accessed by a computer, but is not limited thereto. The storage medium 802 in the embodiment of the present application can also be a circuit or any other device that can realize a storage function, for storing program instructions and / or data.

[0228] Optionally, the present application also provides a program product, such as a computer-readable storage medium, including a program, which is used to execute the above method embodiment when executed by a processor.

[0229] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0230] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0231] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0232] The above-mentioned integrated unit implemented in the form of a software functional unit can be stored in a computer-readable storage medium. The above-mentioned software functional unit is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor (English: processor) to perform some steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only storage medium (English: Read-Only Memory, referred to as: ROM), random access storage medium (English: Random Access Memory, referred to as: RAM), disk or optical disk and other media that can store program code.

Claims

1. A task processing method, applied to an electronic device, characterized in that: include: Obtaining at least one task request operation instruction from an upper layer application; Allocating each task request operation instruction to a cryptographic acceleration resource component according to a target scheduling mode, and processing the instruction by the cryptographic acceleration resource component; The cryptographic acceleration resource component includes: a coprocessor and encryption hardware, and the target scheduling mode includes: proportional scheduling or polling scheduling; The processing results of the task request operation instructions corresponding to the coprocessor and the processing results of the task request operation instructions corresponding to the encryption hardware are read respectively, and the processing results corresponding to each task request operation instruction read are returned to the upper layer application.

2. The task processing method according to claim 1, characterized in that: Also includes: In the upper layer application, task request operation instructions corresponding to each type of task request are created, and the task request operation instructions at least include: context space, input data, length of input data, address of output data, and length of output data.

3. The task processing method according to claim 1, characterized in that: The step of allocating each task request operation instruction to the cryptographic acceleration resource component according to the target scheduling mode includes: Each task request operation instruction is allocated to the coprocessor and the encryption hardware according to a preset allocation ratio; the allocation ratio is used to indicate the ratio of the tasks allocated to the coprocessor and the tasks allocated to the encryption hardware.

4. The task processing method according to claim 3, characterized in that: The step of respectively allocating each task request operation instruction to the coprocessor and the encryption hardware according to a preset allocation ratio includes: According to the allocation ratio and the number of received task request operation instructions, respectively determining the number of instructions to be processed corresponding to the coprocessor and the number of instructions to be processed corresponding to the acceleration hardware; According to the number of pending instructions corresponding to the coprocessor and the number of pending instructions corresponding to the acceleration hardware, a corresponding number of task request operation instructions are respectively allocated to the coprocessor and a corresponding number of task request operation instructions are allocated to the encryption hardware.

5. The task processing method according to claim 1, characterized in that: The step of allocating each task request operation instruction to the cryptographic acceleration resource component according to the target scheduling mode includes: The task request operation instructions are cross-distributed to the coprocessor and the encryption hardware in sequence.

6. The task processing method according to claim 1, characterized in that: The step of allocating each task request operation instruction to the cryptographic acceleration resource component according to the target scheduling mode includes: Determine whether to enable a threshold unloading processing mode; wherein, in the threshold unloading processing mode, determine the processing object of the task request operation instruction based on the length of the input data in the task request operation instruction and a preset threshold; If the threshold unloading processing mode is not enabled, each task request operation instruction is allocated to the cryptographic acceleration resource component according to the target scheduling mode.

7. The task processing method according to claim 6, characterized in that: Also includes: If the threshold unloading processing mode is turned on, it is determined whether to allocate each task request operation instruction to the cryptographic acceleration resource component according to the preset threshold and the length of the input data in the task request operation instruction; If it is determined that each task request operation instruction is to be allocated to a cryptographic acceleration resource component, each task request operation instruction is allocated to the cryptographic acceleration resource component according to the target scheduling mode.

8. The task processing method according to claim 7, characterized in that: The step of determining whether to allocate each task request operation instruction to a cryptographic acceleration resource component according to a preset threshold and the length of input data in the task request operation instruction includes: Determine whether to allocate each task request operation instruction to the cryptographic acceleration resource component according to the length of the input data in each task request operation instruction and the comparison result of the preset threshold value; If the length of the input data in the task request operation instruction is greater than the preset threshold, it is determined to allocate the task request operation instruction to the cryptographic acceleration resource component.

9. The task processing method according to claim 8, characterized in that: Also includes: If the length of the input data in the task request operation instruction is less than the preset threshold, the task request operation instruction is allocated to the local processor for processing by the local processor.

10. The task processing method according to claim 1, characterized in that: The reading of the processing result of the task request operation instruction corresponding to the coprocessor and the processing result of the task request operation instruction corresponding to the encryption hardware respectively includes: According to the pre-configured processing result reading strategy, the processing result of the task request operation instruction corresponding to the coprocessor and the processing result of the task request operation instruction corresponding to the encryption hardware are read respectively.

11. The task processing method according to claim 10, characterized in that: The step of reading the processing result of the task request operation instruction corresponding to the coprocessor and the processing result of the task request operation instruction corresponding to the encryption hardware respectively according to the pre-configured processing result reading strategy includes: According to the processing result reading priority, the processing result of the task request operation instruction corresponding to the coprocessor and the processing result of the task request operation instruction corresponding to the encryption hardware are read respectively; wherein the processing result reading priority of the encryption hardware is higher than the processing result reading priority of the coprocessor.

12. The task processing method according to any one of claims 1 to 11, characterized in that: The processing by the cryptographic acceleration resource component includes: The coprocessor determines the number of task request operation instructions to be processed currently according to the number of currently allocated task request operation instructions and the number of currently cached processing results; The coprocessor determines, according to the number of the currently-processed task request operation instructions, each target task request operation instruction currently to be processed from the currently-allocated task request operation instructions; The coprocessor calls the cryptographic library interface to process each target task request operation instruction.

13. The task processing method according to claim 12, characterized in that: The calling of the cryptographic library interface to process the operation instructions of each target task request includes: Determining whether each of the target task request operation instructions is to be processed in batches; If yes, then initialize the relevant parameters of the batch processing task request, and call the relevant interface of batch processing to batch process the operation instructions of each target task request; If not, then initialize the relevant parameters of the non-batch processing task request, and call the relevant interface of the non-batch processing to perform non-batch processing on each of the target task request operation instructions.

14. A task processing device, characterized in that: include: Acquisition module, processing module and reading module; The acquisition module is used to acquire at least one task request operation instruction from an upper layer application; The processing module is used to allocate each task request operation instruction to the cryptographic acceleration resource component according to the target scheduling mode, and the cryptographic acceleration resource component performs processing; The cryptographic acceleration resource component includes: a coprocessor and encryption hardware, and the target scheduling mode includes: proportional scheduling or polling scheduling; The reading module is used to read the processing results of the task request operation instructions corresponding to the coprocessor and the processing results of the task request operation instructions corresponding to the encryption hardware, respectively, and return the processing results corresponding to each task request operation instruction read to the upper application.

15. An electronic device, characterized in that: include: A processor, a storage medium and a bus, wherein the storage medium stores program instructions executable by the processor, and when the electronic device is running, the processor and the storage medium communicate via the bus, and the processor executes the program instructions to implement the task processing method as described in any one of claims 1 to 13.

16. A computer-readable storage medium, characterized in that: The storage medium stores a computer program, and when the computer program is executed by the processor, the task processing method according to any one of claims 1 to 13 is implemented.

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