Control circuit, control method and charging and discharging device of power factor corrector

Abstract

The present application discloses a control circuit, a control method and a charging and discharging device for a power factor corrector, and relates to the technical field of charging and discharging devices. The control circuit of the power factor corrector includes: a temperature detection module for detecting the temperature of the power factor corrector; a feedback detection module for obtaining the feedback voltage of the power factor corrector; a signal processing module for outputting a first timing control signal when the detected temperature is greater than a preset temperature; and a switch control module for outputting a second timing control signal when the feedback voltage is greater than a preset feedback voltage, and vice versa; and a switch control module for controlling the operation of high-frequency switching devices and low-frequency switching devices according to the first timing control signal, the second timing control signal or the third timing control signal. Based on the solution of the present application, the local hot spots of the high-frequency switching devices in the power factor corrector can be reduced, and the output time of the peak power of the charging and discharging device during the charging process and the user experience can be improved.

Description

Technical Field

[0001] The present application relates to the technical field of charging and discharging equipment, and in particular to a control circuit and a control method of a power factor corrector and a charging and discharging equipment. Background Art

[0002] During the charging and discharging process of charging and discharging equipment, a power factor corrector (PFC) is often used to suppress current waveform distortion and improve the power factor. Traditional power factor correctors generally use a structure consisting of a rectifier bridge and a boost circuit (BOOST). To reduce the conduction loss and heat generated by the diodes in the boost circuit, switching devices are often used instead of diodes. This distributes the heat across the power factor corrector's multiple switching devices, resulting in less heat loss and a higher power factor.

[0003] The multiple switching devices of the power factor corrector include high-frequency switching devices and low-frequency switching devices. However, during operation, the power consumption and heat generated by the switching and conduction processes of the high-frequency switching devices are much greater than the power consumption and heat generated by the switching and conduction processes of the low-frequency switching devices. As a result, the power factor corrector is prone to generate local hot spots with obvious heat in the high-frequency switching devices, affecting the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0004] Therefore, a new solution is urgently needed to solve the above problems. Summary of the Invention

[0005] The present application provides a control circuit, a control method, and a charging and discharging device for a power factor corrector. By adjusting the operating frequencies of high-frequency switching devices and low-frequency switching devices in the power factor corrector, local hot spots of the high-frequency switching devices in the power factor corrector are reduced, thereby improving the peak power output time and user experience of the charging and discharging device during the charging process.

[0006] To achieve the above objectives, this application adopts the following technical solutions:

[0007] In a first aspect, a control circuit of a power factor corrector is provided, wherein the power factor corrector includes a high-frequency switching device and a low-frequency switching device, and the control circuit of the power factor corrector includes a temperature detection module, a signal processing module, a feedback detection module and a switch control module; the signal processing module is connected to the temperature detection module, the feedback detection module and the switch control module respectively; the temperature detection module is configured to obtain a detected temperature of the power factor corrector; the feedback detection module is configured to obtain a feedback voltage of the power factor corrector; the signal processing module is configured to output a first timing control signal when the detected temperature is greater than a preset temperature; and is further configured to When the feedback voltage is greater than a preset feedback voltage, a second timing control signal is output; when the feedback voltage is not greater than the preset feedback voltage, a third timing control signal is output; the switch control module is configured to control the operation of the high-frequency switching device and the low-frequency switching device according to the first timing control signal, the second timing control signal or the third timing control signal; the operating frequency of the high-frequency switching device controlled by the first timing control signal is less than or equal to the operating frequency of the high-frequency switching device controlled by the second timing control signal, and the operating frequency of the high-frequency switching device controlled by the second timing control signal is less than the operating frequency of the high-frequency switching device controlled by the third timing control signal.

[0008] In an embodiment of the present application, the temperature of the power factor corrector is detected. When the detected temperature is greater than the preset detection temperature, the power factor corrector is controlled to operate by a first timing control signal. The feedback voltage of the power factor corrector is detected. When the feedback voltage is greater than the preset feedback voltage, the power factor corrector is controlled to operate by a second timing control signal. Otherwise, the power factor corrector is controlled to operate by a third timing control signal. Among them, the operating frequency of the high-frequency switching device controlled by the first timing control signal is less than or equal to the operating frequency of the high-frequency switching device controlled by the second timing control signal, and the operating frequency of the high-frequency switching device controlled by the second timing control signal is less than the operating frequency of the high-frequency switching device controlled by the third timing control signal, thereby reducing the local hot spots of the high-frequency switching device in the power factor corrector, making the heat generation more balanced, making the device layout easier, making the thermal design of the switching power supply simpler, the product size smaller, and the power density higher, effectively improving the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0009] Optionally, the operating frequency of the high-frequency switching device controlled by the first timing control signal is the same as the operating frequency of the high-frequency switching device controlled by the second timing control signal.

[0010] In this implementation, the operating frequency of the high-frequency switching device controlled by the first timing control signal can be made the same as the operating frequency of the high-frequency switching device controlled by the second timing control signal. Therefore, under the two timing control signals, the operating states of the switching devices in the power factor corrector are the same, the heat dissipation effect is the same, and it is easier to control.

[0011] In combination with the first aspect, the signal processing module includes a temperature comparator and a first controller; the temperature comparator is electrically connected to the temperature detection module and is configured to compare the detected temperature with the preset temperature, and when the detected temperature is greater than the preset temperature, output a first high level; when the detected temperature is not greater than the preset temperature, output a first low level; the first controller is electrically connected to the temperature comparator and is configured to output the first timing control signal according to the first high level.

[0012] In this implementation, the detected temperature and the preset temperature are compared by a temperature comparator. When the detected temperature is greater than the preset temperature, the first controller outputs a first timing control signal to control the working state of the switching device in the power factor corrector.

[0013] Optionally, when the detected temperature is not greater than a preset temperature, the first controller may output a first detection signal to enable the feedback detection module to detect the feedback voltage of the power factor corrector to determine the load condition of the power factor corrector.

[0014] Optionally, the first controller includes an OR gate.

[0015] In this implementation, the first controller can be configured as an OR gate. As long as the temperature comparator outputs a first high level, the power factor corrector is controlled to operate with the first timing control signal. When the temperature comparator outputs a first low level, the operating state of the power factor corrector is determined based on the detection result of the feedback detection module.

[0016] In combination with the first aspect, the feedback detection module includes an input voltage detection unit and a feedback voltage detection unit; the input voltage detection unit is electrically connected to the signal processing module and is configured to obtain the input voltage of the power factor corrector; the feedback voltage detection unit is electrically connected to the signal processing module and is configured to obtain the feedback voltage of the power factor corrector.

[0017] In this implementation, the input voltage of the power factor corrector is detected by the input voltage detection unit, and the feedback voltage of the power factor corrector is determined by the feedback voltage detection unit for use by the signal processing module.

[0018] In combination with the first aspect, in certain implementations of the first aspect, the signal processing module further includes an input voltage comparator, a feedback voltage comparator, a D flip-flop, and a second controller; the input voltage comparator is electrically connected to the input voltage detection unit and configured to output a second high level when the input voltage is greater than a preset input voltage; and output a second low level when the input voltage is not greater than the preset input voltage; the D flip-flop is electrically connected to the input voltage comparator and configured to output an enable signal when the second low level is converted to the second high level; the feedback voltage comparator is electrically connected to the feedback voltage detection unit and configured to output a third high level when the feedback voltage is greater than the preset feedback voltage; and output a third low level when the feedback voltage is not greater than the preset feedback voltage; the third high level is a feedback signal; and the second controller is electrically connected to the D flip-flop and the feedback voltage comparator, respectively, and configured to output the second timing control signal according to the enable signal and the feedback signal, and otherwise output the third timing control signal.

[0019] In this implementation, an input voltage comparator determines the input voltage. When the input voltage is greater than a preset input voltage, a second high level is output; otherwise, a second low level is output. A D-type flip-flop outputs an enable signal when the second low level transitions to a second high level. A feedback voltage comparator determines the feedback voltage. When the feedback voltage is greater than the preset feedback voltage, a third high level, i.e., the feedback signal, is output. When the feedback voltage is not greater than the preset feedback voltage, a third low level is output. Based on the enable signal and the feedback signal, a second timing control signal is output. Otherwise, a third timing control signal is output to control the operating state of the switching devices within the power factor corrector.

[0020] Optionally, the second controller includes an AND gate.

[0021] In this implementation, the second controller can be set as an AND gate, and the second timing control signal is output only when the enable signal and the feedback signal exist at the same time, otherwise the third timing control signal is output, so that the power factor corrector operates according to the second timing control signal or the third timing control signal.

[0022] In combination with the first aspect, in some implementations of the first aspect, the signal processing module also includes a digital filter; the digital filter is electrically connected to the input voltage comparator and the D trigger, respectively, and is configured to filter the second high level and the second low level.

[0023] In this implementation, the digital filter performs filtering processing on the second high level and the second low level, thereby obtaining a stable level signal.

[0024] In combination with the first aspect, in certain implementations of the first aspect, the control circuit of the power factor corrector further includes a zero-crossing detection unit; the zero-crossing detection unit is electrically connected to the signal processing module, and is configured to obtain the input voltage of the power factor corrector and switch the second high level to the second low level when the input voltage passes through zero.

[0025] In this implementation, the zero-crossing detection unit switches the second high level to the second low level when the input voltage crosses the zero point, thereby reducing the current spike caused by the zero-crossing switching of the AC voltage.

[0026] In a second aspect, a control method for a power factor corrector is provided, which is applied to a control circuit of a power factor corrector, wherein the power factor corrector includes a high-frequency switching device and a low-frequency switching device; the control method for the power factor corrector includes: obtaining a detection temperature of the power factor corrector; when the detection temperature is greater than a preset temperature, outputting a first timing control signal; obtaining a feedback voltage of the power factor corrector; when the feedback voltage is greater than the preset feedback voltage, outputting a second timing control signal, and when the feedback voltage is not greater than the preset feedback voltage, outputting a third timing control signal; wherein, the operating frequency of the high-frequency switching device controlled by the first timing control signal is less than or equal to the operating frequency of the high-frequency switching device controlled by the second timing control signal, and the operating frequency of the high-frequency switching device controlled by the second timing control signal is less than the operating frequency of the high-frequency switching device controlled by the third timing control signal.

[0027] In an embodiment of the present application, the detection temperature of the power factor corrector is first obtained. When the detection temperature is greater than the preset temperature, a first timing control signal is output to control the working state of the switching device in the power factor corrector; then the feedback voltage of the power factor corrector is obtained. When the feedback voltage is greater than the preset feedback voltage, a second timing control signal is output. When the feedback voltage is not greater than the preset feedback voltage, a third timing control signal is output, thereby controlling the working state of the power factor corrector in different scenarios, reducing the local hot spots of the high-frequency switching device in the power factor corrector, and improving the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0028] Optionally, the operating frequency of the high-frequency switching device controlled by the first timing control signal is the same as the operating frequency of the high-frequency switching device controlled by the second timing control signal.

[0029] In this implementation, the operating frequency of the high-frequency switching device controlled by the first timing control signal can be made the same as the operating frequency of the high-frequency switching device controlled by the second timing control signal. Therefore, under the two timing control signals, the operating states of the switching devices in the power factor corrector are the same, the heat dissipation effect is the same, and it is easier to control.

[0030] In combination with the second aspect, in certain implementations of the second aspect, it also includes: obtaining the input voltage of the power factor corrector; when the feedback voltage is greater than the preset feedback voltage, outputting a second timing control signal, including: when the input voltage is greater than the preset input voltage, outputting a second high level; when the input voltage is not greater than the preset input voltage, outputting a second low level; when the second low level is converted to the second high level, outputting an enable signal; when the feedback voltage is greater than the preset feedback voltage, outputting a third high level; the third high level is a feedback signal; and outputting the second timing control signal according to the enable signal and the feedback signal.

[0031] In this implementation, based on the enable signal generated when the second low level is converted to the second high level, and the feedback signal generated when the feedback voltage is greater than the preset feedback voltage, a second timing control signal can be output to control the working state of the power factor corrector, reduce the local hot spots of the high-frequency switching devices in the power factor corrector, and improve the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0032] In combination with the second aspect, in certain implementations of the second aspect, it also includes: obtaining the input voltage of the power factor corrector; when the feedback voltage is greater than the preset feedback voltage, outputting a second timing control signal, including: when the input voltage is greater than the preset input voltage, outputting a second high level; when the input voltage is not greater than the preset input voltage, outputting a second low level; counting the second high level and the second low level, and when the number of the second high level and the second low level is an even number, outputting an enable signal; when the feedback voltage is greater than the preset feedback voltage, outputting a third high level; the third high level is a feedback signal; and outputting the second timing control signal according to the enable signal and the feedback signal.

[0033] In this implementation, based on the enable signal generated when the number of the second high level and the second low level is an even number, and the feedback signal generated when the feedback voltage is greater than the preset feedback voltage, a second timing control signal can be output, and vice versa, a third timing control signal is output to control the working state of the power factor corrector, reduce the local hot spots of the high-frequency switching devices in the power factor corrector, and improve the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0034] In combination with the second aspect, in some implementations of the second aspect, when the second low level is converted to the second high level, before outputting the enable signal, the method further includes: filtering the second high level and the second low level.

[0035] In this implementation, the second high level and the second low level are filtered to obtain stable level signals.

[0036] In combination with the second aspect, in some implementations of the second aspect, the control method of the power factor corrector further includes: when the input voltage passes through zero, switching the second high level to the second low level.

[0037] In this implementation, when the input voltage passes through zero, the second high level is switched to the second low level, thereby reducing the current spike caused by the AC voltage zero-crossing switching.

[0038] In combination with the second aspect, in certain implementations of the second aspect, the high-frequency switching device includes a first switching device and a second switching device, and the low-frequency switching device includes a third switching device and a fourth switching device; the first timing control signal includes: when the input voltage waveform is in a first cycle, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device; when the input voltage waveform is in a second cycle, the first switching device and the second switching device are both in a low-frequency switching state, the third switching device and the fourth switching device are both in a high-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device.

[0039] In this implementation, during the operation of the power factor corrector controlled by the first timing control signal, when the input voltage waveform is in the first cycle, the first switching device and the second switching device are both in the high-frequency switching state, and the third switching device and the fourth switching device are both in the low-frequency switching state; when the input voltage waveform is in the second cycle, the first switching device and the second switching device are both in the low-frequency switching state, and the third switching device and the fourth switching device are both in the high-frequency switching state, so that the first switching device and the second switching device and the third switching device and the fourth switching device alternately perform high-frequency operation, thereby reducing the local hot spots of the high-frequency switching devices in the power factor corrector and improving the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0040] In combination with the second aspect, in some implementations of the second aspect, the high-frequency switching device includes a first switching device and a second switching device, and the low-frequency switching device includes a third switching device and a fourth switching device; the second timing control signal includes: when the input voltage waveform is in a first cycle, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device; when the input voltage waveform is in a second cycle, the first switching device and the second switching device are both in a low-frequency switching state, the third switching device and the fourth switching device are both in a high-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device.

[0041] In this implementation, during the operation of the power factor corrector controlled by the second timing control signal, when the input voltage waveform is in the first cycle, the first switching device and the second switching device are both in the high-frequency switching state, and the third switching device and the fourth switching device are both in the low-frequency switching state; when the input voltage waveform is in the second cycle, the first switching device and the second switching device are both in the low-frequency switching state, and the third switching device and the fourth switching device are both in the high-frequency switching state, so that the first switching device and the second switching device and the third switching device and the fourth switching device alternately perform high-frequency operation, thereby reducing local hot spots of the high-frequency switching devices in the power factor corrector and improving the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0042] In combination with the second aspect, in certain implementations of the second aspect, the high-frequency switching device includes a first switching device and a second switching device, and the low-frequency switching device includes a third switching device and a fourth switching device; the third timing control signal includes: when the input voltage waveform is in a first cycle, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device; when the input voltage waveform is in a second cycle, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device is complementary to the duty cycle of the driving waveform of the second switching device, and the duty cycle of the driving waveform of the third switching device is complementary to the duty cycle of the driving waveform of the fourth switching device.

[0043] In an embodiment of the present application, in the process of controlling the operation of the power factor corrector by the third timing control signal, when the input voltage waveform is in the first cycle, the first switching device and the second switching device are both in the high-frequency switching state, and the third switching device and the fourth switching device are both in the low-frequency switching state; when the input voltage waveform is in the second cycle, the first switching device and the second switching device are both in the high-frequency switching state, and the third switching device and the fourth switching device are both in the low-frequency switching state, so that the first switching device and the second switching device are always in the high-frequency working state, and the third switching device and the fourth switching device are always in the low-frequency working state. When the power factor corrector is in a working scenario with a low ambient temperature and a small load, the power factor corrector generates less heat, so the third timing control signal can be used to control the working process of the power factor corrector to maintain the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0044] In a third aspect, a charging and discharging device is provided, comprising the control circuit of the power factor corrector and the power factor corrector, wherein the power factor corrector comprises a high-frequency switching device and a low-frequency switching device; the high-frequency switching device and the low-frequency switching device are both connected to the control circuit of the power factor corrector;

[0045] The high-frequency switching device is configured to be turned on or off under the control of the control circuit of the power factor corrector;

[0046] The low-frequency switching device is configured to be turned on or off under the action of the control circuit of the power factor corrector.

[0047] In a fourth aspect, a charging and discharging device is provided, comprising: one or more processors, and a memory; the memory is coupled to the one or more processors, the memory is used to store computer program code, the computer program code includes computer instructions, and the one or more processors call the computer instructions to enable the charging and discharging device to execute the described method.

[0048] In a fifth aspect, a chip system is provided, which is applied to a charging and discharging device. The chip system includes one or more processors, and the one or more processors are used to call computer instructions to enable the charging and discharging device to execute the described method.

[0049] In a sixth aspect, a computer-readable storage medium is provided, wherein the computer-readable storage medium includes instructions, and when the instructions are executed on a charging and discharging device, the charging and discharging device executes the method described. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 This is a schematic diagram of a charging system applicable to an embodiment of the present application;

[0051] Figure 2 This is a schematic diagram of the structure of a charging and discharging device provided in an embodiment of the present application;

[0052] Figure 3 A circuit diagram of a totem pole bridgeless PFC provided by an embodiment of the present application;

[0053] Figure 4 This is a driving waveform diagram of a totem pole bridgeless PFC provided by an embodiment of the present application;

[0054] Figure 5 A schematic diagram of the structure of a control circuit of a power factor corrector provided in an embodiment of the present application;

[0055] Figure 6 A circuit diagram of a signal processing module provided in an embodiment of the present application;

[0056] Figure 7 A circuit diagram of a feedback detection module provided in an embodiment of the present application;

[0057] Figure 8 A circuit diagram of a signal processing module provided in yet another embodiment of the present application;

[0058] Figure 9 A circuit diagram of a signal processing module provided in yet another embodiment of the present application;

[0059] Figure 10 A circuit diagram of a signal processing module provided in yet another embodiment of the present application;

[0060] Figure 11 A circuit diagram of a signal processing module provided in yet another embodiment of the present application;

[0061] Figure 12 This is a working timing diagram of a control circuit of a power factor corrector provided in an embodiment of the present application;

[0062] Figure 13 This is a flow chart of a control method for a power factor corrector provided in an embodiment of the present application;

[0063] Figure 14 This is a flow chart of a control method for a power factor corrector provided in another embodiment of the present application;

[0064] Figure 15 This is a flow chart of a control method for a power factor corrector provided in another embodiment of the present application;

[0065] Figure 16 A flowchart of a control method for a power factor corrector provided in another embodiment of the present application;

[0066] Figure 17 A diagram of a totem pole bridgeless PFC energy storage path and freewheeling path provided in an embodiment of the present application;

[0067] Figure 18 A diagram of a totem pole bridgeless PFC energy storage path and freewheeling path provided by another embodiment of the present application;

[0068] Figure 19 A diagram of a totem pole bridgeless PFC energy storage path and freewheeling path provided by another embodiment of the present application;

[0069] Figure 20 A diagram of a totem pole bridgeless PFC energy storage path and freewheeling path provided in yet another embodiment of the present application;

[0070] Figure 21 This is a schematic diagram of the structure of a charging and discharging device provided in an embodiment of the present application;

[0071] Figure 22 The present application provides a structural schematic diagram of a charging and discharging device. DETAILED DESCRIPTION

[0072] The following is a clear and detailed description of the technical solutions in the embodiments of the present application, with reference to the accompanying drawings. In the description of the embodiments of the present application, unless otherwise specified, " / " represents the meaning of "or." For example, A / B can represent A or B. "and / or" in the text is merely a description of the association relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone.

[0073] The terms "first," "second," and the like are used for descriptive purposes only and should not be construed as suggesting or implying relative importance or implicitly designating the number of the technical features indicated. Thus, features defined as "first" or "second" may explicitly or implicitly include one or more of such features. In the description of the embodiments of this application, unless otherwise specified, "plurality" means two or more.

[0074] In order to facilitate the understanding of the embodiments of the present application, the relevant concepts involved in the embodiments of the present application are first briefly described.

[0075] 1. Power factor corrector (PFC)

[0076] In the circuit field, power factor refers to the relationship between effective power and total power consumption (apparent power), that is, the ratio of effective power divided by total power consumption (apparent power). Generally speaking, power factor measures the degree to which electricity is effectively utilized; a higher power factor value indicates higher power utilization. For example, a computer switching power supply is a capacitor-input circuit. The phase difference between its current and voltage causes exchange power loss, necessitating a PFC circuit to improve the power factor.

[0077] 2. Switching Mode Power Supply

[0078] In the circuit field, a switching power supply, also known as an alternating current power supply or switching converter, is a high-frequency power conversion device. Its function is to convert a standard voltage into the voltage or current required by the user through various architectures. For example, a switching power supply can maintain a stable output voltage by controlling the ratio of the on and off times of the switching device. It is typically composed of a pulse-width modulation (PWM) control integrated circuit (IC) and a metal oxide semiconductor field-effect transistor (MOSFET).

[0079] 3. Rectifier bridge

[0080] In the circuit field, a rectifier bridge refers to the packaging of multiple rectifier diodes in the form of a bridge full-wave rectifier circuit. It is generally divided into full-bridge and half-bridge. A full-bridge is the packaging of four connected diodes in a bridge rectifier circuit. A half-bridge is the packaging of one half of a four-diode bridge rectifier circuit. Two half-bridges can form a bridge rectifier circuit, while a half-bridge can also form a full-wave rectifier circuit with a center-tapped transformer. The function of a rectifier bridge is to convert AC power into DC power. This conversion is achieved through the unidirectional conduction principle of diodes, thus achieving rectification.

[0081] 4. Totem Pole

[0082] In the circuit world, a totem pole refers to two transistors connected one above the other: the upper transistor is an NPN transistor, and the lower transistor is a PNP transistor. The collector of the NPN transistor is connected to the positive power supply, while the collector of the PNP transistor is grounded. The bases of the two transistors are connected together and connected to the input terminal, and the emitters of the two transistors are connected together and connected to the output terminal, forming a circuit structure similar to a "totem pole." During operation, the bases of the two transistors are driven by the same signal. When the drive signal is high, the NPN transistor conducts; when the drive signal is low, the PNP transistor conducts. This creates a push-pull output using the two transistors, which is used to match voltages or improve the drive capability of IO ports.

[0083] 5. Switching loss

[0084] In the circuit field, switching loss includes turn-on loss and turn-off loss. Turn-on loss refers to the fact that when a non-ideal switching device is turned on, the voltage of the switching device does not drop to zero immediately, but has a fall time. Similarly, its current does not immediately rise to the load current, but also has a rise time. During this period, there is an overlap between the current and voltage of the switching device, resulting in loss. This loss is called turn-on loss. For example, in a switching power supply, when a large MOS transistor is turned on and off, the parasitic capacitance needs to be charged and discharged, which also causes loss. By analogy, we can deduce the cause of turn-off loss, which will not be elaborated here.

[0085] 6. Conduction loss

[0086] In the circuit field, conduction loss refers to the loss generated when the current in the circuit passes through the electronic device in the on state, which is usually caused by the resistance of the electronic device and the thermal effect during conduction.

[0087] 7. High frequency band (HB), low frequency band (LB) and power frequency

[0088] In the circuit field, high frequency refers to the switching frequency of the switching devices in a switching power supply, usually measured in kilohertz (kHz), and can range from tens to hundreds of kHz. For example, frequencies above 6500 Hz are considered low frequency. Low frequency refers to the frequency range of 50 Hz to 300 Hz, and power frequency refers to the operating frequency of the AC power grid, typically between 47 Hz and 63 Hz.

[0089] The above is a brief introduction to the nouns involved in the embodiments of this application, and no further details will be given below.

[0090] Figure 1 This is a schematic diagram of a charging system applicable to an embodiment of the present application.

[0091] like Figure 1 As shown, the user can use the charging and discharging device 200 to charge and discharge the terminal device 100. The embodiment of the present application does not specifically limit the type of the terminal device 100. In some embodiments, the terminal device 100 can be a mobile phone, a wearable device (such as a smart bracelet, a smart watch, a headset, etc.), a tablet computer, a laptop computer (laptop), a handheld computer, a notebook computer, an ultra-mobile personal computer (UMPC), a cellular phone, a personal digital assistant (PDA), an augmented reality (AR)\virtual reality (VR) device and other IOT (internet of things, Internet of Things) devices, and can also be a TV, a large screen, a printer, a projector, an electric car, an aerial camera, a drone and other devices. The embodiment of the present application does not specifically limit the type of the charging and discharging device 200. In some embodiments, the charging and discharging device 200 can be a power adapter, a charging pile and other devices. For ease of understanding, the following embodiments are exemplified by taking the terminal device 100 as a mobile phone and the charging and discharging device 200 as a power adapter as an example.

[0092] Figure 2 This is a schematic diagram of the structure of a charging and discharging device provided in an embodiment of the present application.

[0093] like Figure 2As shown, the charging and discharging device 200 may include a rectifier module 10, a transformer module 20, and a filter module 30, etc. The transformer module 20 may be connected to the rectifier module 10 and the filter module 30, respectively. The rectifier module 10 may include a rectifier circuit 11 and a totem pole bridgeless PFC 12. The totem pole bridgeless PFC 12 may be electrically connected to the rectifier circuit 11 and the transformer module 20, respectively. The transformer module 20 may also be electrically connected to the filter module 30. These components may also be coupled via various interconnect buses or other electrical connection methods. In addition, the positions of the rectifier module 10 and the transformer module 20 in the charging and discharging device 200 may be interchanged. For example, the rectifier module 10 may be placed between the transformer module 20 and the filter module 30.

[0094] The rectifier module 10 is a circuit that can convert the power supply voltage or signal waveform into a DC signal by performing voltage or frequency conversion, thereby processing the AC signal into a DC signal. The rectifier module 10 can separate and convert the positive and negative half-cycles of the current or voltage to meet the needs of the DC power supply or signal. For example, the rectifier module 10 can achieve voltage conversion or frequency conversion through various circuits, such as half-wave rectification, full-wave rectification, and bridge rectification. For example, commonly used rectifier modules 10 may include diode rectifier modules, transistor switching rectifier modules, and MOS transistor switching rectifier modules. Among them, the diode rectifier module is the simplest and most common rectifier circuit. It uses diodes as its main component and uses its unidirectional conductivity to conduct the positive half-cycle signal and block the negative half-cycle signal, thereby achieving half-wave rectification of the voltage. Transistor switching rectifier modules and MOS transistor switching rectifier modules use switching conversion to process the AC voltage, thereby achieving higher frequencies and a wider range of application scenarios.

[0095] The transformer module 20 can be a power transformer with a switching device added. In addition to the voltage conversion function of an ordinary transformer, it also has insulation isolation and power transmission functions. It is generally used in occasions involving high-frequency circuits such as switching power supplies. For example, the switching power supply transformer and the switching device can form a self-excited (or externally excited) intermittent oscillator, thereby modulating the input DC voltage into a high-frequency pulse voltage, which plays the role of energy transfer and conversion. In a flyback circuit, when the switching device is turned on, the transformer converts electrical energy into magnetic field energy and stores it; when the switching device is turned off, it is released. In a forward circuit, when the switching device is turned on, the input voltage is directly supplied to the load and the energy is stored in the energy storage inductor; when the switching device is turned off, the energy storage inductor is used to continue the flow and transfer it to the load, thereby converting the input DC voltage into various required low voltages.

[0096] The filter module 30 allows only signal components within a certain frequency range to pass normally, while preventing components in another frequency range from passing. The filter module 30 is often used to reduce the AC component in the pulsating DC voltage, thereby reducing the output voltage ripple coefficient and making the waveform relatively smooth. The filter module 30 is generally composed of reactive components, such as a capacitor connected in parallel across the load resistor, or an inductor connected in series with the load, as well as various complex filter circuits composed of capacitors and inductors. For example, the filter module 30 can be divided into two categories: passive filter circuits and active filter circuits. When the filter module 30 is composed only of passive components (such as resistors, capacitors, inductors, etc.), it is called a passive filter circuit. The main forms of passive filter circuits include capacitor filtering, inductor filtering, and complex filtering. Complex filtering can include inverted L-type, LC filtering, LCπ-type filtering, and RCπ-type filtering. If the filter module 30 is composed not only of passive components but also of active components (such as bipolar transistors, unipolar transistors, integrated operational amplifiers, etc.), it is called an active filter circuit. The main form of active filtering circuit is active RC filtering, also known as electronic filter.

[0097] Exemplarily, the rectifier module 10 may include a rectifier circuit 11 and a totem pole bridgeless PFC 12. The rectifier circuit 11 is used to rectify the power supply voltage or current, perform voltage conversion or frequency conversion on the power supply voltage or signal waveform, and thus process the AC signal into a DC signal. Exemplarily, the rectifier circuit 11 may use a rectifier bridge composed of four diodes. The totem pole bridgeless PFC 12 is used to suppress the distortion of the current waveform during the charging and discharging process, improve the power factor, and enhance the power utilization rate. For example, the totem pole bridgeless PFC 12 may use a totem pole bridgeless PFC composed of four MOS tubes, two of which are high-frequency MOS tubes and the other two are low-frequency MOS tubes.

[0098] It's important to note that mobile phone manufacturers often use a boost + flyback converter charging solution in switching power supplies with input power exceeding 75W. The boost PFC structure offers advantages such as low cost, low noise, and high reliability. Traditional boost PFC typically includes a rectifier bridge and a boost circuit. However, these components not only generate significant losses during system operation but also create local hotspots, leading to high overall system temperature rise. Therefore, to reduce the conduction losses and heat generated by the bridge diodes within the boost circuit and improve system efficiency, developers often replace the diodes with ordinary SiMOS transistors to create a new bridge PFC circuit, which has evolved into a bridgeless PFC circuit. Among bridgeless PFC circuits, the totem-pole PFC circuit has the fewest components, consisting of only four semiconductor power devices. This reduces losses, improves power factor, and enables high-efficiency, high-power-density charging solutions. Compared to traditional boost PFC circuits, the totem-pole PFC circuit distributes heat across the four switching devices, significantly reducing overall system heat dissipation.

[0099] It should be understood that the above is only an example of the structure of the charging and discharging device 200. The charging and discharging device 200 may also include other subsystems or devices, which can be specifically configured and modified as needed. The embodiment of the present application does not impose any restrictions on this.

[0100] At present, during the operation of the totem pole bridgeless PFC12, the power consumption of the two high-frequency switching devices is much greater than that of the two low-frequency switching devices, which makes it easy for the two high-frequency switching devices to generate local hotspots, affecting the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0101] In view of this, an embodiment of the present application provides a control circuit for a power factor corrector. When local hot spots are obvious, the operating frequency of the high-frequency switching device can be reduced and the operating frequency of the low-frequency switching device can be increased, thereby reducing the local hot spots of the high-frequency switching device, making the heating of the switching devices in the power factor corrector more balanced, and improving the peak power output time and user experience of the charging and discharging equipment during the charging process.

[0102] The following combination Figures 3 and 4 First, we will introduce in detail the problem that the two high-frequency switching devices in the traditional totem pole bridgeless PFC are prone to generating local hot spots during operation.

[0103] Figure 3 The figure is a circuit diagram of a totem pole bridgeless PFC provided by an embodiment of the present application.

[0104] like Figure 3As shown, in one embodiment provided by the present application, the totem pole bridgeless PFC 12 includes a first bridge arm unit 121, a second bridge arm unit 122, an energy storage inductor L, an energy storage capacitor C, and a load R. The first bridge arm unit 121 includes a first switching device S1 and a second switching device S2, both of which can be used as high-frequency switching devices, and the second bridge arm unit 122 includes a third switching device S3 and a fourth switching device S4, both of which can be used as low-frequency switching devices. The source of the first switching device S1 and the drain of the second switching device S2 are both connected to the negative electrode of the input voltage Vac, the source of the third switching device S3 and the drain of the fourth switching device S4 are both connected to the positive electrode of the input voltage Vac through the energy storage inductor L, the drain of the first switching device S1 and the drain of the third switching device S3, and one end of the energy storage capacitor C are all electrically connected to one end of the load R, and the source of the second switching device S2 and the source of the fourth switching device S4, the other end of the energy storage capacitor C, and the other end of the load R are all grounded.

[0105] For example, the first switch device S1, the second switch device S2, the third switch device S3 and the fourth switch device S4 can adopt Si MOSFET, SiC MOSFET, GaN MOSFET, super junction MOS tube (Cool MOS) and insulated gate bipolar transistor (IGBT) commonly used in the industry.

[0106] In an embodiment of the present application, the controller controls the first switching device S1 and the second switching device S2 to maintain high-frequency switching operation, and the third switching device S3 and the fourth switching device S4 to maintain low-frequency switching operation, so that the power factor corrector can suppress the distortion of the current waveform and improve the power factor in the switching power supply.

[0107] Figure 4 This is a driving waveform diagram of a totem pole bridgeless PFC provided in an embodiment of the present application.

[0108] like Figure 4 As shown, in one embodiment provided in the present application, the first switching device S1 and the second switching device S2 always operate alternately at a high-frequency switching frequency, and the third switching device S3 and the fourth switching device S4 operate alternately at an industrial frequency switching frequency. For example, taking a switching device with an effective current of 1.2A, an internal resistance of 200mΩ, and a duty cycle D=50% as an example, when the switching device operates at a high-frequency switching frequency of 100KHz, the estimated switching loss is approximately 1W*2 and the conduction loss is approximately 0.288W*2; when the switching device operates at a low-frequency switching frequency of 50Hz, the estimated switching loss is approximately 0 and the conduction loss is approximately 0.288W*2. It can be seen from this that the high-frequency switching loss of the switching device is much greater than the low-frequency switching loss, and the switching device operating at a high-frequency switching frequency has obvious local hot spots.

[0109] For example, Table 1 summarizes the losses of a traditional totem pole bridgeless PFC. As shown in Table 1, a represents high-frequency switching loss and b represents conduction loss. If a>b, then during the operation of the switching devices from time t0 to time t4, the first to fourth switching devices S1 to S4 generate the losses shown in Table 1. As can be seen from Table 1, the high-frequency bridge arm composed of the first and second switching devices S1 and S2 can generate local hot spots during operation, affecting the peak charging power duration and user experience.

[0110] Table 1 Summary of losses of traditional totem pole bridgeless PFC

[0111]

[0112] Therefore, in order to solve the problem that the two high-frequency switching devices in the embodiment of the present application are prone to generate local hot spots, affecting the output time of peak power and user experience of the charging and discharging equipment during the charging process, the present application provides a control circuit of a power factor corrector. By adjusting the operating frequency of the high-frequency switching device and the low-frequency switching device in the power factor corrector, the local hot spots of the high-frequency switching device in the power factor corrector are reduced, and the output time of peak power and user experience of the charging and discharging equipment during the charging process are improved.

[0113] The following combination Figures 5 to 12 , and then a control circuit solution for a power factor corrector that can adjust the operating frequencies of high-frequency switching devices and low-frequency switching devices in the power factor corrector is introduced in detail.

[0114] Figure 5 This is a structural schematic diagram of a control circuit of a power factor corrector provided in an embodiment of the present application.

[0115] like Figure 5 As shown, in one embodiment provided by the present application, illustratively, the control circuit 40 of the power factor corrector includes a temperature detection module 41, a signal processing module 42, a feedback detection module 43, and a switch control module 44; wherein the temperature detection module 41 is used to obtain the detected temperature of the power factor corrector (i.e., the totem pole bridgeless PFC 12) and send it to the signal processing module 42. The signal processing module 42 is electrically connected to the temperature detection module 41 and is used to output a first timing control signal to the switch control module 44 when the detected temperature is greater than a preset temperature, indicating that the totem pole bridgeless PFC 12 is in a higher temperature state, thereby controlling the totem pole bridgeless PFC 12 to operate in a first timing through the switch control module 44 to reduce local hot spots of high-frequency switching devices in the totem pole bridgeless PFC 12.

[0116] The feedback detection module 43 is electrically connected to the signal processing module 42 and is configured to obtain the feedback voltage of the power factor corrector and transmit it to the signal processing module 42. The signal processing module 42 is configured to output a second timing control signal to the switch control module 44 when the feedback voltage is greater than a preset feedback voltage, indicating that the totem pole bridgeless PFC 12 is in a high load state. The switch control module 44 then controls the totem pole bridgeless PFC 12 to operate in a second timing sequence to reduce local hot spots in the high-frequency switching devices within the totem pole bridgeless PFC 12. When the feedback voltage is not greater than the preset feedback voltage, the signal processing module 42 outputs a third timing control signal to the switch control module 44, indicating that the totem pole bridgeless PFC 12 is in a low load state and that the local hot spots in the high-frequency switching devices within the totem pole bridgeless PFC 12 are low. The switch control module 44 then controls the totem pole bridgeless PFC 12 to operate in a third timing sequence to reduce or negate the need to reduce the local hot spots in the high-frequency switching devices within the totem pole bridgeless PFC 12. Exemplarily, the temperature detection module 41 and the feedback detection module 43 may adopt any common detection circuit in the industry.

[0117] It should be noted that the switch control module 44 is electrically connected to the four switching devices in the totem pole bridgeless PFC 12 respectively, so that the control circuit 40 of the power factor corrector adjusts the wave generation mechanism of the four switching devices according to the ambient temperature and load conditions, so as to realize high and low frequency switching of the four switching devices under different ambient temperatures and load conditions, thereby making the heat distribution of the totem pole bridgeless PFC 12 more balanced, reducing the local hot spots of the traditional totem pole PFC, and improving the difficulty of device thermal design.

[0118] In an embodiment of the present application, the operating frequency of the high-frequency switching device controlled by the first timing control signal is less than or equal to the operating frequency of the high-frequency switching device controlled by the second timing control signal, and the operating frequency of the high-frequency switching device controlled by the second timing control signal is less than the operating frequency of the high-frequency switching device controlled by the third timing control signal. For example, the operating frequency of the high-frequency switching device controlled by the first timing control signal and the operating frequency of the high-frequency switching device controlled by the second timing control signal can be the same, i.e., they utilize the same wave generation mechanism. This reduces the operating frequency of the high-frequency switching device and increases the operating frequency of the low-frequency switching device, thereby reducing local hot spots in the high-frequency switching device and increasing the heat dissipation of the low-frequency switching device. This results in more balanced heat distribution and heat generation in the totem pole bridgeless PFC 12, facilitating easier device layout, simplifying switching power supply thermal design, resulting in a smaller product size and higher power density, effectively improving the peak power output time and user experience of charging and discharging devices during the charging process.

[0119] Figure 6 This is a circuit diagram of a signal processing module provided in an embodiment of the present application.

[0120] like Figure 6 As shown, in an embodiment provided in the present application, illustratively, the signal processing module 42 may include a temperature comparator 421 and a first controller 422; the temperature comparator 421 is electrically connected to the temperature detection module 41, and is used to compare the detected temperature of the totem pole bridgeless PFC12 detected by the temperature detection module 41 with the preset temperature Temp, and when the detected temperature is greater than the preset temperature Temp, output a first high level; when the detected temperature is not greater than the preset temperature Temp, output a first low level; the first controller 422 is electrically connected to the temperature comparator 421, and is used to output a first timing control signal according to the first high level and send it to the switch control module 44, so as to control the high-frequency switch tube in the totem pole bridgeless PFC12 to reduce the operating frequency, thereby reducing the local hot spots of the high-frequency switch device in the totem pole bridgeless PFC12.

[0121] For example, the first controller 422 may include an OR gate electrically connected to the temperature comparator 421 , indicating that the first timing control signal is output as long as the temperature comparator 421 is at a high level.

[0122] Figure 7 This is a circuit diagram of a feedback detection module provided in an embodiment of the present application.

[0123] like Figure 7 As shown, in one embodiment provided in the present application, the feedback detection module 43 may include an input voltage detection unit 431 and a feedback voltage detection unit 432; the input voltage detection unit 431 is electrically connected to the signal processing module 42, and is used to detect the input voltage of the totem pole bridgeless PFC12; the feedback voltage detection unit 432 is electrically connected to the signal processing module 42, and is used to detect the feedback voltage of the totem pole bridgeless PFC12, so as to determine the load condition of the totem pole bridgeless PFC12.

[0124] Figure 8 This is a circuit diagram of a signal processing module provided in yet another embodiment of the present application.

[0125] like Figure 8As shown, in one embodiment provided in the present application, the signal processing module 42 may further include an input voltage comparator 423, a feedback voltage comparator 424, a D flip-flop 425 and a second controller 426; the input voltage comparator 423 is electrically connected to the input voltage detection unit 431, and is used to output a second high level when the input voltage is greater than the preset input voltage Vref_in; and output a second low level when the input voltage is not greater than the preset input voltage Vref_in; the D flip-flop 425 is electrically connected to the input voltage comparator 423, and is used to output an enable signal EN when the second low level is converted to a second high level; the feedback voltage comparator 424 is electrically connected to the feedback voltage detection unit 432, and is used to output a third high level when the feedback voltage is greater than the preset feedback voltage Vref_FB; and output a third low level when the feedback voltage is not greater than the preset feedback voltage Vref_FB. Exemplarily, the third high level is the feedback signal FB; the second controller 426 is electrically connected to the D trigger 425 and the feedback voltage comparator 424, respectively, and is used to output a second timing control signal according to the enable signal EN and the feedback signal FB, and vice versa, it outputs a third timing control signal to control the operation of the power factor corrector.

[0126] For example, the second controller 426 may include an AND gate electrically connected to the D flip-flop 425, the feedback voltage comparator 424, and the first controller 422, respectively, indicating that the second timing control signal is output only when both the enable signal EN and the feedback signal FB are received simultaneously. When the first controller 422 is an OR gate, either the second controller 426 or the temperature comparator 421 outputs a high level, causing the first controller 422 to output the first timing control signal.

[0127] Figure 9 This is a circuit diagram of a signal processing module provided in yet another embodiment of the present application.

[0128] like Figure 9 As shown, in one embodiment provided in the present application, the signal processing module 42 also includes a digital filter 427; the digital filter 427 is electrically connected to the input voltage comparator 423 and the D trigger 425, respectively, and is used to filter the second high level and the second low level, so as to obtain a more stable second high level and second low level.

[0129] Figure 10 This is a circuit diagram of a signal processing module provided in yet another embodiment of the present application.

[0130] like Figure 10As shown, in one embodiment provided in the present application, the control circuit 40 of the power factor corrector also includes a zero-crossing detection unit 45; the zero-crossing detection unit 45 is electrically connected to the input voltage comparator 423 in the signal processing module 42, and is used to obtain the input voltage of the power factor corrector, and when the input voltage passes through zero, the second high level is switched to the second low level, thereby reducing the current spike caused by the zero-crossing switching of the AC voltage.

[0131] Optionally, the control circuit of the power factor corrector of the present application is applicable to an output voltage range of 0-1000 V and a power range of 100-10000 W. At the same time, the control circuit of the power factor corrector of the present application is applicable to a variety of single-phase power factor correctors.

[0132] Figure 11 This is a circuit diagram of a signal processing module provided in yet another embodiment of the present application.

[0133] like Figure 11 As shown, in one embodiment provided by the present application, the temperature detection module 41 is used to detect the temperature of the power factor corrector. The temperature comparator 421 is used to compare the detected temperature with a preset detection temperature, and when the detected temperature is greater than the preset detection temperature, the first controller 422 (e.g., an OR gate) is used to output a first timing control signal to enable the switch control module 44 to control the power factor corrector to operate.

[0134] The input voltage detection unit 431 is used to detect the input voltage. The input voltage comparator 423 is used to compare the input voltage with the preset input voltage Vref_in and output a second high level when the input voltage is greater than the preset input voltage Vref_in; when the input voltage is not greater than the preset input voltage Vref_in, it outputs a second low level. The zero-crossing detection unit 45 is used to switch the second high level to the second low level when the input voltage crosses zero. The digital filter 427 is used to filter the second high level and the second low level. The D flip-flop 425 is used to output an enable signal EN when the second low level is converted to the second high level.

[0135] The feedback voltage detection unit 432 is used to detect the feedback voltage (i.e., the output voltage of the power factor corrector). The feedback voltage comparator 424 is used to compare the feedback voltage with a preset feedback voltage Vref_FB and output a third high level (i.e., feedback signal FB) when the feedback voltage is greater than the preset feedback voltage Vref_FB; and output a third low level when the feedback voltage is not greater than the preset feedback voltage Vref_FB.

[0136] The second controller 426 (e.g., an AND gate) is configured to output a second timing control signal based on the enable signal EN and the feedback signal FB, and vice versa, to output a third timing control signal for controlling the operation of the power factor corrector via the switch control module 44. This reduces the operating frequency of the high-frequency switching devices within the power factor corrector, increases the operating frequency of the low-frequency switching devices within the power factor corrector, reduces local hot spots in the high-frequency switching devices, and achieves more balanced heating of the power factor corrector, easier device layout, simpler switching power supply thermal design, smaller product size, and higher power density, effectively improving the peak power output time and user experience of charging and discharging equipment during the charging process.

[0137] Figure 12 This is an operating timing diagram of a control circuit of a power factor corrector provided in an embodiment of the present application.

[0138] like Figure 12 As shown, in an embodiment provided by the present application, illustratively, Vac is the input voltage of the power factor corrector. It should be noted that since the control circuit of the power factor corrector provided by the embodiment of the present application can be applied to different voltage conditions in a variety of countries or regions, the input voltage Vac can adopt a voltage waveform with different amplitudes or varying amplitudes. Vgs1~Vgs4 are driving signals of the switching devices S1~S4, which are used to control the on and off of the switching devices S1~S4. Polarity is a polarity conversion signal. When the polarity of the input voltage Vac is switched, the level of the polarity conversion signal Polarity also changes accordingly. For example, when the input voltage Vac is switched from a positive voltage to a negative voltage, the level of the polarity conversion signal Polarity also changes from a high level to a low level. EN is an enable signal. Only when it is detected that the polarity conversion signal Polarity switches from a low level to a high level, the level of the enable signal EN will follow the switch. FB is a feedback signal, which is used to determine the load condition of the totem pole bridgeless PFC12. When the feedback signal voltage V FB When the feedback signal voltage Vth_change exceeds the preset value, the signal processing module 42 determines that the totem pole bridgeless PFC 12 is operating in a heavy load condition. FB When the voltage Vth_change is less than or equal to the preset feedback voltage Vth_change, the signal processing module 42 determines that the totem pole bridgeless PFC 12 is operating in a non-heavy load condition such as half load or light load.

[0139] In an embodiment of the present application, when the ambient temperature of the totem pole bridgeless PFC 12 is greater than a preset temperature, the operating frequencies of the first switch device S1 and the second switch device S2 are alternately rotated with the operating frequencies of the third switch device S3 and the fourth switch device S4. For example, when the first switch device S1 and the second switch device S2 operate with an industrial frequency drive signal, the third switch device S3 and the fourth switch device S4 operate with a high-frequency drive signal; when the first switch device S1 and the second switch device S2 operate with a high-frequency drive signal, the third switch device S3 and the fourth switch device S4 operate with an industrial frequency drive signal. At the same time, the first switch device S1 and the second switch device S2 also perform alternating complementary operations, and the third switch device S3 and the fourth switch device S4 also perform alternating complementary operations. When the ambient temperature of the totem pole bridgeless PFC 12 is less than or equal to the preset temperature, the following three situations may occur: (1) When the feedback signal voltage V FB When the feedback signal voltage V is greater than the preset feedback voltage Vth_change and the enable signal EN is at a high level, the first switch device S1 and the second switch device S2 work alternately and complementary with the power frequency drive signal, and the third switch device S3 and the fourth switch device S4 work alternately and complementary with the high frequency drive signal. (2) When the feedback signal voltage V FB When the feedback signal voltage V is greater than the preset feedback voltage Vth_change and the enable signal EN is at a low level, the first switch device S1 and the second switch device S2 work alternately and complementary with a high-frequency drive signal, and the third switch device S3 and the fourth switch device S4 work alternately and complementary with a low-frequency drive signal. (3) When the feedback signal voltage V FB When the voltage Vth_change is less than or equal to the preset feedback voltage Vth_change, regardless of whether the enable signal EN is at a high level or a low level, the first switching device S1 and the second switching device S2 operate alternately and complementary with the high-frequency drive signal, and the third switching device S3 and the fourth switching device S4 operate alternately and complementary with the power frequency drive signal, as shown in Table 2 below.

[0140] Table 2 Driving modes of the four switching devices of the totem pole bridgeless PFC under different control signals

[0141]

[0142] The following combination Figures 13 to 20 , and then a control method for a power factor corrector that can adjust the operating frequencies of high-frequency switching devices and low-frequency switching devices in the power factor corrector is introduced in detail.

[0143] Figure 13 This is a flow chart of a control method for a power factor corrector provided in an embodiment of the present application.

[0144] like Figure 13 As shown, in one embodiment provided in the present application, the method includes, for example, Figure 1 The charging and discharging device shown is executed; the method includes S101 to S107, and S101 to S107 are described in detail below. The power factor corrector may include a high-frequency switching device and a low-frequency switching device. The control method of the power factor corrector may include the following steps:

[0145] S101. Obtain a detected temperature of a power factor corrector.

[0146] For example, the method of acquiring the detected temperature of the power factor corrector may adopt various existing temperature detection methods, such as using a thermistor to detect the temperature of the power factor corrector, or using a temperature sensor to detect the temperature of the power factor corrector.

[0147] Optionally, the temperature of a certain space inside the power factor corrector may be detected, and the temperature of a certain device inside the power factor corrector, for example, the temperature of a high-frequency switching device, may also be detected.

[0148] It should be understood that before obtaining the detected temperature of the power factor corrector, a system initialization process may be performed on the power factor corrector.

[0149] S102: Determine whether the detected temperature is greater than a preset temperature.

[0150] Exemplarily, determining whether the detected temperature is greater than the preset temperature can be performed using existing hardware or software. For example, a comparator can be used to determine whether the detected temperature is greater than the preset temperature, or a software program can be used to determine whether the detected temperature is greater than the preset temperature.

[0151] S103: When the detected temperature is greater than the preset temperature, output a first timing control signal. Otherwise, proceed to the next step.

[0152] For example, when the detected temperature is greater than a preset temperature, it indicates that the temperature inside the power factor corrector is high, and local hot spots are evident throughout the charging and discharging device, potentially affecting the device's peak charging power duration or the user experience. Therefore, a first timing control signal is output, primarily to reduce the operating frequency of the high-frequency switching device, increase the operating frequency of the low-frequency switching device, and mitigate local hot spots caused by prolonged operation of the high-frequency switching device.

[0153] Optionally, the first timing control signal may be a wave-generating mechanism of a switching device. For example, in the embodiment of the present application, the first timing control signal may be a wave-generating mechanism of a high-frequency switching device (i.e., the first switching device S1 and the second switching device S2) and a low-frequency switching device (i.e., the third switching device S3 and the fourth switching device S4).

[0154] Optionally, when the detected temperature is not greater than a preset temperature, a first detection signal may be output to obtain a feedback voltage of the power factor corrector.

[0155] S104: Obtain feedback voltage of the power factor corrector.

[0156] For example, the feedback voltage of the power factor corrector can be obtained by using various existing voltage detection methods, such as using a voltage divider resistor to detect the feedback voltage of the power factor corrector, or using a voltage sensor to detect the feedback voltage of the power factor corrector.

[0157] Optionally, the feedback voltage of the power factor corrector may be the output voltage of the power factor corrector. Alternatively, the feedback voltage of the power factor corrector may be the load voltage of a totem pole bridgeless PFC.

[0158] S105: Determine whether the feedback voltage is greater than a preset feedback voltage.

[0159] Exemplarily, determining whether the feedback voltage is greater than the preset feedback voltage can be performed using existing hardware or software. For example, a comparator can be used to determine the magnitude of the feedback voltage relative to the preset feedback voltage, or a software program can be used to determine the magnitude of the feedback voltage relative to the preset feedback voltage.

[0160] S106 , when the feedback voltage is greater than the preset feedback voltage, output a second timing control signal.

[0161] For example, when the feedback voltage is greater than the preset feedback voltage, the power factor corrector is under heavy load. This results in high heat dissipation throughout the charging and discharging device, particularly significant local hotspots in the high-frequency switching devices. This may affect the peak charging power duration of the charging and discharging device or the user experience. Therefore, a second timing control signal is output, primarily to reduce the operating frequency of the high-frequency switching devices, increase the operating frequency of the low-frequency switching devices, and reduce local hotspots in the high-frequency switching devices.

[0162] Optionally, the second timing control signal may be a wave-generating mechanism of a switching device. For example, in the embodiment of the present application, the second timing control signal may be a wave-generating mechanism of a high-frequency switching device (i.e., the first switching device S1 and the second switching device S2) and a low-frequency switching device (i.e., the third switching device S3 and the fourth switching device S4).

[0163] Optionally, in one implementation, since both the first timing control signal and the second timing control signal are in the case where the local hot spot of the high-frequency switching device is relatively obvious, the same wave generation mechanism can be used.

[0164] S107 , when the feedback voltage is not greater than the preset feedback voltage, outputting a third timing control signal.

[0165] For example, when the feedback voltage is no greater than the preset feedback voltage, it indicates that the power factor corrector is operating at half load or light load, and the heat dissipated by the entire charging and discharging device is low, which has little impact on the charging peak power time of the charging and discharging device and the user experience. Therefore, the third timing control signal is output, which is mainly used to maintain the current operating frequency of the high-frequency switching device and the low-frequency switching device.

[0166] Optionally, the third timing control signal may be a wave-generating mechanism of a switching device. For example, in the embodiment of the present application, the third timing control signal may be a wave-generating mechanism of a high-frequency switching device (i.e., the first switching device S1 and the second switching device S2) and a low-frequency switching device (i.e., the third switching device S3 and the fourth switching device S4).

[0167] For example, in one embodiment of the present application, due to different heat levels of local hot spots of the power factor corrector, the operating frequencies of the high-frequency switching devices controlled by the first timing control signal, the second timing control signal, and the third timing control signal can be reduced in sequence.

[0168] Figure 14 This is a flowchart of a control method for a power factor corrector provided in another embodiment of the present application.

[0169] like Figure 14 As shown, in one embodiment provided in this application, illustratively, Figure 13 The difference is that, in order to facilitate the control of the high-frequency switching device in the power factor corrector, the operating frequency of the high-frequency switching device controlled by the first timing control signal and the operating frequency of the high-frequency switching device controlled by the second timing control signal can be the same.

[0170] Figure 15 This is a flowchart of a control method for a power factor corrector provided in another embodiment of the present application.

[0171] like Figure 15 As shown, in one embodiment provided in the present application, the method includes, for example, Figure 1 The charging and discharging device shown is executed; the method includes S201 to S209, which are described in detail below. Optionally, the power factor corrector can use a totem pole bridgeless PFC, and the above method is used to control the conduction and shutdown of four switching devices in the totem pole bridgeless PFC. Determining whether the feedback voltage is greater than the preset feedback voltage may also include the following steps:

[0172] S201: Obtain input voltage and feedback voltage of a power factor corrector.

[0173] For example, the input voltage of the power factor corrector can be obtained by using various existing voltage detection methods, such as using a voltage divider resistor to detect the input voltage of the power factor corrector, or using a voltage sensor to detect the input voltage of the power factor corrector.

[0174] It should be noted that the input voltage of the power factor corrector may be the input voltage of the neutral terminal or the live terminal of the AC power.

[0175] S202: Determine whether the input voltage is greater than a preset input voltage.

[0176] Exemplarily, determining whether the input voltage is greater than the preset input voltage can be performed using existing hardware or software. For example, a comparator can be used to determine the difference between the input voltage and the preset input voltage, or a software program can be used to determine the difference between the input voltage and the preset input voltage.

[0177] It can be understood that the input voltage is the AC power supply Vac of the power factor corrector.

[0178] S203 : When the input voltage is greater than the preset input voltage, output a second high level.

[0179] For example, when the input voltage is greater than the preset input voltage, it indicates that the AC power supply Vac of the power factor corrector is in a positive half cycle, so the polarity conversion signal Polarity can be obtained as a high level.

[0180] S204 : When the input voltage is not greater than the preset input voltage, output a second low level.

[0181] For example, when the input voltage is not greater than the preset input voltage, indicating that the AC power supply Vac of the power factor corrector is in the negative half-cycle, the polarity conversion signal Polarity is low. In other words, the polarity conversion signal converts the sine wave of the AC power supply into a square wave for subsequent use.

[0182] S205 , when the second low level is converted to a second high level, output an enable signal.

[0183] Exemplarily, when the second low level is converted to the second high level, it indicates that the AC power supply Vac of the power factor corrector has completed a cycle waveform, which is indicated by the high-level enable signal EN.

[0184] It can be understood that when the AC power supply Vac of the power factor corrector completes the next cycle waveform, the enable signal switches to a low level, and the second high level and the second low level switch in turn, over and over again.

[0185] S206: Determine whether the feedback voltage is greater than a preset feedback voltage.

[0186] Exemplarily, determining whether the feedback voltage is greater than the preset feedback voltage can be performed using existing hardware or software. For example, a comparator can be used to determine the magnitude of the feedback voltage relative to the preset feedback voltage, or a software program can be used to determine the magnitude of the feedback voltage relative to the preset feedback voltage.

[0187] It can be understood that the feedback voltage is the load voltage of the power factor corrector.

[0188] S207 . When the feedback voltage is greater than the preset feedback voltage, output a third high level; the third high level is a feedback signal.

[0189] For example, when the feedback voltage is greater than the preset feedback voltage, it indicates that the power factor corrector is in a heavy load condition, which is indicated by a high-level feedback signal FB.

[0190] S208 : When the feedback voltage is not greater than the preset feedback voltage, output a third low level.

[0191] For example, when the feedback voltage is not greater than the preset feedback voltage, it indicates that the power factor corrector is in a half-load or light-load condition, which is indicated by a low-level feedback signal FB.

[0192] It is understood that when the feedback voltage is not greater than the preset feedback voltage, regardless of whether the enable signal EN is at a high level or a low level, the feedback signal FB is at a low level, and the third timing control signal is output. This means that in one embodiment of the present application, the first switching device S1 and the second switching device S2 in the totem pole bridgeless PFC both operate alternately and complementary with a high-frequency drive signal, and the third switching device S3 and the fourth switching device S4 both operate alternately and complementary with a power-frequency drive signal.

[0193] S209 , outputting a second timing control signal according to the enable signal and the feedback signal.

[0194] Exemplarily, this step indicates that the second timing control signal is output only when the enable signal and the feedback signal are both high. This means that the second timing control signal is output only when the power factor corrector's AC power supply Vac is in an interval cycle, the power factor corrector's feedback voltage is greater than a preset feedback voltage, and the power factor corrector is in a heavy-load condition. This allows the switch control device to control the operating states of the high-frequency and low-frequency switching devices within the power factor corrector. This means that in one embodiment of the present application, the operating frequencies of the first and second switching devices S1 and S2 in the totem pole bridgeless PFC alternate with the operating frequencies of the third and fourth switching devices S3 and S4. For example, when the first and second switching devices S1 and S2 operate with a low-frequency drive signal, the third and fourth switching devices S3 and S4 operate with a high-frequency drive signal; when the first and second switching devices S1 and S2 operate with a high-frequency drive signal, the third and fourth switching devices S3 and S4 operate with a low-frequency drive signal. At the same time, the first switching device S1 and the second switching device S2 also perform alternate complementary operations, and the third switching device S3 and the fourth switching device S4 also perform alternate complementary operations.

[0195] Figure 16 This is a flowchart of a control method for a power factor corrector provided in another embodiment of the present application.

[0196] like Figure 16 As shown, in one embodiment provided in the present application, the method includes, for example, Figure 1 The charging and discharging device shown is executed; the method includes S301 to S310, which are described in detail below. Optionally, the power factor corrector can use a totem pole bridgeless PFC, and the above method is used to control the conduction and shutdown of the four switching devices in the totem pole bridgeless PFC. Determining whether the feedback voltage is greater than the preset feedback voltage may also include the following steps:

[0197] S301: Obtain input voltage and feedback voltage of a power factor corrector.

[0198] For example, the input voltage of the power factor corrector can be obtained by using various existing voltage detection methods, such as using a voltage divider resistor to detect the input voltage of the power factor corrector, or using a voltage sensor to detect the input voltage of the power factor corrector.

[0199] It should be noted that the input voltage of the power factor corrector may be the input voltage of the neutral terminal or the live terminal of the AC power.

[0200] S302: Determine whether the input voltage is greater than a preset input voltage.

[0201] Exemplarily, determining whether the input voltage is greater than the preset input voltage can be performed using existing hardware or software. For example, a comparator can be used to determine the difference between the input voltage and the preset input voltage, or a software program can be used to determine the difference between the input voltage and the preset input voltage.

[0202] It can be understood that the input voltage is the AC power supply Vac of the power factor corrector.

[0203] S303 : When the input voltage is greater than the preset input voltage, output a second high level.

[0204] For example, when the input voltage is greater than the preset input voltage, it indicates that the AC power supply Vac of the power factor corrector is in a positive half cycle, so the polarity conversion signal Polarity can be obtained as a high level.

[0205] S304 : When the input voltage is not greater than the preset input voltage, output a second low level.

[0206] For example, when the input voltage is not greater than the preset input voltage, indicating that the AC power supply Vac of the power factor corrector is in the negative half-cycle, the polarity conversion signal Polarity is low. In other words, the polarity conversion signal converts the sine wave of the AC power supply into a square wave for subsequent use.

[0207] S305 , counting the second high level and the second low level.

[0208] For example, a Count function in software may be used to count the number of the second high level and the second low level, thereby implementing the control process of the power factor corrector in software form.

[0209] S306 : When the number of the second high level and the second low level is an even number, output an enable signal.

[0210] For example, when the number of the second high level and the second low level is an even number, it indicates an interval period of the AC power supply Vac of the power factor corrector. That is, an enable signal EN is outputted only after every cycle waveform of the AC power supply Vac.

[0211] S307: Determine whether the feedback voltage is greater than a preset feedback voltage.

[0212] Exemplarily, determining whether the feedback voltage is greater than the preset feedback voltage can be performed using existing hardware or software. For example, a comparator can be used to determine the magnitude of the feedback voltage relative to the preset feedback voltage, or a software program can be used to determine the magnitude of the feedback voltage relative to the preset feedback voltage.

[0213] It can be understood that the feedback voltage is the load voltage of the power factor corrector.

[0214] S308 . When the feedback voltage is greater than the preset feedback voltage, output a third high level; the third high level is a feedback signal.

[0215] For example, when the feedback voltage is greater than the preset feedback voltage, it indicates that the power factor corrector is in a heavy load condition, which is indicated by a high-level feedback signal FB.

[0216] S309 : When the feedback voltage is not greater than the preset feedback voltage, output a third low level.

[0217] For example, when the feedback voltage is not greater than the preset feedback voltage, it indicates that the power factor corrector is in a half-load or light-load condition, which is indicated by a low-level feedback signal FB.

[0218] It is understood that when the feedback voltage is not greater than the preset feedback voltage, regardless of whether the enable signal EN is at a high level or a low level, the feedback signal FB is at a low level, and the third timing control signal is output. This means that in one embodiment of the present application, the first switching device S1 and the second switching device S2 in the totem pole bridgeless PFC both operate alternately and complementary with a high-frequency drive signal, and the third switching device S3 and the fourth switching device S4 both operate alternately and complementary with a power-frequency drive signal.

[0219] S310 , outputting a second timing control signal according to the enable signal and the feedback signal.

[0220] Exemplarily, this step indicates that the second timing control signal is output only when the enable signal and the feedback signal are both at a high level. This means that the second timing control signal is output only when the AC power supply Vac of the power factor corrector is in an interval cycle, the feedback voltage of the power factor corrector is greater than a preset feedback voltage, and the power factor corrector is in a heavy-load condition. This allows the switch control device to control the operating states of the high-frequency and low-frequency switching devices within the power factor corrector. This means that in one embodiment of the present application, the operating frequencies of the first and second switching devices S1 and S2 alternate with the operating frequencies of the third and fourth switching devices S3 and S4. For example, when the first and second switching devices S1 and S2 operate with a low-frequency drive signal, the third and fourth switching devices S3 and S4 operate with a high-frequency drive signal; when the first and second switching devices S1 and S2 operate with a high-frequency drive signal, the third and fourth switching devices S3 and S4 operate with a low-frequency drive signal. At the same time, the first switching device S1 and the second switching device S2 also perform alternate complementary operations, and the third switching device S3 and the fourth switching device S4 also perform alternate complementary operations.

[0221] In one embodiment provided in this application, illustratively, in combination Figure 15 , when the second low level is converted to the second high level, before outputting the enable signal, the method further includes: filtering the second high level and the second low level. In another embodiment provided by the present application, for example, in combination with Figure 16 Before counting the second high level and the second low level, the method further includes: filtering the second high level and the second low level.

[0222] Illustratively, filtering the second high level and the second low level may obtain more stable second high level and second low level, thereby facilitating signal switching between the second high level and the second low level.

[0223] In an embodiment provided in the present application, illustratively, the control method of the power factor corrector further includes: when the input voltage passes through zero, switching the second high level to the second low level.

[0224] For example, in the process of obtaining the input voltage of the power factor corrector, when the input voltage passes through zero, the second high level is switched to the second low level, thereby retaining the dead time and reducing the current spike caused by the AC voltage zero-crossing switching.

[0225] In one embodiment provided herein, the high-frequency switching device includes, for example, a first switching device and a second switching device, and the low-frequency switching device includes a third switching device and a fourth switching device. Optionally, the operating frequency of the high-frequency switching device controlled by the first timing control signal and the operating frequency of the high-frequency switching device controlled by the second timing control signal can be set to be the same. Accordingly, the operating frequency of the low-frequency switching device controlled by the first timing control signal and the operating frequency of the low-frequency switching device controlled by the second timing control signal are also the same.

[0226] Figure 17 A diagram of the energy storage path and freewheeling path of a totem pole bridgeless PFC provided in an embodiment of the present application.

[0227] Exemplarily, the first timing control signal may include the following specific control process:

[0228] like Figure 17 As shown, in one embodiment provided in this application, illustratively, combined with Figure 12When the totem pole bridgeless PFC operates between time t0 and time t1, the input voltage is in the positive half-cycle. When the input voltage detection unit detects that the input voltage |Vac| is greater than the preset input voltage |Vac_min|, the switching devices of the totem pole bridgeless PFC soft-start. Specifically, under the control of the switch control module, the first switching device S1 acts as the main control switch, performing high-frequency switching with a drive signal with a duty cycle of D. The second switching device S2 acts as a freewheeling device, also performing high-frequency switching with a drive waveform with a duty cycle of 1-D. The drive signals for the first switching device S1 and the second switching device S2 form a complementary pulse-width modulation (PWM) signal. To reduce loop losses, during this phase, the third switching device S3, acting as a rectifier, remains continuously on, while the fourth switching device S4 remains continuously off.

[0229] For example, when the first switching device S1 is turned on, the second switching device S2 is turned off, the third switching device S3 is turned on, and the fourth switching device S4 is turned off, the following may be formed: Figure 17 In the current path shown in (a), the energy storage inductor L stores energy through the first switching device S1 and the third switching device S3, and the energy storage capacitor C supplies power to the load. When the first switching device S1 is turned off, the second switching device S2 is turned on, the third switching device S3 is turned on, and the fourth switching device S4 is turned off, the following can be formed: Figure 17 In the current path shown in (b), the energy storage inductor L provides freewheeling for the energy storage capacitor C through the second switching device S2 and the third switching device S3.

[0230] Optionally, to prevent the first switching device S1 and the second switching device S2 from being switched on in common, a dead time is reserved between the two driving signals of the first switching device S1 and the second switching device S2.

[0231] Optionally, when the input voltage detection unit detects that the input voltage |Vac| is less than a preset input voltage |Vac_min|, all of the first to fourth switching devices S1 to S4 are soft-stopped to avoid current spikes caused by the AC input voltage zero-crossing. When the AC input voltage continues to decrease and crosses zero, the polarity switching signal Polarity switches from a high level to a low level.

[0232] Figure 18 This is a diagram of a totem pole bridgeless PFC energy storage path and freewheeling path provided in yet another embodiment of the present application.

[0233] Exemplarily, the first timing control signal may include the following specific control process:

[0234] like Figure 18 As shown, in one embodiment provided in this application, illustratively, combined with Figure 12When the totem pole bridgeless PFC operates from time t1 to time t2, the input voltage is in the negative half-cycle. When the input voltage detection unit detects that the input voltage |Vac| is greater than the preset input voltage |Vac_min|, the switching devices of the totem pole bridgeless PFC soft-start. Specifically, under the control of the switch control module, the second switching device S2 acts as the main control switch, performing high-frequency switching with a drive signal with a duty cycle of D. The first switching device S1 acts as a freewheeling switch, also performing high-frequency switching with a drive waveform with a duty cycle of 1-D. The first and second switching devices S1 and S2 are alternately turned on by a complementary PWM drive signal. At the same time, because the polarity conversion signal Polarity has switched to a low level, the fourth switching device S4, acting as a rectifier, remains on during this phase, while the third switching device S3 remains off.

[0235] For example, when the first switching device S1 is turned off, the second switching device S2 is turned on, the third switching device S3 is turned off, and the fourth switching device S4 is turned on, the following may be formed: Figure 18 In the current path shown in (a), the energy storage inductor L stores energy through the second switching device S2 and the fourth switching device S4, and the energy storage capacitor C supplies power to the load. When the first switching device S1 is turned on, the second switching device S2 is turned off, the third switching device S3 is turned off, and the fourth switching device S4 is turned on, the following can be formed: Figure 18 In the current path shown in (b), the energy storage inductor L provides freewheeling for the energy storage capacitor C through the first switching device S1 and the fourth switching device S4.

[0236] Optionally, when the input voltage detection unit detects that the input voltage |Vac| is less than the preset input voltage |Vac_min| again, the first to fourth switching devices S1 to S4 are all soft-stopped. When the AC input voltage AC voltage continues to increase and crosses zero, the polarity conversion signal Polarity switches from a low level to a high level.

[0237] Exemplarily, when the signal processing module detects that the polarity conversion signal Polarity switches from a low level to a high level, the enable signal EN switches from a low level to a high level.

[0238] It is understood that from time t0 to time t2, since the first switching device S1 and the second switching device S2 perform switching operations at a high switching frequency, the first switching device S1 and the second switching device S2 generate switching losses and conduction losses, and therefore the first switching device S1 and the second switching device S2 are the main heat sources. However, since the third switching device S3 and the fourth switching device S4 only generate conduction losses, they generate less heat.

[0239] Figure 19This is a diagram of a totem pole bridgeless PFC energy storage path and freewheeling path provided in yet another embodiment of the present application.

[0240] Exemplarily, the first timing control signal may include the following specific control process:

[0241] like Figure 19 As shown, in one embodiment provided in this application, illustratively, combined with Figure 12 When the totem pole bridgeless PFC operates from time t2 to time t3, the input voltage is in the positive half cycle. When the feedback detection module detects the feedback voltage V FB >Vth_change and the enable signal EN is at a high level, indicating that the totem pole bridgeless PFC is in a heavy-load condition. The first switching device S1 and the second switching device S2 operate alternately and complementary with the power frequency drive signal, and the third switching device S3 and the fourth switching device S4 operate alternately and complementary with the high-frequency drive signal. Specifically, the third switching device S3 acts as the main control switch and performs high-frequency switching with a drive signal with a duty cycle of D. The fourth switching device S4 acts as a freewheeling switch and also performs high-frequency switching with a drive waveform with a duty cycle of 1-D. The third switching device S3 and the fourth switching device S4 are alternately turned on with a complementary PWM drive signal. At the same time, the first switching device S1 acts as a rectifier and is continuously turned on, while the second switching device S2 is continuously turned off.

[0242] For example, when the third switching device S3 is turned on, the fourth switching device S4 is turned off, the first switching device S1 is turned on, and the second switching device S2 is turned off, the following may be formed: Figure 19 In the current path shown in (a), the energy storage inductor L stores energy through the third switching device S3 and the first switching device S1, and the energy storage capacitor C supplies power to the load. When the third switching device S3 is turned off, the fourth switching device S4 is turned on, the first switching device S1 is turned on, and the second switching device S2 is turned off, the following can be formed: Figure 19 In the current path shown in (b), the energy storage inductor L provides freewheeling for the energy storage capacitor C through the first switching device S1 and the fourth switching device S4.

[0243] Figure 20 This is a diagram of a totem pole bridgeless PFC energy storage path and freewheeling path provided in yet another embodiment of the present application.

[0244] Exemplarily, the first timing control signal may include the following specific control process:

[0245] like Figure 20 As shown, in one embodiment provided in this application, illustratively, combined with Figure 12When the totem pole bridgeless PFC operates from time t3 to time t4, the input voltage is in the negative half cycle. The fourth switch device S4 acts as the main control switch and performs high-frequency switching with a drive signal of a duty cycle D. The third switch device S3 acts as a freewheeling switch and also performs high-frequency switching with a drive waveform of a duty cycle 1-D. The third switch device S3 and the fourth switch device S4 are alternately turned on by a complementary PWM drive signal. The second switch device S2 acts as a rectifier and is continuously turned on, while the first switch device S1 is continuously turned off.

[0246] For example, when the fourth switching device S4 is turned on, the third switching device S3 is turned off, the first switching device S1 is turned off, and the second switching device S2 is turned on, the following may be formed: Figure 20 In the current path shown in (a), the energy storage inductor L stores energy through the fourth switch device S4 and the second switch device S2, and the energy storage capacitor C supplies power to the load. When the third switch device S3 is turned on, the fourth switch device S4 is turned off, the first switch device S1 is turned off, and the second switch device S2 is turned on, the following can be formed: Figure 20 In the current path shown in (b), the energy storage inductor L provides freewheeling for the energy storage capacitor C through the third switching device S3 and the second switching device S2.

[0247] For example, Table 3 is a loss summary table of the totem pole bridgeless PFC of the present application. As shown in Table 3, a represents high-frequency switching loss, b represents conduction loss, and a>b. When the switching device is in operation from time t0 to time t4, the first switching device S1 to the fourth switching device S4 will generate losses as shown in Table 3.

[0248] Table 3 Summary of losses of the totem pole bridgeless PFC of this application

[0249]

[0250] Table 3 shows that, compared to the loss summary of a traditional totem-pole bridgeless PFC in Table 1, from time t0 to time t4, the high-frequency bridge arm (i.e., the first and second switching devices S1, S2) and the low-frequency bridge arm (i.e., the third and fourth switching devices S3, S4) alternate in operation. From time t0 to time t2, the first and second switching devices S1, S2 operate at a high frequency, incurring both switching and conduction losses, which serve as the primary heat source for the totem-pole bridgeless PFC. The third and fourth switching devices S3, S4 operate at the power frequency, incurring only conduction losses, which serve as a secondary heat source for the totem-pole bridgeless PFC. From time t2 to time t4, the first and second switching devices S1, S2 operate at the power frequency, incurring only conduction losses, while the third and fourth switching devices S3, S4 operate at a high frequency, incurring both switching and conduction losses. Therefore, from time t0 to time t4, the losses generated by the first, second, third, and fourth switching devices S1, S2, S3, and S4 are equal, meaning that the heat generated by the totem pole bridgeless PFC is balanced. Therefore, comparing the loss summary in Table 1 shows that when the totem pole bridgeless PFC is operating at higher temperatures or under heavy loads, while maintaining the same total losses, the equivalent heat dissipation area is increased, local hot spots are eliminated, and thermal design is improved, optimizing product size.

[0251] It should be noted that when the temperature or load condition of the totem pole bridgeless PFC changes, the signal processing module will adjust the control signal according to the detection result, and then change the operating frequency and operating frequency of the first switching device S1 to the fourth switching device S4 through the switch control module.

[0252] It can be understood that the second timing control signal controls the operation of the first to fourth switching devices S1 to S4 , which can be combined with the first timing control signal to control the operation of the first to fourth switching devices S1 to S4 .

[0253] like Figure 12As shown, for example, the third timing control signal may include the following: from time t6 to time t10, the high-frequency bridge arm (i.e., the first and second switching devices S1 and S2) and the low-frequency bridge arm (i.e., the third and fourth switching devices S3 and S4) do not need to rotate in operation. From time t6 to time t10, the first and second switching devices S1 and S2 operate at a high frequency, incurring both switching and conduction losses, which serve as the primary heat source for the totem pole bridgeless PFC. The third and fourth switching devices S3 and S4 operate at the power frequency, incurring only conduction losses, which serve as a secondary heat source for the totem pole bridgeless PFC. In other words, when the totem pole bridgeless PFC is operating at light load or half load, under the influence of the third timing control signal, the heat dissipation effect of the totem pole bridgeless PFC is comparable to that of a traditional totem pole bridgeless PFC, and local hotspots are not noticeable, eliminating the need for local hotspot cooling.

[0254] It should be noted that under light load or half load conditions, the operating frequency of the switching device is generally reduced to meet the normal voltage output. It can even enter the frequency hopping mode under light load or no load. Under this condition, the working time of the switching device is shorter, the loss is smaller, and the system heat is lower. Therefore, under non-heavy load conditions, the high-frequency bridge arm and the low-frequency bridge arm do not need to be rotated.

[0255] Figure 21 This is a schematic diagram of the structure of a charging and discharging device provided in an embodiment of the present application. Figure 21 As shown, the charging and discharging device 300 includes a control circuit 40 for a power factor corrector and a power factor corrector. The power factor corrector includes a high-frequency switching device and a low-frequency switching device; both the high-frequency switching device and the low-frequency switching device are connected to the control circuit 40 of the power factor corrector; the high-frequency switching device is configured to be turned on or off under the action of the control circuit of the power factor corrector; and the low-frequency switching device is configured to be turned on or off under the action of the control circuit of the power factor corrector. The control circuit 40 of the power factor corrector is used to obtain the temperature of the power factor corrector. When the detected temperature is greater than the preset detection temperature, the power factor corrector is controlled to operate via a first timing control signal. Then, the feedback voltage of the power factor corrector is obtained. When the feedback voltage is greater than the preset feedback voltage, the power factor corrector is controlled to operate via a second timing control signal. Otherwise, the power factor corrector is controlled to operate via a third timing control signal. This reduces local hot spots in high-frequency switching devices within the power factor corrector, resulting in more balanced heat generation, easier device layout, simpler switching power supply thermal design, smaller product size, and higher power density, effectively improving the peak power output time and user experience of charging and discharging equipment during the charging process.

[0256] It should be noted that the charging and discharging device 300 is implemented in the form of a functional module. The term "module" here can be implemented in the form of software and / or hardware, and is not specifically limited to this.

[0257] For example, a "module" may be a software program, a hardware circuit, or a combination of the two that implements the aforementioned functionality. The hardware circuit may include an application specific integrated circuit (ASIC), an electronic circuit, a processor (e.g., a shared processor, a dedicated processor, or a group processor) and memory for executing one or more software or firmware programs, combined logic circuits, and / or other suitable components that support the described functionality.

[0258] Therefore, the units of each example described in the embodiments of this application can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0259] Figure 22 The present application provides a structural schematic diagram of a charging and discharging device. Figure 22 The dotted line in the figure indicates that the unit or module is optional; the charging and discharging device 400 can be used to implement the control method of the power factor corrector described in the above method embodiment.

[0260] The charging and discharging device 400 includes one or more processors 401, which can support the control method in the embodiment of the charging and discharging device 400. The processor 401 can be a general-purpose processor or a special-purpose processor. For example, the processor 401 can be a central processing unit (CPU), a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, such as discrete gates, transistor logic devices, or discrete hardware components.

[0261] Optionally, the processor 401 can be used to control the charging and discharging device 400, execute software programs, and process data of the software programs. The charging and discharging device 400 can also include a communication unit 405 to implement signal input (reception) and output (transmission).

[0262] For example, the charging and discharging device 400 may be a chip, and the communication unit 405 may be an input and / or output circuit of the chip, or the communication unit 405 may be a communication interface of the chip, and the chip may be a component of a terminal device or other electronic device.

[0263] For another example, the charging and discharging device 400 may be a terminal device, and the communication unit 405 may be a transceiver of the charging and discharging device 400, or the communication unit 405 may include one or more memories 402 on which a program 404 is stored. The program 404 may be executed by the processor 401 to generate instructions 403, so that the processor 401 executes the control method of the power factor corrector described in the above method embodiment according to the instructions 403.

[0264] Optionally, data may also be stored in the memory 402 .

[0265] Optionally, the processor 401 may also read data stored in the memory 402 . The data may be stored at the same storage address as the program 404 , or may be stored at a different storage address from the program 404 .

[0266] Optionally, the processor 401 and the memory 402 may be provided separately or integrated together, for example, integrated on a system on chip (SOC) of the terminal device.

[0267] Exemplarily, the memory 402 can be used to store a related program 404 of the control method of the power factor corrector provided in the embodiment of the present application, and the processor 401 can be used to call the related program 404 of the control method of the power factor corrector stored in the memory 402 when executing the control method of the power factor corrector, and execute the control method of the power factor corrector of the embodiment of the present application; for example, obtaining the detected temperature of the power factor corrector; when the detected temperature is greater than the preset temperature, outputting a first timing control signal; obtaining the feedback voltage of the power factor corrector; when the feedback voltage is greater than the preset feedback voltage, outputting a second timing control signal, and when the feedback voltage is not greater than the preset feedback voltage, outputting a third timing control signal; wherein, the first timing control signal controls the operating frequency of the high-frequency switching device to be no greater than the operating frequency of the high-frequency switching device controlled by the second timing control signal, and the second timing control signal controls the operating frequency of the high-frequency switching device to be no greater than the operating frequency of the high-frequency switching device controlled by the third timing control signal.

[0268] Optionally, the present application further provides a computer program product, which, when executed by the processor 401, implements the control method of the power factor corrector in any method embodiment of the present application.

[0269] For example, the computer program product may be stored in the memory 402 , such as a program 404 , which is converted into an executable target file that can be executed by the processor 401 after undergoing preprocessing, compilation, assembly, and linking.

[0270] Optionally, the present application further provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a computer, implements the control method for a power factor corrector described in any method embodiment of the present application. The computer program may be a high-level language program or an executable object program.

[0271] For example, the computer-readable storage medium is memory 402. Memory 402 may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link DRAM (SLDRAM), and direct rambus RAM (DR RAM).

[0272] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0273] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0274] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the embodiments of the electronic device described above are merely illustrative. For example, the division of the modules is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0275] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0276] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0277] It should be understood that in the various embodiments of the present application, the size of the serial number of each process does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0278] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0279] The above is only a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or replacements within the technical scope disclosed in the present application, which should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims. In short, the above is only a preferred embodiment of the technical solution of the present application, and is not used to limit the scope of protection of the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application should be included in the scope of protection of the present application.

Claims

1. A control circuit for a power factor corrector, the power factor corrector comprising a high-frequency switching device and a low-frequency switching device, characterized in that: The control circuit of the power factor corrector includes a temperature detection module, a signal processing module, a feedback detection module and a switch control module; the signal processing module is connected to the temperature detection module, the feedback detection module and the switch control module respectively; The temperature detection module is configured to obtain a detected temperature of the power factor corrector; The feedback detection module is configured to obtain a feedback voltage of the power factor corrector; The signal processing module is configured to output a first timing control signal when the detected temperature is greater than a preset temperature; and is further configured to output a second timing control signal when the feedback voltage is greater than a preset feedback voltage, and output a third timing control signal when the feedback voltage is not greater than the preset feedback voltage; The switch control module is electrically connected to the signal processing module and is configured to control the operation of the high-frequency switching device and the low-frequency switching device according to the first timing control signal, the second timing control signal or the third timing control signal; The operating frequency of the high-frequency switching device controlled by the first timing control signal is less than or equal to the operating frequency of the high-frequency switching device controlled by the second timing control signal, and the operating frequency of the high-frequency switching device controlled by the second timing control signal is less than the operating frequency of the high-frequency switching device controlled by the third timing control signal; The high-frequency switching device includes a first switching device and a second switching device, and the low-frequency switching device includes a third switching device and a fourth switching device; The first timing control signal includes: When the input voltage waveform is in a first cycle, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device and the duty cycle of the driving waveform of the second switching device are complementary, and the duty cycle of the driving waveform of the third switching device and the duty cycle of the driving waveform of the fourth switching device are complementary; When the input voltage waveform is in the second period, the first switching device and the second switching device are both in a low-frequency switching state, the third switching device and the fourth switching device are both in a high-frequency switching state, and the duty cycle of the driving waveform of the first switching device and the duty cycle of the driving waveform of the second switching device are complementary, and the duty cycle of the driving waveform of the third switching device and the duty cycle of the driving waveform of the fourth switching device are complementary.

2. The control circuit of the power factor corrector according to claim 1, wherein: The signal processing module includes a temperature comparator and a first controller; The temperature comparator is electrically connected to the temperature detection module and is configured to compare the detected temperature with the preset temperature, and output a first high level when the detected temperature is greater than the preset temperature; and output a first low level when the detected temperature is not greater than the preset temperature; The first controller is electrically connected to the temperature comparator, and is configured to output the first timing control signal according to the first high level.

3. The control circuit of the power factor corrector according to claim 2, wherein: The first controller includes an OR gate.

4. The control circuit of the power factor corrector according to any one of claims 1 to 3, characterized in that: The feedback detection module includes an input voltage detection unit and a feedback voltage detection unit; The input voltage detection unit is electrically connected to the signal processing module and is configured to obtain the input voltage of the power factor corrector; The feedback voltage detection unit is electrically connected to the signal processing module and is configured to obtain the feedback voltage of the power factor corrector.

5. The control circuit of the power factor corrector according to claim 4, wherein: The signal processing module further includes an input voltage comparator, a feedback voltage comparator, a D flip-flop and a second controller; The input voltage comparator is electrically connected to the input voltage detection unit and is configured to output a second high level when the input voltage is greater than a preset input voltage; and output a second low level when the input voltage is not greater than the preset input voltage; The D flip-flop is electrically connected to the input voltage comparator and configured to output an enable signal when the second low level is converted to the second high level; The feedback voltage comparator is electrically connected to the feedback voltage detection unit and is configured to output a third high level when the feedback voltage is greater than a preset feedback voltage; and output a third low level when the feedback voltage is not greater than the preset feedback voltage; the third high level is a feedback signal; The second controller is electrically connected to the D flip-flop and the feedback voltage comparator, respectively, and is configured to output the second timing control signal according to the enable signal and the feedback signal, and vice versa, output the third timing control signal.

6. The control circuit of the power factor corrector according to claim 5, wherein: The second controller includes an AND gate.

7. The control circuit of the power factor corrector according to claim 5, wherein: The signal processing module also includes a digital filter; The digital filter is electrically connected to the input voltage comparator and the D flip-flop respectively, and is configured to perform filtering processing on the second high level and the second low level.

8. The control circuit of the power factor corrector according to claim 5, wherein: The control circuit of the power factor corrector further includes a zero-crossing detection unit; The zero-crossing detection unit is electrically connected to the signal processing module, and is configured to obtain the input voltage of the power factor corrector and switch the second high level to the second low level when the input voltage passes through zero.

9. A control method for a power factor corrector, characterized in that: A control circuit for a power factor corrector according to any one of claims 1 to 8, wherein the power factor corrector comprises a high-frequency switching device and a low-frequency switching device; and a control method for the power factor corrector comprises: Obtaining a detected temperature of the power factor corrector; When the detected temperature is greater than a preset temperature, outputting a first timing control signal; Obtaining a feedback voltage of the power factor corrector; When the feedback voltage is greater than a preset feedback voltage, a second timing control signal is output; when the feedback voltage is not greater than the preset feedback voltage, a third timing control signal is output; wherein, the operating frequency of the high-frequency switching device controlled by the first timing control signal is less than or equal to the operating frequency of the high-frequency switching device controlled by the second timing control signal, and the operating frequency of the high-frequency switching device controlled by the second timing control signal is less than the operating frequency of the high-frequency switching device controlled by the third timing control signal.

10. The control method of the power factor corrector according to claim 9, wherein: Also includes: Obtaining an input voltage of the power factor corrector; When the feedback voltage is greater than a preset feedback voltage, outputting a second timing control signal includes: When the input voltage is greater than the preset input voltage, a second high level is output; when the input voltage is not greater than the preset input voltage, a second low level is output; When the second low level is converted to the second high level, an enable signal is output; When the feedback voltage is greater than the preset feedback voltage, a third high level is output; the third high level is a feedback signal; The second timing control signal is output according to the enable signal and the feedback signal.

11. The control method of the power factor corrector according to claim 9, wherein: Also includes: Obtaining an input voltage of the power factor corrector; When the feedback voltage is greater than a preset feedback voltage, outputting a second timing control signal includes: When the input voltage is greater than the preset input voltage, a second high level is output; when the input voltage is not greater than the preset input voltage, a second low level is output; counting the second high level and the second low level, and outputting an enable signal when the number of the second high level and the second low level is an even number; When the feedback voltage is greater than the preset feedback voltage, a third high level is output; the third high level is a feedback signal; The second timing control signal is output according to the enable signal and the feedback signal.

12. The control method of the power factor corrector according to claim 10, wherein: When the second low level is converted to the second high level, before outputting the enable signal, the method further includes: Filtering is performed on the second high level and the second low level.

13. The control method of the power factor corrector according to claim 10 or 11, characterized in that: The control method of the power factor corrector further includes: When the input voltage passes through a zero point, the second high level is switched to the second low level.

14. The control method of a power factor corrector according to any one of claims 9 to 11, characterized in that: The high-frequency switching device includes a first switching device and a second switching device, and the low-frequency switching device includes a third switching device and a fourth switching device; The second timing control signal includes: When the input voltage waveform is in a first cycle, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device and the duty cycle of the driving waveform of the second switching device are complementary, and the duty cycle of the driving waveform of the third switching device and the duty cycle of the driving waveform of the fourth switching device are complementary; When the input voltage waveform is in the second period, the first switching device and the second switching device are both in a low-frequency switching state, the third switching device and the fourth switching device are both in a high-frequency switching state, and the duty cycle of the driving waveform of the first switching device and the duty cycle of the driving waveform of the second switching device are complementary, and the duty cycle of the driving waveform of the third switching device and the duty cycle of the driving waveform of the fourth switching device are complementary.

15. The control method of a power factor corrector according to any one of claims 9 to 11, characterized in that: The high-frequency switching device includes a first switching device and a second switching device, and the low-frequency switching device includes a third switching device and a fourth switching device; The third timing control signal includes: When the input voltage waveform is in a first cycle, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device and the duty cycle of the driving waveform of the second switching device are complementary, and the duty cycle of the driving waveform of the third switching device and the duty cycle of the driving waveform of the fourth switching device are complementary; When the input voltage waveform is in the second period, the first switching device and the second switching device are both in a high-frequency switching state, the third switching device and the fourth switching device are both in a low-frequency switching state, and the duty cycle of the driving waveform of the first switching device and the duty cycle of the driving waveform of the second switching device are complementary, and the duty cycle of the driving waveform of the third switching device and the duty cycle of the driving waveform of the fourth switching device are complementary.

16. A charging and discharging device, characterized in that: A power factor corrector comprising a control circuit of the power factor corrector according to any one of claims 1 to 8 and a power factor corrector, wherein the power factor corrector comprises a high-frequency switching device and a low-frequency switching device; the high-frequency switching device and the low-frequency switching device are both connected to the control circuit of the power factor corrector; The high-frequency switching device is configured to be turned on or off under the control of the control circuit of the power factor corrector; The low-frequency switching device is configured to be turned on or off under the action of the control circuit of the power factor corrector.

17. A charging and discharging device, characterized in that: The charging and discharging device includes: one or more processors, and a memory; The memory is coupled to the one or more processors, and the memory is used to store computer program code, where the computer program code includes computer instructions. The one or more processors call the computer instructions to enable the charging and discharging device to execute the method according to any one of claims 9 to 15.

18. A chip system, characterized in that: The chip system is applied to a charging and discharging device, and the chip system includes one or more processors, and the one or more processors are used to call computer instructions to enable the charging and discharging device to execute the method as described in any one of claims 9 to 15.

19. A computer-readable storage medium, characterized in that The computer-readable storage medium includes instructions, and when the instructions are executed on a charging and discharging device, the charging and discharging device performs the method according to any one of claims 9 to 15.

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