Back contact structure of IBC solar cell, IBC solar cell and preparation method thereof

Abstract

The present invention discloses a back contact structure of an IBC solar cell, an IBC solar cell and a preparation method, and belongs to the technical field of solar cells. The preparation method of the back structure of an IBC solar cell provided by the present invention and the preparation method of an IBC solar cell form undoped polycrystalline silicon on the back of a silicon wafer, and directly add the impurity source required for doping the polycrystalline silicon into the mask; subsequently, while performing second element doping and high-temperature diffusion treatment, the impurity source in the mask can diffuse under the action of high temperature to dope the polycrystalline silicon, thereby saving a step of high-temperature process, reducing the adverse effects of high temperature on the prepared solar cell, and also simplifying the process flow and reducing the manufacturing cost.

Description

Technical Field

[0001] The present invention belongs to the technical field of solar cells, and in particular relates to a back contact structure of a hybrid passivated full back contact solar cell, a hybrid passivated full back contact solar cell and a preparation method thereof. Background Art

[0002] The general preparation process flow of hybrid passivated back contact solar cells based on passivation contact structure is: polishing, growth of tunneling layer and undoped polysilicon, phosphorus diffusion, mask layer plating, laser grooving (local BSF opening), boron diffusion, laser grooving (PN isolation), double-sided passivation, screen printing, and metallization sintering to form metal electrodes.

[0003] As shown above, since part of the hybrid passivated back contact solar cell is an N-type passivated contact structure and part is a P-type doped structure, the recombination of the P-type doped region and its metal region is usually large, which limits the improvement of its performance. In order to reduce the recombination of the metal region, the junction depth of the P-type doped region is usually very deep, and a very high process temperature and a long time are required for boron diffusion. Generally, the temperature is not less than 1000°C, the time is not less than 100min, and the junction depth is not less than 1um. At such a high temperature: on the one hand, it is easy to damage the performance of the N-type passivation structure, based on which higher requirements are also put forward for the mask thickness of the N region; on the other hand, the general preparation process of the hybrid passivated back contact solar cell needs to undergo two element diffusion high temperature treatments, and frequent and higher temperature treatments will damage the minority carrier lifetime of the silicon substrate; based on this, the general preparation process of the hybrid passivated back contact solar cell is likely to have an adverse effect on the cell efficiency of the hybrid passivated back contact solar cell. In addition, frequent and high temperature processing steps will also increase the cost of process preparation and equipment investment. Summary of the invention

[0004] 1. Problem to be solved

[0005] In view of at least one problem existing in the above-mentioned existing method for preparing a hybrid passivated full back contact solar cell (IBC solar cell for short), the present invention provides a method for preparing a hybrid passivated full back contact solar cell, aiming to simplify the preparation steps of the IBC solar cell, and / or reduce the adverse effects of the high temperature step, and / or reduce the production cost of the IBC solar cell;

[0006] At the same time, the present invention also provides a hybrid passivation full back contact solar cell.

[0007] 2. Technical solution

[0008] In order to solve the above problems, the technical solution adopted by the present invention is as follows:

[0009] According to the purpose of the present invention, the first aspect of the present invention provides a method for preparing a back contact structure of a hybrid passivated full back contact solar cell, comprising:

[0010] Step S1: providing a silicon wafer with a polished surface;

[0011] Step S2: depositing a first dielectric and undoped polysilicon on the back side of the silicon wafer, and forming a mask layer on the back side of the silicon wafer;

[0012] Wherein, the mask layer contains a first element, and the content of the first element in the mask layer is 0.5-50wt%;

[0013] Step S3: processing a local area on the back side of the silicon wafer to remove the dielectric, the undoped polysilicon layer and the mask layer (exposing the silicon wafer body) in the local area to form an opening area;

[0014] Step S4: performing a second element doping and high temperature diffusion treatment on the back of the silicon wafer; (forming an element diffusion layer on the surface of the silicon wafer corresponding to the opening area; forming a glass layer on the back of the silicon wafer, and at the same time, converting the undoped polysilicon into doped polysilicon)

[0015] wherein the second element is of a different type from the first element;

[0016] The temperature of the high temperature diffusion treatment does not exceed 950°C;

[0017] Step S5: processing the back side of the silicon wafer and removing the mask layer and the glass layer;

[0018] Step S6: depositing a passivation anti-reflection layer on the back side of the silicon wafer;

[0019] Step S7: screen printing and sintering the silicon wafer to form a first electrode and a second electrode;

[0020] Wherein, the first electrode is in contact with the doped polysilicon, and the second electrode is in contact with the element diffusion layer;

[0021] Step S8: applying a reverse voltage between the first electrode and the second electrode, and at the same time, using a light source to illuminate the back side of the silicon wafer, thereby inducing a current and guiding the light source until the illumination covers the entire width of the silicon wafer;

[0022] Wherein, the reverse voltage is less than the maximum breakdown voltage of the battery.

[0023] According to the method for preparing the back contact structure of a hybrid passivated full back contact solar cell according to any embodiment of the first aspect of the present invention, in step S2, the first dielectric forming layer (ie, the first dielectric layer) has a thickness of 0.5 to 2 nm.

[0024] According to the method for preparing the back contact structure of a hybrid passivated full back contact solar cell according to any embodiment of the first aspect of the present invention, in step S2, the first medium includes any one or two or more of oxides (such as aluminum oxide) and silicides (such as silicon dioxide, silicon nitride, silicon carbide).

[0025] Preferably, the first dielectric layer is a tunneling oxide layer, and the first dielectric layer comprises silicon dioxide.

[0026] According to the method for preparing the back contact structure of a hybrid passivated full back contact solar cell according to any embodiment of the first aspect of the present invention, in step S2, the undoped polysilicon forms a layer (i.e., an undoped polysilicon layer), and the thickness of the layer is 50 to 300 nm.

[0027] According to the method for preparing a back contact structure of a hybrid passivated full back contact solar cell according to any embodiment of the first aspect of the present invention, in step S2, the thickness of the mask layer is 20-200 nm.

[0028] According to the method for preparing the back contact structure of a hybrid passivated full back contact solar cell according to any embodiment of the first aspect of the present invention, in step S2, the mask layer contains a first element, and the content of the first element in the mask layer is 0.5~50 wt%, preferably 2~20 wt%, and further preferably 2~15 wt%.

[0029] According to the method for preparing the back contact structure of a hybrid passivated full back-contact solar cell according to any embodiment of the first aspect of the present invention, in step S4, the junction depth of the element diffusion layer does not exceed 700nm; preferably, the junction depth of the element diffusion layer is 300~700nm; further preferably, the junction depth of the element diffusion layer is 500~700nm.

[0030] According to the method for preparing the back contact structure of a hybrid passivated full back contact solar cell according to any embodiment of the first aspect of the present invention, in step S4, the junction depth of the element diffusion layer is 300-700 nm.

[0031] According to the method for preparing a back contact structure of a hybrid passivated full back contact solar cell according to any embodiment of the first aspect of the present invention, in step S4, the flow rate of the second element during doping is 50 sccm-1000 sccm.

[0032] According to the method for preparing the back contact structure of a hybrid passivated full back contact solar cell according to any embodiment of the first aspect of the present invention, in step S4, the time for the second element doping and high temperature diffusion treatment is 30 to 90 minutes.

[0033] According to the method for preparing the back contact structure of a hybrid passivated full back contact solar cell according to any embodiment of the first aspect of the present invention, in step S6, the thickness of the passivation anti-reflection layer is 50-120 nm;

[0034] According to the method for preparing the back contact structure of a hybrid passivated full back contact solar cell of any embodiment of the first aspect of the present invention, in step S6, the passivation anti-reflection layer comprises a passivation layer and an anti-reflection layer;

[0035] The passivation layer includes any one or two or more of oxide (such as aluminum oxide) and silicide (such as silicon dioxide, silicon nitride, silicon carbide);

[0036] The anti-reflection layer includes any one, two, or more than two of oxides (such as aluminum oxide) and silicides (such as silicon dioxide, silicon nitride, and silicon carbide).

[0037] According to the method for preparing a back contact structure of a hybrid passivated full back contact solar cell according to any embodiment of the first aspect of the present invention, in step S6, the passivation layer comprises an oxide (such as aluminum oxide);

[0038] The anti-reflection layer includes silicide (such as silicon dioxide, silicon nitride, silicon carbide).

[0039] According to the method for preparing the back contact structure of a hybrid passivated full back contact solar cell according to any embodiment of the first aspect of the present invention, in step S8, the current density of the induced current is 10A / cm 2 Up to 1000A / cm 2 , and the duration is 10ns to 10ms.

[0040] According to the method for preparing a back contact structure of a hybrid passivated full back contact solar cell according to any embodiment of the first aspect of the present invention, the first element is phosphorus or boron;

[0041] The second element is phosphorus or boron;

[0042] The second element is of a different type than the first element;

[0043] The surface concentration of the second element is 1e18~1e20cm -3 , the junction depth is 300nm~700nm.

[0044] According to the method for preparing a back contact structure of a hybrid passivated full back contact solar cell according to any embodiment of the first aspect of the present invention, the first element is phosphorus, and the second element is boron.

[0045] According to the method for preparing a back contact structure of a hybrid passivated full back contact solar cell according to any embodiment of the first aspect of the present invention, the first element is boron, and the second element is phosphorus.

[0046] The second aspect of the invention provides a back contact structure of a hybrid passivated full back contact solar cell, which is prepared according to the method for preparing a back contact structure of a hybrid passivated full back contact solar cell according to any embodiment of the first aspect of the invention.

[0047] The third aspect of the present invention provides a method for preparing a hybrid passivated full back contact solar cell, comprising:

[0048] Step A1: providing a silicon wafer with a polished surface;

[0049] Step A2: depositing a first dielectric and undoped polysilicon on the back side of the silicon wafer, and forming a mask layer on the back side of the silicon wafer;

[0050] Wherein, the mask layer contains a first element, and the content of the first element in the mask layer is 0.5-50wt%;

[0051] Step A3: Processing a local area on the back side of the silicon wafer to remove the dielectric, undoped polysilicon and mask layer (exposing the silicon wafer body) in the local area to form an opening area;

[0052] Step A4: performing a second element doping and high-temperature diffusion treatment on the back of the silicon wafer; (forming an element diffusion layer on the surface of the silicon wafer corresponding to the opening area; forming a glass layer on the back of the silicon wafer, and at the same time, converting the undoped polysilicon into doped polysilicon);

[0053] wherein the second element is of a different type from the first element;

[0054] The temperature of the high temperature diffusion treatment does not exceed 950°C;

[0055] Step A5: Processing the back and front sides of the silicon wafer to remove the mask layer and the glass layer; performing texturing on the front side of the silicon wafer;

[0056] Step A6: depositing a passivation anti-reflection layer on the back and front sides of the silicon wafer;

[0057] Step A7: screen printing and sintering the silicon wafer to form a first electrode and a second electrode;

[0058] Wherein, the first electrode is in contact with the doped polysilicon, and the second electrode is in contact with the element diffusion layer;

[0059] Step A8: applying a reverse voltage between the first electrode and the second electrode, and at the same time, using a light source to illuminate the back side of the silicon wafer, thereby inducing a current and guiding the light source until the illumination covers the entire width of the silicon wafer;

[0060] Wherein, the reverse voltage is less than the maximum breakdown voltage of the battery.

[0061] According to the method for preparing a hybrid passivated full back contact solar cell according to any embodiment of the third aspect of the present invention, in step A6, the thickness of the passivation anti-reflection layer on the front side of the silicon wafer is 50-120 nm;

[0062] According to the method for preparing a hybrid passivated full back contact solar cell of any embodiment of the third aspect of the present invention, in step A6, the passivation anti-reflection layer on the front side of the silicon wafer comprises a passivation layer and an anti-reflection layer;

[0063] The passivation layer includes any one or two or more of oxide (such as aluminum oxide) and silicide (such as silicon dioxide, silicon nitride, silicon carbide);

[0064] The anti-reflection layer includes any one, two, or more than one of oxides (such as aluminum oxide) and silicides (such as silicon dioxide, silicon nitride, and silicon carbide).

[0065] According to the method for preparing a hybrid passivated full back contact solar cell of any embodiment of the third aspect of the present invention, in step A6, the passivation layer on the front side of the silicon wafer comprises an oxide (such as aluminum oxide);

[0066] The anti-reflection layer on the front side of the silicon wafer includes silicide (such as silicon dioxide, silicon nitride, silicon carbide).

[0067] A fourth aspect of the present invention provides a hybrid passivated full back contact solar cell, which is prepared according to the method for preparing a hybrid passivated full back contact solar cell according to any embodiment of the third aspect of the present invention.

[0068] Beneficial Effects

[0069] (1) The present invention provides a method for preparing the back structure of a hybrid passivated all-back contact solar cell (hereinafter referred to as IBC solar cell), and a method for preparing a hybrid passivated all-back contact solar cell, wherein undoped polycrystalline silicon is formed on the back of a silicon wafer, and an impurity source (first element) required for doping the polycrystalline silicon is directly doped into a mask; subsequently, while performing a second element doping and high-temperature diffusion treatment, the impurity source in the mask can diffuse under the action of high temperature to dope the polycrystalline silicon, thereby saving a step of high-temperature process, reducing the adverse effects of high temperature on the prepared solar cell, and also simplifying the process flow and reducing manufacturing costs.

[0070] (2) The method for preparing the back structure of a hybrid passivated full back contact solar cell (hereinafter referred to as IBC solar cell) provided by the present invention, and the method for preparing a hybrid passivated full back contact solar cell, wherein the temperature during the second element doping and high temperature diffusion treatment does not exceed 950°C, which is much lower than the temperature during the usual boron element doping and high temperature diffusion treatment (the general boron diffusion temperature is 1050°C). That is, the method for preparing the back structure of a hybrid passivated full back contact solar cell (hereinafter referred to as IBC solar cell) provided by the present invention reduces the requirements for the element doping diffusion / annealing temperature of the P-region doping region, and can reduce the damage of the high temperature thermal process to the minority carrier lifetime of the substrate silicon wafer, thereby improving the cell efficiency.

[0071] (3) The hybrid passivated full back contact solar cell prepared by the method of the present invention, or a cell with a back structure of the hybrid passivated full back contact solar cell prepared by the method of the present invention, adopts a carrier injection sintering process to reduce the recombination of the P-zone metal zone and the requirements for junction depth, and the cell efficiency is high. BRIEF DESCRIPTION OF THE DRAWINGS

[0072] Figure 1 Schematic diagram of the preparation process of the back structure of the IBC solar cell provided in Example 1 of the present invention;

[0073] Figure 2 This is a schematic diagram of the phased structure obtained during the preparation process of the back structure of the IBC solar cell provided in Example 1 of the present invention;

[0074] Figure 3 This is a schematic diagram of the phased structure obtained during the preparation process of the back structure of the IBC solar cell provided in Example 1 of the present invention;

[0075] Figure 4 This is a schematic diagram of the phased structure obtained during the preparation process of the back structure of the IBC solar cell provided in Example 1 of the present invention;

[0076] Figure 5 This is a schematic diagram of the phased structure obtained during the preparation process of the back structure of the IBC solar cell provided in Example 1 of the present invention;

[0077] Figure 6 This is a schematic diagram of the phased structure obtained during the preparation process of the back structure of the IBC solar cell provided in Example 1 of the present invention;

[0078] Figure 7 This is a schematic diagram of the phased structure obtained during the preparation process of the back structure of the IBC solar cell provided in Example 1 of the present invention;

[0079] Figure 8 This is a schematic diagram of the phased structure obtained during the preparation process of the back structure of the IBC solar cell provided in Example 1 of the present invention;

[0080] Fig. 9 This is a schematic diagram of the phased structure obtained during the preparation process of the back structure of the IBC solar cell provided in Example 1 of the present invention;

[0081] Fig.10 This is a schematic diagram of the phased structure obtained during the preparation process of the back structure of the IBC solar cell provided in Example 1 of the present invention;

[0082] Fig.11 This is a schematic diagram of the preparation process of the IBC solar cell provided in Example 5 of the present invention;

[0083] Fig.12 This is a schematic diagram of the staged structure obtained during the preparation process of the IBC solar cell provided in Example 5 of the present invention;

[0084] Fig.13 This is a schematic diagram of the staged structure obtained during the preparation process of the IBC solar cell provided in Example 5 of the present invention;

[0085] Fig.14 This is a schematic diagram of the staged structure obtained during the preparation process of the IBC solar cell provided in Example 5 of the present invention;

[0086] Fig.15 This is a schematic diagram of the staged structure obtained during the preparation process of the IBC solar cell provided in Example 5 of the present invention;

[0087] Fig.16 A schematic diagram of the preparation process of the IBC solar cell provided in Comparative Example 1 or Comparative Example 2 of the present invention;

[0088] In the figure: 101, silicon wafer; 102, first medium; 103, undoped polysilicon; 104, mask layer; 105, doped polysilicon; 106, glass layer; 107, second element diffusion layer; 108, back passivation anti-reflection layer; 109, front passivation anti-reflection layer; 110, first electrode; 111, second electrode. DETAILED DESCRIPTION

[0089] The present disclosure may be more easily understood by reference to the following description in conjunction with the accompanying drawings and examples, all of which constitute a part of the present disclosure. It should be understood that the present disclosure is not limited to the specific products, methods, conditions or parameters described and / or shown herein. Further, the terms used herein are only used for the purpose of describing specific embodiments by way of example and are not intended to be limiting unless otherwise stated.

[0090] It should also be understood that, for the sake of clarity, certain features of the present disclosure may be described herein in the context of separate embodiments, but may also be provided in combination with each other in a single embodiment. That is, unless clearly incompatible or specifically not included, each separate embodiment is considered to be combinable with any other embodiment, and the combination is considered to represent another different embodiment. Conversely, for the sake of simplicity, the various features of the present disclosure described in the context of a single embodiment may also be provided individually or in any sub-combination. Finally, although a particular embodiment may be described as part of a series of steps or part of a more general structure, each step or substructure itself may also be considered to be an independent embodiment.

[0091] Unless otherwise indicated, it should be understood that each individual element in a list and each combination of individual elements in the list will be interpreted as a different embodiment. For example, a list of embodiments expressed as "A, B, or C" should be interpreted to include embodiments "A", "B", "C", "A or B", "A or C", "B or C", or "A, B, or C".

[0092] In the present disclosure, the singular forms of the articles "a", "an", and "the" also include the corresponding plural references, and references to a specific value include at least that specific value unless the context clearly indicates otherwise. Thus, for example, reference to "a substance" is a reference to at least one of that substance and its equivalents.

[0093] When items are described by using conjunction terms such as “… and / or…”, the description should be understood to include any one of the associated listed items and all combinations of one or more thereof; for example, A and / or B should be interpreted as an embodiment including “A” but not including “B”, an embodiment including “B” but not including “A”, and an embodiment including “A” and “B”.

[0094] In general, the use of the term "about" indicates an approximate value that may vary depending on the desired properties obtained by the disclosed subject matter, and will be interpreted in a context-dependent manner based on function. Therefore, one of ordinary skill in the art will be able to interpret a certain degree of difference on a case-by-case basis. In some cases, the number of significant figures used when expressing a particular value can be a representative technique for determining the difference allowed by the term "about". In other cases, a gradient in a range of values ​​can be used to determine the range of differences allowed by the term "about". Further, all ranges in this disclosure are inclusive and combinable, and reference to the values ​​stated in the range includes each value within the range.

[0095] Throughout the specification of this application document, when a certain part is described as “including” a certain constituent element, unless otherwise clearly described to the contrary, it does not mean that other constituent elements are excluded but that other constituent elements may also be included.

[0096] Throughout the specification of the present invention, when a certain step is recorded as being "above" or "before" other steps, it not only includes the case where a certain step has a direct time series relationship with other steps, but also includes the same rights as the case where a certain step has an indirect time series relationship where the time series of the order of two steps is changed, such as a mixing step after each step.

[0097] Throughout the specification of the present invention, when it is recorded as "according to any embodiment of the ... aspect of the ... object of the present invention...", unless otherwise clearly stated to the contrary, it does not mean that the constituent elements of the described scheme that appear before and after it are excluded, but that other constituent elements may also be included.

[0098] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the invention belongs; the terms used herein and / or include any and all combinations of one or more of the associated listed items.

[0099] In order to demonstrate the technical solutions and advantages of the present invention, the technical solutions in the embodiments of the present invention will be fully described below.

[0100] Example 1

[0101] The embodiment of the present invention provides a method for preparing a back side structure (Back-1) of an IBC battery. Figure 1 As shown, it includes the following steps:

[0102] Step S1: Provide a silicon wafer with a polished surface (such as Figure 2 Specific operations for reference include:

[0103] Take an N-type silicon wafer 101, place it in a slot machine for alkaline etching, and form a pyramid base texture on the surface of the silicon wafer 101 by alkaline texturing, and the base of the pyramid is 10-40um;

[0104] After this step is completed, the weight loss of the N-type silicon wafer 101 is 0.0006-0.0024 g / cm 2 .

[0105] Finally, the reflectivity of the surface of the silicon wafer 101 is controlled at 30-45%.

[0106] Specifically in this embodiment, the base of the pyramid is 20um. After this step is completed, the weight loss of the N-type silicon wafer 101 is 0.0012g / cm 2 Finally, the reflectivity of the surface of the silicon wafer 101 is controlled at 40%.

[0107] Step S2: depositing a first dielectric 102 and undoped polysilicon 103 on the back of the silicon wafer 101, and forming a mask layer 104 on the back of the silicon wafer 101; wherein the mask layer 104 contains a first element, and the content of the first element in the mask layer 104 is 0.5-50 wt% (e.g. Figure 3 ), specifically:

[0108] Regarding the first medium 102, the "tunneling oxide layer" is mainly an ultra-thin oxide layer, which has an important influence on the properties of the passivation contact, and good contact comes from the defect-assisted tunneling mechanism or the micropores on the oxide layer. Preferably, the ultra-thin oxide layer is an ultra-thin silicon oxide layer. Regarding the formation of the ultra-thin silicon oxide layer, there are currently mainly thermal oxidation methods (including dry oxygen oxidation, wet oxygen oxidation), chemical vapor deposition (CVD) methods (including plasma chemical vapor deposition (PECVD) method, low pressure chemical vapor deposition (LPCVD) method), room temperature wet oxidation method, etc., preferably low pressure chemical vapor deposition (LPCVD) method. In some preferred embodiments of the present invention, the tunneling oxide layer formed has a thickness of 0.5~2nm.

[0109] Specifically in this embodiment, a low pressure chemical vapor deposition (LPCVD) furnace is used to form the first dielectric 102 of SiO2 with a thickness of 1.7 nm to form a tunneling oxide layer.

[0110] The formation method of the "undoped polysilicon 103" is mainly to first use PECVD or LPCVD, and the various methods have similar process effects. In some embodiments of the present invention, the thickness of the undoped polysilicon 103 layer is 50-300nm.

[0111] Specifically in this embodiment, the thickness of the undoped polysilicon 103 layer is 150 nm.

[0112] The "mask layer 104" can be formed by PECVD. The mask layer 104 has a thickness of 20-200 nm, and contains a first element, and the content of the first element in the mask layer 104 is 0.5-50 wt%. The first element can be phosphorus. Taking the first element as an example, PH3 (flow rate 100 sccm-6000 sccm), SiH4 (flow rate 500 sccm-6000 sccm), and N2O (flow rate 500 sccm-20000 sccm) are introduced in the process of preparing the mask layer 104 by PECVD, and the temperature can be controlled at 350-600°C. The thickness of the mask layer 104 can be controlled by controlling the deposition time of 5-60 min, and the content of the first element in the mask layer 104 can be controlled by coordinating and regulating the flow rate, temperature, and diffusion time of the phosphorus source.

[0113] Specifically in this embodiment, the thickness of the mask layer 104 is 100 nm, the first element is phosphorus, and the content of phosphorus in the mask layer 104 is 10 wt %.

[0114] Step S3: Processing a local area on the back side of the silicon wafer 101 to remove the dielectric, undoped polysilicon 103 and mask layer 104 in the local area to form an opening area (such as Figure 4 , 5 ), specifically:

[0115] As described herein, the dielectric, undoped polysilicon 103 and mask layer 104 in the local area may be removed by laser film opening, printing mask and chemical etching.

[0116] Specifically in this embodiment, the dielectric, undoped polysilicon 103 and mask layer 104 in the local area are removed by alkaline chemical etching after laser film opening.

[0117] Step S4: performing a second element doping and high temperature diffusion treatment on the back of the silicon wafer 101, forming an element diffusion layer on the surface of the silicon wafer 101 corresponding to the opening area, forming a glass layer 106 on the back of the silicon wafer 101, and converting the undoped polysilicon 103 that has not been removed into doped polysilicon 105 (such as Figure 6 ), specifically:

[0118] A diffusion furnace tube can be used to dope the second element and diffuse at high temperature to form a second element diffusion layer 107, and an element diffusion layer is formed on the surface of the silicon wafer 101 corresponding to the opening area, and a glass layer 106 is formed on the back of the entire silicon wafer 101; the "second element" can be boron, but it needs to be different from the type of the first element; for example, if the first element is phosphorus, the second element is boron, and in the process of doping and high-temperature diffusion of the second element using a diffusion furnace tube, boron source BCl3 (flow rate 50sccm~1000sccm), O2 (flow rate 500sccm~5000sccm), N2 (flow rate 1000sccm~10000sccm) are introduced, the temperature can be controlled at 800~950℃, and the time can be controlled at 30~90min. Among them, the square resistance of the second element in the diffusion layer can be achieved by controlling the flow rate, temperature, and diffusion time of the boron source, and the surface concentration of the second element is 1e18~1e20cm -3 , the junction depth does not exceed 700nm, and the junction depth is preferably 300~700nm.

[0119] Specifically in this embodiment, the second element is boron, and a boron diffusion layer is formed on the surface of the silicon wafer 101 corresponding to the opening area by a boron source diffusion furnace tube as the second element diffusion layer 107, and the temperature is controlled at 920°C. At the same time, a borosilicate glass layer 106 is formed on the back of the entire silicon wafer 101; the boron surface concentration of the boron diffusion layer is 4e18 cm -3 , the junction depth is 700nm.

[0120] Step S5: Process the back side of the silicon wafer 101 and remove the mask layer 104 and the glass layer 106 (such as Figure 7 ), specifically:

[0121] As described herein, the back side of the silicon wafer 101 may be processed by an HF etching method to remove the mask layer 104 and the glass layer 106 .

[0122] Specifically in this embodiment, the mask layer 104 and the glass layer 106 are removed by HF etching.

[0123] Step S6: Depositing a back passivation anti-reflection layer 108 (such as Figure 8 ), specifically:

[0124] The thickness of the back passivation anti-reflection layer 108 is 50~120 nm; the back passivation anti-reflection layer 108 includes a passivation layer with a thickness of 4~10 nm and an anti-reflection layer with a thickness of 40~110 nm; the passivation layer includes any one or two or more of oxides (such as aluminum oxide) and silicides (such as silicon dioxide, silicon nitride, silicon carbide); the anti-reflection layer includes any one or two or more of oxides (such as aluminum oxide) and silicides (such as silicon dioxide, silicon nitride, silicon carbide).

[0125] Preferably, the anti-reflection layer is a silicon nitride layer, and the passivation layer is an aluminum oxide layer; wherein, the silicon nitride layer can be formed by chemical vapor deposition (CVD) (including plasma chemical vapor deposition (PECVD) method, low pressure chemical vapor deposition (LPCVD) method) and magnetron sputtering technology, and is prepared according to actual use needs. If conditions permit, it is preferred to use chemical vapor deposition (CVD) (including plasma chemical vapor deposition (PECVD) method, low pressure chemical vapor deposition (LPCVD) method) to prepare SiNx film.

[0126] The "aluminum oxide layer" mentioned above can be formed by atomic layer deposition (ALD), plasma assisted deposition (ALD), pyrolysis deposition, delocalization (PECVD), molecular beam epitaxy, deposition Al plus oxidation, etc. It is prepared according to actual use needs and is not specifically limited here.

[0127] A large amount of hydrogen will be generated during the deposition of the silicon nitride layer and the aluminum oxide layer, which can form good hydrogen passivation.

[0128] Specifically in this embodiment, the anti-reflection layer is a silicon nitride layer, and the passivation layer is an aluminum oxide layer;

[0129] The total thickness of the back passivation anti-reflection layer 108 is 85 nm, wherein the anti-reflection layer is a silicon nitride layer (with a thickness of 80 nm), and the passivation layer is an aluminum oxide layer (with a thickness of 5 nm);

[0130] Step S7: screen printing electrode slurry on the silicon wafer 101 and sintering to form the first electrode 110 and the second electrode 111; Fig. 9 As shown, the first electrode 110 is in contact with the doped polysilicon 105, and the second electrode 111 is in contact with the element diffusion layer;

[0131] Step S8: applying a reverse voltage between the first electrode 110 and the second electrode 111, and at the same time, irradiating light to the back side of the silicon wafer, thereby inducing a current (such as Fig.10 ), specifically:

[0132] A reverse voltage is applied between the first electrode 110 and the second electrode 111, and the reverse voltage is less than the maximum breakdown voltage of the battery. In the presence of the voltage, a certain part of the back side of the silicon wafer 101 is illuminated, so that a current is induced in the local position, and the current has a current density of 10A / cm2 to 1000A / cm2 with respect to the local area, and the duration is 10ns to 10ms, and the illumination light source is guided until the entire width of the silicon wafer is covered.

[0133] Specifically in this embodiment, the reverse voltage is 15V, and the back side of the silicon wafer 101 is illuminated by laser. The light spot formed by the illumination is the local part, and finally a 300A / cm 2 The current density is 100 ns and the illumination light source is guided until it covers the entire surface of the silicon wafer.

[0134] Example 2

[0135] The embodiment of the present invention provides a method for preparing an IBC battery back structure, and finally prepares the following two IBC battery back structures:

[0136] The preparation method of the first IBC battery back structure (Back-2a) is basically the same as that of Example 1, with the only difference being that the thickness of the mask layer 104 formed in step S2 is 50 nm, and the rest is the same as that of Example 1.

[0137] The preparation method of the second IBC battery back structure (Back-2b) is basically the same as that of Example 1, with the only difference being that the thickness of the mask layer 104 formed in step S2 is 200 nm, and the rest is the same as that of Example 1.

[0138] Example 3

[0139] The embodiment of the present invention provides a method for preparing an IBC battery back structure, and finally prepares the following two IBC battery back structures:

[0140] The preparation method of the first IBC battery back structure (Back-3a) is basically the same as that of Example 1, with the only difference being that the temperature for boron diffusion in step S4 is 850° C., and the rest is the same as that of Example 1.

[0141] The preparation method of the second IBC battery back structure (Back-3b) is basically the same as that of Example 1, with the only difference being that the temperature for boron diffusion in step S4 is 950° C., and the rest is the same as that of Example 1.

[0142] Example 4

[0143] The embodiment of the present invention provides a method for preparing an IBC battery back structure, and finally prepares the following two IBC battery back structures:

[0144] The preparation method of the first IBC battery back structure (Back-4a) is basically the same as that of Example 1, with the only difference being that the junction depth of the boron diffusion layer formed after the boron diffusion in step S4 is 300 nm, and the rest is the same as that of Example 1.

[0145] The preparation method of the second IBC battery back structure (Back-4b) is basically the same as that of Example 1, with the only difference being that the junction depth of the boron diffusion layer formed after the boron diffusion in step S4 is 700 nm, and the rest is the same as that of Example 1.

[0146] Comparative Example 1

[0147] This comparative example is as follows Fig.16 The preparation method of the IBC battery back structure shown in the figure finally prepares the following IBC battery back structure;

[0148] The preparation method of the first IBC battery back structure (D-Back-1) is basically the same as that of Example 1, except that a doped polysilicon layer is directly formed in step S2, and various parameters of the polysilicon layer are the same as those of Example 1; in addition, the first element is not doped in the mask layer 104, and other than that, various parameters of the mask layer 104 are also the same as those of Example 1;

[0149] In addition, step S8 of embodiment 1 is no longer performed.

[0150] Comparative Example 2

[0151] This comparative example is as follows Fig.16 The preparation method of the IBC battery back structure shown in the figure finally prepares the following IBC battery back structure;

[0152] The preparation method of the first IBC battery back structure (D-Back-2) is basically the same as that of Example 1, except that:

[0153] In the step S2 , a doped polysilicon layer is directly formed, and various parameters of the polysilicon layer are the same as those in the first embodiment; in addition, the mask layer 104 is not doped with the first element, and other parameters of the mask layer 104 are also the same as those in the first embodiment.

[0154] The temperature of the high temperature diffusion treatment in step S4 is 1050°C;

[0155] In addition, step S8 of embodiment 1 is no longer performed.

[0156] Example 5

[0157] The embodiment of the present invention provides a method for preparing an IBC battery, wherein the preparation of the back structure of the IBC battery is the same as that of embodiment 1.

[0158] Specifically, the preparation method of the IBC battery described in this embodiment is as follows Fig.11 As shown, it includes the following steps A1~A8:

[0159] Reference Figure 2 As shown, the step A1 is the same as the step S1 of the embodiment 1;

[0160] Reference Figure 3 As shown, the step A2 is the same as the step S2 of the embodiment 1;

[0161] Reference Figure 4 , 5 As shown, the step A3 is the same as the step S3 of the embodiment 1;

[0162] Reference Figure 6 As shown, the step A4 is the same as the step S4 of the embodiment 1;

[0163] like Fig.12 As shown, the step A5 is basically the same as the step S5 of the embodiment 1; at the same time, the front side of the silicon wafer 101 needs to be textured and cleaned; a pyramid-shaped velvet texture is formed on the front side of the silicon wafer 101 by textured, and the height of the pyramid is 1um. After textured, the reflectivity of the surface of the silicon wafer 101 is controlled to be 10~11%.

[0164] Specifically in this embodiment, the height of the pyramid is 1 um. After this step is completed, the reflectivity of the surface of the silicon wafer 101 is finally controlled at 10.5%.

[0165] like Fig.13 As shown, the step A6 deposits a passivation anti-reflection layer on the back and front of the silicon wafer 101, wherein the formation of the back passivation anti-reflection layer 108 is the same as the step S6 of the embodiment 1;

[0166] Specifically in this embodiment, the back passivation anti-reflection layer 108 deposited on the back of the silicon wafer 101 is the same as that in Embodiment 1, the front passivation anti-reflection layer 109 deposited on the front of the silicon wafer 101 has a thickness of 80 nm, the anti-reflection layer is a silicon nitride layer (with a thickness of 75 nm), and the passivation layer is an aluminum oxide layer (with a thickness of 5 nm);

[0167] like Fig.14 As shown, the step A7 is the same as the step S7 of the embodiment 1;

[0168] like Fig.15 As shown, the step A8 is the same as the step S8 of the embodiment 1;

[0169] In this embodiment, an IBC battery is finally prepared and marked as IBC-1.

[0170] Example 6

[0171] The embodiment of the present invention provides a method for preparing an IBC battery. The method for preparing the IBC battery is basically the same as that in Embodiment 5. The only difference is that the preparation of the back structure of the IBC battery in this embodiment is the same as that in Embodiment 2.

[0172] In this embodiment, the final preparation is:

[0173] An IBC battery IBC-2a, wherein the back structure of the IBC-2a is Back-2a;

[0174] IBC battery IBC-2b, the back structure of the IBC-2b is Back-2b.

[0175] Example 7

[0176] The embodiment of the present invention provides a method for preparing an IBC battery. The method for preparing the IBC battery is basically the same as that in embodiment 5. The only difference is that the preparation of the back structure of the IBC battery in this embodiment is the same as that in embodiment 3.

[0177] In this embodiment, the final preparation is:

[0178] IBC battery IBC-3a, the back structure of the IBC-3a is Back-3a;

[0179] IBC battery IBC-3b, the back structure of the IBC-3b is Back-3b.

[0180] Example 8

[0181] The embodiment of the present invention provides a method for preparing an IBC battery. The method for preparing the IBC battery is basically the same as that in embodiment 5. The only difference is that the preparation of the back structure of the IBC battery in this embodiment is the same as that in embodiment 4.

[0182] In this embodiment, the final preparation is:

[0183] IBC battery IBC-4a, the back structure of the IBC-4a is Back-4a;

[0184] IBC battery IBC-4b, the back structure of the IBC-4b is Back-4b.

[0185] Comparative Example 3

[0186] This comparative example provides a method for preparing an IBC battery. The method for preparing the IBC battery is basically the same as that in Example 5. The only difference is that the preparation of the back structure of the IBC battery in this example is the same as that in Comparative Example 1.

[0187] In this comparative example, the following was finally prepared:

[0188] IBC battery D-IBC-1, the back structure of D-IBC-1 is D-Back-1.

[0189] Comparative Example 4

[0190] This comparative example provides a method for preparing an IBC battery. The method for preparing the IBC battery is basically the same as that in Example 5. The only difference is that the preparation of the back structure of the IBC battery in this example is the same as that in Comparative Example 2.

[0191] In this comparative example, the IBC battery D-IBC-2 is finally prepared, and the back structure of D-IBC-2 is D-Back-2.

[0192] Table 1. Performance comparison parameters of various solar cells

[0193]

[0194] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for preparing a back contact structure of an IBC solar cell, characterized in that: include: Step S1: providing a silicon wafer with a polished surface; Step S2: depositing a first dielectric and undoped polysilicon on the back side of the silicon wafer, and forming a mask layer on the back side of the silicon wafer; Wherein, the mask layer contains a first element, and the content of the first element in the mask layer is 0.5-50wt%; Step S3: processing a local area on the back side of the silicon wafer to remove the dielectric, undoped polysilicon layer and mask layer in the local area to form an opening area; Step S4: performing a second element doping and high-temperature diffusion treatment on the back side of the silicon wafer, forming an element diffusion layer on the surface of the silicon wafer corresponding to the opening area, forming a glass layer on the back side of the silicon wafer, and converting the undoped polysilicon that has not been removed into doped polysilicon; wherein the second element is of a different type from the first element; The temperature of the high temperature diffusion treatment does not exceed 950°C; Step S5: processing the back side of the silicon wafer and removing the mask layer and the glass layer; Step S6: depositing a passivation anti-reflection layer on the back side of the silicon wafer; Step S7: screen-printing electrode slurry on the silicon wafer and sintering to form a first electrode and a second electrode; Wherein, the first electrode is in contact with the doped polysilicon, and the second electrode is in contact with the element diffusion layer; Step S8: applying a reverse voltage between the first electrode and the second electrode, and at the same time, using a light source to illuminate the back side of the silicon wafer, thereby inducing a current and guiding the light source until the illumination covers the entire width of the silicon wafer; Wherein, the reverse voltage is less than the maximum breakdown voltage of the battery.

2. The method for preparing the back contact structure of an IBC solar cell according to claim 1, characterized in that: In step S2, the undoped polysilicon forms a layer, and the thickness of the layer is 50-300 nm; and / or, The thickness of the mask layer is 20-200 nm.

3. The method for preparing the back contact structure of an IBC solar cell according to claim 2, characterized in that: In step S2, the mask layer contains a first element, the content of the first element in the mask layer is 0.5 ~ 50 wt%; Alternatively, in step S2, the mask layer contains a first element, and the content of the first element in the mask layer is 2-20 wt%.

4. The method for preparing the back contact structure of an IBC solar cell according to any one of claims 1 to 3, characterized in that: In step S4, the temperature of the second element doping and high temperature diffusion treatment is 800-950° C.; And / or, in step S4, the time for the second element doping and high temperature diffusion treatment is 30 to 90 minutes.

5. The method for preparing the back contact structure of an IBC solar cell according to claim 4, characterized in that: In step S4, the junction depth of the element diffusion layer does not exceed 700 nm; Alternatively, the junction depth of the element diffusion layer is 300-700 nm.

6. The method for preparing the back contact structure of an IBC solar cell according to any one of claims 1 to 3 or 5, characterized in that: In step S8, the current density of the induced current is 10A / cm 2 Up to 1000A / cm 2 , and the duration is 10ns to 10ms.

7. The back contact structure of an IBC solar cell is characterized in that: The back contact structure is prepared according to the method for preparing the back contact structure of an IBC solar cell according to any one of claims 1 to 6.

8. A method for preparing an IBC solar cell, characterized in that: include: Step A1: providing a silicon wafer with a polished surface; Step A2: depositing a first dielectric and undoped polysilicon on the back side of the silicon wafer, and forming a mask layer on the back side of the silicon wafer; Wherein, the mask layer contains a first element, and the content of the first element in the mask layer is 0.5-50 wt%; Step A3: processing a local area on the back side of the silicon wafer to remove the dielectric, undoped polysilicon layer and mask layer in the local area to form an opening area; Step A4: performing a second element doping and high-temperature diffusion treatment on the back side of the silicon wafer, forming an element diffusion layer on the surface of the silicon wafer corresponding to the opening area, forming a glass layer on the back side of the silicon wafer, and converting the undoped polysilicon that has not been removed into doped polysilicon; wherein the second element is of a different type from the first element; The temperature of the high temperature diffusion treatment does not exceed 950°C; Step A5: performing texturing treatment on the front side of the silicon wafer; performing treatment on the back side and the front side of the silicon wafer to remove the mask layer and the glass layer; Step A6: depositing a passivation anti-reflection layer on the back and front sides of the silicon wafer; Step A7: screen printing electrode slurry on the silicon wafer and sintering to form a first electrode and a second electrode; Wherein, the first electrode is in contact with the doped polysilicon, and the second electrode is in contact with the element diffusion layer; Step A8: applying a reverse voltage between the first electrode and the second electrode, and at the same time, using a light source to illuminate the back side of the silicon wafer, thereby inducing a current and guiding the light source until the illumination covers the entire width of the silicon wafer; Wherein, the reverse voltage is less than the maximum breakdown voltage of the battery.

9. The method for preparing an IBC solar cell according to claim 8, characterized in that: In step A2, the undoped polysilicon forms a layer, and the thickness of the layer is 50-300 nm; and / or, The thickness of the mask layer is 20-200 nm.

10. The method for preparing an IBC solar cell according to claim 9, characterized in that: In step A2, the mask layer contains a first element, and the content of the first element in the mask layer is 0.5-50wt%; Alternatively, in step A2, the mask layer contains a first element, and the content of the first element in the mask layer is 2-20 wt %.

11. The method for preparing an IBC solar cell according to any one of claims 8 to 10, characterized in that: In step A4, the temperature of the second element doping and high temperature diffusion treatment is 800-950° C.; And / or, in step A4, the time for the second element doping and high temperature diffusion treatment is 30 to 90 minutes.

12. The method for preparing an IBC solar cell according to claim 11, characterized in that: In step A4, the junction depth of the element diffusion layer does not exceed 700 nm; Alternatively, in step A4, the junction depth of the element diffusion layer is 300-700 nm.

13. The method for preparing an IBC solar cell according to any one of claims 8 to 10 or 12, characterized in that: In step A8, the current density of the induced current is 10A / cm 2 Up to 1000A / cm 2 , and the duration is 10ns to 10ms.

14. IBC solar cell, characterized in that The IBC solar cell is prepared according to the preparation method of the IBC solar cell according to any one of claims 8 to 13.

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