Power factor correction circuit, control method and equipment thereof and storage medium

Abstract

The invention relates to the technical field of electronics, and discloses a power factor correction circuit and a control method and device thereof, and a storage medium, and the circuit comprises a three-phase input voltage sampling unit which is connected with a three-phase power supply end and is used for collecting and outputting a three-phase input voltage; the three-phase full-bridge rectification unit is connected with a three-phase power supply end and is used for receiving a control signal and adjusting current based on the control signal; the energy storage unit is connected with the three-phase full-bridge rectification unit; the current sampling unit is connected with the energy storage unit and is used for collecting and outputting real-time current; the bus voltage sampling unit is connected with the energy storage unit and is used for collecting and outputting real-time bus voltage; the control unit is used for receiving the three-phase input voltage, the real-time current and the real-time bus voltage and sending a control signal to the three-phase full-bridge rectification unit so as to adjust the power factor through the energy storage unit. The problems that in the prior art, a step-down PFC relates to multiple devices, a circuit is complex, and cost reduction is not facilitated are solved.

Description

Technical Field

[0001] The present invention relates to the field of electronic technology, and in particular to a power factor correction circuit and a control method, device and storage medium thereof. Background Art

[0002] At present, the DC motor controller adopts a rectifier-inverter topology solution, which first uses a three-phase full-bridge rectifier circuit composed of diodes to convert the three-phase AC power input from the power grid into DC power, and then converts the DC power into three-phase AC power with adjustable amplitude and frequency for driving the motor through an inverter part composed of fully controlled devices such as MOSFET or IGBT.

[0003] The existing three-phase input current is distorted, and the input power factor of the system is reduced. Therefore, it is necessary to correct the input power factor of the system. The commonly used power factor correction schemes are passive PFC (Power Factor Correction) and active PFC. Among them, the passive PFC scheme simply connects a reactor in series in the input circuit to filter out the high-frequency harmonics in the input current, which cannot fundamentally improve the input power factor of the system. The active PFC generally adopts a scheme based on the boost circuit, which cannot reduce the bus voltage. The buck-type PFC mainly includes types based on the Buck circuit, Vienna rectifier circuit, etc., but the above circuits involve many devices, the circuit is complex, which is not conducive to cost reduction, and the control method is complex, which is not suitable for small and medium power DC motor control systems. Summary of the invention

[0004] In view of this, the present invention provides a power factor correction circuit and a control method, device and storage medium thereof to solve the problem in the prior art that the buck PFC involves many devices and the circuit is complex, which is not conducive to reducing costs.

[0005] In a first aspect, the present invention provides a power factor correction circuit, the circuit comprising:

[0006] A three-phase input voltage sampling unit, which is connected to the three-phase power supply terminal and is used to collect the three-phase input voltage and output it;

[0007] A three-phase full-bridge rectifier unit, the three-phase full-bridge rectifier unit is connected to the three-phase power supply terminal, and is used to receive a control signal and adjust the current based on the control signal;

[0008] An energy storage unit, the energy storage unit is connected to a three-phase full-bridge rectifier unit;

[0009] A current sampling unit, which is connected to the energy storage unit and is used to collect and output real-time current;

[0010] A bus voltage sampling unit, which is connected to the energy storage unit and is used to collect and output the real-time bus voltage;

[0011] A control unit, the control unit is respectively connected to the three-phase input voltage sampling unit, the three-phase full-bridge rectifier unit, the current sampling unit and the bus voltage sampling unit, and is used to receive the three-phase input voltage, the real-time current and the real-time bus voltage, and obtain the input line voltage phase based on the three-phase input voltage, obtain the preset current based on the input line voltage phase, the preset bus voltage and the real-time bus voltage, and send a control signal to the three-phase full-bridge rectifier unit based on the hysteresis comparison result of the real-time current and the preset current to adjust the power factor through the energy storage unit.

[0012] The control unit sends a control signal to the three-phase full-bridge rectifier unit, and the three-phase full-bridge rectifier unit acts based on the control signal, and adjusts the bus voltage by charging and discharging the energy storage unit. At the same time, a dual closed-loop control method of a voltage outer loop and a current inner loop is adopted. By collecting the three-phase input voltage, real-time current and real-time bus voltage, the real-time bus voltage is adjusted to the preset bus voltage, and the three-phase full-bridge rectifier unit is controlled to adjust the current based on the line voltage phase of the three-phase input voltage and the adjustment voltage value of the bus voltage. Thus, the current is controlled to make its phase the same as the input voltage, and indirectly make the grid input current and input voltage in phase, and the input power factor of the system will be close to the unity power factor, thereby achieving the purpose of controlling the bus voltage output and power factor correction. Compared with the existing buck PFC, the components are greatly reduced and the circuit structure is simplified.

[0013] In an optional implementation, the power supply end includes: an A-phase power supply end, a B-phase power supply end and a C-phase power supply end, and the three-phase input voltage sampling unit includes:

[0014] A first resistor, wherein a first end of the first resistor is connected to the A-phase power supply terminal, and a second end of the first resistor is connected to the control unit;

[0015] a second resistor, wherein a first end of the second resistor is connected to the B-phase power supply terminal, and a second end of the second resistor is connected to the control unit;

[0016] a third resistor, wherein a first end of the third resistor is connected to the C-phase power supply terminal, and a second end of the third resistor is connected to the control unit;

[0017] a fourth resistor, wherein a first end of the fourth resistor is connected to a second end of the first resistor, and a second end of the fourth resistor is grounded;

[0018] a fifth resistor, wherein a first end of the fifth resistor is connected to the second end of the second resistor, and a second end of the fifth resistor is grounded;

[0019] A sixth resistor, wherein a first end of the sixth resistor is connected to the second end of the third resistor, and a second end of the sixth resistor is grounded.

[0020] In an optional implementation, the current sampling unit includes:

[0021] a seventh resistor, wherein a first end of the seventh resistor is connected to the three-phase full-bridge rectifier unit, and a second end of the seventh resistor is connected to the current sampling unit;

[0022] an eighth resistor, a first end of the eighth resistor being connected to the first end of the seventh resistor;

[0023] a ninth resistor, wherein a first end of the ninth resistor is connected to a second end of the seventh resistor;

[0024] a comparator, wherein a first input terminal of the comparator is connected to the second terminal of the eighth resistor, and a second input terminal of the comparator is connected to the second terminal of the ninth resistor;

[0025] a tenth resistor, wherein a first end of the tenth resistor is connected to the first input end of the comparator, and a second end of the tenth resistor is connected to the output end of the comparator;

[0026] an eleventh resistor, a first end of the eleventh resistor being connected to the preset reference voltage end, and a second end of the eleventh resistor being connected to the second input end of the comparator;

[0027] A twelfth resistor, wherein a first end of the twelfth resistor is connected to the output end of the comparator, and a second end of the twelfth resistor is connected to the control unit.

[0028] In an optional implementation, the current sampling unit further includes:

[0029] a first capacitor, wherein a first end of the first capacitor is connected to a first end of the eleventh resistor, and a second end of the first capacitor is connected to a second end of the eleventh resistor;

[0030] a second capacitor, wherein a first end of the second capacitor is connected to a first end of the tenth resistor, and a second end of the second capacitor is connected to a second end of the tenth resistor;

[0031] A third capacitor, wherein a first end of the third capacitor is connected to the second end of the twelfth resistor, and a second end of the third capacitor is grounded.

[0032] In an optional implementation, the three-phase full-bridge rectifier unit includes:

[0033] A first fully-controlled device, wherein a control end of the first fully-controlled device is connected to the control unit, and a first end of the first fully-controlled device is connected to the A-phase power supply end;

[0034] A second fully-controlled device, wherein a control end of the second fully-controlled device is connected to the control unit, and a first end of the second fully-controlled device is connected to the B-phase power supply end;

[0035] a third fully-controlled device, wherein the control end of the third fully-controlled device is connected to the control unit, the first end of the third fully-controlled device is connected to the C-phase power supply end, the second end of the third fully-controlled device is connected to the second end of the first fully-controlled device and the second end of the second fully-controlled device, and serves as an output positive electrode of the three-phase full-bridge rectifier unit;

[0036] A first diode, wherein a first end of the first diode is connected to the A-phase power supply end;

[0037] a second diode, wherein a first end of the second diode is connected to the B-phase power supply end;

[0038] The third diode, the first end of the third diode is connected to the C-phase power supply end, the second end of the third diode is connected to the second end of the first diode and the second end of the second diode, and serves as the output negative pole of the three-phase full-bridge rectifier unit.

[0039] In an optional embodiment, the energy storage unit includes:

[0040] A freewheeling diode, wherein a first end of the freewheeling diode is connected to a second end of the first fully-controlled device, and a second end of the freewheeling diode is connected to a second end of the first diode;

[0041] An inductor, wherein a first end of the inductor is connected to a first end of the freewheeling diode, and a second end of the inductor is connected to a bus voltage sampling unit;

[0042] An output capacitor, wherein a first end of the output capacitor is connected to the second end of the inductor, and a second end of the output capacitor is connected to the second end of the seventh resistor.

[0043] In an optional implementation, the bus voltage sampling unit includes:

[0044] a thirteenth resistor, a first end of the thirteenth resistor is connected to the second end of the inductor, and a second end of the thirteenth resistor is connected to the control unit;

[0045] A fourteenth resistor, a first end of the fourteenth resistor is connected to the second end of the thirteenth resistor, and a second end of the fourteenth resistor is grounded.

[0046] In a second aspect, the present invention provides a control method for a power factor correction circuit, which is applied to a control unit in the above power factor correction circuit, and the method comprises:

[0047] Obtain bus voltage, three-phase input voltage and real-time current, and obtain input line voltage based on the three-phase input voltage;

[0048] Determine the difference between the bus voltage and the preset bus voltage, and input the difference into the voltage regulator to obtain the current amplitude;

[0049] A preset current is obtained based on the phase and current amplitude of the input line voltage;

[0050] Based on the hysteresis comparison result between the real-time current and the preset current, a control signal is sent to the three-phase full-bridge rectifier unit to adjust the power factor.

[0051] In a third aspect, the present invention provides a computer device, comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the control method of the power factor correction circuit of the first aspect or any corresponding embodiment thereof by executing the computer instructions.

[0052] In a fourth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the control method for a power factor correction circuit of the first aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0054] Figure 1 It is a conventional power factor correction circuit;

[0055] Figure 2 is a structural diagram of a power factor correction circuit according to an embodiment of the present invention;

[0056] Figure 3 is a flow chart of a control method of a power factor correction circuit according to an embodiment of the present invention;

[0057] Figure 4 It is a schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0058] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0059] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0060] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0061] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0062] At present, DC motor controllers are widely used Figure 1 The rectifier-inverter topology shown in the figure first uses a three-phase full-bridge rectifier circuit composed of diodes to convert the three-phase AC power input from the power grid into DC power, and then converts the DC power into three-phase AC power with adjustable amplitude and frequency for driving the motor through the inverter part composed of fully controlled devices (MOSFET / IGBT).

[0063] The existing related solutions use uncontrolled rectifier circuits at the front end, so the output voltage cannot be adjusted, and the DC voltage of the rectifier output is completely determined by the input three-phase grid voltage. For export models, when the grid voltage is 460V / 570V or higher, the bus voltage will reach 650V or higher. On the one hand, the electrical stress on the power devices of the back-end inverter circuit increases, and it is necessary to use power devices with higher voltage resistance and matching drive circuits, which increases the system cost. On the other hand, due to the excessively high bus voltage, a larger electrical gap and creepage distance are required, which puts higher requirements on the system insulation.

[0064] In addition, since the front end adopts an uncontrolled rectification scheme, the three-phase input current is distorted and the input power factor of the system is reduced. Therefore, it is necessary to correct the input power factor of the system. Currently, there are two commonly used power factor correction schemes: passive PFC and active PFC. Among them, the passive PFC scheme simply connects a reactor in series in the input circuit to filter out the high-frequency harmonics in the input current, which cannot fundamentally improve the input power factor of the system. The active PFC generally adopts a scheme based on the boost circuit and cannot reduce the bus voltage. The currently disclosed buck PFC patents mainly include types based on Buck (step-down conversion) circuits, Vienna rectifier circuits (pulse width modulated rectification), etc., but the above circuits involve many devices, the circuit is complex and not conducive to cost reduction, and the control method is complex, which is not suitable for small and medium power DC motor control systems.

[0065] In this regard, a power factor correction circuit is provided in this embodiment, such as Figure 2 As shown, the circuit includes:

[0066] A three-phase input voltage sampling unit 100, which is connected to a three-phase power supply terminal and is used to collect and output the three-phase input voltage;

[0067] A three-phase full-bridge rectifier unit 200, which is connected to the input voltage terminal and is used to receive a control signal and adjust the current based on the control signal;

[0068] An energy storage unit 300, the energy storage unit is connected to a three-phase full-bridge rectifier unit;

[0069] A current sampling unit 400, which is connected to the energy storage unit and is used to collect and output real-time current;

[0070] A bus voltage sampling unit 500, which is connected to the energy storage unit and is used to collect and output the bus voltage;

[0071] The control unit 600 is respectively connected to the three-phase input voltage sampling unit 100, the three-phase full-bridge rectifier unit 200, and the current sampling unit 400, and is used to receive the three-phase input voltage, the real-time current and the bus voltage, and obtain the input line voltage phase based on the three-phase input voltage, obtain the preset current based on the input line voltage phase, the preset bus voltage and the real-time bus voltage, and send a control signal to the three-phase full-bridge rectifier unit based on the hysteresis comparison result of the real-time current and the preset current to adjust the power factor.

[0072] A control signal is sent to the three-phase full-bridge rectifier unit 200 through the control unit 600, and the three-phase full-bridge rectifier unit 200 acts based on the control signal, so that the line voltage at the three-phase power supply end charges the energy storage unit 300 and supplies power to the load at the same time, thereby increasing the bus voltage. The energy storage unit 300 can also supply power to the load, thereby reducing the bus voltage. Furthermore, the three-phase full-bridge rectifier unit 200 is controlled by the control unit 600 to adjust the bus voltage.

[0073] At the same time, if the current is controlled so that its phase is the same as the input voltage, the grid input current and input voltage are indirectly made in phase, and the input power factor of the system will be close to unity power factor, thereby achieving the purpose of controlling the bus voltage output and power factor correction.

[0074] In this embodiment, a dual closed-loop control method of a voltage outer loop and a current inner loop can be adopted, wherein the voltage outer loop control includes: controlling the DC bus voltage Udc to a preset bus voltage Udc*, and the current inner loop control includes: obtaining a current inductor current command IL* based on the phase of the input line voltage and based on the voltage value that needs to be adjusted by the outer loop, and controlling the real-time current IL to be the inductor current command IL*.

[0075] Specifically, if the set DC bus reference voltage (i.e., the preset bus voltage) is Udc*, the control unit 600 obtains the real-time DC bus voltage Udc based on the bus voltage acquisition unit 50, obtains the three-phase input voltages as the first input voltage Ua, the second input voltage Ub, and the third input voltage Uc based on the three-phase input voltage sampling unit 100, and obtains the real-time current IL based on the current sampling unit. Then, the DC bus voltage Udc is compared with the preset bus voltage Udc*, and the difference between the DC bus voltage Udc and the preset bus voltage Udc* is input to the voltage regulator, wherein the voltage regulator can be specifically PID (a basic regulation method of the control system in the classical control theory) regulation, obtains the inductor current amplitude instruction |IL*|, and at the same time determines the maximum and minimum values ​​of the first input voltage Ua, the second input voltage Ub, and the third input voltage Uc, and determines that the input line voltage corresponding to the maximum and minimum values ​​is the current input line voltage, and then extracts the phase by dividing the input line voltage by the voltage amplitude k, wherein, please refer to formula (1) to obtain the voltage amplitude k.

[0076]

[0077] The phase of the input line voltage is multiplied by the inductor current amplitude command |IL*| to obtain the inductor current command IL*, and the current control is realized by a hysteresis comparison method, that is, when the inductor current command IL* is greater than the real-time current IL, a control signal is sent to the three-phase full-bridge rectifier unit 200, so that the grid input voltage charges the energy storage unit 300, and the inductor current increases. When the inductor current command IL* is less than the real-time current IL, another control signal is sent to the three-phase full-bridge rectifier unit 200, so that the grid input voltage stops charging the energy storage unit 300, and the inductor current decreases, and finally the bus voltage Udc is made the same as the preset bus voltage Udc*, and the real-time current IL makes its phase the same as the input voltage, indirectly making the grid input current and the input voltage in phase, and the input power factor of the system will be close to the unity power factor, thereby achieving the purpose of controlling the bus voltage output and power factor correction.

[0078] In some optional embodiments, such as Figure 3 As shown, Figure 3 1 is another power factor correction circuit structure diagram according to an embodiment of the present invention, the power supply end includes: an A-phase power supply end, a B-phase power supply end and a C-phase power supply end, and the input voltage sampling unit 100 includes:

[0079] A first resistor R1, wherein a first end of the first resistor R1 is connected to the A-phase power supply terminal UA, and a second end of the first resistor is connected to the control unit 600;

[0080] A second resistor R2, a first end of the second resistor R2 is connected to the B-phase power supply terminal UB, and a second end of the second resistor R2 is connected to the control unit 6;

[0081] a third resistor R3, wherein a first end of the third resistor R3 is connected to the C-phase power supply terminal UC, and a second end of the third resistor R3 is connected to the control unit 600;

[0082] a fourth resistor R4, wherein a first end of the fourth resistor R4 is connected to a second end of the first resistor R1, and a second end of the fourth resistor R4 is grounded;

[0083] a fifth resistor R5, wherein a first end of the fifth resistor R5 is connected to a second end of the second resistor R2, and a second end of the fifth resistor R5 is grounded;

[0084] A sixth resistor R6, a first end of the sixth resistor R6 is connected to the second end of the third resistor R3, and a second end of the sixth resistor R6 is grounded.

[0085] The input voltage sampling unit 100 may specifically include a first voltage dividing circuit, a second voltage dividing circuit and a third voltage dividing circuit. The first voltage dividing circuit is connected to the A-phase power supply terminal UA and the control unit 600, respectively, and is used to collect the first input voltage Ua of the A-phase power supply terminal UA and send it to the control unit 600. The second voltage dividing circuit is connected to the B-phase power supply terminal UB and the control unit 600, and is used to collect the second input voltage Ub of the B-phase power supply terminal UB and send it to the control unit 600. The third voltage dividing circuit is connected to the C-phase power supply terminal UC and the control unit 600, and is used to collect the third input voltage Uc of the C-phase power supply terminal UC and send it to the control unit 600.

[0086] Specifically, the control unit 600 measures the first input voltage Ua of the A-phase power terminal UA through the voltage division of the first resistor R1 and the fourth resistor R4, the control unit 600 measures the second input voltage Ub of the B-phase power terminal UB through the voltage division of the second resistor R2 and the fifth resistor R5, and the control unit 600 measures the third input voltage Uc of the C-phase power terminal UC through the voltage division of the third resistor R3 and the sixth resistor R6.

[0087] In some optional embodiments, such as Figure 2 As shown, the inductor current sampling unit 400 includes:

[0088] A seventh resistor R7, wherein a first end of the seventh resistor R7 is connected to the three-phase full-bridge rectifier unit 200, and a second end of the seventh resistor R7 is connected to the current sampling unit 50;

[0089] an eighth resistor R8, a first end of the eighth resistor R8 being connected to a first end of the seventh resistor R7;

[0090] a ninth resistor R9, wherein a first end of the ninth resistor R9 is connected to a second end of the seventh resistor R7;

[0091] An operational amplifier A1, wherein a first input terminal of the operational amplifier A1 is connected to a second terminal of the eighth resistor R8, and a second input terminal of the operational amplifier A1 is connected to a second terminal of the ninth resistor R9;

[0092] a tenth resistor R10, wherein a first end of the tenth resistor R10 is connected to the first input end of the operational amplifier A1, and a second end of the tenth resistor R10 is connected to the output end of the operational amplifier A1;

[0093] an eleventh resistor R11, a first end of the eleventh resistor R11 is connected to a preset reference voltage end Vref, and a second end of the eleventh resistor R11 is connected to a second input end of the operational amplifier A1;

[0094] A twelfth resistor R12 , wherein a first end of the twelfth resistor R12 is connected to the output end of the operational amplifier A1 , and a second end of the twelfth resistor R12 is connected to the control unit 600 .

[0095] In this embodiment, the seventh resistor R7 is a sampling resistor, and the control unit 600 is biased based on the voltage of the sampling resistor and amplified by the operational amplifier A1. The control unit 600 calculates the amplified voltage and the sampling resistor to obtain the real-time current IL.

[0096] In some optional embodiments, such as Figure 2 As shown, the inductor current sampling unit also includes:

[0097] a first capacitor C1, wherein a first end of the first capacitor C1 is connected to a first end of an eleventh resistor R11, and a second end of the first capacitor C1 is connected to a second end of the eleventh resistor R11;

[0098] A second capacitor C2, a first end of the second capacitor C2 is connected to a first end of the tenth resistor R10, and a second end of the second capacitor C2 is connected to a second end of the tenth resistor R10;

[0099] A third capacitor C3, a first end of the third capacitor C3 is connected to the second end of the twelfth resistor R12, and a second end of the third capacitor C3 is grounded.

[0100] In this embodiment, the first capacitor plays a role in filtering the preset reference voltage terminal Vref, the second capacitor C2 plays a role in filtering the voltage transmitted by the operational amplifier A1, and the voltage amplified by the operational amplifier A1 is filtered through the third capacitor C3 and then transmitted to the control unit 600.

[0101] In some optional embodiments, such as Figure 2 As shown, the three-phase full-bridge rectifier unit 200 includes:

[0102] A first fully-controlled device Q1, wherein a control end of the first fully-controlled device Q1 is connected to the control unit 600, and a first end of the first fully-controlled device Q1 is connected to the A-phase power supply end UA;

[0103] A second fully-controlled device Q2, wherein the control end of the second fully-controlled device Q2 is connected to the control unit 600, and the first end of the second fully-controlled device Q2 is connected to the B-phase power supply terminal UB;

[0104] A third fully-controlled device Q3, wherein the control end of the third fully-controlled device Q3 is connected to the control unit 600, the first end of the third fully-controlled device Q3 is connected to the C-phase power supply end UC, the second end of the third fully-controlled device Q3 is connected to the second end of the first fully-controlled device Q1 and the second end of the second fully-controlled device Q2, and serves as the output positive electrode of the three-phase full-bridge rectifier unit 200;

[0105] A first diode D1, wherein a first end of the first diode D1 is connected to the A-phase power supply terminal UA;

[0106] A second diode D2, a first end of the second diode D2 is connected to the B-phase power supply terminal UB;

[0107] The third diode D3, the first end of the third diode D3 is connected to the C-phase power supply terminal UC, the second end of the third diode D3 is connected to the second end of the first diode D1 and the second end of the second diode D2, and serves as the output negative pole of the three-phase full-bridge rectifier unit 200.

[0108] In this embodiment, the three-phase full-bridge rectifier unit 200 is composed of fully controlled devices and diodes. Figure 2 In addition to the connection method shown in , other full-bridge rectifier connection methods can also be used.

[0109] Specifically, the first fully controlled device Q1, the second fully controlled device Q2 and the third fully controlled device Q3 constitute the upper bridge arm, and the first diode D1, the second diode D2 and the third diode D3 constitute the lower bridge arm. The control unit 600 controls the first fully controlled device Q1, the second fully controlled device Q2 and the third fully controlled device Q3 at the front end to increase and decrease the bus voltage through the energy storage unit. By controlling the phase of the real-time current IL to be the same as the phase of the power supply input, the grid input current and the input voltage are indirectly made in phase, and the input power factor of the system will be close to the unity power factor, thereby achieving the purpose of controlling the bus voltage output and correcting the power factor at the same time. Compared with the traditional method of reducing the bus current based on Buck circuits, Vienna rectifier circuits, etc., the number of devices is reduced, the circuit complexity is reduced, and it is suitable for small and medium power DC motor control systems.

[0110] It should be noted that the first fully-controlled device Q1, the second fully-controlled device Q2 and the third fully-controlled device Q3 can be IGBT (Insulate-Gate Bipolar Transistor) or MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), and specifically can be NMOS (N-Metal-Oxide-Semiconductor). The bridge arm corresponding to the A-phase voltage terminal is the first fully-controlled device Q1 and the first diode D1, the bridge arm corresponding to the B-phase voltage terminal is the second fully-controlled device Q2 and the second diode D2, and the bridge arm corresponding to the C-phase voltage terminal is the third fully-controlled device Q3 and the third diode D3.

[0111] Specifically, if the input voltage of phase A is the highest and the input voltage of phase B is the lowest among the three-phase voltages, the first fully controlled device Q1 of the bridge arm of phase A is turned on, and the line voltage UAB is applied to the circuit of the energy storage unit 300. At this time, the line voltage UAB charges the energy storage unit 300 and supplies power to the load, and the bus voltage increases; when the first fully controlled device Q1 of the bridge arm of phase A is turned off, the load is supplied with power through the energy storage unit 300, and the bus voltage decreases. Therefore, the bus voltage can be adjusted by controlling the opening duty cycle of the fully controlled device. At the same time, if the real-time current IL is controlled to make its phase the same as the input line voltage UAB, the grid input current is indirectly made in phase with the input voltage, thereby achieving the purpose of controlling the bus voltage output and correcting the power factor at the same time. The operating principle of the other two-phase input voltage is the same as the above principle, and will not be explained one by one here.

[0112] In some optional embodiments, such as Figure 2 As shown, the energy storage unit 300 includes:

[0113] A freewheeling diode D0, wherein a first end of the freewheeling diode D0 is connected to a second end of the first fully-controlled device Q1, and a second end of the freewheeling diode D0 is connected to a second end of the first diode D1;

[0114] An inductor L1, wherein a first end of the inductor L1 is connected to a first end of the freewheeling diode D0, and a second end of the inductor L1 is connected to a bus voltage sampling unit 50;

[0115] An output capacitor C0 , wherein a first end of the output capacitor C0 is connected to a second end of the inductor L1 , and a second end of the output capacitor C0 is connected to a second end of the seventh resistor R7 .

[0116] In this embodiment, it is assumed that the input voltage of phase A is the highest and the input voltage of phase B is the lowest among the three-phase voltages. At this time, the first fully-controlled device Q1 of the bridge arm of phase A is turned on, and the line voltage UAB is applied to the loop composed of the inductor L1, the output capacitor C0 and the load. At this time, the line voltage UAB charges the inductor L1 and supplies power to the load at the same time, and the bus voltage increases. When the first fully-controlled device Q1 of the bridge arm of phase A is turned off, the inductor supplies power to the load through the freewheeling diode D0, and the bus voltage decreases. Thus, the bus voltage is regulated.

[0117] In some optional embodiments, such as Figure 2 As shown, the bus voltage sampling unit 500 includes:

[0118] a thirteenth resistor R13, wherein a first end of the thirteenth resistor R13 is connected to the second end of the inductor L1, and a second end of the thirteenth resistor R13 is connected to the control unit 600;

[0119] A fourteenth resistor R14 , a first end of the fourteenth resistor R14 is connected to the second end of the thirteenth resistor R13 , and a second end of the fourteenth resistor R14 is grounded.

[0120] In this embodiment, the thirteenth resistor R13 and the fourteenth resistor R14 constitute a voltage-dividing resistor, and the control unit 600 collects the bus voltage based on the thirteenth resistor R13 and the fourteenth resistor R14.

[0121] This embodiment provides a control method for a power factor correction circuit, which is applied to a control unit in the above power factor correction circuit. Figure 3 As shown, the method includes:

[0122] (1) Obtain bus voltage, three-phase input voltage and real-time current, and obtain input line voltage based on the three-phase input voltage;

[0123] (2) determining a difference between a bus voltage and a preset bus voltage, and inputting the difference into a voltage regulator to obtain a current amplitude;

[0124] (3) obtaining a preset current based on the phase and current amplitude of the input line voltage;

[0125] (4) Based on the hysteresis comparison result between the real-time current and the preset current, a control signal is sent to the three-phase full-bridge rectifier unit to adjust the power factor.

[0126] In this embodiment, if the set DC bus reference voltage (i.e., the preset bus voltage) is Udc*, the control unit 600 obtains the real-time DC bus voltage Udc based on the bus voltage acquisition unit 50, obtains the three-phase input voltages of the first input voltage Ua, the second input voltage Ub, and the third input voltage Uc based on the three-phase input voltage sampling unit 100, and obtains the real-time current IL based on the current sampling unit. Then, the DC bus voltage Udc is compared with the preset bus voltage Udc*, and the difference between the DC bus voltage Udc and the preset bus voltage Udc* is input to the voltage regulator (PID), and the inductor current amplitude command |IL*| is obtained. At the same time, the maximum and minimum values ​​of the first input voltage Ua, the second input voltage Ub, and the third input voltage Uc are determined, and the input line voltage corresponding to the maximum and minimum values ​​is determined as the current input line voltage, and then the input line voltage is divided by the voltage amplitude to extract the phase, wherein the voltage amplitude is obtained by referring to formula (2).

[0127]

[0128] The phase of the input line voltage is multiplied by the inductor current amplitude command |IL*| to obtain the inductor current command IL*, and the inductor current control is realized by a hysteresis comparison method, that is, when the inductor current command IL* is greater than the real-time current IL (that is, the actual inductor current), the full-control device of the bridge arm where the maximum phase voltage is located is turned on, the grid input voltage charges the inductor, and the inductor current rises; when the inductor current command IL* is less than the real-time current IL, the full-control device of the bridge arm where the maximum phase voltage is located is turned off, and the inductor current decreases, ultimately making the bus voltage Udc the same as the preset bus voltage Udc*, and the real-time current IL makes its phase the same as the input voltage, indirectly making the grid input current and the input voltage in phase, and the input power factor of the system will be close to the unity power factor, thereby achieving the purpose of controlling the bus voltage output and power factor correction.

[0129] This embodiment also provides a computer device. Figure 4 , Figure 4 Schematic diagram of the hardware structure of the computer device according to the embodiment of the present invention. Figure 4 As shown, the computer device includes: one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components are connected to each other using different buses for communication, and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in or on the memory to display the graphical information of the GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Similarly, multiple computer devices can be connected, and each device provides some necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 4 A processor 10 is taken as an example.

[0130] The processor 10 may be a central processing unit, a network processor or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be a dedicated integrated circuit, a programmable logic device or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic or any combination thereof.

[0131] The memory 20 stores instructions executable by at least one processor 10, so that at least one processor 10 executes the method shown in the above embodiment.

[0132] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application required for at least one function; the data storage area may store data created according to the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely arranged relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0133] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid state drive; the memory 20 may also include a combination of the above types of memory.

[0134] The computer device also includes an input device 30 and an output device 40. The processor 10, the memory 20, the input device 30 and the output device 40 may be connected via a bus or other means. Figure 4 The example of connecting through bus is taken in the following.

[0135] The input device 30 can receive input digital or character information, and generate key signal input related to the user settings and function control of the computer device, such as a touch screen, a keypad, a mouse, a track pad, a touch pad, an indicator bar, one or more mouse buttons, a trackball, a joystick, etc. The output device 40 may include a display device, an auxiliary lighting device (e.g., an LED) and a tactile feedback device (e.g., a vibration motor), etc. The above-mentioned display device includes but is not limited to a liquid crystal display, a light emitting diode, a display and a plasma display. In some optional embodiments, the display device can be a touch screen.

[0136] This embodiment also provides a computer-readable storage medium, and the method according to this embodiment can be implemented in hardware, firmware, or can be implemented as a computer code that can be recorded in a storage medium, or can be implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and will be stored in a local storage medium through a network download, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state hard disk, etc.; further, the storage medium can also include a combination of the above types of memories. It can be understood that a computer, a processor, a microprocessor controller, or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor, or hardware, the method shown in the above embodiment is implemented.

[0137] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A power factor correction circuit, characterized in that: The circuit comprises: A three-phase input voltage sampling unit, which is connected to the three-phase power supply terminal and is used to collect and output the three-phase input voltage; A three-phase full-bridge rectifier unit, the three-phase full-bridge rectifier unit is connected to the three-phase power supply terminal, and is used to receive a control signal and adjust the current based on the control signal; An energy storage unit, the energy storage unit is connected to the three-phase full-bridge rectifier unit; A current sampling unit, which is connected to the energy storage unit and is used to collect and output real-time current; A bus voltage sampling unit, the bus voltage sampling unit is connected to the energy storage unit and is used to collect and output the real-time bus voltage; A control unit, wherein the control unit is respectively connected to the three-phase input voltage sampling unit, the three-phase full-bridge rectifier unit, the current sampling unit and the bus voltage sampling unit, and is used to receive the three-phase input voltage, the real-time current and the real-time bus voltage, and obtain an input line voltage phase based on the three-phase input voltage, obtain a preset current based on the input line voltage phase, a preset bus voltage and the real-time bus voltage, and send the control signal to the three-phase full-bridge rectifier unit based on a hysteresis comparison result of the real-time current and the preset current, so as to adjust the power factor through the energy storage unit.

2. The circuit according to claim 1, characterized in that The power supply end includes: an A-phase power supply end, a B-phase power supply end and a C-phase power supply end, and the three-phase input voltage sampling unit includes: a first resistor, wherein a first end of the first resistor is connected to the A-phase power supply terminal, and a second end of the first resistor is connected to the control unit; a second resistor, wherein a first end of the second resistor is connected to the B-phase power supply terminal, and a second end of the second resistor is connected to the control unit; a third resistor, wherein a first end of the third resistor is connected to the C-phase power supply terminal, and a second end of the third resistor is connected to the control unit; a fourth resistor, wherein a first end of the fourth resistor is connected to a second end of the first resistor, and a second end of the fourth resistor is grounded; a fifth resistor, a first end of the fifth resistor being connected to the second end of the second resistor, and a second end of the fifth resistor being grounded; A sixth resistor, wherein a first end of the sixth resistor is connected to the second end of the third resistor, and a second end of the sixth resistor is grounded.

3. The circuit according to claim 2, characterized in that The current sampling unit comprises: a seventh resistor, wherein a first end of the seventh resistor is connected to the three-phase full-bridge rectifier unit, and a second end of the seventh resistor is connected to the current sampling unit; an eighth resistor, a first end of the eighth resistor being connected to the first end of the seventh resistor; a ninth resistor, a first end of the ninth resistor being connected to the second end of the seventh resistor; a comparator, wherein a first input terminal of the comparator is connected to the second end of the eighth resistor, and a second input terminal of the comparator is connected to the second end of the ninth resistor; a tenth resistor, wherein a first end of the tenth resistor is connected to the first input end of the comparator, and a second end of the tenth resistor is connected to the output end of the comparator; an eleventh resistor, a first end of the eleventh resistor being connected to a preset reference voltage terminal, and a second end of the eleventh resistor being connected to a second input terminal of the comparator; A twelfth resistor, wherein a first end of the twelfth resistor is connected to the output end of the comparator, and a second end of the twelfth resistor is connected to the control unit.

4. The circuit according to claim 3, characterized in that The current sampling unit also includes: a first capacitor, wherein a first end of the first capacitor is connected to a first end of the eleventh resistor, and a second end of the first capacitor is connected to a second end of the eleventh resistor; a second capacitor, wherein a first end of the second capacitor is connected to the first end of the tenth resistor, and a second end of the second capacitor is connected to the second end of the tenth resistor; A third capacitor, wherein a first end of the third capacitor is connected to the second end of the twelfth resistor, and a second end of the third capacitor is grounded.

5. The circuit according to claim 4, characterized in that The three-phase full-bridge rectifier unit comprises: A first fully-controlled device, wherein a control end of the first fully-controlled device is connected to the control unit, and a first end of the first fully-controlled device is connected to the A-phase power supply end; A second fully-controlled device, wherein a control end of the second fully-controlled device is connected to the control unit, and a first end of the second fully-controlled device is connected to the B-phase power supply end; a third fully-controlled device, wherein a control end of the third fully-controlled device is connected to the control unit, a first end of the third fully-controlled device is connected to the C-phase power supply end, a second end of the third fully-controlled device is connected to the second end of the first fully-controlled device and the second end of the second fully-controlled device, and serves as an output positive electrode of the three-phase full-bridge rectifier unit; A first diode, wherein a first end of the first diode is connected to the A-phase power supply end; a second diode, wherein a first end of the second diode is connected to the B-phase power supply end; A third diode, wherein the first end of the third diode is connected to the C-phase power supply end, the second end of the third diode is connected to the second end of the first diode and the second end of the second diode, and serves as the output negative pole of the three-phase full-bridge rectifier unit.

6. The circuit according to claim 5, characterized in that The energy storage unit comprises: a freewheeling diode, wherein a first end of the freewheeling diode is connected to a second end of the first fully-controlled device, and a second end of the freewheeling diode is connected to a second end of the first diode; an inductor, wherein a first end of the inductor is connected to a first end of the freewheeling diode, and a second end of the inductor is connected to the bus voltage sampling unit; An output capacitor, wherein a first end of the output capacitor is connected to the second end of the inductor, and a second end of the output capacitor is connected to the second end of the seventh resistor.

7. The circuit according to claim 6, characterized in that The bus voltage sampling unit comprises: a thirteenth resistor, a first end of the thirteenth resistor being connected to the second end of the inductor, and a second end of the thirteenth resistor being connected to the control unit; A fourteenth resistor, a first end of the fourteenth resistor is connected to the second end of the thirteenth resistor, and a second end of the fourteenth resistor is grounded.

8. A control method for a power factor correction circuit, characterized in that: The method is applied to a control unit in a power factor correction circuit as described in any one of 1 to 7 above, and the method comprises: Obtaining bus voltage, three-phase input voltage and real-time current, and obtaining input line voltage based on the three-phase input voltage; Determine the difference between the bus voltage and a preset bus voltage, and input the difference into a voltage regulator to obtain a current amplitude; Obtaining a preset current based on the phase of the input line voltage and the current amplitude; Based on the hysteresis comparison result between the real-time current and the preset current, a control signal is sent to the three-phase full-bridge rectifier unit to adjust the power factor.

9. A computer device, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the control method of the power factor correction circuit described in claim 8 by executing the computer instructions.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the control method of the power factor correction circuit described in claim 8.

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