Signal detection circuit, method, receiver and device based on memristor

Abstract

The application discloses a signal detection circuit and method based on a memristor, a receiver and equipment, and relates to the field of wireless communication. A voltage source module of the circuit is connected with a voltage input end of a memristor array module, a current source module is connected with a current input end of the memristor array module, a current output end of the memristor array module is connected with an inverting input end of an operational amplifier module and one end of a feedback resistance module respectively, the other end of the feedback resistance module and an output end of the operational amplifier module are connected with an input end of a multiplier module, and an output end of the multiplier module is connected with one end of a resistance module. The voltage of the voltage source module is set according to a set of transmission vectors, the current of the current source module is set according to a received radio frequency signal, and the conductance value of the memristor is set according to a channel matrix. The application can realize a lower bit error rate of signal detection on the basis of greatly reducing the calculation time and power consumption, and also reduces the requirement for the programmable bit precision of the memristor.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of wireless communication, and particularly relates to a signal detection circuit and method based on a memristor, a receiver and equipment. BACKGROUND

[0002] Multiple-input multiple output (MIMO) technology is a wireless communication technology that uses multiple antennas at the transmitting end and the receiving end to significantly improve the data transmission rate or signal transmission quality. The MIMO receiver is a key component in a wireless communication system, which can receive signals using multiple antennas and process these signals to extract the transmitted data. The key modules in the MIMO receiver include a radio frequency front end, a channel estimation module and a signal detection circuit. The radio frequency front end converts electromagnetic wave signals in space into electrical signals and performs amplification, filtering and other processing on the signals in the analog domain. The channel estimation module can calculate the channel state information based on specific information in the received signal. The signal detection circuit uses the channel state information obtained by channel estimation and the received signal to calculate the transmitted signal.

[0003] The existing signal precoding circuit includes a memristor-based storage and calculation unit, a digital baseband unit and a phase shifter array. The memristor-based storage and calculation unit is used to determine an analog precoding matrix according to a channel state information matrix and transmit the analog precoding matrix to the digital baseband unit and the phase shifter array respectively. The digital baseband unit is used to determine a digital precoding matrix according to the analog precoding matrix and perform conversion processing on the to-be-transmitted signal based on the digital precoding matrix to obtain a converted signal. The phase shifter array is used to obtain a processed signal corresponding to the converted signal and perform phase shift processing on the processed signal according to the analog precoding matrix to obtain a phase-shifted signal, so as to send the phase-shifted signal through an antenna array. This method calculates the analog precoding matrix (analog domain) in the memristor array and completes the precoding (digital domain) in the phase shifter, which belongs to a digital-analog hybrid transmission signal precoding scheme.

[0004] The existing signal detection circuit scheme based on the regression algorithm calculation circuit of the memristor array can be applied to large-scale MIMO uplink receiver detection and downlink transmitter precoding scenarios. This scheme needs to map the MIMO channel matrix into the conductance matrix of the memristor array, which relies on high-precision array programming. Although the required programming time of the memristor array is reduced, the programming error is large, and this method requires high programmable bit precision of the memristor.

[0005] In summary, there is a need for a signal detection circuit that can significantly reduce the calculation time and power consumption, achieve a low bit error rate of signal detection, and reduce the requirement for programmable bit precision of the memristor. Summary of the Invention

[0006] The purpose of this application is to provide a memristor-based signal detection circuit, method, receiver and device, which can achieve a lower bit error rate of signal detection while significantly reducing computing time and power consumption, while also reducing the requirements for the programmable bit accuracy of the memristor.

[0007] To achieve the above objectives, this application provides the following solutions:

[0008] In a first aspect, the present application provides a memristor-based signal detection circuit, comprising:

[0009] Memristor array module, voltage source module, current source module, operational amplifier module, multiplier module, feedback resistor module and resistor module;

[0010] The voltage source module is connected to the voltage input end of the memristor array module, the current source module is connected to the current input end of the memristor array module, the current output end of the memristor array module is respectively connected to the inverting input end of the operational amplifier module and one end of the feedback resistor module, the other end of the feedback resistor module and the output end of the operational amplifier module are both connected to the input end of the multiplier module, the output end of the multiplier module is connected to one end of the resistor module, and the non-inverting input end of the operational amplifier module and the other end of the resistor module are grounded; the voltage of the voltage source module is set according to the transmission vector set, and the transmission vector set includes the transmission vector corresponding to each transmission signal to be screened; the current of the current source module is set according to the RF signal received by the RF front end, and the conductance value of the memristor in the memristor array module is set according to the channel matrix estimated by the channel estimation module.

[0011] In a second aspect, the present application provides a memristor-based signal detection method, which is applied to the above-mentioned memristor-based signal detection device. The memristor-based signal detection method includes:

[0012] Setting the current of the current source module according to the radio frequency signal received by the radio frequency front end;

[0013] Setting the conductance value of the memristor in the memristor array module according to the channel matrix estimated by the channel estimation module;

[0014] Traversing the emission vector set, setting the voltage of the voltage source module according to each emission vector in the emission vector set, and obtaining the current value output by the resistance module under each emission vector; the emission vector set includes the emission vector corresponding to each emission signal to be screened;

[0015] Convert the current value output by the resistance module under each emission vector into a voltage value to obtain the voltage value output by the resistance module under each emission vector;

[0016] The target transmission vector corresponds to a to-be-screened transmission signal as a detection signal; and the target transmission vector is a transmission vector corresponding to a minimum voltage value in voltage values output by the resistance module under each transmission vector.

[0017] In a third aspect, the present application provides a receiver, comprising: an antenna, a radio frequency front end, a channel estimation module, the signal detection circuit based on the memristor mentioned above, a voltage comparator and a demapper.

[0018] An output end of the antenna is connected with an input end of the radio frequency front end, and an output end of the radio frequency front end is connected with a current source module of the signal detection circuit and an input end of the channel estimation module respectively; another end of a resistance module of the signal detection circuit is connected with an input end of the voltage comparator, and an output end of the voltage comparator is connected with an input end of the demapper.

[0019] In a fourth aspect, the present application provides a signal detection device, comprising: a signal receiving module, an intermediate frequency signal conversion module, a first analog-digital conversion circuit, a second oscillator, a second mixer, a third mixer, a first low-frequency filter, a second low-frequency filter, a digital-analog conversion circuit, a channel estimation module, the signal detection circuit based on the memristor mentioned above, a second analog-digital conversion circuit and a demapper; an output end of the signal receiving module is connected with an input end of the intermediate frequency signal conversion module, an output end of the intermediate frequency signal conversion module is connected with an input end of the first analog-digital conversion circuit, a first output end of the first analog-digital conversion circuit and a first output end of the second oscillator are connected with an input end of the second mixer, a second output end of the first analog-digital conversion circuit and a second output end of the second oscillator are connected with an input end of the third mixer, an output end of the second mixer is connected with an input end of the first low-frequency filter, an output end of the third mixer is connected with an input end of the second low-frequency filter, and an output end of the first low-frequency filter and an output end of the second low-frequency filter are connected with an input end of the channel estimation module and an input end of the digital-analog conversion circuit; an output end of the digital-analog conversion circuit is connected with a current source module of the signal detection circuit; another end of a resistance module of the signal detection circuit is connected with an input end of the second analog-digital conversion circuit, and an output end of the second analog-digital conversion circuit is connected with an input end of the demapper.

[0020] In a fifth aspect, the present application provides a signal detection device, comprising: a signal receiving module, an intermediate frequency signal conversion module, a second oscillator, a second mixer, a third mixer, a first low-frequency filter, a second low-frequency filter, a channel estimation module, the signal detection circuit based on the memristor mentioned above, a voltage comparator, and a demapper; an output end of the signal receiving module is connected with an input end of the intermediate frequency signal conversion module, a first output end of the intermediate frequency signal conversion module and a first output end of the second oscillator are connected with an input end of the second mixer, a second output end of the intermediate frequency signal conversion module and a second output end of the second oscillator are connected with an input end of the third mixer, an output end of the second mixer is connected with an input end of the first low-frequency filter, an output end of the third mixer is connected with an input end of the second low-frequency filter, and an output end of the first low-frequency filter and an output end of the second low-frequency filter are both connected with an input end of the channel estimation module and a current source module of the signal detection circuit; another end of a resistance module of the signal detection circuit is connected with an input end of the voltage comparator, and an output end of the voltage comparator is connected with an input end of the demapper.

[0021] According to the specific embodiments provided in the present application, the following technical effects are disclosed:

[0022] The present application provides a signal detection circuit, method, receiver and device based on a memristor, by applying an input current source and an input voltage source outside the memristor array, receiving a signal, and taking a to-be-verified transmission vector as an input and mapping it in the circuit, mapping a channel matrix in the memristor array, realizing signal detection, greatly reducing the calculation time and power consumption, realizing a lower bit error rate of signal detection, and reducing the requirement for the programmable bit precision of the memristor, and improving the allowable programming error range. BRIEF DESCRIPTION OF DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without any creative effort.

[0024] Figure 1 The circuit diagram of the signal detection circuit based on the memristor provided in an embodiment of the present application;

[0025] Figure 2 The circuit diagram of the signal detection circuit based on the memristor suitable for complex number operation provided in an embodiment of the present application;

[0026] Figure 3 The flow chart of the signal detection method provided in an embodiment of the present application;

[0027] Figure 4 A receiver structure diagram provided by an embodiment of the present application;

[0028] Figure 5 A signal detection circuit schematic diagram provided by an embodiment of the present application;

[0029] Figure 6 A MIMO communication system signal detection device provided by an embodiment of the present application;

[0030] Figure 7 Another MIMO communication system signal detection device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0031] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0032] The above purposes, features and advantages of the present application can be more obvious and easy to understand. The present application will be described in further detail below with reference to the drawings and specific embodiments.

[0033] A memristor is a nonlinear device with memory function, also known as a memory resistor. It has the dimension of resistance, but unlike traditional resistors, the resistance of the memristor is determined by the charge flowing through it (with the function of memory charge), which means that by measuring the resistance of the memristor, the amount of charge flowing through it can be known. The memristor has a memory effect and can remember the amount of charge passing through it, even after power-off. The memristor can change its resistance by applying a pulse, and this process is reversible, meaning that the memristor can change from low resistance to high resistance, and also from high resistance to low resistance. If the high resistance is defined as "1" and the low resistance is defined as "0", then the function of storing data can be realized by using the memristor.

[0034] In fact, the resistance of a memristor can change continuously within a range. If a device is set to multiple resistance states, then a memristor can represent multiple bits of information. Also because of its continuously variable resistance, according to Ohm's law, voltage is equal to current multiplied by resistance, the memristor is set to a suitable conductance value, voltage is applied, and the output current is the result of multiplication, which naturally enables multiplication / division operations. Therefore, the array based on memristors can be used for storage as well as calculation. Memristors can be used as both memory and computing units, and therefore have the property of storage and calculation in one, and can achieve in-memory calculations. Because the conductance of the memristor, the input and output voltage and current are all analog quantities, the memristor can achieve analog calculations. In the analog calculation system, the workload of a memristor is equivalent to the utility generated by more than a dozen transistors in a central processing unit (CPU) chip, and is therefore expected to greatly improve the energy efficiency and area efficiency of the chip. Based on this, the signal detection circuit based on memristors provided in the embodiment of the present application includes:

[0035] Memristor array module, voltage source module, current source module, operational amplifier module, multiplier module, feedback resistor module and resistor module.

[0036] The voltage source module is connected to the voltage input end of the memristor array module, the current source module is connected to the current input end of the memristor array module, the current output end of the memristor array module is respectively connected to the inverting input end of the operational amplifier module and one end of the feedback resistor module, the other end of the feedback resistor module and the output end of the operational amplifier module are both connected to the input end of the multiplier module, the output end of the multiplier module is connected to one end of the resistor module, and the non-inverting input end of the operational amplifier module and the other end of the resistor module are grounded; the voltage of the voltage source module is set according to the transmission vector set, and the transmission vector set includes the transmission vector corresponding to each transmission signal to be screened; the current of the current source module is set according to the RF signal received by the RF front end, and the conductance value of the memristor in the memristor array module is set according to the channel matrix estimated by the channel estimation module.

[0037] In another exemplary embodiment of the present application, the memristor array module includes: a memristor array, wherein the memristor array is connected in corresponding rows and in corresponding columns; the memristor array includes Nr current input terminals, Nt voltage input terminals, and Nr current output terminals; Nr and Nt are both positive integers.

[0038] The current source module includes Nr current sources, the voltage source module includes Nt voltage sources, the operational amplifier module includes Nr operational amplifiers, the multiplier module includes Nr multipliers, the feedback resistor module includes Nr feedback resistors, and the resistor module includes Nr resistors.

[0039] The nRth current source is connected to the nRth current input terminal of the memristor array, 1≤nR≤Nr, the nTth voltage source is connected to the nTth voltage input terminal of the memristor array, 1≤nT≤Nt, and the nRth current output terminal of the memristor array is respectively connected to the inverting input terminal of the nRth operational amplifier and one end of the nRth feedback resistor; the output terminal of the nRth operational amplifier and the other end of the nRth feedback resistor are respectively connected to the input terminal of the nRth multiplier, and the output terminal of the nRth multiplier is connected to one end of the nRth resistor, and the non-inverting input terminal of each operational amplifier and the other end of each resistor are grounded.

[0040] The signal detection principle of the signal detection circuit provided in the embodiment of the present application is to search all the transmission vectors and find the signal detection vector that makes ||y-Hs|| 2 The minimum emission vector s op , where y is the received signal vector composed of the RF signal received by the RF front end, H is the channel matrix estimated by the channel estimation module, and s is the transmission vector composed of possible transmission signals (transmission signals to be screened). The implementation principle is: the memristor array and the voltage source can realize the multiplication of the matrix and the vector. The basic principle can be proved by Ohm's law I=GV and Kirchhoff's voltage and current law. I is the vector composed of current, G is the matrix composed of conductance values, and V is the vector composed of voltage. Figure 1 In the equation, the matrix H and the input voltage source v in Can realize matrix and vector multiplication Hv in On the basis of matrix-vector multiplication, an external input current source i in According to Kirchhoff's current law, the output current i out The output current is equal to the matrix-vector multiplication minus the external current source current. The final output current from the memristor array is i out =Hv in -y. The channel matrix H is converted into ij =h ij Set the conductance value of each memristor in the memristor array, g ij is the conductance of the memristor in the i-th row and j-th column of the memristor array, h ij is the value of row i and column j in H. According to the formula v j =x j Set the voltage value of each voltage source, v j is the voltage value of the jth voltage source, xj is the jth value in S, according to formula i yi =y i Set the current value of each current source, where i yi is the current value of the i-th current source, y i is the i-th value of y.

[0041] The current output of the memristor array is connected to the inverting input of the operational amplifier, and the non-inverting input of the operational amplifier is grounded. According to the "virtual off" property, the current at the inverting input is 0, and the output current of the memristor array flows entirely into the feedback resistors R1, R2, ... R n , all feedback resistors have the same value R1=R2=…=R n =g. The non-inverting input is grounded. According to the "virtual short" property and Ohm's law, the voltage at the output of the operational amplifier is v out =-αi out , v out Nr is the output voltage of the Nrth operational amplifier, α represents i out The linear amplification factor, α is a positive number. This step converts the output current signal into a voltage signal to facilitate the next exponentiation operation.

[0042] Because v out =-αi out =-αHs+αy, so ||y-Hs|| 2 Equivalent to v out Each element in is squared and then summed. Connect the voltage signal obtained in the previous step to the two input ports of the analog multiplier to form a square circuit. The output value of the analog multiplier is Then, the voltage signal output by the multiplier is connected to the ground through resistors of the same resistance value (resistance value is β), and the voltage signal is converted into a current signal. The sum of the squares of each element is completed using Kirchhoff's current law, and the current i output at the grounding point is sum That is, α is the square of the Euclidean distance between a set of transmitted vectors s and the received signal y. 2 / β times.

[0043] In practical applications, memristors cannot be programmed to complex conductance values, and the elements in the channel matrix H are usually complex numbers containing positive and negative real and imaginary parts. In order for the circuit to perform complex domain operations, multiple memristor arrays need to be connected, such as Figure 2 As shown, in another exemplary embodiment of the present application, the memristor array module includes: ψ memristor array units; ψ is a positive integer.

[0044] Each memristor array cell consists of an inverting amplifier circuit module and memristor arrays, which may be 4 memristor arrays, are connected in corresponding rows, the voltage output end of the ωth memristor array is connected to the voltage input end of the ω+1th memristor array through the ωth reverse amplification circuit module, and the voltage input end of the first memristor array is connected to the voltage source module; is a positive integer,

[0045] The current source module is connected to the current input terminal of the first memristor array unit, the current output terminal of the ψth memristor array unit is connected to the reverse input terminal of the operational amplifier module and one end of the feedback resistor module respectively, and the The current output terminal of the first memristor array unit is connected to the The current input terminal of the memristor array unit is connected to the The current output terminal of the first memristor array unit is connected to the The current input terminal of each memristor array unit is connected; is an integer greater than 1 and less than ψ.

[0046] In another exemplary embodiment of the present application, each of the memristor arrays includes Nr current input terminals, Nt voltage input terminals, and Nr current output terminals; Nr and Nt are positive integers.

[0047] The current source module includes Nr current sources, the voltage source module includes ψ voltage source units, each voltage source unit includes Nt voltage sources, the operational amplifier module includes Nr operational amplifiers, the multiplier module includes Nr multipliers, the feedback resistor module includes Nr feedback resistors, and the resistor module includes Nr resistors.

[0048] The nRth current source is connected to the nRth current input terminal of each memristor array in the first memristor array unit, 1≤nR≤Nr, the The ntth voltage source in the voltage source unit is connected to the The ntth voltage input terminal of the memristor array is connected to, 1≤nt≤Nt, No. The nRth current output terminal of the first memristor array in the memristor array unit is connected to the nRth current output terminal of the first memristor array The nRth current input terminal of each memristor array in the memristor array unit is connected, and the nRth current input terminal of each memristor array in the memristor array unit is connected. The nRth current output terminal of each memristor array in the memristor array unit is connected to the nRth current output terminal of each memristor array in the memristor array unit. The nRth current input terminals of each memristor array in the memristor array units are connected.

[0049] The nRth current output end of the first memristor array in the ψth memristor array unit is respectively connected to the inverting input end of the nRth operational amplifier and one end of the nRth feedback resistor; the output end of the nRth operational amplifier and the other end of the nRth feedback resistor are respectively connected to the input end of the nRth multiplier, the output end of the nRth multiplier is connected to one end of the nRth resistor, and the same-direction input end of each operational amplifier and the other end of each resistor are grounded.

[0050] In another exemplary embodiment of the present application, the reverse amplification circuit modules each include Nt reverse amplification circuits; the nt-th voltage output terminal in the ω-th memristor array in the memristor array unit and the nt-th voltage input terminal in the ω+1-th memristor array are connected through the nt-th reverse amplification circuit in the ω-th reverse amplification circuit module.

[0051] The detection principle of the signal detection circuit used for complex number calculation is: ||y-Hs|| 2 Equivalent to the real number model, taking the real part as an example, the mapping (i.e. the setting mentioned above) rules are as follows. Map the real part of y into i in , map the real part of s into Map the imaginary part of s into Map the real part of H into Map the imaginary part of H into The output current is the result of the real part. Similarly, the result of the imaginary part can be obtained. The sum of the two can be used to obtain the square of the Euclidean distance between the transmitting vector S and the received signal y. 2 / β times.

[0052] In an exemplary embodiment, a memristor-based signal detection method is provided, which is applied to the memristor-based signal detection device described above. The memristor-based signal detection method includes:

[0053] The current of the current source module is set according to the RF signal received by the RF front end.

[0054] The conductance value of the memristor in the memristor array module is set according to the channel matrix estimated by the channel estimation module.

[0055] Traverse the emission vector set, set the voltage of the voltage source module according to each emission vector in the emission vector set, and obtain the current value output by the resistance module under each emission vector; the emission vector set includes the emission vector corresponding to each emission signal to be screened.

[0056] The current value output by the resistance module under each emission vector is converted into a voltage value to obtain the voltage value output by the resistance module under each emission vector.

[0057] The target emission vector corresponding to the to-be-screened emission signal is determined as the detection signal; the target emission vector is the emission vector corresponding to the minimum voltage value among the voltage values ​​output by the resistance module under each emission vector.

[0058] More specifically, the signal detection method has the following process: Figure 3 As shown. First, the receiving signal is obtained from the RF front end, and the channel estimation module obtains the channel state information from the received signal. Then, the receiving signal is mapped on the input current source, and the channel matrix is ​​mapped on the memristor array with the conductance value. During the demodulation process of a single signal, these two values ​​do not need to be changed. Subsequently, it is only necessary to map the possible constellation point combinations, that is, the transmission vectors corresponding to each transmitted signal to be screened, on the input voltage source. The calculation time for a set of possible constellation point combinations is less than tns. Every tns, the value is taken from the output end and the constellation point combination of the input voltage source is changed. All constellation point combinations are traversed to compare the output current. The first output i sum Convert it into voltage (can be converted by Hall sensor, integration circuit, operational amplifier circuit and other devices) and record it with the corresponding S. After that, each time the new i is output sum are converted into voltage and compared with the reference voltage in the voltage comparator. sum If the converted voltage is less than the reference voltage, the reference voltage value of the voltage comparator is updated to the new i sum The converted voltage is updated, and the optimal launch vector in the memory is the launch vector corresponding to the new reference voltage. Traversing all possible launch vectors, the minimum Euclidean distance and the corresponding launch vector x are obtained. op .

[0059] The signal detection circuit of the present application obtains the received signal and the channel matrix from the channel estimation module, maps the received signal and the channel matrix into the circuit, searches for all possible transmitted signals, and finds the transmitted signal with the smallest output current, which is the transmitted signal (the result of signal detection). The proposed signal detection method can complete hardware-accelerated signal detection.

[0060] In an exemplary embodiment, a receiver is provided, such as Figure 4 As shown, it includes: an antenna, a radio frequency front end, a channel estimation module, the above-mentioned memristor-based signal detection circuit, a voltage comparator and a demapper.

[0061] The output end of the antenna is connected to the input end of the RF front end, and the output end of the RF front end is respectively connected to the current source module of the signal detection circuit and the input end of the channel estimation module; the other end of the resistance module of the signal detection circuit is connected to the input end of the voltage comparator, and the output end of the voltage comparator is connected to the input end of the demapper.

[0062] As an optional embodiment, the receiver also includes: a first controller, the output end of the channel estimation module is connected to the input end of the first controller, the output end of the first controller is connected to the memristor array module, and the first controller is used to calculate and set the conductance value of the memristor in the memristor array module of the signal detection circuit based on the channel matrix estimated by the channel estimation module.

[0063] As an optional implementation, the RF front end includes: a low-noise amplifier, a filter, and a downconverter connected in sequence. The antenna converts the electromagnetic wave signal in space into an electrical signal, the low-noise amplifier amplifies the electrical signal, the filter filters out most of the interference signals, and the downconverter converts the signal from high frequency to baseband signal. The signals processed in this part are all analog signals.

[0064] As an optional implementation, the receiver further includes: a sampling and holding module; the output end of the RF front end is connected to the current source module of the signal detection circuit and the input end of the channel estimation module through the sampling and holding module. The receiver provided in the present application includes two major parts of an integrated analog baseband storage and computing. The first part is the antenna and the RF front end, and the second part is the channel estimation module and the above-mentioned memristor-based signal detection circuit, voltage comparator and demapper. The sampling and holding module connects the first part and the second part, and can stabilize the analog signal output by the first part and serve as the input of the second part. The signal detection module and the channel estimation module input the same received signal. The channel estimation module estimates the channel state information based on the input and feeds back the channel matrix to the signal detection circuit. The signal detection circuit, in conjunction with the signal detection process, restores the transmission vector after calculation based on the estimated channel matrix and the received signal. The signal detection circuit uses the prior information of the known transmission constellation points to find the optimal transmission vector by comparing the output current, so as to realize the circuit as follows Figure 5 As shown, the voltage comparator will first output i sum Convert it into voltage and record it with the corresponding S. sum are converted into voltage and compared with the recorded value. If the new i sum If the converted voltage is less than the recorded value, the value recorded in the memory is updated to the new i sum The converted voltage and its corresponding emission vector S. By traversing all possible emission vectors, the minimum Euclidean distance and the corresponding emission vector x can be obtained. op The modules preceding the voltage comparator process analog signals. After completing the voltage comparison, the voltage comparator outputs high and low level signals (which can be considered digital signals). The voltage comparator not only compares the output current but also converts analog signals into digital signals within the circuit.

[0065] In an exemplary embodiment, the present application provides a signal detection device, specifically a MIMO communication system signal detection device, such as Figure 6 As shown, it includes: a signal receiving module, an intermediate frequency signal conversion module, a first analog-to-digital conversion circuit, a second oscillator, a second mixer, a third mixer, a first low-frequency filter, a second low-frequency filter, a digital-to-analog conversion circuit, a channel estimation module, the above-mentioned memristor-based signal detection circuit, a second analog-to-digital conversion circuit and a demapper; the output end of the signal receiving module is connected to the input end of the intermediate frequency signal conversion module, the output end of the intermediate frequency signal conversion module is connected to the input end of the first analog-to-digital conversion circuit, the first output end of the first analog-to-digital conversion circuit and the first output end of the second oscillator are connected to the input end of the second mixer, the first analog-to-digital conversion circuit is connected to the input end of the second mixer, and the output end of the intermediate frequency signal conversion module is connected to the input end of the first analog-to-digital conversion circuit. The second output end of the circuit and the second output end of the second oscillator are connected to the input end of the third mixer, the output end of the second mixer is connected to the input end of the first low-frequency filter, the output end of the third mixer is connected to the input end of the second low-frequency filter, the output end of the first low-frequency filter and the output end of the second low-frequency filter are both connected to the input end of the channel estimation module and the input end of the digital-to-analog conversion circuit; the output end of the digital-to-analog conversion circuit is connected to the current source module of the signal detection circuit; the other end of the resistance module of the signal detection circuit is connected to the input end of the second analog-to-digital conversion circuit, and the output end of the second analog-to-digital conversion circuit is connected to the input end of the demapper.

[0066] In actual applications, the signal detection device also includes: a second controller, the output end of the channel estimation module is connected to the input end of the second controller, the output end of the second controller is connected to the memristor array module, and the second controller is used to calculate and set the conductance value of the memristor in the memristor array module of the signal detection circuit based on the channel matrix estimated by the channel estimation module.

[0067] In actual applications, the signal receiving module is an antenna, and the intermediate frequency signal conversion module includes: a low noise amplifier, a radio frequency filter, a first mixer, a first intermediate frequency filter, an intermediate frequency amplifier and a second intermediate frequency filter connected in sequence, and a first oscillator connected to the first mixer.

[0068] The functions are as follows: The intermediate frequency signal conversion module and the first analog-to-digital conversion circuit are used to convert the radio frequency signal received by the antenna into an intermediate frequency signal in the form of a digital signal. The orthogonal signal generated by the second oscillator is used for IQ demodulation. The digital baseband signal is transmitted to the channel estimation module for calculating the channel matrix. The channel estimation module outputs the channel matrix, which is mapped to the memristor-based signal detection circuit. The IQ demodulated signal is input to the memristor-based signal detection circuit through the digital-to-analog conversion circuit. The memristor-based signal detection circuit outputs an estimated signal, which is converted to a digital signal through the second analog-to-digital conversion circuit. The demapper converts the digital estimated signal into a bit stream.

[0069] In an exemplary embodiment, the present application provides a MIMO communication system signal detection device, such as Figure 7 As shown, it includes: a signal receiving module, an intermediate frequency signal conversion module, a second oscillator, a second mixer, a third mixer, a first low-frequency filter, a second low-frequency filter, a channel estimation module, the above-mentioned memristor-based signal detection circuit, a voltage comparator and a demapper; the output end of the signal receiving module is connected to the input end of the intermediate frequency signal conversion module, the first output end of the intermediate frequency signal conversion module and the first output end of the second oscillator are connected to the input end of the second mixer, the second output end of the intermediate frequency signal conversion module and the second output end of the second oscillator are connected to the input end of the third mixer, the output end of the second mixer is connected to the input end of the first low-frequency filter, the output end of the third mixer is connected to the input end of the second low-frequency filter, the output end of the first low-frequency filter and the output end of the second low-frequency filter are both connected to the input end of the channel estimation module and the current source module of the signal detection circuit; the other end of the resistance module of the signal detection circuit is connected to the input end of the voltage comparator, and the output end of the voltage comparator is connected to the input end of the demapper.

[0070] In actual applications, the signal detection device also includes: a third controller, the output end of the channel estimation module is connected to the input end of the third controller, the output end of the third controller is connected to the memristor array module, and the third controller is used to calculate and set the conductance value of the memristor in the memristor array module of the signal detection circuit based on the channel matrix estimated by the channel estimation module.

[0071] In practical applications, the MIMO communication system signal detection device provided in the present application also includes: a sampling and holding module, wherein the output ends of the first low-frequency filter and the second low-frequency filter are connected to the current source module of the signal detection circuit through the sampling and holding module; the output end of the first low-frequency filter and the output end of the second low-frequency filter are connected to the input end of the channel estimation module through the sampling and holding module.

[0072] In practical applications, the signal receiving module is an antenna, and the intermediate frequency signal conversion module includes a low-noise amplifier, an RF filter, a first mixer, a first intermediate frequency filter, an intermediate frequency amplifier, a second intermediate frequency filter, and a first oscillator connected to the first mixer. The intermediate frequency signal conversion module converts the RF signal received by the antenna into an analog intermediate frequency signal. The orthogonal signal generated by the second oscillator is used for IQ demodulation. The sample-and-hold module samples and holds the analog signal output by the IQ demodulation. The digital baseband signal is transmitted to the channel estimation module for calculation of the channel matrix. The channel estimation module outputs the channel matrix, which is mapped to a memristor-based signal detection circuit. The IQ demodulated signal undergoes digital-to-analog conversion and is input to the memristor-based signal detection circuit. The memristor-based signal detection circuit outputs an estimated signal. A voltage comparator compares the current estimated signal with the previous optimal estimated signal to determine its accuracy, outputting high and low level information, thereby converting the analog signal into a digital signal. Finally, a demapper converts the digital estimated signal into a bit stream.

[0073] This application has the following effects:

[0074] (1) In the prior art, the baseband signal processing module has high requirements for the precision of memristor elements, and the signal detection bit error rate is high. This application designs a new signal detection circuit based on a memristor array. By adding an input current source and an input voltage source to the memristor array, in-memory calculation is realized in the analog domain. Specifically, the received signal and the transmit vector to be verified are mapped as inputs in the circuit, and the channel matrix is ​​mapped in the memristor array to realize signal detection. This application can achieve a low signal detection bit error rate while significantly reducing the calculation time and power consumption. At the same time, it also reduces the requirements for the programmable bit accuracy of the memristor and increases the allowable programming error range.

[0075] (2) In the prior art, the interaction logic between the digital computing unit and the analog storage unit is focused on by relying on the von Neumann architecture, and there is an obvious storage wall problem; the present application focuses on the storage and computing processing logic inside the storage and computing unit. Specifically, the storage and computing unit obtains the received signal and the channel matrix, and maps the received signal and the channel matrix into the circuit. This step is actually the storage process. Next, all possible transmission signals are searched to find the transmission signal with the minimum output current. This step is the calculation process. Finally, the current minimum current and the transmission vector are recorded, which also corresponds to the storage process. It can be seen that storage and computing both occur in the circuit of the present application. By applying the storage and computing integrated architecture, the von Neumann result is truly broken to realize the storage and computing integrated MIMO receiving technology. The use of this solution can eliminate the time delay and energy consumption of information interaction between the memory and computing units, greatly improving energy efficiency and area efficiency.

[0076] (3) In the prior art, in order to adapt the memristor array to the receiver, before the signal enters the memristor array, it is necessary to use a DAC to convert the signal into an analog signal; after the signal exits the memristor array, it is necessary to use an ADC to convert the signal into a digital signal. Multiple conversions are required between analog / digital and digital / analog signals. This application focuses on the receiver analog signal processing, digital signal processing and the connection between the two. Under the receiver architecture proposed in this application, all parts from the antenna to the receiver process analog signals. The output and input voltage comparators of the receiver convert the analog signal into a digital signal, and the subsequent parts starting from the demapper process the digital signal. It can be seen that this application can realize the conversion between digital and analog signals with only a voltage comparator, which greatly reduces the number of ADCs and DACs used in the circuit, can reduce the energy consumption of the receiver, reduce the delay of signal processing, and improve area efficiency.

[0077] (4) Using the detection circuit proposed in this application can reduce the complexity of a single calculation to O(1), greatly reducing the amount of calculation required for detection.

[0078] (5) The first solution in the background technology has the following disadvantages:

[0079] 1. The digital precoding process consists of two parts: digital precoding and hybrid precoding. The digital precoding part uses the ZF algorithm within the digital baseband chip to obtain the digital precoding matrix. An unsupervised neural network based on the attention mechanism is implemented within a memristor-based memory and computation unit architecture to obtain the analog precoding matrix. The digital precoding part reduces reception errors by inverting the channel matrix in advance. However, this method suffers from poor performance, resulting in a high bit error rate at the receiver and significant impact from channel conditions.

[0080] 2. Digital precoding is implemented in digital baseband chips. Implementing large-scale MIMO digital precoding in digital baseband chips requires high-dimensional matrix multiplication, transposition, and inversion operations, resulting in high processing latency and power consumption. Furthermore, with the gradual erosion of Moore's Law, digital baseband chip performance is stagnant, making it difficult to cope with the high computational workload required in large-scale MIMO scenarios.

[0081] The second solution has the following disadvantages:

[0082] 1. Existing technical solutions rely on high-precision array programming. The actual conductance values ​​obtained through programming are normally distributed relative to the target values, and the results obtained through programming exhibit randomness within a certain range. Therefore, high-precision programming relies on multiple programming and verification cycles (multiple read and write cycles), which is time-consuming. While reducing the number of programming and verification cycles reduces the required memristor array programming time, the programming error in the memristor resistance / conductance values ​​may be large, significantly impacting precoding or detection performance.

[0083] 2. In addition, existing solutions rely on multi-state memristors. The number of states in a memristor is the number of target conductance ranges that can be programmed, which can be expressed as bit precision. Reducing the number of states in a memristor results in a significant loss of precision when mapping high-precision digital signals (single-precision floating point and double-precision floating point) into the memristor array, significantly degrading received signal detection performance.

[0084] 3. Existing solutions use analog computing circuits. If integrated into existing digital baseband architectures, this would require numerous digital-to-analog converters (DACs) and analog-to-digital converters (ADCs). This would increase signal processing latency, increase receiver power consumption and cost, and hinder project implementation.

[0085] Compared to the first solution, the memristor array-based signal detection circuit proposed in this application can replace the signal detection function of digital baseband chips, reducing the complexity and power consumption of signal processing while implementing in-memory and analog computing. Compared to the second technical solution, the memristor array-based signal detection circuit proposed in this application is more tolerant of memristor array programming errors. With the same memristor bit accuracy, it achieves a lower symbol error rate / bit error rate than the second technical solution, providing better detection performance.

[0086] (6) The device provided in this application does not require or only requires a small amount of digital-to-analog conversion circuits and analog-to-digital conversion circuits, effectively reducing receiver power and delay.

[0087] The technical features of the above embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0088] This document uses specific examples to illustrate the principles and implementation methods of this application. The description of the above examples is only intended to help understand the method and core concept of this application. At the same time, for those skilled in the art, based on the concept of this application, there may be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting this application.

Claims

1. A signal detection circuit based on a memristor, characterized in that: The memristor-based signal detection circuit comprises: Memristor array module, voltage source module, current source module, operational amplifier module, multiplier module, feedback resistor module and resistor module; The voltage source module is connected to the voltage input end of the memristor array module, the current source module is connected to the current input end of the memristor array module, the current output end of the memristor array module is respectively connected to the inverting input end of the operational amplifier module and one end of the feedback resistor module, the other end of the feedback resistor module and the output end of the operational amplifier module are both connected to the input end of the multiplier module, the output end of the multiplier module is connected to one end of the resistor module, and the non-inverting input end of the operational amplifier module and the other end of the resistor module are grounded; the voltage of the voltage source module is set according to the transmission vector set, and the transmission vector set includes the transmission vector corresponding to each transmission signal to be screened; the current of the current source module is set according to the RF signal received by the RF front end, and the conductance value of the memristor in the memristor array module is set according to the channel matrix estimated by the channel estimation module.

2. The memristor-based signal detection circuit according to claim 1, characterized in that: The memristor array module includes: a memristor array; the memristor array includes Nr current input terminals, Nt voltage input terminals, and Nr current output terminals; Nr and Nt are both positive integers; the current source module includes Nr current sources, the voltage source module includes Nt voltage sources, the operational amplifier module includes Nr operational amplifiers, the multiplier module includes Nr multipliers, the feedback resistor module includes Nr feedback resistors, and the resistor module includes Nr resistors; The nRth current source is connected to the nRth current input terminal of the memristor array, 1≤nR≤Nr, the nTth voltage source is connected to the nTth voltage input terminal of the memristor array, 1≤nT≤Nt, and the nRth current output terminal of the memristor array is respectively connected to the inverting input terminal of the nRth operational amplifier and one end of the nRth feedback resistor; the output terminal of the nRth operational amplifier and the other end of the nRth feedback resistor are respectively connected to the input terminal of the nRth multiplier, and the output terminal of the nRth multiplier is connected to one end of the nRth resistor, and the non-inverting input terminal of each operational amplifier and the other end of each resistor are grounded.

3. The memristor-based signal detection circuit according to claim 1, wherein: The memristor array module comprises: ψ memristor array units; ψ is a positive integer; Each memristor array cell consists of A reverse amplifier circuit module and memristor arrays, the voltage output end of the ωth memristor array is connected to the voltage input end of the ω+1th memristor array through the ωth reverse amplifier circuit module, and the voltage input end of the 1st memristor array is connected to the voltage source module; is a positive integer, The current source module is connected to the current input terminal of the first memristor array unit, the current output terminal of the ψth memristor array unit is connected to the reverse input terminal of the operational amplifier module and one end of the feedback resistor module respectively, and the The current output terminal of the first memristor array unit is connected to the The current input terminal of the memristor array unit is connected to the The current output terminal of the first memristor array unit is connected to the The current input terminal of each memristor array unit is connected; is an integer greater than 1 and less than ψ.

4. The memristor-based signal detection circuit according to claim 3, characterized in that: Each of the memristor arrays includes Nr current input terminals, Nt voltage input terminals, and Nr current output terminals; Nr and Nt are positive integers; The current source module includes Nr current sources, the voltage source module includes ψ voltage source units, each voltage source unit includes Nt voltage sources, the operational amplifier module includes Nr operational amplifiers, the multiplier module includes Nr multipliers, the feedback resistor module includes Nr feedback resistors, and the resistor module includes Nr resistors; The nRth current source is connected to the nRth current input terminal of each memristor array in the first memristor array unit, 1≤nR≤Nr, the The ntth voltage source in the voltage source unit is connected to the The ntth voltage input terminal of the memristor array is connected to, No. The nRth current output terminal of the first memristor array in the memristor array unit is connected to the nRth current output terminal of the first memristor array The nRth current input terminal of each memristor array in the memristor array unit is connected, and the nRth current input terminal of each memristor array in the memristor array unit is connected. The nRth current output terminal of each memristor array in the memristor array unit is connected to the nRth current output terminal of each memristor array in the memristor array unit. The nRth current input terminal of each memristor array in the memristor array unit is connected; The nRth current output end of the first memristor array in the ψth memristor array unit is respectively connected to the inverting input end of the nRth operational amplifier and one end of the nRth feedback resistor; the output end of the nRth operational amplifier and the other end of the nRth feedback resistor are respectively connected to the input end of the nRth multiplier, the output end of the nRth multiplier is connected to one end of the nRth resistor, and the same-direction input end of each operational amplifier and the other end of each resistor are grounded.

5. The memristor-based signal detection circuit according to claim 4, characterized in that: Each of the reverse amplification circuit modules includes Nt reverse amplification circuits; The nt-th voltage output terminal in the ω-th memristor array in the memristor array unit and the nt-th voltage input terminal in the ω-th memristor array are connected through the nt-th reverse amplifier circuit in the ω-th reverse amplifier circuit module.

6. A signal detection method based on a memristor, characterized in that: The memristor-based signal detection device applied to any one of claims 1 to 5, wherein the memristor-based signal detection method comprises: Setting the current of the current source module according to the radio frequency signal received by the radio frequency front end; Setting the conductance value of the memristor in the memristor array module according to the channel matrix estimated by the channel estimation module; Traversing the emission vector set, setting the voltage of the voltage source module according to each emission vector in the emission vector set, and obtaining the current value output by the resistance module under each emission vector; the emission vector set includes the emission vector corresponding to each emission signal to be screened; Convert the current value output by the resistance module under each emission vector into a voltage value to obtain the voltage value output by the resistance module under each emission vector; The target emission vector corresponding to the to-be-screened emission signal is determined as the detection signal; the target emission vector is the emission vector corresponding to the minimum voltage value among the voltage values ​​output by the resistance module under each emission vector.

7. A receiver, characterized in that: include: Antenna, radio frequency front end, channel estimation module, memristor-based signal detection circuit, voltage comparator and demapper according to any one of claims 1 to 5; The output end of the antenna is connected to the input end of the RF front end, and the output end of the RF front end is respectively connected to the current source module of the signal detection circuit and the input end of the channel estimation module; the other end of the resistance module of the signal detection circuit is connected to the input end of the voltage comparator, and the output end of the voltage comparator is connected to the input end of the demapper.

8. The receiver according to claim 7, wherein: The receiver further includes: a sampling and holding module; the output end of the RF front end is connected to the current source module of the signal detection circuit and the input end of the channel estimation module through the sampling and holding module.

9. A signal detection device, characterized in that: include: A signal receiving module, an intermediate frequency signal conversion module, a first analog-to-digital conversion circuit, a second oscillator, a second mixer, a third mixer, a first low-frequency filter, a second low-frequency filter, a digital-to-analog conversion circuit, a channel estimation module, a signal detection circuit based on a memristor according to any one of claims 1 to 5, a second analog-to-digital conversion circuit, and a demapper; the output end of the signal receiving module is connected to the input end of the intermediate frequency signal conversion module, the output end of the intermediate frequency signal conversion module is connected to the input end of the first analog-to-digital conversion circuit, the first output end of the first analog-to-digital conversion circuit and the first output end of the second oscillator are connected to the input end of the second mixer, the first analog-to-digital conversion circuit is connected to the input end of the second mixer, and the first analog-to-digital conversion circuit is connected to the input end of the second mixer. The second output end of the conversion circuit and the second output end of the second oscillator are connected to the input end of the third mixer, the output end of the second mixer is connected to the input end of the first low-frequency filter, the output end of the third mixer is connected to the input end of the second low-frequency filter, the output end of the first low-frequency filter and the output end of the second low-frequency filter are both connected to the input end of the channel estimation module and the input end of the digital-to-analog conversion circuit; the output end of the digital-to-analog conversion circuit is connected to the current source module of the signal detection circuit; the other end of the resistance module of the signal detection circuit is connected to the input end of the second analog-to-digital conversion circuit, and the output end of the second analog-to-digital conversion circuit is connected to the input end of the demapper.

10. A signal detection device, characterized in that: include: A signal receiving module, an intermediate frequency signal conversion module, a second oscillator, a second mixer, a third mixer, a first low-frequency filter, a second low-frequency filter, a channel estimation module, a memristor-based signal detection circuit according to any one of claims 1 to 5, a voltage comparator, and a demapper; the output end of the signal receiving module is connected to the input end of the intermediate frequency signal conversion module, the first output end of the intermediate frequency signal conversion module and the first output end of the second oscillator are connected to the input end of the second mixer, the second output end of the intermediate frequency signal conversion module and the second output end of the second oscillator are connected to the input end of the third mixer, the output end of the second mixer is connected to the input end of the first low-frequency filter, the output end of the third mixer is connected to the input end of the second low-frequency filter, the output end of the first low-frequency filter and the output end of the second low-frequency filter are both connected to the input end of the channel estimation module and the current source module of the signal detection circuit; the other end of the resistance module of the signal detection circuit is connected to the input end of the voltage comparator, and the output end of the voltage comparator is connected to the input end of the demapper.

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