Chip analysis method and device and readable storage medium
By dividing the chips to be tested into groups to be tested, testing them in turn and generating optimization suggestions reports, the complexity and timeliness of chip analysis in the existing technology are solved, and a chip analysis method with rapid response and efficient improvement is realized.
Patent Information
- Application Number
- CN202411630125.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-15
- Publication Date
- 2025-02-18
Smart Images

Figure CN119471313A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of chip analysis, and specifically relates to a chip analysis method, device and readable storage medium. Background Art
[0002] In modern electronic devices, the performance and reliability of chips are crucial. Chip analysis is a key step to ensure chip quality and performance. With the advancement of integrated circuit technology, the complexity and number of chips continue to increase, and the complexity and time cost of testing also increase, which also puts higher requirements on chip analysis.
[0003] Existing technologies generally test and analyze chips through specific automatic testing equipment, but each chip type has its own different data characteristics. Even different wafer manufacturers and different chip packaging and testing companies have different data characteristics and different focuses. Only using the industry's common data features to analyze chips cannot fully meet the current analysis needs of various types of chips.
[0004] In addition, using fixed analysis methods will lead to a lack of in-depth analysis of test data and real-time feedback, which often results in missing the best time for improvement when problems are discovered. Summary of the invention
[0005] In order to overcome the above-mentioned defects of the prior art, the present invention proposes a chip analysis method, which comprises:
[0006] Divide the multiple chips to be tested into a number of groups to be tested;
[0007] Testing the chips to be tested in a group to be tested in sequence, and determining a first statistical parameter based on the test results of the chips to be tested, so that when a chip to be tested whose first statistical parameter satisfies a first preset condition is detected, an optimization suggestion report is generated based on the test results of the chip to be tested and the first preset condition and displayed to a user, and the current test is terminated at the same time;
[0008] After all the chips to be tested in the group to be tested have been tested, a second statistical parameter is determined based on the test results of all the chips to be tested, so that when the second statistical parameter meets the second preset condition, an optimization suggestion report is generated based on the test results of all the chips to be tested and the second preset condition and displayed to the user, and the test is terminated at the same time; if the analysis result does not meet the second preset condition, the group to be tested is marked as a tested group, and it is determined whether there is still a group to be tested; the first preset condition and the second preset condition include standard data features extracted from a preset database, standard data features added by the user and / or temporary data features;
[0009] If there are still groups to be tested, repeat the step of "testing the chip to be tested in a group to be tested", otherwise end this test.
[0010] Specifically, the first statistical parameter includes individual statistical parameters corresponding to each chip to be tested in the group to be tested;
[0011] The second statistical parameters include global statistical parameters corresponding to the group to be tested, and / or combined statistical parameters that integrate the specific global statistical parameters and the specific individual statistical parameters; the method of integrating the global specific global statistical parameters with the specific individual statistical parameters includes logical operations and / or formula operations.
[0012] Optionally, the individual statistical parameters include any one or more of total mean, total variance, total standard deviation, process capability, process capability index, normal distribution parameter, population minimum, population maximum, actual mean, actual variance, actual standard deviation, actual minimum, actual maximum, high failure rate mean, low failure rate mean, and comparison value of current chip wafer with historical data;
[0013] The global statistical parameters include any one or more of the total yield, the yield at a specific location, the yield at a specific function, the ranking of the total yield of functions, the yield of a specific function at different locations and their deviations.
[0014] Furthermore, the method further comprises:
[0015] Generate a third preset condition based on the standard data feature that is not extracted from the preset database, and detect the first statistical parameter and / or the second statistical parameter by using the third preset condition;
[0016] If the first statistical parameter and / or the second statistical parameter meets the third preset condition, a supplementary suggestion report is generated based on the test results corresponding to the third preset condition and the third preset condition and is displayed to the user.
[0017] Preferably, the method further comprises:
[0018] Chips are produced based on a preset production process, so that when any chip is produced, the chip is marked as a chip to be tested, and when the number of ungrouped chips to be tested reaches a preset value, all currently ungrouped chips to be tested are divided into a group to be tested.
[0019] Furthermore, the method further comprises:
[0020] The production process and / or the test process is updated based on the optimization suggestion report, all tested groups are re-marked as groups to be tested, and the step of "testing a chip to be tested in a group to be tested" is repeatedly executed.
[0021] Specifically, the preset conditions include standard data features extracted from a database, standard data features added by the user, and / or temporary data features.
[0022] The present invention also provides a chip analysis device, which comprises:
[0023] A division module is used to divide a plurality of chips to be tested into a plurality of groups to be tested;
[0024] A test module, used to test the chips to be tested in a group to be tested in sequence, and determine a first statistical parameter based on the test results of the chips to be tested, so that when a chip to be tested whose first statistical parameter meets a first preset condition is detected, an optimization suggestion report is generated based on the test results of the chip to be tested and the first preset condition and displayed to a user, and the current test is terminated at the same time;
[0025] An analysis module, configured to determine a second statistical parameter based on the test results of all the chips to be tested after all the chips to be tested in the group to be tested have been tested, so that when the second statistical parameter meets a second preset condition, an optimization suggestion report is generated based on the test results of all the chips to be tested and the second preset condition and displayed to the user, and the test is terminated at the same time; if the analysis result does not meet the second preset condition, the group to be tested is marked as a tested group, and it is determined whether there is still a group to be tested; the first preset condition and the second preset condition include standard data features extracted from a preset database, standard data features added by the user, and / or temporary data features;
[0026] The loop module is used to make the test module repeat the preset steps when there are still groups to be tested, otherwise the test is terminated.
[0027] Furthermore, the device also includes:
[0028] A generating module, configured to generate a third preset condition based on the standard data features not extracted from the preset database, and detect the first statistical parameter and / or the second statistical parameter by using the third preset condition;
[0029] A supplementary module is used to generate a supplementary suggestion report based on the test results corresponding to the third preset condition and the third preset condition and display it to the user when the first statistical parameter and / or the second statistical parameter meet the third preset condition.
[0030] Preferably, the chips to be tested are produced based on a preset production process, and the division module is further used to mark any chip as a chip to be tested after the production of the chip is completed, and when the number of ungrouped chips to be tested reaches a preset value, all currently ungrouped chips to be tested are divided into a group to be tested; the device also includes:
[0031] An updating module is used to update the production process and / or the testing process based on the optimization suggestion report, re-mark all tested groups as groups to be tested, and enable the analysis module to repeat the preset steps.
[0032] The present invention also proposes a computer-readable storage medium on which computer instructions are stored, and when the instructions are executed by a processor, the steps of the chip analysis method described above are implemented.
[0033] The present invention has at least the following beneficial effects:
[0034] The solution proposed in the present invention can adapt to various types of chip testing requirements. By dividing multiple chips to be tested into several groups to be tested and testing them in sequence, it can quickly respond to test data and provide targeted improvement suggestions to testers or engineers when the test results show that preset conditions are met, thereby providing a basis for continuous improvement of product quality, accelerating problem solving and product optimization processes, and automatically terminating the current test to avoid unnecessary waste of test resources.
[0035] Furthermore, the solution proposed in the present invention automatically produces chips through a preset production process, and immediately marks the chips as chips to be tested after the chips are produced, thereby reducing manual intervention, improving the flow efficiency from production to testing, ensuring the effective use of test resources, avoiding waiting time or waste of resources, and contributing to the optimization and continuous improvement of the overall process; re-marking all tested groups as groups to be tested and repeating the test can verify the effectiveness of the optimization measures, thereby ensuring that the improvement measures effectively solve the problem, and can also perform additional testing through data features not selected by the user, thereby providing better protection on the basis of the detection plan set by the user;
[0036] In addition, this solution provides global statistical parameters, individual statistical parameters, and combined statistical parameters, which improve the depth and accuracy of data analysis, help to formulate improvement measures more scientifically, discover potential problems and trends, and provide a clear direction for subsequent improvements. The diverse preset conditions make the test standards more flexible and able to adapt to the needs of many different scenarios. Allowing users to add data features can also make the overall test standards closer to the actual needs of users.
[0037] Therefore, the present invention provides a chip analysis method, device and readable storage medium. The scheme proposed in the present invention can adapt to the testing needs of chips of different quantities and types. Through group testing, it is ensured that the chip analysis has good regularity and reliability, and can timely discover test problems and improve the overall quality of the chip. It can also generate corresponding optimization suggestion reports, provide specific improvement directions, and help engineers quickly locate problems and develop solutions, so as to flexibly adjust subsequent test strategies. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0039] Figure 1 A schematic diagram of the method flow of the chip analysis method provided in Example 1;
[0040] Figure 2 The overall flow chart of the chip analysis method provided in Example 1;
[0041] Figure 3 A schematic diagram of the method flow for performing supplementary testing;
[0042] Figure 4 This is a schematic diagram of the module structure of the chip analysis device provided in Example 2.
[0043] Reference numerals
[0044] 10-division module; 20-test module; 30-analysis module; 40-update module; 50-loop module; 60-generation module; 70-supplement module. DETAILED DESCRIPTION
[0045] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0046] Hereinafter, various embodiments of the present invention will be described more fully. The present invention may have various embodiments, and adjustments and changes may be made therein. However, it should be understood that there is no intention to limit the various embodiments of the present invention to the specific embodiments disclosed herein, but the present invention should be understood to cover all adjustments, equivalents and / or alternatives falling within the spirit and scope of the various embodiments of the present invention.
[0047] Hereinafter, the term "include" or "may include" used in various embodiments of the present invention indicates the presence of disclosed functions, operations or elements, and does not limit the addition of one or more functions, operations or elements. In addition, as used in various embodiments of the present invention, the terms "include", "have" and their cognates are intended only to indicate specific features, numbers, steps, operations, elements, components or combinations of the foregoing items, and should not be understood as first excluding the presence of one or more other features, numbers, steps, operations, elements, components or combinations of the foregoing items or the possibility of adding one or more features, numbers, steps, operations, elements, components or combinations of the foregoing items.
[0048] In various embodiments of the present invention, the expression "or" or "at least one of A or / and B" includes any combination or all combinations of the words listed at the same time. For example, the expression "A or B" or "at least one of A or / and B" may include A, may include B, or may include both A and B.
[0049] The expressions (such as "first", "second", etc.) used in various embodiments of the present invention may modify the various constituent elements in various embodiments, but may not limit the corresponding constituent elements. For example, the above expressions do not limit the order and / or importance of the elements. The above expressions are only used for the purpose of distinguishing an element from other elements. For example, the first user device and the second user device indicate different user devices, although both are user devices. For example, without departing from the scope of various embodiments of the present invention, the first element may be referred to as the second element, and similarly, the second element may also be referred to as the first element.
[0050] It should be noted that in the present invention, unless otherwise clearly specified and defined, the terms such as "installation", "connection", "fixation" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0051] In the present invention, those skilled in the art need to understand that the terms indicating orientation or positional relationship herein are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.
[0052] The terms used in various embodiments of the present invention are only used for the purpose of describing specific embodiments and are not intended to limit various embodiments of the present invention. As used herein, the singular form is intended to also include the plural form, unless the context clearly indicates otherwise. Unless otherwise limited, all terms used here (including technical terms and scientific terms) have the same meaning as the meaning generally understood by those of ordinary skill in the art to which the various embodiments of the present invention belong. The terms (such as the terms defined in the dictionary generally used) will be interpreted as having the same meaning as the contextual meaning in the relevant technical field and will not be interpreted as having an idealized meaning or an overly formal meaning, unless clearly defined in various embodiments of the present invention.
[0053] Example 1
[0054] This example proposes a chip analysis method, see Figure 1-2 , the method comprising:
[0055] S100: Divide a plurality of chips to be tested into a plurality of groups to be tested.
[0056] Preferably, each chip to be tested is produced based on a preset production process. When the production of any chip is completed, the method proposed in this embodiment will mark the chip as a chip to be tested, and when the number of ungrouped chips to be tested reaches a preset value, all currently ungrouped chips to be tested will be divided into a group to be tested.
[0057] S200: testing the chips to be tested in a group to be tested in sequence, and determining a first statistical parameter based on the test results of the chips to be tested.
[0058] Specifically, the first statistical parameter includes individual statistical parameters of each chip to be tested in the corresponding group to be tested; in this embodiment, the individual statistical parameters include but are not limited to the total mean (All_Mean), the total variance (S2), the total standard deviation (STDEV), the process capability (CP), the process capability index (CPK), the normal distribution parameter, the overall minimum value (All_min), the overall maximum value (All_max), the actual mean (Real_Mean) of qualified chips, the actual variance (Real_S2), the actual standard deviation (Real_STDEV), the actual minimum value (Real_min), the actual maximum value (Real_max), the high failure rate mean (HFail), the low failure rate mean (LFail), and any one or more of the comparison values of the current chip wafer (wafer) and the historical data;
[0059] Exemplarily, the total mean (All_Mean), total variance (S2), total standard deviation (STDEV), process capability (CP), process capability index (CPK), and normal distribution parameters in the individual statistical parameters can be used to determine the deviation value and analyze whether there is a false positive. The high failure rate mean (HFail) and low failure rate mean (LFail) in the individual statistical parameters can be used to determine whether there is a short circuit or an open circuit.
[0060] For example, when the first preset condition includes that the low failure rate mean parameter is lower than 0.00001, if the first statistical parameter indicates that LFail<0.00001, it can be considered that the chip under test corresponding to the parameter in the group under test may have a short circuit fault, and it is judged that the first statistical parameter meets the first preset condition;
[0061] If the first preset condition includes that the actual variance is lower than 0.1%, if the first statistical parameter indicates that Real_S2=0, it can be considered that the data is highly uniform and there may be a false positive, and it is determined that the first statistical parameter meets the first preset condition.
[0062] If a chip under test whose first statistical parameter meets the first preset condition is detected, an optimization suggestion report is generated based on the test result of the chip under test and the first preset condition and displayed to the user, and the current test is terminated and step S400 is executed.
[0063] S300: After all chips to be tested in the group to be tested have completed testing, determine a second statistical parameter based on test results of all chips to be tested.
[0064] Specifically, the second statistical parameters include global statistical parameters corresponding to the group to be tested, and / or combined statistical parameters combining specific global statistical parameters with specific individual statistical parameters; the method of combining global specific global statistical parameters with specific individual statistical parameters includes logical operations and / or formula operations.
[0065] In this embodiment, the global statistical parameters include but are not limited to any one or more of the total yield (All_Yield), the yield of a specific location (Site_Yield), the yield of a specific function (Fail_Die number of each sbin), the ranking of the total yield of functions, the yield of a specific function at different locations (Func_Site_Yield) and their deviations;
[0066] In this embodiment, the first preset condition and the second preset condition may include standard data features extracted from a preset database, standard data features added by the user, and / or temporary data features, so that the user can directly make his or her analysis experience compatible with the existing standard analysis method; wherein, the standard data features extracted from the preset database may be extracted according to the default setting method or specified by the user, the standard data features added by the user may be applied to all subsequent tests and added to the preset database at the same time, and the temporary data features added by the user may be applied to the current round of tests and added to the preset database at the same time;
[0067] In a specific embodiment, the preset database specifically includes a data feature knowledge base. The method proposed in this embodiment establishes a data feature knowledge base so that the user can dynamically add data feature records through the configuration interface. At the same time, it also summarizes the various statistical parameters of the test data, so that the user can convert the data features into logical operations (AND, OR, NOT, etc.) and addition, subtraction, multiplication and division formulas on these statistical parameters, and upload these statistical parameter combination algorithms to the data feature knowledge base, so that the data analysis function of this method can automatically support all features in the data feature knowledge base.
[0068] Exemplarily, when the second preset condition includes that the total yield is less than or equal to 95%, if the second statistical parameter indicates that All_Yield≤95%, it can be considered that the total yield of the chips in the group to be tested is too low, and it is determined that the second statistical parameter meets the second preset condition;
[0069] If the second statistical parameter meets the second preset condition, an optimization suggestion report is generated based on the test results of all chips to be tested and the second preset condition and displayed to the user, and the test is terminated at the same time, and step S400 is executed; if the second statistical parameter does not meet the second preset condition, step S500 is executed.
[0070] S400: Update the production process and / or the test process based on the optimization suggestion report, re-mark all tested groups as groups to be tested, and then repeat step S200.
[0071] Preferably, the method proposed in this embodiment can also update the data feature knowledge base based on the optimization suggestion report, so as to continuously improve the data feature knowledge base and achieve the purpose of enriching the data feature knowledge base through the data analysis data and fault location data accumulated by the test equipment.
[0072] S500: Mark the group to be tested as a tested group, and determine whether there are still groups to be tested.
[0073] If there are still groups to be tested, step S200 is repeated; if there are no groups to be tested, the test is terminated.
[0074] Preferably, see Figure 3 , the method further comprises:
[0075] S600: Generate a third preset condition based on the standard data feature that is not extracted from the preset database, and detect the first statistical parameter and / or the second statistical parameter through the third preset condition.
[0076] S700: If the first statistical parameter and / or the second statistical parameter meets the third preset condition, a supplementary suggestion report is generated based on the test result corresponding to the third preset condition and the third preset condition and is presented to the user.
[0077] Therefore, the method proposed in this embodiment can also perform additional detection through data features that are not selected by the user, thereby providing better protection on the basis of the detection scheme set by the user.
[0078] Example 2
[0079] This embodiment proposes a chip analysis device for implementing the chip analysis method proposed in embodiment 1, see Figure 4 , the device comprises:
[0080] A division module 10 is used to divide a plurality of chips to be tested into a plurality of groups to be tested;
[0081] The testing module 20 is used to test the chips to be tested in a group to be tested in sequence, and determine a first statistical parameter based on the test results of the chips to be tested, so that when a chip to be tested whose first statistical parameter meets a first preset condition is detected, an optimization suggestion report is generated based on the test results of the chip to be tested and the first preset condition and displayed to the user, and the current test is terminated at the same time;
[0082] The analysis module 30 is used to determine the second statistical parameter based on the test results of all the chips to be tested after the chips to be tested in the group to be tested have been tested, so that when the second statistical parameter meets the second preset condition, an optimization suggestion report is generated based on the test results of all the chips to be tested and the second preset condition and displayed to the user, and the current test is terminated at the same time; if the analysis result does not meet the second preset condition, the group to be tested is marked as a tested group, and it is determined whether there is still a group to be tested;
[0083] An updating module 40 is used to update the production process and / or the test process based on the optimization suggestion report, re-mark all tested groups as groups to be tested, and enable the testing module 20 to repeat the preset steps;
[0084] The loop module 50 is used to make the test module 20 repeat the preset steps when there are still groups to be tested, otherwise the test is terminated.
[0085] Preferably, the chips to be tested are produced based on a preset production process, and the division module 10 is also used to mark the chip as a chip to be tested after the production of any chip is completed, and when the number of ungrouped chips to be tested reaches a preset value, all currently ungrouped chips to be tested are divided into a group to be tested.
[0086] Specifically, the first statistical parameter includes individual statistical parameters of each chip to be tested in the corresponding group to be tested;
[0087] The second statistical parameter includes a global statistical parameter corresponding to the group to be tested, and / or a combined statistical parameter of a specific global statistical parameter and a specific individual statistical parameter; the manner of combining the global specific global statistical parameter and the specific individual statistical parameter includes a logical operation and / or an arithmetic operation;
[0088] In this embodiment, the global statistical parameters include but are not limited to any one or more of the total yield (All_Yield), the yield of a specific location (Site_Yield), the yield of a specific function (Fail_Die number of each sbin), the ranking of the total yield of functions, the yield of a specific function at different locations (Func_Site_Yield) and their deviations;
[0089] Individual statistical parameters include but are not limited to the total mean (All_Mean), total variance (S2), total standard deviation (STDEV), process capability (CP), process capability index (CPK), normal distribution parameters, total minimum value (All_min), total maximum value (All_max), the actual mean (Real_Mean), actual variance (Real_S2), actual standard deviation (Real_STDEV) of qualified chips, actual minimum value (Real_min), actual maximum value (Real_max), high failure rate mean (HFail), low failure rate mean (LFail), and any one or more of the comparison values of the current chip wafer (wafer) and historical data;
[0090] Exemplarily, the total mean (All_Mean), total variance (S2), total standard deviation (STDEV), process capability (CP), process capability index (CPK), and normal distribution parameters in the individual statistical parameters can be used to determine the deviation value and analyze whether there is a false positive. The high failure rate mean (HFail) and low failure rate mean (LFail) in the individual statistical parameters can be used to determine whether there is a short circuit or an open circuit.
[0091] In this embodiment, the first preset condition and the second preset condition may include standard data features extracted from a preset database, standard data features added by the user, and / or temporary data features, so that the user can directly make his or her analysis experience compatible with the existing standard analysis method; wherein, the standard data features extracted from the preset database may be extracted according to the default setting method or specified by the user, the standard data features added by the user may be applied to all subsequent tests and added to the preset database at the same time, and the temporary data features added by the user may be applied to the current round of tests and added to the preset database at the same time;
[0092] In a specific embodiment, the preset database specifically includes a data feature knowledge base. The method proposed in this embodiment establishes a data feature knowledge base so that the user can dynamically add data feature records through the configuration interface. At the same time, it also summarizes the various statistical parameters of the test data, so that the user can convert the data features into logical operations (AND, OR, NOT, etc.) and addition, subtraction, multiplication and division formulas on these statistical parameters, and upload these statistical parameter combination algorithms to the data feature knowledge base, so that the data analysis function of this method can automatically support all features in the data feature knowledge base.
[0093] Exemplarily, when the first preset condition includes that the low failure rate mean parameter is lower than 0.00001, if the first statistical parameter indicates that LFail<0.00001, it can be considered that the chip under test corresponding to the parameter in the group to be tested may have a short circuit fault, and it is judged that the first statistical parameter meets the first preset condition;
[0094] If the first preset condition includes that the actual variance is less than 0.1%, if the first statistical parameter indicates that Real_S2=0, it can be considered that the data is highly uniform and there may be a false positive, and it is determined that the first statistical parameter meets the first preset condition;
[0095] When the second preset condition includes that the total yield is less than or equal to 95%, if the second statistical parameter indicates that All_Yield≤95%, it can be considered that the total yield of the chips in the group to be tested is too low, and it is determined that the second statistical parameter meets the second preset condition.
[0096] Furthermore, the device also includes:
[0097] A generating module 60, configured to generate a third preset condition based on the standard data feature not extracted from the preset database, and detect the first statistical parameter and / or the second statistical parameter by using the third preset condition;
[0098] The supplementing module 70 is used to generate a supplementary suggestion report based on the test results corresponding to the third preset condition and the third preset condition and display it to the user when the first statistical parameter and / or the second statistical parameter meets the third preset condition.
[0099] Example 3
[0100] This embodiment also provides a computer-readable storage medium on which computer instructions are stored. When the instructions are executed by a processor, the steps of the method proposed in the above embodiment 1 are implemented.
[0101] Computer-readable media include permanent and non-permanent, removable and non-removable media and can implement information storage by any method or technology. The information can be computer-readable instructions, data structures, program modules or other data.
[0102] Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk-read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic disk storage, quantum memory, graphene-based storage media or other magnetic storage devices, or any other non-transmission media that can be used to store information that can be accessed by a computing device.
[0103] According to the definition in this article, computer-readable media does not include temporary computer-readable media (transitory media), such as modulated data signals and carrier waves.
[0104] In summary, the present invention provides a chip analysis method, device and readable storage medium. The solution proposed in the present invention can adapt to the testing needs of chips of different quantities and types. Through group testing, the chip analysis is guaranteed to have good regularity and reliability, and can timely discover test problems and improve the overall quality of the chip. It can also generate corresponding optimization suggestion reports, provide specific improvement directions, and help engineers quickly locate problems and develop solutions, so as to flexibly adjust subsequent test strategies.
[0105] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims
1. A chip analysis method, characterized in that: The method comprises: Divide the multiple chips to be tested into a number of groups to be tested; Testing the chips to be tested in a group to be tested in sequence, and determining a first statistical parameter based on the test results of the chips to be tested, so that when a chip to be tested whose first statistical parameter satisfies a first preset condition is detected, an optimization suggestion report is generated based on the test results of the chip to be tested and the first preset condition and displayed to a user, and the current test is terminated at the same time; After all the chips to be tested in the group to be tested have been tested, a second statistical parameter is determined based on the test results of all the chips to be tested, so that when the second statistical parameter meets the second preset condition, an optimization suggestion report is generated based on the test results of all the chips to be tested and the second preset condition and displayed to the user, and the test is terminated at the same time; if the analysis result does not meet the second preset condition, the group to be tested is marked as a tested group, and it is determined whether there is still a group to be tested; the first preset condition and the second preset condition include standard data features extracted from a preset database, standard data features added by the user and / or temporary data features; If there are still groups to be tested, repeat the step of "testing the chip to be tested in a group to be tested", otherwise end this test.
2. The method according to claim 1, characterized in that The first statistical parameters include individual statistical parameters corresponding to each chip to be tested in the group to be tested; The second statistical parameters include global statistical parameters corresponding to the group to be tested, and / or combined statistical parameters that integrate the specific global statistical parameters and the specific individual statistical parameters; the method of integrating the global specific global statistical parameters with the specific individual statistical parameters includes logical operations and / or formula operations.
3. The method according to claim 2, characterized in that The individual statistical parameters include any one or more of the total mean, total variance, total standard deviation, process capability, process capability index, normal distribution parameter, population minimum, population maximum, actual mean, actual variance, actual standard deviation, actual minimum, actual maximum, high failure rate mean, low failure rate mean, and comparison value of current chip wafer with historical data; The global statistical parameters include any one or more of the total yield, the yield at a specific location, the yield at a specific function, the ranking of the total yield of functions, the yield of a specific function at different locations and their deviations.
4. The method according to claim 1, characterized in that: The method further comprises: Generate a third preset condition based on the standard data feature that is not extracted from the preset database, and detect the first statistical parameter and / or the second statistical parameter by using the third preset condition; If the first statistical parameter and / or the second statistical parameter meets the third preset condition, a supplementary suggestion report is generated based on the test results corresponding to the third preset condition and the third preset condition and is displayed to the user.
5. The method according to claim 1, characterized in that The method further comprises: Chips are produced based on a preset production process, so that when any chip is produced, the chip is marked as a chip to be tested, and when the number of ungrouped chips to be tested reaches a preset value, all currently ungrouped chips to be tested are divided into a group to be tested.
6. The method according to claim 5, characterized in that The method further comprises: The production process and / or the test process is updated based on the optimization suggestion report, all tested groups are re-marked as groups to be tested, and the step of "testing the chips to be tested in a group to be tested" is repeated.
7. A chip analysis device, characterized in that: The device comprises: A division module is used to divide a plurality of chips to be tested into a plurality of groups to be tested; A test module, used to test the chips to be tested in a group to be tested in sequence, and determine a first statistical parameter based on the test results of the chips to be tested, so that when a chip to be tested whose first statistical parameter meets a first preset condition is detected, an optimization suggestion report is generated based on the test results of the chip to be tested and the first preset condition and displayed to a user, and the current test is terminated at the same time; An analysis module, configured to determine a second statistical parameter based on the test results of all the chips to be tested after all the chips to be tested in the group to be tested have been tested, so that when the second statistical parameter meets a second preset condition, an optimization suggestion report is generated based on the test results of all the chips to be tested and the second preset condition and displayed to the user, and the test is terminated at the same time; if the analysis result does not meet the second preset condition, the group to be tested is marked as a tested group, and it is determined whether there is still a group to be tested; the first preset condition and the second preset condition include standard data features extracted from a preset database, standard data features added by the user, and / or temporary data features; The loop module is used to make the test module repeat the preset steps when there are still groups to be tested, otherwise the test is terminated.
8. The device according to claim 7, characterized in that The device also includes: A generating module, configured to generate a third preset condition based on the standard data features not extracted from the preset database, and detect the first statistical parameter and / or the second statistical parameter by using the third preset condition; A supplementary module is used to generate a supplementary suggestion report based on the test results corresponding to the third preset condition and the third preset condition and display it to the user when the first statistical parameter and / or the second statistical parameter meet the third preset condition.
9. The device according to claim 7, characterized in that The chips to be tested are produced based on a preset production process, and the division module is further used to mark any chip as a chip to be tested when the production of the chip is completed, and when the number of ungrouped chips to be tested reaches a preset value, divide all currently ungrouped chips to be tested into a group to be tested; The device also includes: An updating module is used to update the production process and / or the testing process based on the optimization suggestion report, re-mark all tested groups as groups to be tested, and enable the analysis module to repeat the preset steps.
10. A computer-readable storage medium, characterized in that: Computer instructions are stored thereon, and when the instructions are executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.
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