Composite substrate structure, epitaxial structure and preparation method of composite substrate structure
By designing the composite substrate structure, including a pattern substrate, a buffer layer and an undoped semiconductor layer, the problems of high defect density of the GaN and AlN epitaxial layers and the discomfort of Mini/Micro-LED electrode structure are solved, and high-quality epitaxial layers and high-efficiency laser peeling are achieved.
Patent Information
- Application Number
- CN202411607800.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-12
- Publication Date
- 2025-02-25
AI Technical Summary
When growing GaN and AlN epitaxial layers on sapphire substrates, high defect density and poor material performance due to lattice mismatch and residual stress. At the same time, the electrode structure of traditional LED chips is not suitable for mini/Micro-LEDs of small sizes, resulting in a decrease in effective luminous area and reduced light efficiency.
A composite substrate structure is designed, including a pattern substrate, a buffer layer and an undoped semiconductor layer, which forms a pit on the top of the pattern and fills the barrier. This structure uses a graphic inclination design and a buffer layer with high UV laser transmittance to achieve regular crystal surface healing on the top of the lateral outer delay pattern, reducing the impact of penetration dislocation, and reducing the influence of heat on the epitaxial layer during the substrate laser peeling process.
The impact of penetration dislocation is significantly reduced, the crystal quality and laser peeling efficiency of the epitaxial layer are improved, the impact on chip performance is reduced, and the epitaxial cost is reduced.
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Figure CN119521877A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to a composite substrate structure, an epitaxial structure and a method for preparing the composite substrate structure. Background Art
[0002] Growing GaN (gallium nitride) and AlN (aluminum nitride) on sapphire substrates is a lattice-mismatched heteroepitaxial growth, which will lead to higher defect density and residual stress during epitaxial growth, seriously affecting the improvement of material and device performance. The pattern substrate plus buffer layer structure currently used in nitride heteroepitaxial growth can improve the influence of lattice mismatch and defect dislocations to a certain extent, but due to the dislocation of the healing of the top of the pattern substrate during the lateral epitaxy process, most of the penetrating dislocations appear above the top of the pattern substrate and penetrate to the surface of the film layer, seriously affecting the quality of the film layer.
[0003] The size of Micro-LED (micrometer-scale LED) chips is below 100μm. The size requirement for Micro-LED chips used in AR / VR is even lower than 10μm, while traditional LED chips are generally around 300μm. Even the newly emerged Mini-LED chips in recent years are around 150μm. The sharp reduction in the size of Micro-LED chips has led to the fact that the traditional LED chip method of sacrificing part of the light-emitting layer to prepare the N electrode is no longer applicable to Micro-LED. The electrode structure of the traditional regular LED chip is made on the same side of the light-emitting surface. When preparing the N electrode, the epitaxial structure needs to be etched to the N-type semiconductor layer, that is, the light-emitting layer material on this area is etched away. This electrode structure has two main disadvantages. One is that the effective light-emitting area is reduced, and the other is that the electrode blocks the emitted light. When the chip size is large, its impact on light efficiency and performance is acceptable, but as the chip size decreases, the above impact ratio gradually increases. Therefore, for the tiny Mini / Micro-LED, the main layout is flip-chip or vertical structure. To solve the above problems, substrate stripping becomes the key, which mainly uses high-energy pulsed laser to irradiate the interface between GaN and sapphire from the back of the sapphire substrate. The laser energy is not completely absorbed by the sapphire, and GaN is selectively heated at a sufficiently high frequency energy, resulting in thermal decomposition of GaN at the interface. Since Eg(Al2O3)>E photon energy≥Eg(GaN) during laser stripping, GaN strongly absorbs laser energy, and the thermal conductivity of GaN is about 200W / m*K, the thermal conductivity of Al2O3 is about 33W / m*K, and the thermal conductivity of AlN is about 170W / m*K. Due to the difference in thermal conductivity, the heat conduction direction is mainly on one side of the GaN material. The high temperature and stress release will cause greater damage to the GaN epitaxial layer, resulting in an increase in defect density and a decrease in product quality. In addition, the laser energy density is higher at the top of the substrate pattern, resulting in the thermal stress at the top of the pattern penetrating deeper into the epitaxial layer.
[0004] During epitaxial growth, most threading dislocations appear above the top of the pattern substrate, and in the subsequent substrate laser lift-off process, the depth of thermal stress influence in the top area of the pattern determines the final depth of influence of the laser lift-off process on the epitaxial layer. Therefore, the material structure design of the top of the pattern becomes the key to solving or improving the above two technical problems. Summary of the invention
[0005] In view of the above analysis, embodiments of the present invention aim to provide a composite substrate structure, an epitaxial structure, and a method for preparing the composite substrate structure, so as to solve at least one of the above problems.
[0006] In one aspect, the present invention provides a composite substrate structure, comprising:
[0007] A pattern substrate, comprising a base layer and a pattern layer, wherein the pattern layer is formed on the upper surface of the base layer, and the pattern layer comprises a plurality of protrusions;
[0008] and a buffer layer and an undoped semiconductor layer sequentially deposited on the pattern substrate;
[0009] The thickness of the buffer layer is smaller than the height of the protrusion;
[0010] The undoped semiconductor layer can completely submerge the buffer layer, the upper surface of the undoped semiconductor layer is provided with a pit matching the protrusion, and a blocking part is provided in the pit; the blocking part is projected downward to at least cover the central area of the protrusion;
[0011] The material of the barrier portion is an amorphous material, and the thermal conductivity of the barrier portion is lower than the thermal conductivity of the undoped semiconductor layer.
[0012] Furthermore, the central area accounts for 5% to 28% of the projection area of the protrusion.
[0013] Furthermore, the material of the undoped semiconductor layer is GaN;
[0014] The top view of the pit is a regular hexagon, each side surface corresponds to the [10, -1, 1] crystal plane of gallium nitride, and the angle between the side surface and the C-plane is 62°;
[0015] The distance s between the upper edge of the pit and the side wall of the protrusion is 0.5 μm≤s≤1 μm;
[0016] The material of the blocking part is one of SiO2, Si3N4, ZnO, Al2O3, and TiO2.
[0017] Furthermore, the inclination angle of the side wall of the protrusion is less than or equal to 45°.
[0018] Further, the protrusion is in a cone or cone-like shape;
[0019] The height of the protrusion is between 0.25 and 1.5 μm, the width of the protrusion 12 is between 0.5 and 2.5 μm, and the aspect ratio of the protrusion is between 0.2 and 0.5;
[0020] The pattern duty ratio of the pattern substrate is ≤82%.
[0021] Furthermore, the transmittance of the buffer layer to ultraviolet rays in the wavelength range of 266nm to 355nm is 69% to 85%.
[0022] Furthermore, the thickness of the buffer layer is 5 to 50 nm;
[0023] The material of the buffer layer is AlN, and AlN is deposited on the pattern substrate by using a magnetron sputtering process, and the sputtering N2 flow rate is maintained in the range of 75% to 88% during the sputtering deposition process.
[0024] In another aspect, the present invention provides an epitaxial structure, comprising the composite substrate structure described above, as well as an undoped capping layer, a first doped semiconductor layer, a light emitting layer, and a second doped semiconductor layer;
[0025] The undoped covering layer is coated on the undoped semiconductor layer and the blocking portion, and the material of the undoped covering layer is the same as that of the undoped semiconductor layer;
[0026] The first doped semiconductor layer, the light emitting layer and the second doped semiconductor layer are sequentially deposited on the undoped covering layer.
[0027] Further, the first doped semiconductor layer is an n-GaN layer, the light emitting layer is an MQWs layer, and the second doped semiconductor layer includes an AlGaN layer and a p-GaN layer;
[0028] The first doped semiconductor layer has a thickness of 0.8 μm to 1.1 μm and comprises GaN and Si;
[0029] The thickness of the light-emitting layer is 20nm to 29nm, and its composition includes GaInN;
[0030] The thickness of the second doped semiconductor layer is 88nm-112nm, wherein the thickness of the AlGaN layer is 8nm-12nm, and its components include AlGaN and Mg; the thickness of the P-GaN layer is 80nm-100nm, and its components include GaN and Mg.
[0031] In another aspect, the present invention provides a method for preparing a composite substrate structure, which can at least be used to prepare the above-mentioned composite substrate structure, and the preparation method comprises the following steps:
[0032] S100: obtaining a graphic substrate;
[0033] S200: laying a buffer layer on the pattern substrate using a magnetron sputtering process, ensuring that the N2 flow rate accounts for 75% to 88% during the sputtering process;
[0034] S300: epitaxially growing an undoped semiconductor layer on the buffer layer using a MOCVD method with N2 flow as a carrier gas, wherein the undoped semiconductor layer can submerge the buffer layer and form periodically arranged pits on the upper surface;
[0035] S400: depositing a barrier portion on the undoped semiconductor layer by a PECVD method until the pit is filled and covered;
[0036] S500: using a corrosive liquid to selectively etch the blocking portion of the overflow pit until the upper surface of the undoped semiconductor layer is completely exposed, thereby completing the preparation of the composite substrate structure.
[0037] Furthermore, the material of the undoped semiconductor layer is GaN, and undoped GaN is grown by MOCVD epitaxial growth using TMGa and NH3, the pressure is 290-320 Torr, and the total growth time is 25-60 min; the growth process of step S300 includes the following stages:
[0038] S301: In the first stage, the growth temperature is 970-985°C, the flow rate of TMGa is 850-950 μmol / min, the flow rate of NH3 is 23-25 slm, and the growth time is 300-700 s;
[0039] S302: In the second stage, the growth temperature gradually increases from 970-985°C to 1030-1090°C, with a linear increase rate of 0.12°C / s to 0.70°C / s; the amount of TMGa gradually increases from 850-950 μmol / min to 1700-2200 μmol / min, with a linear increase rate of 2-8 (μmol / min) / s; the NH3 flow rate also gradually increases from 23-25 slm to 26-30 slm, with a linear increase rate of 0.01 slm / s to 0.04 slm / s; the growth time is 180-360 s;
[0040] S303: the third stage, the growth temperature is 1030-1090°C, the flow rate of TMGa is 1700-2200 μmol / min, the flow rate of NH3 is 26-30 slm, and the growth time is 740-1320 s;
[0041] After the above three stages of growth, an unhealed pit is formed in the GaN layer, and the distance from the upper edge of the pit to the side wall of the substrate pattern is 0.5 to 1 μm.
[0042] Finally, the present invention provides a method for preparing an epitaxial structure, which can at least be used to prepare the above-mentioned epitaxial structure, and the preparation method comprises the following steps:
[0043] S600: using a MOCVD method to continue to lay an undoped covering layer on the undoped semiconductor layer and the barrier portion of the composite substrate structure under a flow rate of N2 as a carrier gas, wherein the material of the undoped covering layer is the same as that of the undoped semiconductor layer;
[0044] S700: Continue to perform MOCVD epitaxial growth, and sequentially complete the growth of the first doped semiconductor layer, the light-emitting layer, and the second doped semiconductor layer, thereby completing the preparation of the composite substrate structure.
[0045] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:
[0046] (1) The present invention provides a composite substrate structure, which realizes regular crystal plane orientation healing at the top of the pattern during lateral epitaxy by designing the pattern inclination angle and arranging the pattern structure to match the epitaxial growth, and by providing a buffer layer with high ultraviolet laser transmittance, thereby greatly reducing the influence of threading dislocations and causing less crystal thermal damage during subsequent laser stripping of the substrate;
[0047] (2) The present invention adopts the inclination angle design. First, when the bottom width remains unchanged, the inclination angle of the pattern is reduced, the area of the side wall of the pattern is reduced, and the area of the side wall of the pattern irradiated by a single laser beam is reduced, that is, the stripping energy threshold required for the unit projection surface of the side wall of the pattern will be reduced. When the bottom width of the pattern remains unchanged, when the aspect ratio is reduced from 1.37 to 0.5, the area of the side wall of the pattern is reduced to about 66% of the original, that is, the laser stripping efficiency on the side wall of the pattern can be improved by about 44%. Secondly, when the inclination angle is less than or equal to 45°, the reflected light energy will not gather at the top of the pattern, so there will be no problem of excessive energy density at the top of the pattern, thereby reducing the impact of stripping on chip performance. Finally, by reducing the inclination angle, the height of the pattern will be lower under the same bottom width, so the subsequent undoped layer can be thinner, which can effectively reduce the epitaxial cost;
[0048] (3) The present invention controls the ratio of the N2 flow rate of the sputtered AlN layer, so that the reaction between N2 and Al elements in the reactive sputtering preparation process is more complete, the Al defects in the film are reduced, and the band gap is closer to the theoretical value, thereby reducing the absorption of ultraviolet lasers above 199.98nm and improving the energy efficiency of laser stripping;
[0049] (4) The design of the pit of the present invention firstly leaves space for the blocking part, and secondly forms a regular equivalent crystal plane, so that the growth rates in all directions can converge during the subsequent lateral epitaxy, avoiding in-plane competition or growth rate anisotropy, greatly enhancing the epitaxial orientation control, thereby inhibiting the formation of boundaries and threading dislocations, and forming a low-defect, high-quality nitride epitaxial layer in a shorter time and with a thinner thickness.
[0050] In the present invention, the above-mentioned technical solutions can also be combined with each other to achieve more preferred combination solutions. Other features and advantages of the present invention will be described in the subsequent description, and some advantages can become obvious from the description, or can be understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained through the contents particularly pointed out in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0051] The drawings are only for the purpose of illustrating particular embodiments and are not to be considered limiting of the present invention. Like reference symbols denote like components throughout the drawings.
[0052] Figure 1 It is a structural schematic diagram of a graphic substrate in a specific implementation manner;
[0053] Figure 2 It is a schematic diagram of a partial structure of a composite substrate structure in a specific implementation manner;
[0054] Figure 3 is a SEM top view of an undoped semiconductor layer in a specific embodiment;
[0055] Figure 4 It is a schematic diagram of a local structure of a pit in a specific implementation manner;
[0056] Figure 5 is a structural schematic diagram of a composite substrate structure in a specific implementation manner;
[0057] Figure 6 It is a schematic diagram of the preparation process of the composite substrate structure and the epitaxial structure in a specific implementation manner;
[0058] Figure 7 FIG. 4 is a SEM top view of a pit of an example in a specific embodiment.
[0059] Reference numerals:
[0060] 1-pattern substrate; 11-base layer; 12-protrusion; 2-buffer layer; 3-undoped semiconductor layer; 31-pit; 4-blocking part; 5-undoped covering layer; 6-first doped semiconductor layer; 7-light-emitting layer; 8-AlGaN layer, 9-P-GaN layer. DETAILED DESCRIPTION
[0061] The preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, wherein the accompanying drawings constitute a part of the present invention and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not used to limit the scope of the present invention.
[0062] In the description of the embodiments of the present invention, it should be noted that, unless otherwise clearly specified and limited, the term "connected" should be understood in a broad sense, for example, it can be a fixed connection, or a detachable connection, or an integral connection, which can be a mechanical connection, or an electrical connection, which can be a direct connection, or can be indirectly connected through an intermediate medium. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0063] The terms "top", "bottom", "above", "lower", and "on" used throughout the description are relative to the relative positions of components of a device, such as the relative positions of the top and bottom substrates within a device. It is understood that devices are multifunctional regardless of their orientation in space.
[0064] The common working surface of the present invention can be a plane or a curved surface, can be inclined, or can be horizontal. For the convenience of description, the embodiment of the present invention is placed on a horizontal plane and used on the horizontal plane, and "high and low" and "up and down" are defined in this way.
[0065] Embodiment 1
[0066] This embodiment provides a composite substrate structure, such as Figure 1 to Figure 4 As shown, including:
[0067] A pattern substrate 1, comprising a base layer 11 and a pattern layer, wherein the pattern layer is formed on the upper surface of the base layer 11, and the pattern layer comprises a plurality of protrusions 12;
[0068] and a buffer layer 2 and an undoped semiconductor layer 3 sequentially applied on the pattern substrate;
[0069] The thickness of the buffer layer 2 is smaller than the height of the protrusion 12;
[0070] The undoped semiconductor layer 3 can completely submerge the buffer layer 2, and a pit 31 matching the protrusion 12 is provided on the upper surface of the undoped semiconductor layer 3, that is, the pit 31 is located directly above the protrusion 12, and a blocking portion 4 is provided in the pit 31, and the blocking portion 4 is projected downward to at least cover the central area of the protrusion 12;
[0071] The material of the barrier portion 4 is an amorphous material, and the thermal conductivity of the barrier portion 4 is lower than the thermal conductivity of the undoped semiconductor layer 3 .
[0072] The blocking portion 4 is located in the pit 31 without blocking the surface of the undoped semiconductor layer 3 without the pit. Preferably, the upper surface of the blocking portion 4 is flush with the upper surface of the undoped semiconductor layer.
[0073] The composite substrate structure of the present invention has a pit matched with the protrusion on the top of the undoped semiconductor layer, and a heterogeneous barrier is filled in the pit, which can limit the upward extension of the penetrating dislocation on the top of the pattern substrate, improve the quality of the epitaxial crystal, and at the same time, in the subsequent substrate laser stripping process, can minimize the depth of the heat affecting the epitaxial layer at a relatively low cost, thereby improving the substrate stripping efficiency. It should be noted that the substrate stripping referred to in the present invention does not refer to the stripping of the entire composite substrate structure, but refers to the stripping of the pattern substrate.
[0074] The upper surface of the base layer 11 is approximately flat (including a plane, which is not necessarily a plane in a geometric sense, as long as the upper surface is approximately horizontal), and the protrusions 12 are arranged on the base layer 11, and the protrusions on the base layer 11 together constitute a graphic layer.
[0075] Preferably, the side wall inclination angle of the protrusion 12 is less than or equal to 45°. The side wall inclination angle α of the protrusion 12 refers to the angle between the side wall and the extension line of the upper surface of the base layer to the inside of the protrusion. Figure 1 As shown, α≤45°. Exemplarily, when the protrusion 12 is in the shape of a triangular pyramid or a circular cone, α is the base angle of the triangular pyramid. The sidewall inclination angle of the protrusion may also be referred to as a graphic inclination angle.
[0076] Since Micro LED emits light directly, it does not require high external quantum extraction efficiency, so reducing the pattern inclination angle has little effect on Micro LED. After the inclination angle is reduced, the required peeling energy threshold per unit projection area of the protrusion side wall will be reduced, which means that the substrate can be peeled off at a lower laser energy density. When the pattern inclination angle is less than or equal to 45°, the reflected light energy will not gather at the top of the pattern, so there will be no problem of excessive energy density at the top of the pattern, which can reduce the impact of peeling on chip performance and improve the peeling yield.
[0077] When the pattern inclination angle is less than or equal to 45°, the pattern height is lower under the same bottom width, so the subsequent undoped layer can be thinner, which can effectively reduce the epitaxial cost.
[0078] When the size of the Micro LED chip is below 100μm, preferably, the shape of the protrusion 12 is conical or quasi-conical. The quasi-conical shape is not a cone in the geometric sense. The quasi-conical shape has a side wall at a certain angle to the bottom wall and a vertex converging at the top, that is, a quasi-conical shape with a certain side wall curvature. The distance between the side of the cone and the straight line parallel to it and tangent to the actual side wall is 0 to 120nm. The height of the protrusion 12 is between 0.25 and 1.5μm, the width of the protrusion 12 is between 0.5 and 2.5μm, and the aspect ratio of the protrusion 12 is between 0.2 and 0.5. The graphic duty ratio of the graphic substrate is ≤82%, that is, the duty ratio of all protrusions 12 is ≤82%.
[0079] The protrusion 12 is made of the same material as the base layer 11. Exemplarily, the material of the graphic substrate is one of SiC, SiO2, Si, ZnO, MgO, AlN, Al2O3, etc. Preferably, the substrate material is sapphire.
[0080] The thickness of the buffer layer 2 is less than the height of the protrusion 12, that is, the buffer layer 2 is applied on the base layer 11 and the protrusion 12, that is, the buffer layer 2 is applied on the portion of the upper surface of the base layer 11 where the protrusion 12 is not provided and on the surface of the protrusion 12 except the bottom, the buffer layer can be applied on the top and side walls of the protrusion 12, the shape of the buffer layer 2 is adapted to the shape of the upper surface of the graphic substrate, and the thickness of the buffer layer 2 applied on the base layer 11 is approximately equal to (including equal to) the thickness of the buffer layer 2 applied on the protrusion 21. Preferably, the thickness of the buffer layer 2 is 5 to 50 nm.
[0081] Preferably, the transmittance of the buffer layer 2 to ultraviolet rays in the wavelength range of 266nm to 355nm is 69% to 85%. Exemplarily, the material of the buffer layer 2 is AlN, and the AlN is deposited on the pattern substrate 1 by a magnetron sputtering process, and the sputtering deposition process maintains a sputtering N2 flow rate ratio in the range of 75% to 88%.
[0082] AlN film has a steep optical absorption edge, and its forbidden band width is generally smaller than the theoretical intrinsic band gap of 6.2eV. The reason is that there are a small number of defects in the film. There are N vacancies and interstitial Al atoms in the film, which will introduce some defect energy levels in the film to reduce the optical band gap, resulting in an increase in its absorption coefficient for ultraviolet lasers, which is not conducive to laser transmission. Within a certain range (50% to 75%), with the increase of N2 flow rate, the optical band gap of AlN film gradually increases, which is related to the Al defects in the film. When the N2 flow rate is small, the reaction between N2 and Al is not sufficient, and the deposited film contains more impurity Al atoms, resulting in a large number of deep energy level defects, resulting in a narrow band gap of the film; with the increase of N2 flow rate, the reaction between N2 and Al elements in the reactive sputtering preparation process is more sufficient, and the Al defects in the film are reduced, so the optical band gap becomes wider. When the nitrogen content is properly controlled, the defect density of the sputtered AlN film is low, but when the nitrogen content is too much, it will also cause a larger defect density, thereby causing the optical band gap to narrow. Therefore, controlling the N2 flow ratio when forming the buffer layer of the present invention is a key parameter for controlling the ultraviolet transmittance of the sputtered AlN film.
[0083] The buffer layer provides nucleation points for the growth of the epitaxial layer on the substrate, while alleviating the lattice mismatch between the substrate and the epitaxial layer. In addition, the buffer layer can improve the efficiency of epitaxy and reduce the cost of epitaxy. Sputtering AlN can avoid the time-consuming temperature rise and fall process in the MOCVD high-temperature epitaxy process.
[0084] The composite substrate structure of the present invention, through the design of the pattern inclination angle and the arrangement of the pattern structure matching the epitaxial growth, is equipped with a buffer layer with high ultraviolet laser transmittance, so as to achieve regular crystal plane orientation healing at the top of the pattern during lateral epitaxy, greatly reduce the influence of threading dislocations, and reduce crystal thermal damage during subsequent substrate laser peeling.
[0085] The undoped semiconductor layer 3 can completely submerge the buffer layer 2, that is, the thickness of the undoped semiconductor layer 3 is greater than the sum of the thickness of the buffer layer 2 and the height of the protrusion 12, that is, the upper surface of the undoped semiconductor layer 3 is a plane without protruding parts. Exemplarily, the thickness of the undoped semiconductor layer 3 is 0.25-1.60 μm.
[0086] It should be noted that the undoped semiconductor layer 3 first covers the buffer layer 2 and then forms the pit 31 , that is, the bottom of the pit 31 is not in contact with the buffer layer 2 .
[0087] The undoped semiconductor layer 3 is epitaxially grown on the upper surface of the buffer layer 2 by MOCVD (metal organic chemical vapor epitaxy), and pits 31 (i.e., unhealed areas) are formed during the growth of the undoped semiconductor layer 3 by controlling the temperature and raw material ratio of the growth process.
[0088] Exemplarily, the material of the undoped semiconductor layer 3 is GaN. Under N2 as a carrier gas, TMGa (trimethyl gallium) and NH3 are used to perform MOCVD epitaxial growth of an undoped semiconductor layer (i.e., a GaN layer). The growth process is divided into three stages. In the first stage, low-temperature growth (970-985°C) is performed, and a first nitrogen / gallium ratio reaction gas source is set (nitrogen / gallium reaction gas source has the same unit flow ratio range: 820:1-1660:1). In the second stage, variable temperature growth (linearly increasing from the starting point to the end point during the reaction period), and a second nitrogen / gallium ratio reaction gas source is set (nitrogen / gallium reaction gas source has the same unit flow ratio range: 540:1-765:1). In the third stage, high-temperature growth (1050-1070°C) is performed, and a third nitrogen / gallium ratio reaction gas source is set (nitrogen / gallium reaction gas source has the same unit flow ratio range: 540:1-765:1). The growth conditions of each stage are determined according to the specific shape and size of the protrusion 12. Since the growth rate is mainly determined by the TMGa flux, the product of the TMGa flow rate L and the growth time t of each stage is added: A = L1*t1+L2*t2+L3*t3. When the proportion of L1*t1 / A is 0.16±0.03, it enters the second stage. When the proportion of L2*t2 / A is 0.12±0.02, it enters the third stage. When the proportion of L3*t3 / A is 0.71±0.03, the growth ends. Until the growth reaches the target, periodically arranged pits are formed on the undoped semiconductor layer, and the shape of the pit 31 is similar to an inverted hexagonal pyramid, such as Figure 2 As shown, the pit 31 forms a regular hexagonal hole on the upper surface of the undoped semiconductor layer, that is, the top view of the pit is a regular hexagon, each side surface corresponds to the [10, -1, 1] crystal plane of gallium nitride, and the angle between the side surface and the C plane is 62°, as shown in FIG. Figure 3 and Figure 4 As shown in the figure. The first stage is mainly set for the nucleation of GaN and the promotion of a growth mode dominated by three-dimensional growth. The second stage is set as a transition process to reduce the stress and defect accumulation caused by the change. The third stage is set to promote a growth mode dominated by two-dimensional growth. The duty cycle and height of the pit are controlled by the time configuration of the three stages.
[0089] The distance s between the upper edge of the pit and the side wall of the protrusion 12 is 0.5μm≤s≤1μm. Exemplarily, the band gap of sapphire is 9.9eV, that of GaN is 3.39eV, and that of AlN is 6.2eV. During laser stripping, Eg(Al2O3)>Eg(AlN)>E photon energy≥Eg(GaN). Combined with the laser absorption coefficient of GaN material, the optimal laser wavelength is 200nm<λ<366nm. In this wavelength range, typical solid ultraviolet laser wavelengths are 266nm and 355nm, including nanosecond lasers and picosecond lasers. Typical excimer ultraviolet gas laser wavelengths are 248nm and 308nm, both of which are nanosecond lasers. Generally, when the above-mentioned corresponding parameter equipment is used to make gallium nitride reach the optimal decomposition temperature of 1050°C, its heat-affected depth (temperature exceeding 500°C region) is approximately 1μm, so the projection distance of the edge of the unhealed area from the substrate is set to 0.5-1μm.
[0090] The material of the undoped semiconductor layer 3 is not limited to gallium nitride, but may also be other III- and V-group compound materials, such as GaAs, InP, AlN, and the like.
[0091] The undoped semiconductor layer 3 can further improve the lattice matching and thermal expansion coefficient matching between the light emitting layer thereon and the substrate. Due to the lattice mismatch and thermal mismatch between the substrate (such as sapphire) and GaN, directly growing the GaN light emitting layer will lead to high density defects and dislocations.
[0092] The unhealed pits of the undoped semiconductor layer 3 at the top of the pattern leave space for filling the heterogeneous barrier layer, limit the upward extension of the penetrating dislocations at the top of the pattern, improve the quality of the epitaxial crystal, and at the same time, in the subsequent substrate laser stripping process, minimize the depth of heat affecting the epitaxial layer at a relatively low cost.
[0093] The barrier 4 is filled in the pit 31, preferably just filling the pit 31, that is, the upper surface of the barrier 4 is flush with the upper surface of the undoped semiconductor layer 3. The barrier 4 is projected downward to at least cover the central area of the protrusion 12, and the central area accounts for 5% to 28% of the projected area of the protrusion 12, so that sufficient growth space can be reserved for subsequent epitaxy, increasing the efficiency of epitaxial growth, reducing the healing time, and reducing costs. As the area of the barrier increases, the time and difficulty of epitaxial lateral healing also increase, and the instability factors increase, which will introduce defects, while the benefits of penetrating dislocations and heat blocking are not significantly increased. Therefore, controlling the area of the barrier to ensure the benefits of penetrating dislocations and heat blocking while ensuring the quality and cost of epitaxy is the preferred solution.
[0094] Exemplarily, the barrier 4 is deposited in the pit 31 using a thin film deposition process, that is, the barrier 4 is deposited on the undoped semiconductor layer 3 using a thin film deposition process (PECVD) until the pit 31 is filled and covered.
[0095] The material of the barrier 4 is different from that of the undoped semiconductor layer 3, and the material of the barrier 4 is an amorphous material, that is, no crystal can grow on the barrier 4, and the barrier material satisfies the following conditions: lower thermal conductivity than the undoped semiconductor layer 3 (preferably, the thermal conductivity of the barrier can be in the range of 1 to 70 W / m*K), good high temperature stability (at least stable in the epitaxial growth temperature range and the substrate laser stripping temperature range, that is, good stability in the range of 700°C to 1250°C), easy thin film deposition and highly selective removal. Preferably, the barrier 4 is made of SiO2, Si3N4, ZnO, Al2O3, TiO2 and other materials.
[0096] It should be noted that the pit 31 may not be completely filled when the barrier 4 is deposited. When deposited outside the pit 31, a wet etching process is used to selectively remove the overflowing portion until the upper surface of the undoped semiconductor layer is etched.
[0097] A pit matching the protrusion is provided on the top of the undoped semiconductor layer 3, and a heterogeneous barrier is filled in the pit. This can limit the upward extension of the penetrating dislocation on the top of the graphic substrate and improve the quality of the epitaxial crystal. At the same time, in the subsequent substrate laser stripping process, it can minimize the depth of the heat affecting the epitaxial layer at a relatively low cost and improve the substrate stripping efficiency.
[0098] The exposed upper surface of the undoped semiconductor layer 3 provides a homogeneous growth surface for subsequent epitaxy. At this time, the etching cutoff surface is a regular periodic structure corresponding to the GaN crystal structure. In the subsequent epitaxial growth process, the hexagonal position will not have crystal growth because it is a heterogeneous amorphous material, but will continue to shrink and heal through the outward extension of the surrounding homogeneous layer. Since the six sides of the outer edge of the regular hexagon are regular surfaces, the growth rates converge during lateral epitaxy, and there is no in-plane competition or velocity anisotropy, which greatly enhances the epitaxial orientation control. The atoms are ideally positioned as crystals during the lateral growth process, which inhibits the formation of boundaries and threading dislocations, and a low-defect, high-quality nitride epitaxial layer can be formed in a shorter time and with a thinner thickness.
[0099] Preferably, the thickness of the undoped semiconductor layer 3 is 0.25-1.60 μm.
[0100] The present invention reduces the stripping threshold required for the unit projection area of the side wall of the pattern by reducing the inclination angle of the pattern, and the substrate can be stripped with a lower laser energy density. When the inclination angle of the pattern is less than or equal to 45°, the reflected light energy will not gather at the top of the pattern, so there will be no problem of excessive energy density at the top of the pattern, thereby reducing the impact of stripping on chip performance, thereby improving the stripping yield, which is at least 6% higher than the current conventional technology. When the inclination angle of the pattern is less than or equal to 45°, the height of the pattern is lower under the same bottom width, so the subsequent undoped layer can be thinner, which can effectively reduce the cost of epitaxy. When the bottom width of the pattern remains unchanged, when the aspect ratio is reduced from 1.37 to 0.5, the area of the side wall of the pattern is reduced to about 66% of the original, that is, the laser stripping efficiency on the side wall of the pattern can be improved by about 44%.
[0101] By setting a heterogeneous barrier, the present invention can effectively reduce the threading dislocation density of the epitaxial layer on the top of the substrate pattern, reduce its influence, improve the quality of the epitaxial light-emitting layer, and at the same time greatly reduce the damage to the epitaxial light-emitting layer caused by high temperature and stress during substrate laser stripping, thereby improving the efficiency of laser stripping.
[0102] Embodiment 2
[0103] This embodiment provides an epitaxial structure, such as Figure 5 As shown, it can at least be used for LED chips. The epitaxial structure includes the composite substrate structure provided in the first embodiment, as well as an undoped cover layer 5, a first doped semiconductor layer 6, a light emitting layer 7, and a second doped semiconductor layer.
[0104] The undoped covering layer 5 is coated on the undoped semiconductor layer 3 and the barrier part 4. The material of the undoped covering layer 5 is the same as that of the undoped semiconductor layer 3. For example, with N2 as the carrier gas, TMGa and NH3 are used to continue MOCVD epitaxial growth of undoped GaN until the barrier part is covered and completely healed.
[0105] Preferably, the thickness of the undoped cover layer 5 is 0.15-1.4 μm.
[0106] It should be noted that, for the convenience of description, the present application divides the undoped epitaxial layer into two layers (i.e., an undoped semiconductor layer and an undoped covering layer). In fact, the barrier portion is buried in the middle of the undoped epitaxial layer to block penetrating dislocations and laser stripping thermal stress.
[0107] Epitaxial growth is continued on the undoped capping layer 5 by MOCVD, and a first doped semiconductor layer 6, a light emitting layer 7, and a second doped semiconductor layer 8 are grown in sequence. The first doped semiconductor layer is an n-GaN layer, the light emitting layer is an MQWs layer (multi-layer quantum well layer), and the second doped semiconductor layer includes an AlGaN layer 8 and a p-GaN layer 9.
[0108] The first doped semiconductor layer 6 has a thickness of 0.8 μm to 1.1 μm, and its main components are GaN and Si.
[0109] The thickness of the light emitting layer 7 is 20 nm to 29 nm, and its main component is GaInN.
[0110] The thickness of the second doped semiconductor layer 8 is 88nm-112nm, of which the thickness of the AlGaN layer is 8nm-12nm, and the main components are AlGaN and Mg; the thickness of the P-GaN layer is 80nm-100nm, and the main components are GaN and Mg. The AlGaN layer acts as a carrier confinement layer, and limits the activity range of electrons and holes by adjusting its energy band structure, thereby increasing the radiation recombination luminescence efficiency of the source region.
[0111] Embodiment 3
[0112] This embodiment provides a method for preparing a composite substrate structure, which can at least be used to prepare the composite substrate structure described in Embodiment 1. Figure 6 As shown, the preparation method comprises the following steps:
[0113] S100: obtaining a graphic substrate;
[0114] S200: laying a buffer layer on the pattern substrate using a magnetron sputtering process, ensuring that the N2 flow rate accounts for 75% to 88% during the sputtering process;
[0115] S300: epitaxially growing an undoped semiconductor layer on the buffer layer using a MOCVD method with N2 flow as a carrier gas, wherein the undoped semiconductor layer can submerge the buffer layer and form periodically arranged pits on the upper surface;
[0116] S400: depositing a barrier portion on the undoped semiconductor layer by a PECVD method until the pit is filled and covered;
[0117] S500: using a corrosive liquid to selectively etch the barrier portion of the overflow pit until the upper surface of the undoped semiconductor layer is completely exposed (ie, until the barrier portion is flush with the undoped semiconductor layer), thereby completing the preparation of the composite substrate structure.
[0118] In the step S100, the pattern inclination angle of the pattern substrate is less than 45°, the height of the protrusion of the pattern substrate is between 0.25 and 1.5 μm, the width of the protrusion 12 is between 0.5 and 2.5 μm, and the aspect ratio of the protrusion is between 0.2 and 0.5;
[0119] The pattern duty cycle of the pattern substrate is ≤82%. In the next step, the pattern substrate is cleaned, specifically, the cleaning operation is: use 120°C SPM solution with a volume ratio of H2O2:H2SO4=1:6 to clean for 1500s, and use deionized water to rinse until the water resistance value reaches 15MΩ.cm, and then spin dry. Among them, the mass fraction of H2O2 solution is 30% to 35%, and the mass fraction of H2SO4 solution is 96% to 100% (preferably 98%).
[0120] In the step S200, the thickness of the buffer layer is 5 to 50 nm. The material of the buffer layer is an AlN layer, and the sputtering conditions are: sputtering pressure is 0.01 to 0.8 mTorr (preferably 0.5 mTorr), sputtering power is 1000 to 1800 W (preferably 1500 W), N2 flow rate is 100 to 180 sccm (preferably 150 sccm), Ar flow rate is 20 to 40 sccm (preferably 30 sccm), sputtering temperature is 600 to 700 ° C (preferably 650 ° C), and N2 flow rate is ensured to be in the range of 75% to 88% during sputtering.
[0121] In step S300, the material of the undoped semiconductor layer is GaN, and undoped GaN is grown by MOCVD epitaxial growth using TMGa and NH3, with a pressure of 290-320 Torr (preferably 307 Torr) and a total growth time of 25-60 min (preferably 30 min). The growth process of step S300 includes the following stages:
[0122] S301: In the first stage, the growth temperature is 970-985°C (preferably 975°C), the flow rate of TMGa is 850-950 μmol / min (preferably 900 μmol / min), the flow rate of NH3 is 23-25 slm (preferably 24 slm), and the growth time is 300-700 s (preferably 520 s);
[0123] S302: In the second stage, the growth temperature is gradually increased from 970 to 985°C (preferably 975°C) to 1030 to 1090°C (preferably 1060°C), and the temperature is linearly increased at a heating rate of 0.12°C / s to 0.70°C / s; the amount of TMGa is gradually increased from 850 to 950 μmol / min (preferably 900 μmol / min) to 1700 to 2200 μmol / min (preferably 1950 μmol / min), and the rate of increase is 2 to 8 (μmol / min) / s. The NH3 flow rate is also gradually increased from 23 to 25 slm (preferably 24 slm) to 26 to 30 slm (preferably 28 slm), and the rate of increase is 0.01 slm / s to 0.04 slm / s. The growth time is 180 to 360 s (preferably 245 s);
[0124] S303: The third stage, the growth temperature is 1030-1090°C (preferably 1060°C), the flow rate of TMGa is 1700-2200 μmol / min (preferably 1950 μmol / min), the flow rate of NH3 is 26-30 slm (preferably 28 slm), and the growth time is 740-1320 s (preferably 1035 s).
[0125] After the above three stages of growth, an unhealed pit is formed in the GaN layer, and the distance from the upper edge of the pit to the side wall of the substrate pattern is 0.5 to 1 μm.
[0126] In the step S400, the material of the blocking part is SiO2 thermal insulation material, and the specific process of PECVD thin film deposition is: place the epitaxial substrate processed in step S300 on the PECVD chamber carrier, set the carrier temperature to 300-350°C, evacuate the chamber to 150-50pa, and use nitrogen (N2) as the carrier gas to introduce 20-90sccm (preferably 25sccm) of SiH4 and 1000-1800sccm (preferably 1250sccm) of N2O, and deposit for 20-60min (preferably 40min) until the pits are filled and covered.
[0127] In the step S500, the etching solution used is 7:1 BOE (ammonium fluoride etching solution, the volume ratio of 49% HF aqueous solution to 40% NH4F aqueous solution is 1:7). Specifically, at room temperature (25±5°C), the deposited thermal insulation layer is selectively etched using 7:1 BOE etching solution for 50 to 60 seconds until the upper plane of the epitaxial layer is exposed, that is, the barrier portion is flush with the undoped semiconductor layer.
[0128] When the material of the barrier portion 4 is SiO2, Si3N4, ZnO, Al2O3, TiO2, the corresponding etching solutions are BOE solution, BOE solution, H2SO4 solution, H2SO4 / H3PO4 mixed solution, and HF solution, respectively.
[0129] Embodiment 4
[0130] This embodiment provides a method for preparing an epitaxial structure, which can at least be used to prepare the epitaxial structure provided in the second embodiment, such as Figure 6 As shown, the preparation method comprises the following steps:
[0131] S600: using a MOCVD method to continue to lay an undoped covering layer on the undoped semiconductor layer and the barrier portion of the composite substrate structure under a flow rate of N2 as a carrier gas, wherein the material of the undoped covering layer is the same as that of the undoped semiconductor layer;
[0132] S700: Continue to perform MOCVD epitaxial growth, and sequentially complete the growth of the first doped semiconductor layer, the light-emitting layer, and the second doped semiconductor layer, thereby completing the preparation of the composite substrate structure.
[0133] In the step S600, the material of the undoped covering layer is GaN. Specifically, under N2 as the carrier gas, TMGa and NH3 are used to continue MOCVD epitaxial growth of undoped GaN, with a pressure of 307 Torr, a growth time of 30 min, a temperature of 1060°C, a TMGa flow rate of 1950 μmol / min, and an NH3 flow rate of 28 slm, until the barrier layer is covered and completely healed.
[0134] In step S700, MOCVD epitaxial growth is continued to sequentially complete the growth of n-GaN, MQWs, AlGaN, and P-GaN layers. The growth process of step S700 is not an innovation of the present invention and can be achieved by existing technology, so it will not be described in detail.
[0135] [Example] A method for preparing a composite substrate structure comprises the following steps:
[0136] S100: obtaining a pattern substrate, wherein the protrusion is conical in shape, has a height of 0.75 μm, a bottom diameter of 1.6 μm, and a gap of 0.2 μm;
[0137] S200: A 20nm thick AlN buffer layer is deposited on the pattern substrate by magnetron sputtering process. The sputtering conditions are as follows: sputtering pressure is 0.5mTorr, sputtering power is 1500W, N2 flow rate is 150sccm, Ar flow rate is 30sccm, and sputtering temperature is 650℃;
[0138] S300: Under the flow rate of N2 as the carrier gas, TMGa and NH3 are used for MOCVD epitaxial growth of an undoped GaN layer at a pressure of 307 Torr and a growth time of 30 minutes. The growth process is divided into three stages, with the time being 520s, 245s and 1035s respectively. In the first stage, the temperature is 975℃, the flow rate of TMGa is 900μmol / min, and the flow rate of NH3 is 24slm; in the second stage, the temperature is increased from 975℃ to 1060℃ at 0.35℃ / s, the amount of TMGa is increased from 900μmol / min to 1950μmol / min at 4.29 (μmol / min) / s, and the flow rate of NH3 is also increased from 24slm to 28slm at 0.98slm / min; in the third stage, the temperature is maintained at 1060℃, the flow rate of TMGa is 1950μmol / min, and the flow rate of NH3 is 28slm until it grows to the target position. At this time, the GaN layer is not completely healed on the periodic pattern, that is, pits are formed (such as Figure 7As shown), the projection distance between the edge of the projection pattern of the unhealed area and the substrate is 0.5 μm;
[0139] S400: using a PECVD thin film deposition process to deposit a SiO2 thermal insulation layer material on the above epitaxial substrate until the pits are filled and covered. The specific process is: placing the epitaxial substrate processed in step S300 on the PECVD chamber carrier, setting the carrier temperature to 300°C, pumping the chamber to 50 Pa, using nitrogen (N2) as a carrier gas, introducing 25 sccm of SiH4 and 1250 sccm of N2O, and depositing for 40 minutes until the pits are filled and covered;
[0140] S500: At room temperature, the deposited thermal insulation layer is selectively etched using a 7:1 BOE etching solution for 50 to 60 seconds until the upper plane of the epitaxial layer is exposed, that is, the barrier portion is flush with the undoped semiconductor layer, and the preparation of the composite substrate structure is completed.
[0141] If the epitaxial structure is further prepared on the basis of the composite substrate structure, the following steps are also included:
[0142] S600: Using TMGa and NH3 as the carrier gas, continue to perform MOCVD epitaxial growth of undoped GaN (i.e., grow an undoped capping layer) at a pressure of 307 Torr, a growth time of 30 min, a temperature of 1060°C, a TMGa flow rate of 1950 μmol / min, and an NH3 flow rate of 28 slm, until the barrier layer is covered and completely healed;
[0143] In the step S700, the MOCVD epitaxial growth is continued to sequentially complete the growth of n-GaN, MQWs, AlGaN, and P-GaN layers, thereby completing the preparation of the composite substrate structure.
[0144] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by any technician familiar with the technical field within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention.
Claims
1. A composite substrate structure, characterized in that: include: A pattern substrate, comprising a base layer and a pattern layer, wherein the pattern layer is formed on the upper surface of the base layer, and the pattern layer comprises a plurality of protrusions; and a buffer layer and an undoped semiconductor layer sequentially deposited on the pattern substrate; The thickness of the buffer layer is smaller than the height of the protrusion; The undoped semiconductor layer can completely submerge the buffer layer, the upper surface of the undoped semiconductor layer is provided with a pit matching the protrusion, and a blocking part is provided in the pit; the blocking part is projected downward to at least cover the central area of the protrusion; The material of the barrier portion is an amorphous material, and the thermal conductivity of the barrier portion is lower than the thermal conductivity of the undoped semiconductor layer.
2. The composite substrate structure according to claim 1, characterized in that: The central area accounts for 5% to 28% of the projection area of the protrusion.
3. The composite substrate structure according to claim 1, characterized in that: The material of the undoped semiconductor layer is GaN; The top view of the pit is a regular hexagon, each side surface corresponds to the [10, -1, 1] crystal plane of gallium nitride, and the angle between the side surface and the C-plane is 62°; The distance s between the upper edge of the pit and the side wall of the protrusion is 0.5 μm≤s≤1 μm; The material of the blocking part is one of SiO2, Si3N4, ZnO, Al2O3, and TiO2.
4. The composite substrate structure according to claim 1, characterized in that: The inclination angle of the side wall of the protrusion is less than or equal to 45°.
5. The composite substrate structure according to claim 4, characterized in that: The protrusion is in a cone or cone-like shape; The height of the protrusion is between 0.25 and 1.5 μm, the width of the protrusion 12 is between 0.5 and 2.5 μm, and the aspect ratio of the protrusion is between 0.2 and 0.5; The pattern duty ratio of the pattern substrate is ≤82%.
6. The composite substrate structure according to claim 1, characterized in that: The transmittance of the buffer layer to ultraviolet rays in the wavelength range of 266nm to 355nm is 69% to 85%.
7. The composite substrate structure according to claim 6, characterized in that: The thickness of the buffer layer is 5 to 50 nm; The material of the buffer layer is AlN, and AlN is deposited on the pattern substrate by using a magnetron sputtering process, and the sputtering N2 flow rate is maintained in the range of 75% to 88% during the sputtering deposition process.
8. An epitaxial structure, characterized in that: A composite substrate structure comprising the composite substrate structure as claimed in any one of claims 1 to 7, and an undoped cover layer, a first doped semiconductor layer, a light emitting layer and a second doped semiconductor layer; The undoped covering layer is coated on the undoped semiconductor layer and the blocking portion, and the material of the undoped covering layer is the same as that of the undoped semiconductor layer; The first doped semiconductor layer, the light emitting layer and the second doped semiconductor layer are sequentially deposited on the undoped covering layer.
9. The epitaxial structure according to claim 8, characterized in that: The first doped semiconductor layer is an n-GaN layer, the light emitting layer is an MQWs layer, and the second doped semiconductor layer includes an AlGaN layer and a p-GaN layer; The first doped semiconductor layer has a thickness of 0.8 μm to 1.1 μm and comprises GaN and Si; The thickness of the light-emitting layer is 20nm to 29nm, and its composition includes GaInN; The thickness of the second doped semiconductor layer is 88nm-112nm, wherein the thickness of the AlGaN layer is 8nm-12nm, and its components include AlGaN and Mg; the thickness of the P-GaN layer is 80nm-100nm, and its components include GaN and Mg.
10. A method for preparing a composite substrate structure, characterized in that: At least it can be used to prepare the composite substrate structure according to any one of claims 1 to 7, and the preparation method comprises the following steps: S100: obtaining a graphic substrate; S200: laying a buffer layer on the pattern substrate using a magnetron sputtering process, ensuring that the N2 flow rate accounts for 75% to 88% during the sputtering process; S300: epitaxially growing an undoped semiconductor layer on the buffer layer using a MOCVD method with N2 flow as a carrier gas, wherein the undoped semiconductor layer can submerge the buffer layer and form periodically arranged pits on the upper surface; S400: depositing a barrier portion on the undoped semiconductor layer by a PECVD method until the pit is filled and covered; S500: using a corrosive liquid to selectively etch the blocking portion of the overflow pit until the upper surface of the undoped semiconductor layer is completely exposed, thereby completing the preparation of the composite substrate structure.
11. The preparation method according to claim 10, characterized in that: The material of the undoped semiconductor layer is GaN, and undoped GaN is grown by MOCVD epitaxial growth using TMGa and NH3, with a pressure of 290-320 Torr and a total growth time of 25-60 min. The growth process of step S300 includes the following stages: S301: In the first stage, the growth temperature is 970-985°C, the flow rate of TMGa is 850-950 μmol / min, the flow rate of NH3 is 23-25 slm, and the growth time is 300-700 s; S302: In the second stage, the growth temperature gradually increases from 970-985°C to 1030-1090°C, with a linear increase rate of 0.12°C / s to 0.70°C / s; the amount of TMGa gradually increases from 850-950 μmol / min to 1700-2200 μmol / min, with a linear increase rate of 2-8 (μmol / min) / s; the NH3 flow rate also gradually increases from 23-25 slm to 26-30 slm, with a linear increase rate of 0.01 slm / s to 0.04 slm / s; the growth time is 180-360 s; S303: the third stage, the growth temperature is 1030-1090°C, the flow rate of TMGa is 1700-2200 μmol / min, the flow rate of NH3 is 26-30 slm, and the growth time is 740-1320 s; After the above three stages of growth, an unhealed pit is formed in the GaN layer, and the distance from the upper edge of the pit to the side wall of the substrate pattern is 0.5 to 1 μm.
12. A method for preparing an epitaxial structure, characterized in that: At least it can be used to prepare the epitaxial structure as claimed in claim 8 or 9, and the preparation method comprises the following steps: S600: using a MOCVD method to continue to lay an undoped covering layer on the undoped semiconductor layer and the barrier portion of the composite substrate structure under a flow rate of N2 as a carrier gas, wherein the material of the undoped covering layer is the same as that of the undoped semiconductor layer; S700: Continue to perform MOCVD epitaxial growth, and sequentially complete the growth of the first doped semiconductor layer, the light-emitting layer, and the second doped semiconductor layer, thereby completing the preparation of the composite substrate structure.