A photoelectric receiving device for a grating displacement sensor

Abstract

The present invention relates to a photoelectric receiving device for a grating displacement sensor. The device comprises a photodiode array, a differential selection switch network, a current differential circuit, and a transimpedance amplifier circuit. The differential selection switch network pairs the current signals output by the photodiode array and feeds them into the current differential circuit. The current differential circuit then takes the difference between each pair of current signals, each with a phase difference of π, and outputs the difference to the transimpedance amplifier circuit, which then amplifies the difference to produce a voltage signal for output. This invention expands the application range of photoelectric sensors, reduces the number of integrated component development steps, and improves the signal-to-noise ratio.

Description

Technical Field

[0001] The invention relates to a photoelectric receiving device of a grating displacement sensor, belonging to the technical field of photoelectric measurement. Background Art

[0002] The grating displacement sensor is a position measurement device that uses a grating as a measurement reference. The grating or the moiré fringes formed by the grating are transmitted to the photodiode through the LED. The photodiode converts the light signal into a current signal. The processing circuit converts and amplifies the current signal to form a voltage signal related to the position. The position information can be obtained by processing the voltage signal using a well-known method.

[0003] Currently, the photoelectric conversion of grating displacement sensors generally adopts two methods: 1. discrete components, 2. integrated components.

[0004] In discrete components, multiple independent photodiodes are used to receive the moiré fringe signals generated by gratings of different phases or patterns. External circuitry is then used to amplify the photodiode current signal into a voltage signal. Due to the use of multiple independent photodiodes, the size of the grating displacement sensor, and the limited area illuminated by the LEDs, discrete component solutions typically use multiple LEDs.

[0005] Among integrated components, photodiode arrays are generally used, that is, multiple photodiodes are integrated into one chip, and even the photocurrent processing circuit is also integrated on the chip. The advantage of this is that only one LED can be used, thereby improving the integration and reducing the volume of the grating displacement sensor.

[0006] At present, due to the high customization cost and long design cycle of integrated components, they are generally used in high-end grating displacement sensors.

[0007] The Chinese Patent Gazette discloses a "photoelectric receiving sensor for incremental displacement measurement device" (publication number: CN103308084A). In this sensor, a photodetector array outputs a sinusoidal current signal corresponding to an optical signal; a gain-adjustable amplifier circuit receives the sinusoidal current signal, amplifies it, and converts it into a voltage signal; an adder adds the converted voltage signals output by the gain-adjustable amplifier circuit to obtain a DC voltage signal; and a subtractor converts the voltage signal output by the gain-adjustable amplifier circuit into a sinusoidal signal or a cosine signal. This sensor has the following problems: (1) Since the input of the subtractor must be a signal with a phase difference of π, and the connection method between the subtractor and the gain-adjustable amplifier circuit on the sensor is fixed, the phase of the moiré fringe signal on the photodiode array must be arranged in a fixed manner; (2) The optical signal on the surface of the photodetector includes a common-mode signal and a differential-mode signal. The differential-mode signal directly reflects the change in position, while the common-mode signal is caused by physical optical factors such as the Talbot effect, is independent of position, and accounts for a large proportion. The common-mode signal is generally 2 to 50 times the differential-mode signal. This sensor directly amplifies the current signal output by the photodiode (generally known as transimpedance amplification), and then differentially amplifies the voltage signal with opposite phase to remove the common-mode signal. Because transimpedance amplification simultaneously amplifies both common-mode and differential-mode signals, it can easily lead to voltage saturation at the transimpedance amplifier output, causing malfunctions in the grating displacement sensor. This also limits the illumination intensity of the LED, forcing the signal amplitude to be increased only by increasing the differential amplification factor, which introduces additional noise. Summary of the Invention

[0008] The technical problem to be solved by the present invention is to provide a photoelectric receiving device for a grating displacement sensor, which can flexibly adjust the grouping method of the photodiode array, improve the application range of the photoelectric sensor, avoid amplification of the common-mode signal, and improve the signal-to-noise ratio.

[0009] In order to solve the above technical problems, the photoelectric receiving device of the grating displacement sensor of the present invention includes a photodiode array and a transimpedance amplifier circuit, and is characterized in that it also includes a differential selection switch network and a current differential circuit; the differential selection switch network pairs the current signals output by the photodiode array and sends them into the current differential circuit; the current differential circuit differentiates each pair of current signals with a phase difference of π and outputs them to the transimpedance amplifier circuit, which then amplifies them into a voltage signal for output.

[0010] The photodiode array, differential selection switch network, current differential circuit, and transimpedance amplifier circuit are all integrated on one chip.

[0011] The differential selection switch network includes four input ports, seven switches, and four output ports for each switch group; input port in1 is directly connected to output port out1; input port in2 is connected to output port out2 through switch SW1, and to output port out3 through switch SW4; input port in3 is connected to output port out2 through switch SW2, to output port out3 through switch SW5, and to output port out4 through switch SW6; input port in4 is connected to output port out2 through switch SW3, and to output port out4 through switch SW7; correspondingly, the current differential circuit includes two current subtraction circuits; output ports out1 and out2 are connected to the two input ends of one current subtraction circuit, and output ports out3 and out4 are connected to the two input ends of the other current subtraction circuit.

[0012] The photodiode array includes 4×N photodiodes; the output ends of the photodiodes with the same phase are short-circuited to form a signal line, with a total of four signal lines, which output current signals i1, i2, i3, and i4 respectively; the current signals i1, i2, i3, and i4 are respectively input into the differential selection switch network through input ports in1 to in4, and output current signals i1, i5, i6, and i7 through output ports out1 to out4. By controlling one of switches SW1 to SW3 to be closed, current signal i5 can be selected to be equal to current signal i2, current signal i3, or current signal i4; by controlling one of switches SW4 and SW5 to be closed, current signal i6 can be selected to be equal to current signal i2 or current signal i3; by controlling one of switches SW6 and SW7 to be closed, current signal i7 can be selected to be equal to current signal i3 or current signal i4.

[0013] When the phases of the current signals i1, i2, i3, and i4 are equal to 0, π / 2, π, and 3π / 2, respectively, switches SW2, SW4, and SW7 are closed, and switches SW1, SW3, SW5, and SW6 are opened, and the output ports out1, out2, out3, and out4 output current signals i1, i5, i6, and i7 with phases equal to 0, π, π / 2, and 3π / 2, respectively.

[0014] When the phases of the current signals i1, i2, i3, and i4 are equal to 0, π, π / 2, and 3π / 2, respectively, switches SW1, SW5, and SW7 are closed, and switches SW2, SW3, SW4, and SW6 are opened, and the output ports out1, out2, out3, and out4 output current signals i1, i5, i6, and i7 with phases equal to 0, π, π / 2, and 3π / 2, respectively.

[0015] The photodiode array is integrated on a first chip and includes a plurality of detection units, each detection unit including 16 photodiodes, which are sequentially numbered as 16*i+1, 16*i+2, ..., 16*i+16, i = 0, 1, 2, 3 ..., N-1, where N is the number of detection units; there is a first pitch D1 and a second pitch D2 between adjacent photodiodes, and the first pitch D1 and the second pitch D2 are alternately distributed on the photodiode array; D2 = 2.5D1; the light intensity distribution period of the optical signal is T = k × D1, k = 2 or 4; every two phase-related photodiodes are grouped together and short-circuited together on the first chip to lead out 8 signal lines; on the first chip Outside the chip, eight signal lines are combined into four output signal lines that can output four current signals i1, i2, i3, and i4 with phases of π / 2, π, 3π / 2, and 0, respectively, based on the relationship between the light intensity distribution period T of the optical signal and the first pitch D1. The four output signal lines are respectively connected to the input port in1 to the input port in4 of the differential selection switch network. The switches SW2, SW4, and SW7 of the differential selection switch network are closed, and the switches SW1, SW3, SW5, and SW6 are opened. Current signals i1, i5, i6, and i7 with phases of 0, π, π / 2, and 3π / 2, respectively, are output through the output ports out1 to out4.

[0016] On the first chip, the photodiodes numbered 16*i+1 and 16*i+6 are electrically connected, leading to the H signal line, the photodiodes numbered 16*i+3 and 16*i+8 are electrically connected, leading to the G signal line, the photodiodes numbered 16*i+5 and 16*i+10 are electrically connected, leading to the F signal line, the photodiodes numbered 16*i+7 and 16*i+12 are electrically connected, leading to the E signal line, the photodiodes numbered 16*i+2 and 16*i+13 are electrically connected, leading to the D signal line, the photodiodes numbered 16*i+9 and 16*i+14 are electrically connected, leading to the C signal line, the photodiodes numbered 16*i+4 and 16*i+15 are electrically connected, leading to the B signal line, and the photodiodes numbered 16*i+11 and 16*i+16 are electrically connected, leading to the A signal line.

[0017] For the case of T=2×D1, the C signal line is electrically connected to the H signal line outside the first chip to output a current signal with an absolute phase of 0, the A signal line is electrically connected to the G signal line to output a current signal with an absolute phase of 3π / 2, the F signal line is electrically connected to the D signal line to output a current signal with an absolute phase of π, and the E signal line is electrically connected to the B signal line to output a current signal with an absolute phase of π / 2.

[0018] For the case of T=4×D1, the B signal line and the H signal line are electrically connected outside the chip to output a current signal with a relative phase of 0, the F signal line and the G signal line are electrically connected to output a current signal with a relative phase of 3π / 2, the E signal line and the C signal line are electrically connected to output a current signal with a relative phase of π, and the A signal line and the D signal line are electrically connected to output a current signal with a relative phase of π / 2.

[0019] The beneficial effects of the present invention are:

[0020] 1. As a photoelectric sensor, it is suitable for various grating moiré fringe arrangements.

[0021] A differential selection switch network is used to group the current signals output by the photodiode array, typically grouping signals with a phase difference of 180°. The grouping of the photodiode array can be adjusted for different moiré fringe arrangements, thereby expanding the application range of the photoelectric sensor. For the same product, this invention can be used to verify the optimal moiré fringe arrangement, improving product performance and reducing the number of integrated component development efforts for similar products.

[0022] 2. It can avoid the shortcomings of voltage signal saturation and low LED utilization efficiency caused by transimpedance amplification of common-mode signals.

[0023] A current subtraction circuit is used to subtract each set of current signals and then output them to the transimpedance amplifier circuit, which directly avoids the signal saturation problem caused by transimpedance amplification of the common-mode signal. At the same time, the signal amplitude can be increased by increasing the brightness of the LED, thereby improving the signal-to-noise ratio of the signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is a structural schematic diagram of the present invention.

[0025] Figure 2 Schematic diagram of the photodiode array in Example 1 of the present invention.

[0026] Figure 3 This is a schematic diagram of the photodiode current output.

[0027] Figure 4 This is a schematic diagram of the differential selection switch network.

[0028] Figure 5 This is the schematic diagram of the current subtraction circuit.

[0029] Figure 6 yes Figure 1 Schematic diagram of the transimpedance amplifier circuit in the photoelectric receiving device shown.

[0030] Figure 7 This is a schematic diagram of the internal connection structure of the photodiode array and chip in Example 2 of the present invention.

[0031] Figure 8 This is a schematic diagram of the first connection structure between the photodiode array and the outside of the chip in Example 2 of the present invention.

[0032] Figure 9 This is a schematic diagram of the second connection structure between the photodiode array and the chip exterior in Example 2 of the present invention. DETAILED DESCRIPTION

[0033] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely for the purpose of explaining the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, rather than all structures.

[0034] In the description of the present invention, unless otherwise expressly specified or limited, the terms "connected," "connected," and "fixed" should be understood in a broad sense. For example, they may refer to fixed connections, detachable connections, or integration; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on specific circumstances.

[0035] Example 1

[0036] like Figure 1 As shown, the photoelectric receiving device of the grating displacement sensor of the present invention includes a photodiode array, a differential selection switch network, a current differential circuit, and a transimpedance amplifier circuit; the photodiode array, differential selection switch network, current differential circuit, and transimpedance amplifier circuit are all integrated on a single chip, which has the advantage of increasing system integration and can be used in products with compact space.

[0037] like Figure 2 As shown, the photodiode array includes 4×N photodiodes (N is a natural number, and its size is determined by the available spot area and the spatial size of the grating displacement sensor. Taking 4*2 photodiodes as an example, eight photodiodes A1, B1, C1, D1, A2, B2, C2, and D2 are arranged at equal intervals. The output ends of every two photodiodes with the same phase are short-circuited to form a signal line, and the four signal lines output current signals i1, i2, i3, and i4 respectively.

[0038] In the grating displacement sensor, the photodiode array receives the grating or grating moiré fringe signal. The relationship between the current signals i1, i2, i3, i4 and the displacement is:

[0039]

[0040]

[0041]

[0042]

[0043] Where p is the period of the grating, i c is the common mode current, i d is the amplitude of the differential mode current, and x represents the position. θ1, θ2, θ3, and θ4 represent the phases of the current signals i1, i2, i3, and i4, whose values ​​are determined by the phase of the grating or grating moiré fringe signal received by the photodiode. Due to the diffraction effect, usually i c is i d 2 to 50 times, such as Figure 3 shown.

[0044] like Figure 4 As shown, the differential selection switch network includes four input ports, eight switches, and four output ports corresponding to each switch group; the input port in1 is directly connected to the output port out1; the input port in2 is connected to the output port out2 through the switch SW1, and is connected to the output port out3 through the switch SW4; the input port in3 is connected to the output port out2 through the switch SW2, is connected to the output port out3 through the switch SW5, and is connected to the output port out4 through the switch SW6; the input port in4 is connected to the output port out2 through the switch SW3, and is connected to the output port out4 through the switch SW7.

[0045] The current signals i1, i2, i3, and i4 output by the four signal lines are respectively input into the differential selection switch network through the input port in1 to the input port in4, and the current signals i1, i5, i6, and i7 are output through the output port out1 to the output port out4. By controlling one of the switches SW1 to SW3 to be closed, the current signal i5 can be selected to be equal to any of the current signals i2, i3, and i4; by controlling one of the switches SW4 and SW5 to be closed, the current signal i6 can be selected to be equal to any of the current signals i2 and i3; by controlling one of the switches SW6 and SW7 to be closed, the current signal i7 can be selected to be equal to any of the current signals i3 and i4.

[0046] In this embodiment, corresponding to each set of switches in the differential selection switch network, the current differential circuit includes two current subtraction circuits, which respectively subtract the current signal i1 from the current signal i5, and the current signal i6 from the current signal i7, and output the subtractions to the transimpedance amplifier circuit, which then amplifies the subtractions into voltage signals for output.

[0047] According to different switch combinations, different current signals i1, i2, i3, and i4 can be grouped and differentiated.

[0048] In this embodiment, when θ1=0, θ2=π / 2, θ3=π, and θ4=3π / 2, current signal i1 and current signal i3 are differential, and current signal i2 and current signal i4 are differential. Therefore, switches SW2, SW4, and SW7 are closed, and switches SW1, SW3, SW5, and SW6 are open, thereby achieving subtraction between current signal i1 and current signal i3, and subtraction between current signal i2 and current signal i4. When θ1=0, θ2=π, θ3=π / 2, and θ4=3π / 2, current signal i1 and current signal i2 are differential, and current signal i3 and current signal i4 are differential. Therefore, switches SW1, SW5, and SW7 are closed, and switches SW2, SW3, SW4, and SW6 are open, thereby achieving subtraction between current signal i1 and current signal i2, and subtraction between current signal i3 and current signal i4.

[0049] Figure 5 The current subtraction circuit of current signal i1 and current signal i5, the subtraction circuit of current signal i6 and current signal i7 and Figure 5 same. Figure 5 Among them, M1, M2, M5, and M6 are nmos, and M3 and M4 are pmos. Figure 5 The sizes of M1 and M2 are the same, the sizes of M3 and M4 are the same, and the sizes of M5 and M6 are the same. According to the working characteristics of the MOS tube, it can be seen that M1 and M2 form a current mirror, M3 and M4 form a current mirror, and M5 and M6 form a current mirror. Therefore Figure 5 The circuit can output the difference between the current signal i1 and the current signal i5, thereby achieving subtraction of the current signals.

[0050] Figure 6 A transimpedance amplifier circuit is given. According to the circuit characteristics, V1 = R1 × (i1 - i5).

[0051] Example 2

[0052] In this embodiment, the photodiode array can be integrated on the first chip, and every two phase-related photodiodes are divided into a group and short-circuited on the first chip. The differential selection switch network, current differential circuit, and transimpedance amplifier circuit can be integrated on the second chip.

[0053] In this embodiment, the photodiode array includes multiple detection units, each detection unit includes 16 photodiodes 100, which are numbered in sequence as 16*i+1, 16*i+2,…, 16*i+16, i=0, 1, 2, 3…, N-1, and N is the number of detection units; there is a first pitch D1 and a second pitch D2 between adjacent photodiodes, and the first pitch D1 and the second pitch D2 are alternately distributed on the photodiode array; D2=2.5D1; the pitch here refers to the distance between the centers of adjacent photodiodes.

[0054] Assume the intensity distribution period of the optical signal is T. The intensity distribution here refers to the distribution along the measurement direction of the grating displacement sensor. The pitch arrangement is designed to detect different phases of the optical signal, and the photodiodes that receive the same phase are connected.

[0055] If the light signal is simplified to a sinusoidal signal with a light intensity distribution period of T, the signal output by each photodiode can be expressed as I = A × cos (X × 2π / T + Δ) + A0, where X represents the displacement coordinate (i.e., the shift measurement data), A and A0 are constants independent of the shift measurement data, Δ is the phase, and T is the light intensity distribution period.

[0056] like Figure 7 As shown, the photodiodes of the photodiode array are divided into 8 groups. The photodiodes of each group are phase-related and short-circuited together on the first chip, leading to 8 signal lines. Then, based on the relationship between the light intensity distribution period T of the optical signal and the first pitch D1, the 8 signal lines are combined outside the chip into 4 output signal lines that can output phases of π / 2, π, 3π / 2, and 0 respectively. The 4 output signal lines are respectively connected to the input ports in1 to in4 of the differential selection switch network.

[0057] The differential selection switch network structure in this embodiment is the same as that in embodiment 1.

[0058] Four current signals i1, i2, i3, and i4, with phases of π / 2, π, 3π / 2, and 0, respectively, are input into the differential selector switch network via input ports in1 through in4. Current signals i1, i5, i6, and i7, with phases of 0, π, π / 2, and 3π / 2, respectively, are output via output ports out1 through out4. The output signal phases of each photodiode are shown in Table 1 for the two cases where the light intensity distribution period T = k × D1, with k = 2 or 4.

[0059] Table 1

[0060] signal line Photodiode number Δ(T=2*D1), unit:° Δ(T=4*D1), unit:° A 16*i+11 or 16*i+16 270 135 B 16*i+4 or 16*i+15 90 45 C 16*i+9 or 16*i+14 0 180 D 16*i+2 or 16*i+13 180 90 E 16*i+7 or 16*i+12 90 225 F 16*i+5 or 16*i+10 180 270 G 16*i+3 or 16*i+8 270 315 H 16*i+1 or 16*i+6 0 0

[0061] Inside the first chip, the photodiodes numbered 16*i+1 and 16*i+6 are electrically connected to lead out the H signal line, the photodiodes numbered 16*i+3 and 16*i+8 are electrically connected to lead out the G signal line, the photodiodes numbered 16*i+5 and 16*i+10 are electrically connected to lead out the F signal line, the photodiodes numbered 16*i+7 and 16*i+12 are electrically connected to lead out the E signal line, the photodiodes numbered 16*i+2 and 16*i+13 are electrically connected to lead out the D signal line, the photodiodes numbered 16*i+9 and 16*i+14 are electrically connected to lead out the C signal line, the photodiodes numbered 16*i+4 and 16*i+15 are electrically connected to lead out the B signal line, the photodiodes numbered 16*i+11 and 16*i+16 are electrically connected to lead out the A signal line.

[0062] like Figure 2 As shown, for the case of T=2×D1, the C-path signal line is electrically connected to the H-path signal line outside the first chip to output a current signal with an absolute phase of 0, the A-path signal line is electrically connected to the G-path signal line to output a current signal with an absolute phase of 3π / 2, the F-path signal line is electrically connected to the D-path signal line to output a current signal with an absolute phase of π, and the E-path signal line is electrically connected to the B-path signal line to output a current signal with an absolute phase of π / 2.

[0063] like Figure 3 As shown, for the case of T=4×D1, the B signal line and the H signal line are electrically connected outside the chip to output a current signal with an absolute phase of 22.5° and a relative phase of 0. The F signal line and the G signal line are electrically connected to output a current signal with an absolute phase of 292.5° and a relative phase of 3π / 2. The E signal line and the C signal line are electrically connected to output a current signal with an absolute phase of 202.5 and a relative phase of π. The A signal line and the D signal line are electrically connected to output a current signal with an absolute phase of 112.5° and a relative phase of π / 2.

[0064] In this embodiment, the phase difference between the current signals i1 and i3 is π, the phase difference between the current signals i2 and i4 is π, the current signals i1 and i3 are differential with each other, and the current signals i2 and i4 are differential with each other. At this time, the switches SW2, SW4, and SW7 are closed, and the switches SW1, SW3, SW5, and SW6 are opened. The current differential circuit subtracts the current signal i1 from the current signal i3, and subtracts the current signal i2 from the current signal i4, and then outputs them to the transimpedance amplifier circuit, which then amplifies them into a voltage signal for output.

[0065] Existing signal processing methods used in position sensor arrays group the signals output by each detection unit and generate four signals with different phases on the chip. However, this method is incompatible with optical signals with different light intensity distribution periods. This embodiment separates the signal processing of each photodiode's output into two steps: internal and external. In the first step, the common wiring for optical signals with different light intensity distribution periods is set inside the first chip. In the second step, based on the first step, different wiring is performed externally according to the different light intensity distribution periods. This allows optical signals with different light intensity distribution periods T to be rewired on the circuit board only at a later stage of application.

[0066] This embodiment uses the first pitch and the second pitch between adjacent detection units to be distributed alternately on the detector array, and connects the parts with the same electrical connection method corresponding to different light intensity distribution periods inside the chip, and then performs different combination wiring outside the chip according to different application scenarios. In this way, the optical signal processing for different light intensity distribution periods only needs to be reconnected on the circuit board in the later stage of the application, which is compatible with the detection of optical signals with different light intensity distribution periods, thereby reducing costs.

Claims

1. A photoelectric receiving device of a grating displacement sensor, comprising a photodiode array and a transimpedance amplifier circuit, characterized in that It also includes a differential selection switch network and a current differential circuit; the differential selection switch network pairs the current signals output by the photodiode array and sends them to the current differential circuit; the current differential circuit takes the difference of each pair of current signals with a phase difference of π and outputs them to the transimpedance amplifier circuit, which then amplifies them into a voltage signal output; the photodiode array is integrated on the first chip, and every two phase-related photodiodes are divided into a group and short-circuited on the first chip, and the differential selection switch network, the current differential circuit, and the transimpedance amplifier circuit are integrated on the second chip; the differential selection switch network includes four input ports, seven switches, and four output ports corresponding to each group of switches; the input port in1 is directly connected to the output port out1; the input port in2 is connected to the output port out2 through the switch SW1, and is connected to the output port out3 through the switch SW4; the input port in3 is connected to the output port out2 through the switch SW2, and is connected to the output port out3 through the switch SW4. Switch SW5 is connected to output port out3 and to output port out4 via switch SW6. Input port in4 is connected to output port out2 via switch SW3 and to output port out4 via switch SW7. Correspondingly, the current differential circuit includes two current subtraction circuits. Output ports out1 and out2 are connected to the two input terminals of one current subtraction circuit, while output ports out3 and out4 are connected to the two input terminals of the other current subtraction circuit. The photodiode array includes multiple detection units, each of which includes 16 photodiodes, numbered sequentially as 16*i+1, 16*i+2, ..., 16*i+16, where i = 0, 1, 2, 3, ..., N-1, and N is the number of detection units. Adjacent photodiodes have a first pitch D1 and a second pitch D2, and the first pitch D1 and the second pitch D2 are alternately distributed across the photodiode array. D2 = 2.5D1; the light intensity distribution period of the optical signal is T=k×D1, k=2 or 4; the first chip leads to 8 signal lines; outside the first chip, the 8 signal lines are combined into 4 output signal lines that can output four current signals i1, i2, i3, and i4 with phases of π / 2, π, 3π / 2, and 0, respectively; the 4 output signal lines are respectively connected to the input port in1 to the input port in4 of the differential selection switch network; the switches SW2, SW4, and SW7 of the differential selection switch network are closed, and the switches SW1, SW3, SW5, and SW6 are opened, and the current signal i1 with phases equal to 0, π, π / 2, and 3π / 2, respectively, is output through the output ports out1 to out4. , i5, i6, i7; in the current subtraction circuit, nmos transistors M1 and nmos transistors M2 have the same size, forming a first current mirror; pmos transistors M3 and pmos transistors M4 have the same size, forming a second current mirror; nmos transistors M5 and nmos transistors M6 have the same size, forming a third current mirror; the drain of nmos transistor M2 is connected to the drain of pmos transistor M3; the drain of pmos transistor M4 is connected to the drain of nmos transistor M6; one current flowing into the drain of nmos transistor M1 is copied to the drain of pmos transistor M3 via the first current mirror, and then copied to the drain of pmos transistor M4 via the second current mirror; the other current flows into the drain of nmos transistor M5 and is copied to the drain of nmos transistor M6 via the third current mirror, thereby achieving the difference between the two currents and outputting them.

2. The photoelectric receiving device of the grating displacement sensor according to claim 1, characterized in that On the first chip, the photodiodes numbered 16*i+1 and 16*i+6 are electrically connected, leading to the H signal line, the photodiodes numbered 16*i+3 and 16*i+8 are electrically connected, leading to the G signal line, the photodiodes numbered 16*i+5 and 16*i+10 are electrically connected, leading to the F signal line, the photodiodes numbered 16*i+7 and 16*i+12 are electrically connected, leading to the E signal line, the photodiodes numbered 16*i+2 and 16*i+13 are electrically connected, leading to the D signal line, the photodiodes numbered 16*i+9 and 16*i+14 are electrically connected, leading to the C signal line, the photodiodes numbered 16*i+4 and 16*i+15 are electrically connected, leading to the B signal line, and the photodiodes numbered 16*i+11 and 16*i+16 are electrically connected, leading to the A signal line.

3. The photoelectric receiving device of the grating displacement sensor according to claim 2 is characterized in that For the case of T=2×D1, the C signal line is electrically connected to the H signal line outside the first chip to output a current signal with an absolute phase of 0, the A signal line is electrically connected to the G signal line to output a current signal with an absolute phase of 3π / 2, the F signal line is electrically connected to the D signal line to output a current signal with an absolute phase of π, and the E signal line is electrically connected to the B signal line to output a current signal with an absolute phase of π / 2.

4. The photoelectric receiving device of the grating displacement sensor according to claim 2, characterized in that For the case of T=4×D1, the B signal line and the H signal line are electrically connected outside the chip to output a current signal with a relative phase of 0, the F signal line and the G signal line are electrically connected to output a current signal with a relative phase of 3π / 2, the E signal line and the C signal line are electrically connected to output a current signal with a relative phase of π, and the A signal line and the D signal line are electrically connected to output a current signal with a relative phase of π / 2.

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