Synchronous rectification topology circuit with multiplexed output and power supply system
By introducing an alternating working mode of Buck unit and open-loop signal control in the synchronous rectification circuit, the problems of poor coupling degree and low output efficiency in the prior art are solved, and higher coupling degree and working efficiency are achieved.
Patent Information
- Application Number
- CN202411634823.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-15
- Publication Date
- 2025-03-14
AI Technical Summary
The coupling degree between the multiple outputs of the existing synchronous rectification circuit is poor and the output efficiency is low, mainly due to the current stress of the switch tube.
A synchronous rectification topology circuit with multiple outputs is designed. By adding a Buck unit between the input module and the voltage divider unit, and controlling the alternating operation of the switch tube Q9 and the switch tube Q3 with an open-loop signal, the coupling degree of output different output units is improved. At the same time, the current stress of the switch tube is reduced through the resonance between the reset winding of the transformer and the junction capacitor.
The coupling degree between multiple outputs is improved, the overall working efficiency is improved, and the current stress of the switch tube is reduced, thereby improving the output efficiency of the circuit.
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Figure CN119628437A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of rectifier circuit design, and in particular to a multi-output synchronous rectifier topology circuit and a power supply system. Background Art
[0002] Synchronous rectification circuits are widely used in the fields of industry and national defense, in aerospace, aviation, ships, weapons, railways, communications, medical electronics, industrial automation equipment and other military and civilian electronic systems. Since its invention, synchronous rectification circuits have developed rapidly. New application requirements are constantly emerging along with new technologies.
[0003] The existing synchronous rectification circuit can refer to a topological circuit of a wide input voltage isolated switching power supply as shown in publication number CN204615657U. However, in the above circuit, the coupling between its multiple outputs is still poor, and the circuit inevitably requires the use of a switch tube for control. The current stress of the switch tube itself also makes the output efficiency of the above circuit low. Summary of the invention
[0004] In view of the deficiencies in the prior art, the present invention provides a multi-output synchronous rectification topology circuit and a power supply system, which solves the problems of low output efficiency and poor coupling degree of the multi-output rectification circuit in the prior art.
[0005] At least one embodiment of the present invention provides a multi-output synchronous rectification topology circuit, including: an input module, a switch tube Q9, a switch tube Q3, a voltage divider unit, a transformer T4, a transformer T1 and a plurality of output units, wherein:
[0006] The input module is connected to the input end of the voltage divider unit, the first output end of the voltage divider unit is connected to the second output end of the voltage divider unit through the primary winding T4-B of the transformer T4 and the switch tube Q9 in sequence, the second output end of the voltage divider unit is connected to the common end through the primary winding T1-B of the transformer T1 and the switch tube Q3 in sequence, and the switch tube Q9 and the switch tube Q3 are configured to be alternately turned on or off;
[0007] Any of the output units includes: a non-repeated secondary winding of the transformer T1, a non-repeated secondary winding of the transformer T4, two output switch tubes, and two output ports. The first end of the secondary winding of the transformer T1 is connected to one of the output ports through one of the output switch tubes, and the output switch tube and the switch tube Q3 are both controlled by an open-loop signal to be synchronously turned on or off. The second end of the secondary winding of the transformer T1 is connected to the other output port.
[0008] The first end of the secondary winding of the transformer T4 is connected to one of the output ports through another output switch tube. The output switch tube and the switch tube Q9 are both controlled by an open-loop signal to be turned on or off synchronously. The second end of the secondary winding of the transformer T4 is connected to another output port.
[0009] The technical solution disclosed in the present invention has at least the following beneficial effects:
[0010] Through the above arrangement, when in use, the input voltage in the input module is divided into a suitable voltage through the voltage dividing unit and output to the primary winding T4-B of the transformer T4 and the primary winding T1-B of the transformer T1 respectively. At this time, since the switch tube Q9 and the switch tube Q3 work alternately at 180° under the open-loop signal, and the switch tube Q3 and one of the output switch tubes of each output unit are synchronously turned on or off, and the switch tube Q9 and the other output switch tube in each output unit are synchronously turned on or off, since each switch tube in this circuit is open-loop controlled and will not be affected by the output feedback loop, the voltage on the transformer module can pass through the primary winding T1-B of the transformer T1 and the primary winding T4-B of the transformer T4, and almost 100% of the energy is transferred to the corresponding secondary winding. By controlling the alternate work of the switch tube Q9 and the switch tube Q3 through open-loop control, the load cross-regulation rate of the output voltage of different output units is improved, that is, the coupling degree is improved;
[0011] At the same time, when the transformer T4 of the present circuit is reset, the magnetic inductance Lm of the transformer T4 connected in series can resonate with the junction capacitance of the switch tube Q9, so that the switch tube Q9 and one of the output switch tubes in each of the output units turned on synchronously with it are turned on and work in the ZCS mode, thereby reducing the current stress of the above-mentioned switches; similarly, when the transformer T1 is reset, the magnetic inductance Lm of the transformer T1 connected in series can resonate with the junction capacitance of the switch tube Q3, so that the switch tube Q3 and another output switch tube in each of the output units turned on synchronously with it are turned on and work in the ZCS mode, thereby reducing the current stress of the above-mentioned switches. Thus, the overall working efficiency of the circuit is improved.
[0012] In a multi-output synchronous rectification topology circuit provided in one embodiment of the present invention, the input module includes: an input unit and a Buck unit, wherein:
[0013] The input unit is connected to the voltage dividing unit through the Buck unit.
[0014] The technical solution disclosed in the present invention has at least the following beneficial effects:
[0015] By adding a Buck unit between the input unit and the voltage divider unit, the impact of input changes on the output can be reduced under high voltage and wide range input conditions.
[0016] In a multi-output synchronous rectification topology circuit provided in one embodiment of the present invention, the Buck unit includes a switch tube Q2, an inductor L4, a diode D20 and a capacitor C123, wherein:
[0017] One end of the input unit is connected to the first input end of the voltage divider unit through the drain and source of the switch tube Q2 and the inductor L4 in sequence;
[0018] The source of the switch tube Q2 is connected to the cathode of the diode D2, and the anode of the diode D2 is connected to the other end of the input unit and the second input end of the voltage divider unit respectively;
[0019] The first input end of the voltage dividing unit is connected to the second input end of the voltage dividing unit through the capacitor C123.
[0020] In a multi-output synchronous rectification topology circuit provided by one of the embodiments of the present invention, the input module further includes a current acquisition unit, and the input unit is connected to the Buck unit through the current acquisition unit to collect current information between the input unit and the Buck unit;
[0021] The duty cycle of the Buck unit is adjusted based on the current information and the voltage information between two output ports of one of the output units.
[0022] The technical solution disclosed in the present invention has at least the following beneficial effects:
[0023] By collecting the current information between the input unit and the Buck unit, and combining it with the voltage information between the two output ports in the output unit, feedback regulation can be formed for the control of the Buck unit to reduce the impact of input changes on the output.
[0024] In a multi-output synchronous rectification topology circuit provided in one embodiment of the present invention, the current acquisition unit includes: a transformer T2, a resistor R7, a diode D38, a resistor R10, a resistor R150 and a current information output terminal, wherein:
[0025] The input unit is connected to the Buck unit via the primary winding T2-A of the transformer T2;
[0026] The secondary winding T2-B of the transformer T2 is connected in parallel with the resistor R7, and one end of the secondary winding T2-B of the transformer T2 is connected to the current information output end through the anode and cathode of the diode D38 and the resistor R150 in sequence;
[0027] The other end of the secondary winding T2 -B of the transformer T2 is connected to the common end, and the cathode of the diode D38 is connected to the common end through the resistor R10 .
[0028] In a multi-output synchronous rectification topology circuit provided in one embodiment of the present invention, the first output end of the voltage divider unit is also connected to the second output end of the voltage divider unit through the reset winding T4-A of the transformer T4 and the diode D15 connected in series, and the second output end of the voltage divider unit is also connected to the common end through the reset winding T1-A of the transformer T1 and the diode D17 connected in series.
[0029] The technical solution disclosed in the present invention has at least the following beneficial effects:
[0030] The primary winding T4-B of the transformer T4 can be reset after each energy transmission through the winding T4-A and the diode D15, and the primary winding T1-B of the transformer T1 can be reset after each energy transmission through the reset winding T1-A and the diode D17, so as to avoid continuous excitation of the transformer T4 and the transformer T1, which may cause saturation of the primary winding T4-B and the primary winding T1-B.
[0031] In a multi-output synchronous rectification topology circuit provided in one embodiment of the present invention, the voltage dividing unit includes: capacitor C121, capacitor C21, resistor R34 and resistor R37, wherein:
[0032] One end of the capacitor C123 is connected to the other end of the capacitor C123 through the capacitor C121 and the capacitor C21 in sequence;
[0033] The resistor R34 is connected in parallel with the capacitor C121 , and the resistor R37 is connected in parallel with the capacitor C21 .
[0034] The technical solution disclosed in the present invention has at least the following beneficial effects:
[0035] The voltage of the capacitor C123 can be divided once by capacitor C121 and capacitor C21, and the voltage after the above-mentioned primary voltage division can be divided twice by resistor R34 and resistor R37, so that the voltage between the first output port and the second output port of this voltage dividing unit, that is, the voltage on the resistor R34, and the voltage from the second output port to the common end, that is, the voltage on the resistor R37, are more balanced.
[0036] At the same time, the resonance between the leakage inductance of transformer T1 and the voltage-dividing capacitor C21, as well as the resonance between the leakage inductance of transformer T4 and the voltage-dividing capacitor C121 can respectively reduce the voltage stress when the switch tube Q3 and the switch tube Q9 are turned on, further improving the overall efficiency of the product.
[0037] In a multi-output synchronous rectification topology circuit provided in one embodiment of the present invention, the circuit further includes a resistor R116, a capacitor C115, a resistor R35 and a capacitor C18, wherein:
[0038] One end of the primary winding T4-B of the transformer T4 is connected to the other end of the primary winding T4-B through a resistor R116 and a capacitor C115 connected in series;
[0039] One end of the primary winding T1 -B of the transformer T1 is connected to the other end of the primary winding T1 -B via a resistor R35 and a capacitor C18 connected in series.
[0040] The technical solution disclosed in the present invention has at least the following beneficial effects:
[0041] Through the above settings, the resistor R116 and the capacitor C115 can be used to absorb the leakage inductance energy of the primary winding T4-B of the transformer T4 and reduce the leakage inductance peak voltage; similarly, the resistor R35 and the capacitor C18 can be used to absorb the leakage inductance energy of the primary winding T1-B of the transformer T1 and reduce the leakage inductance peak voltage.
[0042] In a multi-output synchronous rectification topology circuit provided in one embodiment of the present invention, any of the output units further includes: a filter capacitor and a load resistor, wherein:
[0043] The two output ports located in the same output unit are connected via the filter capacitor and the load resistor respectively.
[0044] The technical solution disclosed in the present invention has at least the following beneficial effects:
[0045] The voltage signal output between the two output ports can be filtered by the filter capacitor, and the load resistor can provide a dummy load for the output side to avoid no-load on the output side. At the same time, one of the output switch tubes of each output unit is turned on or off synchronously with the switch tube Q3, and the other output switch tube in each output unit is turned on or off synchronously with the switch tube Q9. This synchronous rectification method can reduce the voltage drop of the rectification part, thereby reducing the influence of the voltage drop of the rectification part of the output unit on the output voltage.
[0046] The present invention further provides a power supply system, comprising a system body and a multi-channel output synchronous rectification topology circuit as described above. BRIEF DESCRIPTION OF THE DRAWINGS
[0047] Figure 1 The present invention is a specific circuit diagram of a synchronous rectification topology circuit with multiple outputs.
[0048] In the accompanying drawings, the components represented by the reference numerals are listed as follows:
[0049] S1, input module, S2, voltage divider unit, S3, output unit, S11, input unit, S12, current acquisition unit, S13, Buck unit. DETAILED DESCRIPTION
[0050] The principles and features of the present invention are described below. The examples given are only used to explain the present invention and are not used to limit the scope of the present invention.
[0051] The present invention provides a multi-channel synchronous rectification topology circuit, which is referred to herein as Figure 1 As shown, it includes: an input module S1, a switch tube Q9, a switch tube Q3, a voltage dividing unit S2, a transformer T4, a transformer T1 and a plurality of output units S3, wherein:
[0052] The input module S1 is connected to the input end of the voltage divider unit S2, the first output end of the voltage divider unit S2 is connected to the second output end of the voltage divider unit S2 through the primary winding T4-B of the transformer T4 and the switch tube Q9 in sequence, the second output end of the voltage divider unit S2 is connected to the common end through the primary winding T1-B of the transformer T1 and the switch tube Q3 in sequence, and the switch tube Q9 and the switch tube Q3 are configured to be alternately turned on or off;
[0053] Any of the output units S3 includes: a non-repeated secondary winding of the transformer T1, a non-repeated secondary winding of the transformer T4, two output switch tubes, and two output ports. The first end of the secondary winding of the transformer T1 is connected to one of the output ports through one of the output switch tubes, and the output switch tube and the switch tube Q3 are both controlled by an open-loop signal to be synchronously turned on or off. The second end of the secondary winding of the transformer T1 is connected to the other output port.
[0054] The first end of the secondary winding of the transformer T4 is connected to one of the output ports through another output switch tube. The output switch tube and the switch tube Q9 are both controlled by an open-loop signal to be turned on or off synchronously. The second end of the secondary winding of the transformer T4 is connected to another output port.
[0055] Through the above arrangement, when in use, the input voltage in the input module S1 is divided into a suitable voltage through the voltage dividing unit S2 and outputted to the primary winding T4-B of the transformer T4 and the primary winding T1-B of the transformer T1 respectively. At this time, since the switch tube Q9 and the switch tube Q3 work alternately at 180° under the open-loop signal, and the switch tube Q3 and one of the output switch tubes of each output unit S3 are synchronously turned on or off, and the switch tube Q9 and the other output switch tube in each output unit S3 are synchronously turned on or off, since each switch tube of this circuit is open-loop controlled, it will not be affected by the output feedback loop, so that the voltage on the transformer module can pass through the primary winding T1-B of the transformer T1 and the primary winding T4-B of the transformer T4, and almost 100% of the energy is transferred to the corresponding secondary winding. By controlling the alternate work of the switch tube Q9 and the switch tube Q3 through the open-loop control, the load cross-regulation rate of the output voltage of different output units S3 is improved, that is, the coupling degree is improved;
[0056] At the same time, when the transformer T4 of the present circuit is reset, the magnetic inductance Lm of the transformer T4 connected in series can resonate with the junction capacitance of the switch tube Q9, so that the switch tube Q9 and one of the output switch tubes in each of the output units S3 that is turned on synchronously with it are turned on and work in the ZCS mode, thereby reducing the current stress of the above-mentioned switches; similarly, when the transformer T1 is reset, the magnetic inductance Lm of the transformer T1 connected in series can resonate with the junction capacitance of the switch tube Q3, so that the switch tube Q3 and another output switch tube in each of the output units S3 that is turned on synchronously with it are turned on and work in the ZCS mode, thereby reducing the current stress of the above-mentioned switches. Thus, the overall working efficiency of the circuit is improved.
[0057] Specifically, the input module S1 includes: an input unit S11 and a Buck unit S13, wherein:
[0058] The input unit S11 is connected to the voltage dividing unit S2 via the Buck unit S13.
[0059] By adding a Buck unit S13 between the input unit S11 and the voltage divider unit S2, the influence of input changes on the output can be reduced under high voltage and wide range input conditions.
[0060] In this embodiment, the input unit S11 includes an input port VIN+, an input port GND, an inductor L2 and a capacitor C191;
[0061] The input module S1 further includes a current collection unit S12, and the input unit S11 is connected to the Buck unit S13 via the current collection unit S12 to collect current information between the input unit S11 and the Buck unit S13;
[0062] The duty cycle of the Buck unit S13 is adjusted in combination with the current information and the voltage information between two output ports in one of the output units S3.
[0063] The current acquisition unit S12 specifically includes a transformer T2, a resistor R7, a diode D38, a resistor R10, a resistor R150 and a current information output terminal, wherein:
[0064] The input port VIN+ of the input unit S11 is connected to one end of the primary winding T2-A of the transformer T2 through the inductor L2, and the other end of the primary winding T2-A of the transformer T2 is connected to the Buck unit S13;
[0065] The input port VIN+ of the input unit S11 is also connected to the input port GND via the inductor L2 and the capacitor C191. At this time, the inductor L2 and the capacitor C191 can be used to filter the input voltage between the input port VIN+ and the input port GND.
[0066] The secondary winding T2-B of the transformer T2 is connected in parallel with the resistor R7, and one end of the secondary winding T2-B of the transformer T2 is connected to the current information output end through the anode and cathode of the diode D38 and the resistor R150 in sequence; the current information output end is connected to the current information output end through the anode and cathode of the diode D38 and the resistor R150 in sequence; Figure 1 This is represented by port CS, which is connected to the pin of the corresponding control chip to input the current information to the control chip. The pin of the control chip is also connected to the output voltage of one of the output units S3 to collect the output voltage information of this circuit;
[0067] The other end of the secondary winding T2 -B of the transformer T2 is connected to the common end, and the cathode of the diode D38 is connected to the common end through the resistor R10 .
[0068] In this embodiment, the Buck unit S13 includes a switch tube Q2, an inductor L4, a diode D20 and a capacitor C123, wherein:
[0069] The input port VIN+ of the input unit S11 is connected to the primary winding T2-A of the transformer T2 and the drain of the switch tube Q2 in the Buck unit S13 in sequence through the inductor L2, and the source of the switch tube Q2 is connected to the first input end of the voltage divider unit S2 through the inductor L4;
[0070] The source of the switch tube Q2 is also connected to the cathode of the diode D2, and the anode of the diode D2 is respectively connected to the other end of the input unit S11, that is, the input port GND and the second input end of the voltage divider unit S2;
[0071] The first input end of the voltage dividing unit S2 is connected to the second input end of the voltage dividing unit S2 through the capacitor C123.
[0072] By collecting the current information between the input unit S11 and the Buck unit S13 and combining it with the voltage information between the two output ports in the output unit S3, feedback regulation can be formed for the control of the Buck unit S13 to reduce the impact of input changes on the output.
[0073] Specifically, the voltage divider unit S2 includes: a capacitor C121, a capacitor C21, a resistor R34 and a resistor R37, wherein the first input terminal of the voltage divider unit S2 is Figure 1 The capacitor C121 is located at the upper end, and the second input end of the voltage divider unit S2 is Figure 1 The middle capacitor 21 is located at the lower end;
[0074] One end of the capacitor C123 is connected to the other end of the capacitor C123 through the capacitor C121 and the capacitor C21 in sequence;
[0075] The resistor R34 is connected in parallel with the capacitor C121 , and the resistor R37 is connected in parallel with the capacitor C21 .
[0076] The voltage of the capacitor C123 can be divided once by capacitor C121 and capacitor C21, and the voltage after the above-mentioned primary voltage division can be divided twice by resistor R34 and resistor R37, so that the voltage between the first output port and the second output port of the voltage dividing unit S2, that is, the voltage on the resistor R34, and the voltage from the second output port to the common end, that is, the voltage on the resistor R37, are more balanced.
[0077] At the same time, the resonance between the leakage inductance of transformer T1 and the voltage-dividing capacitor C21, as well as the resonance between the leakage inductance of transformer T4 and the voltage-dividing capacitor C121 can respectively reduce the voltage stress when the switch tube Q3 and the switch tube Q9 are turned on, further improving the overall efficiency of the product.
[0078] Specifically, the first output terminal of the voltage dividing unit S2 is Figure 1 The resistor R34 is located at the upper end, and the second output end of the voltage divider unit S2 is Figure 1 The first output end of the voltage divider unit S2, at one end where the resistor R34 and the resistor R37 are connected, is also connected to the second output end of the voltage divider unit S2 through the reset winding T4-A of the transformer T4 and the diode D15 connected in series, and the second output end of the voltage divider unit S2 is also connected to the common end through the reset winding T1-A of the transformer T1 and the diode D17 connected in series.
[0079] The primary winding T4-B of the transformer T4 can be reset after each energy transmission through the winding T4-A and the diode D15, and the primary winding T1-B of the transformer T1 can be reset after each energy transmission through the reset winding T1-A and the diode D17, so as to avoid continuous excitation of the transformer T4 and the transformer T1, which may cause saturation of the primary winding T4-B and the primary winding T1-B.
[0080] Specifically, the circuit further includes a resistor R116, a capacitor C115, a resistor R35 and a capacitor C18, wherein:
[0081] One end of the primary winding T4-B of the transformer T4 is connected to the other end of the primary winding T4-B through a resistor R116 and a capacitor C115 connected in series;
[0082] One end of the primary winding T1 -B of the transformer T1 is connected to the other end of the primary winding T1 -B via a resistor R35 and a capacitor C18 connected in series.
[0083] Through the above settings, the resistor R116 and the capacitor C115 can be used to absorb the leakage inductance energy of the primary winding T4-B of the transformer T4 and reduce the leakage inductance peak voltage; similarly, the resistor R35 and the capacitor C18 can be used to absorb the leakage inductance energy of the primary winding T1-B of the transformer T1 and reduce the leakage inductance peak voltage.
[0084] Specifically, any of the output units S3 further includes: a filter capacitor and a load resistor, wherein:
[0085] The two output ports located in the same output unit S3 are connected via the filter capacitor and the load resistor respectively.
[0086] The voltage signal output between the two output ports can be filtered by the filter capacitor, and the load resistor can provide a dummy load for the output side to avoid no-load on the output side. At the same time, one of the output switch tubes of each output unit S3 is turned on or off synchronously with the switch tube Q3, and the other output switch tube in each output unit S3 is turned on or off synchronously with the switch tube Q9. This synchronous rectification method can reduce the voltage drop of the rectification part, thereby reducing the influence of the voltage drop of the rectification part of the output unit S3 on the output voltage.
[0087] It should be understood that in the present invention, each switch tube is a MOS tube. In order to protect the MOS tube and provide a bias for the GS voltage of the MOS tube, a resistor R132 is connected between the source and the gate of the switch tube Q2, a resistor R123 is connected between the source and the gate of the switch tube Q9, and a resistor R36 is connected between the source and the gate of the switch tube Q3.
[0088] In one embodiment, the number of the output unit S3 is one. Figure 1 The output unit S3 located in the upper right corner is the output unit S3 in this embodiment and is used as an example for schematic description;
[0089] The output unit S3 includes: a secondary winding T4-C of a transformer T4, a secondary winding T1-C of a transformer T1, a MOS tube Q10, a resistor R20, a MOS tube Q12, a resistor R19, a filter capacitor C11, a load resistor R23, an output port VO1 and an output port AGND, wherein:
[0090] One end of the secondary winding T4-C of the transformer T4 is connected to the output port AGND through the MOS tube Q10, the other end of the secondary winding T4-C of the transformer T4 is connected to one end of the secondary winding T1-C of the transformer T1, the other end of the secondary winding T1-C of the transformer T1 is connected to the output port AGND through the MOS tube Q12, one end of the secondary winding T4-C of the transformer T4 is also connected to the port VO1, and a filter capacitor C11 and a load resistor R23 are connected between the output port VO1 and the output port AGND;
[0091] At the same time, the gate open-loop signal HO of the switch tube Q9 and the gate open-loop signal PUSH2 of the mos tube Q10 are turned on or off synchronously, and the gate open-loop signal LO of the control switch tube Q3 and the gate open-loop signal PULL2 of the mos tube Q12 are turned on or off synchronously, and the open-loop signal HO and the open-loop signal LO work alternately at 180°, and their respective duty cycles are 50%.
[0092] In another embodiment, the number of the output units S3 is two. Figure 1 The output unit S3 located at the upper right and the output unit S3 located at the lower right are two output units S3 in this embodiment and are schematically described as an example;
[0093] One of the output units S3 includes: a secondary winding T4-C of a transformer T4, a secondary winding T1-C of a transformer T1, a MOS tube Q10, a resistor R20, a MOS tube Q12, a resistor R19, a filter capacitor C11, a load resistor R23, an output port VO1 and an output port AGND, wherein:
[0094] One end of the secondary winding T4-C of the transformer T4 is connected to the output port AGND through the MOS tube Q10, the other end of the secondary winding T4-C of the transformer T4 is connected to one end of the secondary winding T1-C of the transformer T1, the other end of the secondary winding T1-C of the transformer T1 is connected to the port AGND through the MOS tube Q12, one end of the secondary winding T4-C of the transformer T4 is also connected to the output port VO1, and a filter capacitor C11 and a load resistor R23 are connected between the output port VO1 and the output port AGND;
[0095] Another output unit S3 includes: a secondary winding T4-D of a transformer T4, a secondary winding T1-D of a transformer T1, a MOS tube Q5, a resistor R38, a MOS tube Q7, a resistor R39, a filter capacitor C8, a load resistor R48, an output port VO2 and an output port AGND, wherein:
[0096] One end of the secondary winding T4-D of the transformer T4 is connected to the output port VO2 through the MOS tube Q5, the other end of the secondary winding T4-D of the transformer T4 is connected to one end of the secondary winding T1-D of the transformer T1, the other end of the secondary winding T1-D of the transformer T1 is connected to the output port VO2 through the MOS tube Q7, one end of the secondary winding T4-D of the transformer T4 is also connected to the output port GAND, and a filter capacitor C8 and a load resistor R48 are connected between the output port VO1 and the output port AGND;
[0097] At the same time, the gate open-loop signal HO of the switch tube Q9, the gate open-loop signal PUSH2 of the mos tube Q10 and the gate open-loop signal PUSH3 of the mos tube Q5 are turned on or off synchronously, and the gate open-loop signal LO of the switch tube Q3, the gate open-loop signal PULL2 of the switch tube Q12 and the gate open-loop signal PULL3 of the switch tube Q7 are controlled to be turned on or off synchronously, and the open-loop signal HO and the open-loop signal LO work alternately at 180°, and their respective duty cycles are 50%.
[0098] Of course, the number of the output units S3 can be 3 or more, and in this case, only corresponding components and the corresponding secondary windings of the transformer T4 and the secondary windings of the transformer T1 need to be added.
[0099] After adopting the above solution:
[0100] When in use, the input voltage of the input unit S11 is adjusted by the Buck unit S13 and then output to the voltage divider unit S2, so as to divide the input voltage into a suitable voltage and output it to the primary winding T4-B of the transformer T4 and the primary winding T1-B of the transformer T1 respectively. At this time, since the switch tube Q9 and the switch tube Q3 work alternately at 180 degrees under the open-loop signal HO and the open-loop signal LO respectively, and the switch tube Q3 and one of the output switch tubes of each output unit S3 are synchronously turned on or off, the switch tube Q9 and each Another output switch tube in each output unit S3 is turned on or off synchronously. Since each switch tube in this circuit is open-loop controlled, it will not be affected by the output feedback loop, so that the voltage on the transformer module can pass through the primary winding T1-B of the transformer T1 and the primary winding T4-B of the transformer T4, and almost 100% of the energy is transferred to the corresponding secondary winding. By alternately controlling the operation of the switch tube Q9 and the switch tube Q3 through the open-loop control, the load cross-regulation rate of the output voltage of different output units S3 is improved, that is, the coupling degree is improved;
[0101] At the same time, when the transformer T4 of the present circuit is reset by using the reset winding T4-A of the transformer T4 and the diode D15, the magnetic inductance Lm of the series-connected transformer T4 can resonate with the junction capacitance of the switch tube Q9, so that the switch tube Q9 and the MOSFET Q10 and the MOSFET Q5 are all turned on and work in the ZCS mode, thereby reducing the current stress of the above-mentioned switch tubes; similarly, when the transformer T1 of the present circuit is reset by using the reset winding T1-A of the transformer T1 and the diode D17, the magnetic inductance Lm of the series-connected transformer T1 can resonate with the junction capacitance of the switch tube Q3, so that the switch tube Q3 and the MOSFET Q12 and the MOSFET Q7 are all turned on and work in the ZCS mode, thereby reducing the current stress of the above-mentioned switch tubes, thereby improving the overall working efficiency of the circuit.
[0102] When two output units S3 are used, the present invention can realize a product with positive and negative output for high voltage wide range input (155V-475V).
[0103] The present invention has the following beneficial effects: the front-stage topology of the present invention adopts the Buck unit S13, which can reduce the influence of input changes on the output under high-voltage and wide-range input conditions; the back-stage topology adopts the open-loop series forward topology to improve the coupling degree between multiple outputs; the output MOS tubes of the output unit S3 of the present invention and the switch tubes Q3 and Q9 adopt a synchronous rectification method, which reduces the influence of the voltage drop of the output rectification part on the output voltage; the circuit can make all the switch tubes of the series forward topology turned on and work in the ZCS mode, reducing the current stress of the switch tube; at the same time, the resonance of the leakage inductance of the series forward transformer and the corresponding voltage-dividing capacitor reduces the voltage stress of the switch tube Q3 and the switch tube Q9 when they are turned on, further improving the overall efficiency of the product.
[0104] The present invention further provides a power supply system, comprising a system body and a multi-channel output synchronous rectification topology circuit as described above.
[0105] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.
[0106] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0107] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.
[0108] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.
Claims
1. A multi-output synchronous rectification topology circuit, characterized in that: include: An input module (S1), a switch tube Q9, a switch tube Q3, a voltage dividing unit (S2), a transformer T4, a transformer T1 and a plurality of output units (S3), wherein: The input module (S1) is connected to the input end of the voltage divider unit (S2); the first output end of the voltage divider unit (S2) is connected to the second output end of the voltage divider unit (S2) through the primary winding T4-B of the transformer T4 and the switch tube Q9 in sequence; the second output end of the voltage divider unit (S2) is connected to the common end through the primary winding T1-B of the transformer T1 and the switch tube Q3 in sequence; the switch tube Q9 and the switch tube Q3 are configured to be alternately turned on or off; Any of the output units (S3) comprises: a non-repeating secondary winding of the transformer T1, a non-repeating secondary winding of the transformer T4, two output switch tubes, and two output ports, wherein the first end of the secondary winding of the transformer T1 is connected to one of the output ports via one of the output switch tubes, the output switch tube and the switch tube Q3 are both controlled by an open-loop signal to be synchronously turned on or off, and the second end of the secondary winding of the transformer T1 is connected to the other output port; The first end of the secondary winding of the transformer T4 is connected to one of the output ports through another output switch tube. The output switch tube and the switch tube Q9 are both controlled by an open-loop signal to be turned on or off synchronously. The second end of the secondary winding of the transformer T4 is connected to another output port.
2. A multi-output synchronous rectification topology circuit according to claim 1, characterized in that: The input module (S1) comprises: an input unit (S11) and a Buck unit (S13), wherein: The input unit (S11) is connected to the voltage dividing unit (S2) via the Buck unit (S13).
3. A multi-output synchronous rectification topology circuit according to claim 2, characterized in that: The Buck unit (S13) includes a switch tube Q2, an inductor L4, a diode D20 and a capacitor C123, wherein: One end of the input unit (S11) is connected to the first input end of the voltage dividing unit (S2) through the drain and source of the switch tube Q2 and the inductor L4 in sequence; The source of the switch tube Q2 is connected to the cathode of the diode D2, and the anode of the diode D2 is connected to the other end of the input unit (S11) and the second input end of the voltage dividing unit (S2) respectively; The first input end of the voltage dividing unit (S2) is connected to the second input end of the voltage dividing unit (S2) through the capacitor C123.
4. A multi-output synchronous rectification topology circuit according to claim 2, characterized in that: The input module (S1) further comprises a current collection unit (S12), and the input unit (S11) is connected to the Buck unit (S13) via the current collection unit (S12) to collect current information between the input unit (S11) and the Buck unit (S13); The duty cycle of the Buck unit (S13) is adjusted based on the current information and the voltage information between two output ports in one of the output units (S3).
5. A multi-output synchronous rectification topology circuit according to claim 4, characterized in that: The current acquisition unit (S12) includes: a transformer T2, a resistor R7, a diode D38, a resistor R10, a resistor R150 and a current information output terminal, wherein: The input unit (S11) is connected to the Buck unit (S13) via the primary winding T2-A of the transformer T2; The secondary winding T2-B of the transformer T2 is connected in parallel with the resistor R7, and one end of the secondary winding T2-B of the transformer T2 is connected to the current information output end through the anode and cathode of the diode D38 and the resistor R150 in sequence; The other end of the secondary winding T2 -B of the transformer T2 is connected to the common end, and the cathode of the diode D38 is connected to the common end through the resistor R10 .
6. A multi-output synchronous rectification topology circuit according to claim 3, characterized in that: The first output end of the voltage divider unit (S2) is also connected to the second output end of the voltage divider unit (S2) through the reset winding T4-A of the transformer T4 and the diode D15 connected in series, and the second output end of the voltage divider unit (S2) is also connected to the common end through the reset winding T1-A of the transformer T1 and the diode D17 connected in series.
7. A multi-output synchronous rectification topology circuit according to claim 6, characterized in that: The voltage dividing unit (S2) includes: capacitor C121, capacitor C21, resistor R34 and resistor R37, wherein: One end of the capacitor C123 is connected to the other end of the capacitor C123 through the capacitor C121 and the capacitor C21 in sequence; The resistor R34 is connected in parallel with the capacitor C121 , and the resistor R37 is connected in parallel with the capacitor C21 .
8. The multi-output synchronous rectification topology circuit according to claim 6, characterized in that: The circuit further includes a resistor R116, a capacitor C115, a resistor R35 and a capacitor C18, wherein: One end of the primary winding T4-B of the transformer T4 is connected to the other end of the primary winding T4-B through a resistor R116 and a capacitor C115 connected in series; One end of the primary winding T1 -B of the transformer T1 is connected to the other end of the primary winding T1 -B via a resistor R35 and a capacitor C18 connected in series.
9. The multi-output synchronous rectification topology circuit according to claim 6, characterized in that: Any of the output units (S3) further comprises: a filter capacitor and a load resistor, wherein: The two output ports located in the same output unit (S3) are connected via the filter capacitor and the load resistor respectively.
10. A power supply system, characterized in that: The invention comprises a system body and a multi-output synchronous rectification topology circuit as claimed in any one of claims 1 to 9.
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