Universal output interface circuit, circuit board and electronic equipment

Abstract

The invention relates to the field of control circuits, and discloses a universal output interface circuit, a circuit board and electronic equipment, the universal output interface circuit comprises a first-stage switch tube and a second-stage switch tube, the first-stage switch tube is electrically connected with the second-stage switch tube; wherein the first-stage switching tube is used for receiving a control signal of a controller, and the second-stage switching tube is used for outputting a level state of the universal output interface circuit; and the first-stage switching tube controls the on or off of the second-stage switching tube according to a control signal of a controller, so that the second-stage switching tube outputs the level state of the universal output interface circuit. Therefore, the general output interface circuit is simple in structure and can have relatively high power output while outputting a level signal, and the driving capability of the general output interface circuit is improved; moreover, the output state of the interface is stable, the interface is not in an uncertain level state, the misoperation of the load is prevented, and the reliability of the universal output interface circuit is improved.

Description

[Technical field]

[0001] The present invention relates to the field of control circuits, and in particular to a universal output interface circuit, a circuit board and electronic equipment. [Background technology]

[0002] In the prior art, the driving capability of the general digital output interface circuit is relatively weak, and the protection capability is also relatively weak. When the driving capability of the general digital output interface circuit is relatively weak, it is impossible to drive the load with specific power requirements to meet the specific needs in the industrial scene.

[0003] In order to achieve a load with a certain power, a driving circuit is often added to the digital output interface circuit in the prior art. However, this method not only increases the space occupancy rate, but also increases the complexity of circuit design. [Summary of the invention]

[0004] The embodiments of the present invention aim to provide a universal output interface circuit, a circuit board and an electronic device, aiming to solve the problems of large space occupancy, complex circuit design and reduced circuit reliability of the current universal digital output interface circuit.

[0005] In order to solve the above technical problems, a first aspect of the present invention provides a universal output interface circuit, which includes: a first-stage switch tube and a second-stage switch tube, the first-stage switch tube includes a first switch tube and a second switch tube, and the second-stage switch tube includes a third switch tube and a fourth switch tube; the first switch tube is electrically connected to the third switch tube, the second switch tube is electrically connected to the fourth switch tube, and the third switch tube is electrically connected to the fourth switch tube;

[0006] The gate of the first switch tube is electrically connected to the control signal terminal of the controller through the first voltage divider circuit and the fourth resistor, the drain of the first switch tube is electrically connected to the interface power supply terminal through the second voltage divider circuit, and the source of the first switch tube is grounded;

[0007] The gate of the second switch tube is electrically connected to the gate of the first switch tube, and the gate of the second switch tube is electrically connected to the control signal terminal of the controller through the first voltage divider circuit and the fourth resistor, the drain of the second switch tube is electrically connected to the interface power supply terminal through the fifth resistor and the sixth resistor, and the source of the second switch tube is grounded;

[0008] The gate of the fourth switch tube is electrically connected to the drain of the second switch tube through the sixth resistor, the source of the fourth switch tube is electrically connected to the interface power supply terminal, and the source of the fourth switch tube is electrically connected to the gate of the fourth switch tube through the fifth resistor;

[0009] The gate of the third switch tube is electrically connected to the drain of the first switch tube, and the gate of the third switch tube is grounded through the second capacitor, the source of the third switch tube is grounded, and the drain of the third switch tube is electrically connected to the drain of the fourth switch tube to serve as the output end of the universal output interface circuit. The output end of the universal output interface circuit outputs different level states depending on the control signal.

[0010] Optionally, the first voltage divider circuit includes a third resistor and a seventh resistor, the first end of the seventh resistor is electrically connected to the reference power supply end, the second end of the seventh resistor is connected in series with the first end of the third resistor, the second end of the third resistor is grounded, and the series connection ends of the third resistor and the seventh resistor are electrically connected to the gate of the first switching tube and the gate of the second switching tube respectively.

[0011] Optionally, the second voltage divider circuit includes a first resistor and a second resistor, the first end of the first resistor is electrically connected to the interface power supply end, the second end of the first resistor is connected in series with the first end of the second resistor, the second end of the second resistor is grounded, and the series connection ends of the first resistor and the second resistor are electrically connected to the drain of the first switching tube and the gate of the third switching tube respectively.

[0012] Optionally, the universal output interface circuit further includes an overcurrent protection element, and the overcurrent protection element is electrically connected to the output end of the universal output interface circuit.

[0013] Optionally, the universal output interface circuit further includes at least one magnetic bead, which is electrically connected between the interface power supply terminal and the external power supply terminal.

[0014] Optionally, the universal output interface circuit further includes an output slow-start circuit, and the output slow-start circuit is electrically connected to the second switch tube and the fourth switch tube respectively.

[0015] Optionally, the output slow-start circuit includes a first capacitor, a first end of the first capacitor is electrically connected to the interface power supply end, a second end of the first capacitor is electrically connected to the drain of the second switch tube through a sixth resistor, and a second end of the first capacitor is electrically connected to the gate of the fourth switch tube.

[0016] Optionally, the universal output interface circuit further includes a surge and electrostatic protection element, and the surge and electrostatic protection element is electrically connected to the output end of the universal output interface circuit.

[0017] Correspondingly, a second aspect of the present invention provides a circuit board, which includes the universal output interface circuit and the controller described in the first aspect of the present invention, and the universal output interface circuit outputs a level state according to a control signal of the controller.

[0018] Correspondingly, a third aspect of the present invention provides an electronic device, which includes the universal output interface circuit described in the first aspect of the present invention, or includes the circuit board described in the second aspect of the present invention.

[0019] A universal output interface circuit, a circuit board and an electronic device provided in an embodiment of the present invention. The universal output interface circuit includes a first-stage switch tube and a second-stage switch tube, and the first-stage switch tube is electrically connected to the second-stage switch tube; wherein the first-stage switch tube includes a first switch tube and a second switch tube, and the second-stage switch tube includes a third switch tube and a fourth switch tube; the first switch tube is electrically connected to the third switch tube, the second switch tube is electrically connected to the fourth switch tube, and the third switch tube is electrically connected to the fourth switch tube. The gate of the first switch tube is electrically connected to the control signal end of the controller through the first voltage divider circuit and the fourth resistor, the drain of the first switch tube is electrically connected to the interface power supply end through the second voltage divider circuit, and the source of the first switch tube is grounded. The gate of the second switch tube is electrically connected to the gate of the first switch tube, and the gate of the second switch tube is electrically connected to the control signal end of the controller through the first voltage divider circuit and the fourth resistor, the drain of the second switch tube is electrically connected to the interface power supply end through the fifth resistor and the sixth resistor, and the source of the second switch tube is grounded. The gate of the fourth switch tube is electrically connected to the drain of the second switch tube through the sixth resistor, the source of the fourth switch tube is electrically connected to the interface power supply terminal, and the source of the fourth switch tube is electrically connected to the gate of the fourth switch tube through the fifth resistor. The gate of the third switch tube is electrically connected to the drain of the first switch tube, and the gate of the third switch tube is grounded through the second capacitor, the source of the third switch tube is grounded, and the drain of the third switch tube is electrically connected to the drain of the fourth switch tube as the output end of the universal output interface circuit; the output end of the universal output interface circuit outputs different level states as the control signal is different. It can be seen that the first-stage switch tube in the embodiment of the present invention can receive the control signal of the controller, so that according to the above-mentioned circuit connection relationship and the performance of each switch tube, the second-stage switch tube outputs different level states under different control signals. In this way, no matter what driving capability the external device requires, it can be achieved by controlling the second-stage switch tube. Compared with the prior art, the universal output interface circuit provided in the embodiment of the present invention does not require an additional driving circuit, has a simple structure, low space occupancy, and has a strong power output. It can improve the driving capability of the universal output interface circuit and can be used as a power interface driving load.

Brief Description of the Drawings

[0020] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0021] Figure 1 It is a structural schematic diagram of a universal output interface circuit provided by the present invention;

[0022] Figure 2 is another structural schematic diagram of a universal output interface circuit provided by the present invention;

[0023] Figure 3 It is a circuit diagram of a universal output interface circuit provided by the present invention;

[0024] Figure 4 It is a circuit diagram of an interface power supply end in a universal output interface circuit provided by the present invention;

[0025] Figure 5 It is a structural schematic diagram of a circuit board provided by the present invention;

[0026] Figure 6 It is a structural schematic diagram of an electronic device provided by the present invention;

[0027] Figure 7 It is another structural schematic diagram of an electronic device provided by the present invention.

[0028] Description of main component symbols:

[0029] Universal output interface circuit 1 First stage switch tube 11

[0030] The second stage switch tube 12 The first switch tube Q1

[0031] The second switch tube Q2 The third switch tube Q3

[0032] The fourth switch tube Q4 The first resistor R1

[0033] The second resistor R2 The third resistor R3

[0034] Fourth resistor R4 Fifth resistor R5

[0035] Sixth resistor R6 First capacitor C1

[0036] The second capacitor C2 and the third capacitor C3

[0037] Fourth capacitor C4 Fifth capacitor C5

[0038] First voltage divider circuit 13 Seventh resistor R7

[0039] Second voltage divider circuit 13 Overcurrent protection element 14

[0040] Self-recovery fuse FDO2 magnetic bead 15

[0041] First magnetic bead PDL1 Second magnetic bead PDL2

[0042] Output slow start circuit 16 TVS tube D1

[0043] Surge and electrostatic protection components 17 Circuit board 10

[0044] Electronic devices 100 [Specific implementation method]

[0045] In order to facilitate the understanding of the present invention, the present invention is described in more detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that when an element is described as "fixed to" another element, it can be directly on another element, or there can be one or more centered elements therebetween. When an element is described as "electrically connected" to another element, it can be directly connected to another element, or there can be one or more centered elements therebetween. The orientation or positional relationship indicated by the terms "upper", "lower", "inner", "outer", "bottom" and the like used in this specification is based on the orientation or positional relationship shown in the accompanying drawings, only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present invention. In addition, the terms "first", "second", "third" and the like are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0046] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used in this specification includes any and all combinations of one or more of the related listed items.

[0047] In addition, the technical features involved in different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0048] In the existing technical solutions, in order to be able to carry loads with specific power requirements, it is often necessary to add an additional driving circuit to the universal output interface circuit, which increases the complexity of the universal output interface circuit, reduces the reliability of the universal output interface circuit, and increases the space occupied by the universal output interface.

[0049] To this end, the present embodiment provides a universal output interface circuit, which does not require an additional driving circuit for a load that can carry specific power requirements. The circuit structure is simple, and the driving capability of the universal output interface circuit can be improved. The reliability of the universal output interface circuit can be improved, and the requirements for driving loads with specific power requirements can be met to meet specific needs in industrial scenarios.

[0050] In one embodiment, Figure 1 As shown, the present invention provides a universal output interface circuit, which includes: a first-stage switch tube 11 and a second-stage switch tube 12, wherein the first-stage switch tube 11 is electrically connected to the second-stage switch tube 12; wherein the first-stage switch tube 11 is used to receive a control signal from a controller, and the second-stage switch tube 12 is used to output the level state of the universal output interface circuit; the first-stage switch tube 11 controls the conduction or cutoff of the second-stage switch tube 12 according to the control signal from the controller, so that the second-stage switch tube 12 outputs the level state of the universal output interface circuit.

[0051] Specifically, Figure 2 As shown, the first-stage switch tube 11 includes a first switch tube Q1 and a second switch tube Q2, and the second-stage switch tube 12 includes a third switch tube Q3 and a fourth switch tube Q4; the first switch tube Q1 is electrically connected to the third switch tube Q3, the second switch tube Q2 is electrically connected to the fourth switch tube Q4, and the third switch tube Q3 is electrically connected to the fourth switch tube Q4.

[0052] As an example, the first switch tube Q1, the second switch tube Q2, the third switch tube Q3 and the fourth switch tube Q4 are MOS tubes.

[0053] like Figure 3 As shown, the gate of the first switch tube Q1 is electrically connected to the control signal terminal CPU_DOUT of the controller through the first voltage divider circuit 18 and the fourth resistor R4, the drain of the first switch tube Q1 is electrically connected to the interface power supply terminal DOUT_24V through the second voltage divider circuit, and the source of the first switch tube Q1 is grounded.

[0054] The gate of the second switch tube Q2 is electrically connected to the gate of the first switch tube Q1, and the gate of the second switch tube Q2 is electrically connected to the control signal terminal CPU_DOUT of the controller through the first voltage divider circuit 18 and the fourth resistor R4, the drain of the second switch tube Q2 is electrically connected to the interface power supply terminal DOUT_24V through the fifth resistor R5 and the sixth resistor R6, and the source of the second switch tube Q2 is grounded.

[0055] The gate of the fourth switch tube Q4 is electrically connected to the drain of the second switch tube Q2 through the sixth resistor R6, the source of the fourth switch tube Q4 is electrically connected to the interface power supply terminal DOUT_24V, and the source of the fourth switch tube Q4 is electrically connected to the gate of the fourth switch tube Q4 through the fifth resistor R5, and the source of the fourth switch tube Q4 is grounded through the fifth capacitor C5.

[0056] The gate of the third switch tube Q3 is electrically connected to the drain of the first switch tube Q1, and the gate of the third switch tube Q3 is grounded through the second capacitor C2. The source of the third switch tube Q3 is grounded. The drain of the third switch tube Q3 is electrically connected to the drain of the fourth switch tube Q4 to serve as the output terminal DOUT of the universal output interface circuit 1, and output the level state of the universal output interface circuit 1.

[0057] Among them, the first voltage divider circuit 18 includes a third resistor R3 and a seventh resistor R7, the first end of the seventh resistor R7 is electrically connected to the reference power supply terminal 3D3V_S5, the second end of the seventh resistor R7 is connected in series with the first end of the third resistor R3, the second end of the third resistor R3 is grounded, and the series connection ends of the third resistor R3 and the seventh resistor R7 are electrically connected to the gate of the first switch tube Q1 and the gate of the second switch tube Q2 respectively.

[0058] The second voltage divider circuit 13 includes a first resistor R1 and a second resistor R2, wherein a first end of the first resistor R1 is electrically connected to the interface power supply end DOUT_24V, a second end of the first resistor R1 is connected in series to a first end of the second resistor R2, a second end of the second resistor R2 is grounded, and a series connection end of the first resistor R1 and the second resistor R2 is electrically connected to a drain of the first switch tube Q1 and a gate of the third switch tube Q3, respectively.

[0059] For example, the first switch tube Q1 is an NMOS tube, the second switch tube Q2 is an NMOS tube, the third switch tube Q3 is an NMOS tube, and the fourth switch tube Q4 is a PMOS tube.

[0060] In this embodiment, the first-stage switch tube 11 controls the on or off state of the second-stage switch tube 12 according to the control signal of the controller, so that the second-stage switch tube 12 outputs the level state of the universal output interface circuit.

[0061] Specifically, when the electronic device containing the universal output interface circuit 1 is connected to the power supply but the electronic device has not been turned on, the control signal CPU_DOUT of the controller is in a high impedance state. At this time, under the action of the third resistor R3 being pulled down to the ground, the gate-source (GS) voltage difference of the first switch tube Q1 is 0, so that the first switch tube Q1 is in the off state, and the gate-source (GS) voltage difference of the second switch tube Q2 is 0, so that the second switch tube Q2 is in the off state, that is, the first-stage switch tube 11 is in the off state. At this time, after the 24V voltage of the interface power supply terminal DOUT_24V is divided by the second voltage divider circuit 13, the gate-source (GS) voltage difference of the third switch tube Q3 reaches the saturated conduction condition, so that the third switch tube Q3 is in the on state, and the output terminal DOUT of the universal output interface circuit 1 is shorted to the ground. And because the second switch tube Q2 is in the off state, the gate-source (GS) voltage difference of the fourth switch tube Q4 is 0, so that the fourth switch tube Q4 is in the off state. Therefore, when the electronic device is connected to a power source but is not turned on, the voltage outputted by the output terminal DOUT of the universal output interface circuit 1 is 0V relative to the ground, so as to prevent the output voltage of the output terminal DOUT of the universal output interface circuit 1 from being in an unknown state when the electronic device is not turned on, thereby causing malfunction.

[0062] When the electronic device containing the universal output interface circuit 1 is connected to the power supply and the electronic device is turned on, when the control signal CPU_DOUT of the controller is at a high level, the first switch tube Q1 and the second switch tube Q2 are in the on state. At this time, the gate G of the third switch tube Q3 is pulled down to the ground due to the conduction of the first switch tube Q1, and the gate-source (GS) voltage difference is 0, so that the third switch tube Q3 is in the off state. The gate G of the fourth switch tube Q4 is pulled down to the ground due to the conduction of the second switch tube Q2, and the gate-source (GS) voltage difference reaches the saturated conduction condition, so that the fourth switch tube Q4 is in the on state, so that the 24V voltage of the interface power supply terminal DOUT_24V reaches the output terminal DOUT of the universal output interface circuit 1 through the fourth switch tube Q4 to output a high level to the load, so that a large current can be output to power the load.

[0063] When the electronic device containing the universal output interface circuit 1 is connected to the power supply and the electronic device is turned on, when the control signal CPU_DOUT of the controller is at a low level, the first switch tube Q1 and the second switch tube Q2 are in the cut-off state. At this time, after the 24V voltage of the interface power supply terminal DOUT_24V is divided by the second voltage divider circuit 13, the gate-source (GS) voltage difference of the third switch tube Q3 reaches the saturation conduction condition, so that the third switch tube Q3 is in the ground conduction state. The gate G of the fourth switch tube Q4 is pulled up to the same voltage as the source S by the 24V voltage of the interface power supply terminal DOUT_24V, and the gate-source (GS) voltage difference is 0V, so that the fourth switch tube Q4 is in the cut-off state, so that the output terminal DOUT of the universal output interface circuit 1 outputs 0V to the ground.

[0064] Therefore, by setting the first switch tube Q1 and the second switch tube Q2 as the first-stage switch tube 11 in the universal output interface circuit 1, and setting the third switch tube Q3 and the fourth switch tube Q4 as the second-stage switch tube 12, after the electronic device containing the universal output interface circuit 1 is connected to the power supply and the electronic device is turned on, the states of the first switch tube Q1 and the second switch tube Q2 in the first-stage switch tube 11 can be controlled by the control signal CPU_DOUT of the controller to indirectly control the conduction or cutoff of the third switch tube Q3 and the fourth switch tube Q4 in the second-stage switch tube 12, thereby achieving the purpose of controlling the output end DOUT of the universal output interface circuit 1.

[0065] Combined with the above description, it can be seen that the universal output interface circuit 1 provided in the embodiment of the present invention can output a 0V voltage or a 24V high voltage when the control signal is at different levels. In this way, no matter which power load the universal output interface circuit needs to carry, the universal output interface circuit can complete the output of the corresponding function by adjusting the control signal. Compared with the prior art, the circuit structure provided in the embodiment of the present invention is simple, and it can have a strong power output while outputting a level signal, which can improve the driving ability of the universal output interface circuit and can be used as a power interface to drive the load; and the interface output state is stable, and the interface will not be in an uncertain level state at any time, which prevents malfunction of the load and improves the reliability of the universal output interface circuit.

[0066] In addition, the universal output interface circuit 1 uses resistors, capacitors, and MOS tubes commonly used in the industry, with obvious cost advantages; and the number of components is small, the selected components are highly integrated and small in size, and the circuit structure is simple, which reduces the complexity of the circuit, so that the overall circuit of the universal output interface circuit 1 occupies a small PCB space, thereby improving the reliability of the universal output interface circuit.

[0067] In one embodiment, Figure 2As shown, the universal output interface circuit 1 further includes an overcurrent protection element 14 , and the overcurrent protection element 14 is electrically connected to the output terminal DOUT of the universal output interface circuit 1 .

[0068] For example, Figure 3 As shown, the over-current protection element 14 includes a resettable fuse FDO2 , and the resettable fuse FDO2 is electrically connected to the output terminal DOUT of the universal output interface circuit 1 .

[0069] The output terminal DOUT of the universal output interface circuit 1 outputs a high level equal to DOUT_24V, which can be modified to a suitable voltage according to actual conditions. The maximum drive current is determined by the overcurrent capacity of the fourth switch tube Q4 and the overcurrent protection element 14. The actual output current is determined by the load. The fourth switch tube Q4 with a stronger overcurrent capacity can be selected according to actual conditions to achieve a stronger drive capacity. At the same time, the parameter specifications of the overcurrent protection element 14 (such as a resettable fuse) can also be selected according to actual conditions.

[0070] In this embodiment, by connecting an overcurrent protection element in series at the output end of the universal output interface circuit, the internal part of the universal output interface circuit is protected. When a load fault causes the universal output interface circuit to be disconnected or the current exceeds the setting value of the overcurrent protection element (such as a resettable fuse), the overcurrent protection element will be in a high-resistance (open circuit) state, disconnecting the internal circuit of the universal output interface circuit from the external load and stopping the output, thereby achieving the purpose of protecting the universal output interface circuit and the external load from overload and burnout. When the fault is eliminated, the overcurrent protection element is restored to a low-resistance (conduction) state without manual replacement. Thus, the universal output interface circuit has the function of overcurrent protection (self-recovery after the fault is eliminated), and the added overcurrent protection element consumes very low power of the power supply. The overcurrent protection element basically consumes no power when working normally, and basically does not affect the efficiency and standby power consumption of the power supply, saving electric energy and being environmentally friendly. It can solve the problem that the current universal output interface circuit needs to add a special protection mechanism in order to enhance the interface protection function, which causes high cost and complexity, reduces the reliability of the universal output interface circuit, and increases the PCB space occupied by the overall circuit of the universal output interface circuit.

[0071] In one embodiment, Figure 2 As shown, the universal output interface circuit 1 further includes at least one magnetic bead 15 , and the magnetic bead 15 is electrically connected between the interface power supply terminal DOUT_24V and the external power supply terminal DC_IN_24V.

[0072] For example, Figure 4As shown, the universal output interface circuit 1 includes two magnetic beads, namely a first magnetic bead PDL1 and a second magnetic bead PDL2, the first magnetic bead PDL1 and the second magnetic bead PDL2 are electrically connected between the interface power supply terminal DOUT_24V and the external power supply terminal DC_IN_24V respectively. The external power supply terminal DC_IN_24V is grounded through a third capacitor C3, and the interface power supply terminal DOUT_24V is grounded through a fourth capacitor C4.

[0073] In this embodiment, by connecting a magnetic bead in series between the interface power supply terminal DOUT_24V and the external power supply terminal DC_IN_24V of the universal output interface circuit, high-frequency noise and spike interference on the power line can be suppressed, and the device also has the ability to absorb electrostatic pulses. When the power supply of the interface power supply terminal DOUT_24V is short-circuited and overcurrent occurs due to a fault, the magnetic bead will burn out, thereby protecting the power supply stability of the external power supply terminal to other circuits.

[0074] In one embodiment, Figure 2 As shown, the universal output interface circuit 1 further includes an output slow-start circuit 16 , and the output slow-start circuit 16 is electrically connected to the second switch tube Q2 and the fourth switch tube Q4 respectively.

[0075] Specifically, if Figure 3 As shown, the output slow start circuit 16 includes a first capacitor C1, a first end of the first capacitor C1 is electrically connected to the interface power supply terminal DOUT_24V, a second end of the first capacitor C1 is electrically connected to the drain D of the second switch tube Q2 through a sixth resistor R6, and a second end of the first capacitor C1 is electrically connected to the gate G of the fourth switch tube Q4. The output slow start circuit 16 can be used to adjust the degree of slow start by adjusting the parameters of the first capacitor C1 and the sixth resistor R6.

[0076] In this embodiment, by setting the first capacitor C1 as an output slow-start circuit in the universal output interface circuit, the output of the universal output interface circuit can be slow-started. Specifically, since the voltage across the first capacitor C1 cannot change suddenly, when the GS voltage difference of the fourth switch tube Q4 changes from 0V to the saturated conduction condition, the change is slow due to the charging effect of the first capacitor C1, thereby controlling the process of the fourth switch tube Q4 changing from cut-off to conduction to be slow, and the output voltage and current of the fourth switch tube Q4 also become slow, so that the output voltage and current of the universal output interface circuit also become slow, thereby preventing the output of the universal output interface circuit from causing damage to the load due to excessive impact at the moment of output startup.

[0077] In one embodiment, Figure 2As shown, the universal output interface circuit 1 further includes a surge and electrostatic protection element 17 , and the surge and electrostatic protection element 17 is electrically connected to the output terminal DOUT of the universal output interface circuit 1 .

[0078] For example, Figure 3 As shown, the surge and electrostatic protection element 17 includes a TVS (TRANSIENT VOLTAGE SUPPRESSOR) tube D1, and the TVS tube D1 is electrically connected to the output terminal DOUT of the universal output interface circuit.

[0079] In this embodiment, by connecting the surge and electrostatic protection element in series at the output end of the universal output interface circuit, the internal part of the universal output interface circuit can be protected. When the user performs a hot-swap operation on the interface in the universal output interface circuit, the possibility of static electricity and surge will increase. The surge and electrostatic protection element (such as a TVS tube) can absorb the static electricity and surge conducted from the outside of the interface to prevent damage to the internal circuit components of the universal output interface circuit.

[0080] Based on the same concept, in one embodiment, Figure 5 As shown, an embodiment of the present invention further provides a circuit board 10, which includes the universal output interface circuit 1, the controller 2 and the external power supply terminal DC_IN_24V described in any of the above embodiments. The universal output interface circuit 1 is electrically connected to the controller 2 and the external power supply terminal DC_IN_24V respectively, and the universal output interface circuit 1 outputs a level state according to a control signal of the controller 2.

[0081] In this embodiment, the universal output interface circuit 1 is consistent with the universal output interface circuit 1 described in any of the above embodiments. The specific structure and function can refer to the universal output interface circuit 1 described in any of the above embodiments, which will not be repeated here.

[0082] The circuit board 10 can be one piece or a plurality of pieces spliced ​​together.

[0083] Based on the same concept, in one embodiment, Figure 6 to Figure 7 As shown, an embodiment of the present invention further provides an electronic device 100, which includes the universal output interface circuit 1 described in any of the above embodiments, or includes the circuit board 10 described in any of the above embodiments.

[0084] In this embodiment, the universal output interface circuit 1 is consistent with the universal output interface circuit 1 described in any of the above embodiments, and the specific structure and function can refer to the universal output interface circuit 1 described in any of the above embodiments, which will not be repeated here. The circuit board 10 is consistent with the circuit board 10 described in any of the above embodiments, and the specific structure and function can refer to the circuit board 10 described in any of the above embodiments, which will not be repeated here.

[0085] It should be noted that the above-mentioned electronic device embodiment and the universal output interface circuit or circuit board embodiment belong to the same concept, and the specific implementation process is detailed in the universal output interface circuit or circuit board embodiment, and the technical features in the universal output interface circuit or circuit board embodiment are correspondingly applicable in the above-mentioned electronic device embodiment, which will not be repeated here.

[0086] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0087] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them. Under the concept of the present invention, the technical features in the above embodiments or different embodiments may also be combined, the steps may be implemented in any order, and there are many other changes in different aspects of the present invention as described above, which are not provided in detail for the sake of simplicity. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they may still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A universal output interface circuit, characterized in that: The universal output interface circuit includes: a first-stage switch tube and a second-stage switch tube; the first-stage switch tube includes a first switch tube and a second switch tube, and the second-stage switch tube includes a third switch tube and a fourth switch tube; the first switch tube is electrically connected to the third switch tube, the second switch tube is electrically connected to the fourth switch tube, and the third switch tube is electrically connected to the fourth switch tube; The gate of the first switch tube is electrically connected to the control signal terminal of the controller through the first voltage divider circuit and the fourth resistor, the drain of the first switch tube is electrically connected to the interface power supply terminal through the second voltage divider circuit, and the source of the first switch tube is grounded; The gate of the second switch tube is electrically connected to the gate of the first switch tube, and the gate of the second switch tube is electrically connected to the control signal terminal of the controller through the first voltage divider circuit and the fourth resistor, the drain of the second switch tube is electrically connected to the interface power supply terminal through the fifth resistor and the sixth resistor, and the source of the second switch tube is grounded; The gate of the fourth switch tube is electrically connected to the drain of the second switch tube through a sixth resistor, the source of the fourth switch tube is electrically connected to the interface power supply terminal, and the source of the fourth switch tube is electrically connected to the gate of the fourth switch tube through a fifth resistor; The gate of the third switch tube is electrically connected to the drain of the first switch tube, and the gate of the third switch tube is grounded through a second capacitor, the source of the third switch tube is grounded, and the drain of the third switch tube is electrically connected to the drain of the fourth switch tube to serve as the output end of the universal output interface circuit; the output end of the universal output interface circuit outputs different level states as the control signal is different.

2. The universal output interface circuit according to claim 1, characterized in that: The first voltage divider circuit includes a third resistor and a seventh resistor, the first end of the seventh resistor is electrically connected to the reference power supply end, the second end of the seventh resistor is connected in series with the first end of the third resistor, the second end of the third resistor is grounded, and the series connection end of the third resistor and the seventh resistor is electrically connected to the gate of the first switching tube and the gate of the second switching tube respectively.

3. The universal output interface circuit according to claim 2, characterized in that: The second voltage divider circuit includes a first resistor and a second resistor, the first end of the first resistor is electrically connected to the interface power supply end, the second end of the first resistor is connected in series with the first end of the second resistor, the second end of the second resistor is grounded, and the series connection ends of the first resistor and the second resistor are electrically connected to the drain of the first switching tube and the gate of the third switching tube respectively.

4. The universal output interface circuit according to any one of claims 1 to 3, characterized in that: The universal output interface circuit further includes an overcurrent protection element, and the overcurrent protection element is electrically connected to the output end of the universal output interface circuit.

5. The universal output interface circuit according to any one of claims 1 to 3, characterized in that: The universal output interface circuit further includes at least one magnetic bead, and the magnetic bead is electrically connected between the interface power supply terminal and the external power supply terminal.

6. The universal output interface circuit according to any one of claims 1 to 3, characterized in that: The universal output interface circuit further includes an output slow-start circuit, and the output slow-start circuit is electrically connected to the second switch tube and the fourth switch tube respectively.

7. The universal output interface circuit according to claim 6, characterized in that: The output slow-start circuit includes a first capacitor, a first end of the first capacitor is electrically connected to the interface power supply end, a second end of the first capacitor is electrically connected to the drain of the second switch tube through a sixth resistor, and a second end of the first capacitor is electrically connected to the gate of the fourth switch tube.

8. The universal output interface circuit according to any one of claims 1 to 3, characterized in that: The universal output interface circuit further comprises a surge and electrostatic protection element, and the surge and electrostatic protection element is electrically connected to the output end of the universal output interface circuit.

9. A circuit board, characterized in that: The circuit board comprises the universal output interface circuit and a controller as claimed in any one of claims 1 to 8, and the universal output interface circuit outputs a level state according to a control signal of the controller.

10. An electronic device, characterized in that: The electronic device comprises the universal output interface circuit as claimed in any one of claims 1 to 8, or comprises the circuit board as claimed in claim 9.

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