Upgrading method of microprocessor in terminal equipment, electronic equipment and storage medium

Abstract

The invention provides a method for upgrading a microprocessor in terminal equipment, electronic equipment and a storage medium. The terminal device comprises a microprocessor and a communication module. The terminal equipment is in communication connection with the server; the method comprises the steps that a server obtains a first upgrade package, the first upgrade package is embedded into a second upgrade package in a constant array mode, the first upgrade package is a firmware upgrade package of a microprocessor, and the second upgrade package is a firmware upgrade package of a communication module; the server updates the communication module in an over-the-air OTA upgrading mode so as to install the second upgrade package in the communication module; and when the communication module receives the upgrading instruction, the first upgrading package is sent to the microprocessor, so that the microprocessor performs firmware upgrading according to the first upgrading package. According to the scheme, the updating process of the microprocessor can be simplified, the updating efficiency of the microprocessor is improved, and the management and maintenance work of terminal equipment is greatly facilitated.

Description

Technical Field

[0001] The present invention relates to the field of network communication technology, and more specifically to a method for upgrading a microprocessor in a terminal device, an electronic device and a storage medium. Background Art

[0002] In the context of the Internet of Everything, various IoT terminals that use 2G, 3G, 4G, NB and other wireless communication modules as data transmission methods are booming. The circuit core modules of general IoT terminals are microprocessors (MCUs) for practical applications and communication modules for wireless communication functions. MCU controls the communication module through UART interfaces and IO interfaces. UART interfaces are used for AT commands and data communication, and IO interfaces generally include power-on control pins and wake-up pins.

[0003] Current OTA (Over-The-Air) technology is developing rapidly in the field of embedded RT-thread operating system devices. The main purpose of this technology is to update the firmware and software of the device through wireless transmission, thereby improving the performance, function and security of the device. Although OTA technology has improved the convenience and efficiency of device updates to a certain extent, traditional OTA technology has some limitations in MCU firmware updates. It cannot fully utilize network bandwidth and storage space, resulting in a time-consuming update process and consumption of a lot of resources.

[0004] In view of this, the present invention is proposed. Summary of the invention

[0005] The present invention is proposed in view of the above problems. According to one aspect of the present invention, a method for upgrading a microprocessor in a terminal device is provided, wherein the terminal device comprises the microprocessor and a communication module; the terminal device is in communication connection with a server; the method comprises: The server obtains a first upgrade package, and embeds the first upgrade package into a second upgrade package in the form of a constant array, wherein the first upgrade package is a firmware upgrade package of the microprocessor, and the second upgrade package is a firmware upgrade package of the communication module; The server updates the communication module by over-the-air OTA upgrade to install the second upgrade package into the communication module; When receiving the upgrade instruction, the communication module sends the first upgrade package to the microprocessor, so that the microprocessor performs firmware upgrade according to the first upgrade package.

[0006] Exemplarily, the server embeds the first upgrade package into the second upgrade package in the form of a constant array in the following manner: Convert the first upgrade package into a bin file; The bin file is stored in the second upgrade package in the form of a constant array.

[0007] Exemplarily, before the communication module sends the first upgrade package to the microprocessor, the method further includes: The communication module interacts with the microprocessor via a serial port to complete the upgrade preparation; The microprocessor sends a first response message to the communication module after completing the upgrade preparation; the step of the communication module sending the first upgrade package to the microprocessor is performed after receiving the first response message.

[0008] Exemplarily, the communication module interacts with the microprocessor via a serial port to complete the upgrade preparation, including: The communication module sends the data size and verification information of the first upgrade package to the microprocessor through serial port interaction.

[0009] Exemplarily, the first upgrade includes a plurality of data packets; the communication module sends the first upgrade packet to the microprocessor in the following manner, including: Dividing the first upgrade package into a plurality of data packets, each of the plurality of data packets having a corresponding packet sequence number; The plurality of data packets are sequentially sent to the microprocessor according to the packet sequence number of each data packet in the plurality of data packets.

[0010] Exemplarily, the method further includes: For each data packet in the plurality of data packets, After the communication module sends the data packet, the duration of receiving the second response information is timed to obtain the timing duration, wherein the microprocessor generates the second response information and sends it to the communication module each time after receiving the data packet; When the timing duration reaches the duration threshold, if the communication module has not received the second response information, the data packet is resent.

[0011] Exemplarily, the method further includes: When the communication module receives the second response information, if the timing duration does not reach the duration threshold, sending the next data packet to the microprocessor; or, When the communication module receives the second response information, if the timing duration does not reach the duration threshold, determining whether the microprocessor successfully writes the upgrade data in the data packet according to the second response information; When the writing is successful, sending the next data packet to the microprocessor; When writing fails, the data packet is adjusted according to the second response information.

[0012] Exemplarily, the method further includes: When receiving each of the plurality of data packets, the microprocessor performs a verification operation on the data packet to verify the data packet, wherein the verification operation includes a packet sequence check and / or a CRC verification; The second response information is generated according to a verification result obtained by verifying the data packet.

[0013] According to another aspect of the present invention, there is provided an electronic device, including a processor and a memory, wherein a computer program is stored in the memory, and the processor is used to execute the computer program to implement the above method.

[0014] According to another aspect of the present invention, a computer-readable storage medium is provided, storing a computer program / instruction, and the computer program / instruction implements the above method when executed by a processor.

[0015] The above technical solution can indirectly OTA upgrade the microprocessor through the serial port between the communication module and the microprocessor. This upgrade method is simple in steps. When both the communication module and the microprocessor need to be updated, only the communication module needs to be updated through OTA over the air to upgrade the microprocessor. This helps to facilitate the management of device firmware versions, reduce update time and resource consumption, achieve more efficient firmware and software update methods, reduce the complexity risk of updates, and improve the stability and security of the system. In short, this solution can simplify the update process of the microprocessor, improve the update efficiency of the microprocessor, and greatly facilitate the management and maintenance of terminal equipment.

[0016] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and other purposes, features and advantages of the present invention will become more apparent by describing the embodiments of the present invention in more detail in conjunction with the accompanying drawings. The accompanying drawings are used to provide a further understanding of the embodiments of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings, the same reference numerals generally represent the same components or steps.

[0018] Figure 1 A schematic diagram showing a terminal device according to an embodiment of the present invention; Figure 2A schematic flow chart showing a method for upgrading a microprocessor in a terminal device according to an embodiment of the present invention; Figure 3 A schematic block diagram of an electronic device according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical scheme and advantages of the present invention more obvious, the exemplary embodiments according to the present invention will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments of the present invention, and it should be understood that the present invention is not limited to the exemplary embodiments described herein. Based on the embodiments of the present invention described in the present invention, all other embodiments obtained by those skilled in the art without creative work should fall within the protection scope of the present invention.

[0020] In the related art, the upgrade and maintenance of embedded devices are generally achieved by over-the-air OTA upgrades, such as NB-I0T, LoraWan, Bluetooth, infrared, etc. The download speed of this upgrade method is limited by baud rate, packet length, air interface environment, etc., and the update firmware package may be affected. In addition, although OTA technology has improved the convenience and efficiency of device updates to a certain extent, traditional OTA technology has some limitations in MCU firmware updates, and cannot fully utilize network bandwidth and storage space, resulting in a time-consuming update process and consumption of a large amount of resources. In view of this, the present invention provides a method for upgrading a microprocessor in a terminal device, an electronic device, and a storage medium, which can simplify the process of updating the MCU firmware and improve the efficiency of the MCU firmware update. The method, electronic device, and storage medium are described in detail below.

[0021] According to one aspect of an embodiment of the present invention, a method for upgrading a microprocessor in a terminal device is provided. For ease of description, the terminal device is first introduced below. Figure 1 FIG. 2 is a schematic diagram of a terminal device according to an embodiment of the present invention. Figure 1 As shown, the terminal device 100 includes a microprocessor 110 and a communication module 120; the terminal device 100 is connected to the server for communication. The terminal device can be any existing or future developed IoT terminal device, and the present invention does not limit this.

[0022] exist Figure 1 In the embodiment, only the circuit serial port connection between the microprocessor 110 and the communication module 120 is illustrated. Figure 1 As shown, the TX pin of the microprocessor 110 is connected to the RX pin of the communication module 120 , and the RX pin of the microprocessor 110 is connected to the TX pin of the communication module 120 .

[0023] Optionally, the communication module may be any existing module or any module to be developed in the future, for example, an L511 module.

[0024] Figure 2 FIG. 1 is a schematic flow chart showing a method for upgrading a microprocessor in a terminal device according to an embodiment of the present invention. Figure 2 As shown, the method may include the following steps S210, S220 and S230.

[0025] In step S210, the server obtains a first upgrade package, and embeds the first upgrade package into a second upgrade package in the form of a constant array, the first upgrade package is a firmware upgrade package of the microprocessor, and the second upgrade package is a firmware upgrade package of the communication module.

[0026] It is understandable that when the MCU is updated (i.e., the firmware of the MCU is upgraded), the communication module is usually updated at the same time (i.e., the firmware of the communication module is upgraded) to ensure compatibility between the two. In the solution of this example, after obtaining the firmware upgrade package of the microprocessor (i.e., the first upgrade package), the server can embed the first upgrade package into the second upgrade package.

[0027] It can be understood that a constant array is used to describe a large array defined in a program, the content of which is known at compile time and cannot be modified at runtime. In the solution of this example, by embedding the first upgrade package into the second upgrade package in the form of a constant array, it can be ensured that the upgrade data contained in the first upgrade package is not modified during the transmission and operation of the second upgrade package, thereby ensuring the integrity and security of the data. And constant arrays are usually stored in the read-only storage area of ​​the program, which means that access to these data can be quickly accessed because they are directly addressed in the memory without the need for additional read operations. In short, this method can not only ensure the data integrity and security of the first upgrade package, but also help to improve the search speed of the first upgrade package, thereby helping to improve the upgrade efficiency of the microprocessor.

[0028] In step S220, the server updates the communication module by over-the-air OTA upgrade to install the second upgrade package into the communication module.

[0029] After the first upgrade package is embedded in the second upgrade package, the firmware program of the communication module can be updated by over-the-air OTA upgrade. In this case, the second upgrade package is installed in the communication module, and the first upgrade package in the second upgrade package is saved in the read-only memory (ROM) of the communication module.

[0030] In step S230, upon receiving the upgrade instruction, the communication module sends the first upgrade package to the microprocessor, so that the microprocessor performs a firmware upgrade according to the first upgrade package.

[0031] After the communication module is updated, an upgrade instruction may be sent to the communication module so that the communication module sends the first upgrade package to the microprocessor. The upgrade instruction may be sent from the server to the communication module or from the microprocessor to the communication module.

[0032] Optionally, the upgrade instruction is sent by the server to the communication module. The method also includes: the server generates an upgrade instruction in response to the user's input instruction and sends it to the communication module. In the scheme of this embodiment, the user can choose the time to upgrade the microprocessor according to his own needs, which is highly flexible and helps to improve the user experience.

[0033] Optionally, the upgrade instruction is sent by the microprocessor to the communication module. The method also includes: the microprocessor obtains the program version number of the first upgrade package stored in the communication module, and compares the program version number of the first upgrade package with the program version number of the microprocessor itself; when the program version number of the first upgrade package is different from the program version number of the microprocessor itself, an upgrade instruction is generated and sent to the communication module. In this embodiment, the microprocessor can determine whether an upgrade is required by comparing the program version number, and send an upgrade instruction to the communication module when the program version number is different, so as to achieve automatic upgrade. As a result, the microprocessor can intelligently identify firmware version changes and automatically perform firmware upgrades, which helps to reduce the complexity and risk of updates and improve the stability and security of the microprocessor system. And this upgrade process does not require user participation, which helps to improve the user experience.

[0034] After receiving the first upgrade package, the microprocessor can use the first upgrade package to upgrade the firmware. In some embodiments, the microprocessor can automatically restart and reorganize after receiving the first upgrade package. When restarting, the preset flashing program can be entered to replace the original version program in the FLASH with the newly released version. Therefore, after restarting, the program of the microprocessor is the new released version program (that is, the version program corresponding to the first upgrade package).

[0035] The above technical solution can indirectly OTA upgrade the microprocessor through the serial port between the communication module and the microprocessor. This upgrade method is simple in steps. When both the communication module and the microprocessor need to be updated, only the communication module needs to be updated through OTA over the air to upgrade the microprocessor. This helps to facilitate the management of device firmware versions, reduce update time and resource consumption, achieve more efficient firmware and software update methods, reduce the complexity risk of updates, and improve the stability and security of the system. In short, this solution can simplify the update process of the microprocessor, improve the update efficiency of the microprocessor, and greatly facilitate the management and maintenance of terminal equipment.

[0036] Exemplarily, the server embeds the first upgrade package into the second upgrade package in the form of a constant array in the following manner: converting the first upgrade package into a bin file (equivalent to converting the format of the first upgrade package into bin); storing the bin file in the second upgrade package in the form of a constant array (i.e., the first upgrade package is embedded in the second upgrade package in the form of a constant array).

[0037] In the solution of this example, the first upgrade package can first be used to generate a bin file for indirect OTA upgrade through a tool. The tool can be a compiler, a linker, etc., and the present invention is not limited to this. It can be understood that the initial first upgrade package is the new microprocessor firmware program source code. In this embodiment, the new microprocessor firmware program source code can be converted into a binary file (bin file). This bin file contains the new firmware program to be installed on the microprocessor.

[0038] After conversion to a bin file, the generated bin file can be converted into a constant array and embedded into the firmware program of the communication module (i.e., the second upgrade package). This constant array occupies a fixed position in the ROM of the communication module. In this way, when the communication module is upgraded via OTA over the air, the firmware upgrade package for microprocessor upgrade (i.e., the first upgrade package in the form of a constant array) is already stored in its memory and can be used for subsequent MCU firmware upgrades.

[0039] The above technical solution can quickly convert the first upgrade package into constant array data and embed it into the second upgrade package, which is simple to operate and highly efficient.

[0040] Exemplarily, before the communication module sends the first upgrade package to the microprocessor, the method may also include the following steps: the communication module interacts with the microprocessor via the serial port to complete the upgrade preparation; the microprocessor sends a first response message to the communication module after completing the upgrade preparation; the step of the communication module sending the first upgrade package to the microprocessor is executed after receiving the first response message.

[0041] In the solution of this example, when the communication module receives the upgrade instruction, it can first interact with the microprocessor via the serial port to complete the upgrade preparation; after completing the upgrade preparation, the first upgrade package is sent to the microprocessor. In this way, data transmission can be avoided when the microprocessor is not ready, errors caused by insufficient preparation can be reduced, and the reliability and security of firmware upgrades can be ensured.

[0042] Exemplarily, the communication module interacts with the microprocessor via the serial port to complete the upgrade preparation, including: the communication module sends the data size and verification information of the first upgrade package to the microprocessor via the serial port interaction.

[0043] In the solution of this example, when performing serial port interaction, the communication module can send the data size and verification information of the first upgrade package to the microprocessor in advance, so that the microprocessor can determine whether the data reception is complete when receiving the data, and verify the data integrity, thereby helping to ensure the data integrity of the first upgrade package and improve the reliability and security of the firmware upgrade. The verification information includes but is not limited to MD5 checksum, checksum, etc., and this example does not limit this.

[0044] Exemplarily, the first upgrade includes multiple data packets; the communication module sends the first upgrade package to the microprocessor in the following manner, including: dividing the first upgrade package into multiple data packets, each of the multiple data packets having a corresponding packet number; and sending the multiple data packets to the microprocessor in sequence according to the packet number of each data packet in the multiple data packets.

[0045] In the solution of this example, the first upgrade package can be divided into multiple sub-upgrade packages. Then, a package serial number is assigned to each sub-upgrade package. Then, the package serial number is attached to the corresponding sub-upgrade package to obtain multiple data packets.

[0046] In some embodiments, the method further includes: performing a CRC check on each sub-upgrade package to obtain a CRC check value. The CRC check value is attached to a data packet corresponding to the sub-upgrade package. In this case, each data packet includes a corresponding sub-upgrade package, a CRC check value, and a package sequence number. The sub-upgrade package is the data that needs to be written into the FLASH of the microprocessor.

[0047] The above technical solution ensures that each data packet has its own corresponding packet sequence number, and sends multiple data packets in sequence according to the packet sequence number of each data packet. This can ensure that each data packet is transmitted to the microprocessor in the correct order, which helps to ensure the reliability and security of firmware upgrades.

[0048] Exemplarily, the method also includes: for each data packet among multiple data packets, after the communication module sends the data packet, timing the time it takes to receive the second response information to obtain a timing duration, wherein the microprocessor generates a second response information and sends it to the communication module after each data packet is received; when the timing duration reaches a duration threshold, if the communication module has not received the second response information, the data packet is resent.

[0049] In this document, both the first response information and the second response information may adopt an ACK response method, which will not be described in detail.

[0050] In the solution of this example, after sending each data packet, the microprocessor can wait for a response (i.e., wait for receiving the second response information), and count the waiting time (i.e., the timing duration). When the waiting time reaches the time threshold and the second response information is still not received, it can be regarded that the microprocessor has not received the data packet. In this case, the data packet can be sent again. In this way, it can be ensured that the microprocessor receives the complete first upgrade package, thereby ensuring the reliability of the microprocessor firmware upgrade.

[0051] Exemplarily, the method also includes: when the communication module receives the second response information, if the timing duration does not reach the duration threshold, sending the next data packet to the microprocessor; or, when the communication module receives the second response information, if the timing duration does not reach the duration threshold, determining whether the microprocessor has successfully written the upgrade data in the data packet based on the second response information; when the write is successful, sending the next data packet to the microprocessor; when the write fails, adjusting the remaining data packets in the multiple data packets based on the second response information.

[0052] Optionally, the method further includes: when the communication module receives the second response information, if the timing duration does not reach the duration threshold, the next data packet is sent to the microprocessor. In this embodiment, if the second response information is received when the waiting time does not reach the time threshold, it can be considered that the microprocessor has received the data packet. In this case, the next data packet can be directly sent to the microprocessor. The next data packet is the data packet arranged after the current data packet according to the packet sequence number. In this embodiment, the second response information can be considered as a confirmation reception information sent by the microprocessor.

[0053] Optionally, the method further includes: when the communication module receives the second response information, if the timing duration does not reach the duration threshold, then according to the second response information, determine whether the microprocessor successfully writes the upgrade data in the data packet; when the write is successful, send the next data packet to the microprocessor; when the write fails, adjust the data packet according to the second response information. In this embodiment, the microprocessor can generate a second response information based on the situation of the received data packet. The communication module can determine whether the microprocessor successfully writes the upgrade data in the data packet based on the second response information. When the write fails, the communication module can adjust the data packet based on the second response information. For example, it can be checked whether the packet sequence number of the data packet is correct, and send a data packet with a correct packet sequence number. The scheme can choose to send the next data packet or adjust the sent data packet according to the content of the second response information, thereby further ensuring the integrity and reliability of the sent data, which helps to further ensure the reliability of the microprocessor firmware upgrade.

[0054] Exemplarily, the method also includes: when each data packet among multiple data packets is received, the microprocessor performs a verification operation on the data packet to verify the data packet, the verification operation includes packet sequence check and / or CRC verification; and generates a second response information based on the verification result obtained by verifying the data packet.

[0055] Optionally, the method further includes: when a verification result obtained by verifying the data packet indicates that the data packet meets the requirements, writing the upgrade data in the data packet.

[0056] In some embodiments, the verification operation includes a packet sequence check. In this embodiment, the method further includes: the microprocessor accumulates a count after each successful writing of the upgrade data in the data packet. After each data packet is received, the method further includes: the microprocessor compares the packet sequence number of the data packet with the current cumulative count value, and if the difference between the packet sequence number of the data packet and the current cumulative count value is 1, then the packet sequence verification result of the data packet is determined to be a correct packet sequence; otherwise, the packet sequence verification result of the data packet is determined to be an incorrect packet sequence. Wherein, the microprocessor writes the upgrade data in the data packet at least when the packet sequence verification result of the data packet is a correct packet sequence.

[0057] In some embodiments, the verification operation includes CRC verification. After each data packet is received, the method further includes: the microprocessor performs CRC verification on the sub-upgrade package in the data packet to obtain a CRC verification value; compares the CRC verification value with the CRC verification value in the data packet; when the two CRC verification values ​​are the same, determines that the CRC verification result of the data packet is that the data of the data packet is correct; otherwise, determines that the CRC verification result of the data packet is that the data of the data packet is wrong. The microprocessor writes the upgrade data in the data packet at least when the CRC verification result of the data packet is that the data of the data packet is correct.

[0058] Optionally, when the packet sequence verification result of the data packet is a packet sequence error, or the CRC verification result of the data packet is a data error of the data packet, the error result can be sent to the communication module as a second response information. When the communication module receives the second response information that the packet sequence verification result of the data packet is a packet sequence error, or the CRC verification result of the data packet is a data error of the data packet, it determines that the data packet has failed to be written, and adjusts the sent data packet according to the second response information. For example, when the second response information is that the packet sequence verification result of the data packet is a packet sequence error, the data packet with the correct packet sequence number is resent; when the second response information is that the CRC verification result of the data packet is a data error of the data packet, the data packet is resent.

[0059] Optionally, the verification operation includes packet sequence verification and CRC verification. In this embodiment, if the packet sequence verification result of the data packet is that the packet sequence is correct, and the CRC verification result of the data packet is that the data of the data packet is correct, the generated second response information is that the data is written successfully.

[0060] In the above technical solution, the microprocessor can ensure the accuracy and integrity of the received data packets by performing packet sequence check and / or CRC verification on the received data packets, thereby facilitating the reliability of the firmware upgrade.

[0061] Exemplarily, the method also includes: after writing the upgrade data in the data packet, the microprocessor performs data integrity verification on the size of the written data to determine whether all of the multiple data packets have been received; wherein, when all of the multiple data packets have been received, the microprocessor performs a firmware upgrade based on the written data.

[0062] The data integrity verification method can be any existing or future developed method for verifying data integrity. For example, it can be an MD5 check. In some embodiments, the check information includes an MD5 check code. In this embodiment, the microprocessor can perform an MD5 check on the size of the written data (i.e., the size of the data written into the FLASH of the microprocessor), and compare the check result with the MD5 check code. When the check result is the same as the MD5 check code, it is determined that all multiple data packets have been received.

[0063] The above technical solution verifies the data integrity of the written data size, and can perform upgrades in a timely manner after data reception is completed, which helps to improve the firmware upgrade efficiency of the microprocessor.

[0064] According to yet another aspect of the embodiments of the present invention, an electronic device is provided. Figure 3 FIG. 2 shows a schematic block diagram of an electronic device according to an embodiment of the present invention. Figure 3 As shown, the electronic device 300 includes: a processor 310 and a memory 320. The memory 320 stores a computer program, and the processor 310 is used to execute the computer program to implement the above method.

[0065] According to another aspect of an embodiment of the present invention, a computer-readable storage medium is also provided. The storage medium stores a computer program / instruction, and the computer program / instruction implements the above method when executed by a processor. The storage medium may include, for example, a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a portable compact disk read-only memory (CD-ROM), a USB memory, or any combination of the above storage media. The computer-readable storage medium may be any combination of one or more computer-readable storage media.

[0066] A person skilled in the art can easily understand the implementation structure, working principle and beneficial effects of the electronic device and the computer-readable storage medium by reading the above method, and will not be described in detail for the sake of brevity.

[0067] Although example embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above example embodiments are merely exemplary and are not intended to limit the scope of the present invention thereto. Various changes and modifications may be made therein by one of ordinary skill in the art without departing from the scope and spirit of the present invention. All such changes and modifications are intended to be included within the scope of the present invention as required by the appended claims.

[0068] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0069] In the several embodiments provided by the present invention, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed.

[0070] In the description provided herein, a large number of specific details are described. However, it is understood that embodiments of the present invention can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0071] Similarly, it should be understood that in order to streamline the present invention and help understand one or more of the various inventive aspects, in the description of the exemplary embodiments of the present invention, the various features of the present invention are sometimes grouped together into a single embodiment, figure, or description thereof. However, the method of the present invention should not be interpreted as reflecting the following intention: the claimed invention requires more features than the features explicitly stated in each claim. More specifically, as reflected in the corresponding claims, the inventive point is that the corresponding technical problem can be solved with less than all the features of a single disclosed embodiment. Therefore, the claims following the specific embodiment are hereby expressly incorporated into the specific embodiment, wherein each claim itself serves as a separate embodiment of the present invention.

[0072] Those skilled in the art will understand that, except for mutually exclusive features, all features disclosed in this specification (including the accompanying claims, abstract and drawings) and all processes or units of any method or device disclosed in this specification may be combined in any combination. Unless otherwise explicitly stated, each feature disclosed in this specification (including the accompanying claims, abstract and drawings) may be replaced by an alternative feature that provides the same, equivalent or similar purpose.

[0073] In addition, those skilled in the art will appreciate that, although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present invention and form different embodiments. For example, in the claims, any one of the claimed embodiments may be used in any combination.

[0074] The various component embodiments of the present invention may be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. It should be understood by those skilled in the art that a microprocessor or a digital signal processor (DSP) may be used in practice to implement some or all functions of some modules in an electronic device according to an embodiment of the present invention. The present invention may also be implemented as a device program (e.g., a computer program and a computer program product) for executing part or all of the methods described herein. Such a program implementing the present invention may be stored on a computer-readable medium, or may be in the form of one or more signals. Such a signal may be downloaded from an Internet website, or provided on a carrier signal, or provided in any other form.

[0075] It should be noted that the above embodiments illustrate the present invention rather than limit it, and that those skilled in the art may devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference symbol between brackets shall not be construed as a limitation on the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "one" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present invention may be implemented by means of hardware comprising a number of different elements and by means of a suitably programmed computer. In a unit claim enumerating a number of devices, several of these devices may be embodied by the same hardware item. The use of the words first, second, and third, etc., does not indicate any order. These words may be interpreted as names.

[0076] The above is only a specific embodiment of the present invention or an explanation of a specific embodiment. The protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. The protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A method for upgrading a microprocessor in a terminal device, characterized in that: The terminal device includes the microprocessor and a communication module; The terminal device is connected to the server for communication; the method comprises: The server obtains a first upgrade package, and embeds the first upgrade package into a second upgrade package in the form of a constant array, wherein the first upgrade package is a firmware upgrade package of the microprocessor, and the second upgrade package is a firmware upgrade package of the communication module; The server updates the communication module by over-the-air OTA upgrade to install the second upgrade package into the communication module; When receiving the upgrade instruction, the communication module sends the first upgrade package to the microprocessor, so that the microprocessor performs firmware upgrade according to the first upgrade package.

2. The method according to claim 1, characterized in that: The server embeds the first upgrade package into the second upgrade package in the form of a constant array in the following manner: Convert the first upgrade package into a bin file; The bin file is stored in the second upgrade package in the form of a constant array.

3. The method according to claim 1, characterized in that Before the communication module sends the first upgrade package to the microprocessor, the method further includes: The communication module interacts with the microprocessor via a serial port to complete the upgrade preparation; The microprocessor sends a first response message to the communication module after completing the upgrade preparation; the step of the communication module sending the first upgrade package to the microprocessor is performed after receiving the first response message.

4. The method according to claim 3, characterized in that The communication module interacts with the microprocessor via a serial port to complete the upgrade preparation, including: The communication module sends the data size and verification information of the first upgrade package to the microprocessor through serial port interaction.

5. The method according to claim 1, characterized in that: The first upgrade includes a plurality of data packets; the communication module sends the first upgrade packet to the microprocessor in the following manner, including: Dividing the first upgrade package into a plurality of data packets, each of the plurality of data packets having a corresponding packet sequence number; The plurality of data packets are sent to the microprocessor in sequence according to the packet sequence number of each data packet in the plurality of data packets.

6. The method according to claim 5, characterized in that The method further comprises: For each data packet in the plurality of data packets, After the communication module sends the data packet, the duration of receiving the second response information is timed to obtain the timing duration, wherein the microprocessor generates the second response information and sends it to the communication module each time after receiving the data packet; When the timing duration reaches the duration threshold, if the communication module has not received the second response information, the data packet is resent.

7. The method according to claim 6, characterized in that The method further comprises: When the communication module receives the second response information, if the timing duration does not reach the duration threshold, sending the next data packet to the microprocessor; or, When the communication module receives the second response information, if the timing duration does not reach the duration threshold, determining whether the microprocessor successfully writes the upgrade data in the data packet according to the second response information; When the writing is successful, sending the next data packet to the microprocessor; When writing fails, the data packet is adjusted according to the second response information.

8. The method according to claim 6, characterized in that The method further comprises: When receiving each of the plurality of data packets, the microprocessor performs a verification operation on the data packet to verify the data packet, wherein the verification operation includes a packet sequence check and / or a CRC verification; The second response information is generated according to a verification result obtained by verifying the data packet.

9. An electronic device, characterized in that: The method comprises a processor and a memory, wherein the memory stores a computer program, and the processor is used to execute the computer program to implement the method according to any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that: A computer program / instruction is stored, and when the computer program / instruction is executed by a processor, the method according to any one of claims 1 to 8 is implemented.

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