Dual controller communication system, method, computer product, device and storage medium

Abstract

The invention relates to a dual-controller communication system and method, a computer product, equipment and a storage medium. The dual-controller communication system comprises a first controller and a second controller, wherein the first controller comprises a first processor and a first non-transparent bridge; the second controller comprises a second processor and a signal relay device; the input end of the first non-transparent bridge is connected with the output end of the first processor, the output end of the first non-transparent bridge is connected with the input end of the signal relay device, and the output end of the signal relay device is connected with the input end of the second processor. By adopting the system, the communication cost of the first controller and the second controller can be reduced, and the reliability of the system is improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a dual-controller communication system, method, computer product, device and storage medium. Background Art

[0002] In today's world, data growth is exploding at an unprecedented rate, and fast data transmission within data centers is essential for efficient use of information. Data reliability is getting higher and higher, so dual-controller redundant storage is needed to improve reliability. The current dual-controller communication system is based on dual NTB (non-transparent bridge), which enables the other controller to have memory mirror redundancy when a problem occurs in one controller, so that the business will not be stopped and data will not be lost. However, the use of two non-transparent bridges will lead to increased communication latency and system performance degradation. Summary of the invention

[0003] Based on this, it is necessary to provide a dual-controller communication system, method, computer product, device and storage medium that can reduce the communication cost of the first controller and the second controller and improve the reliability of the system in order to address the above technical problems.

[0004] In order to solve the above technical problems, in a first aspect, a dual-controller communication system is provided, the system comprising: The first controller and the second controller: The first controller includes a first processor and a first non-transparent bridge; The second controller includes a second processor and a signal relay device; The input end of the first non-transparent bridge is connected to the output end of the first processor, the output end of the first non-transparent bridge is connected to the input end of the signal relay device, and the output end of the signal relay device is connected to the input end of the second processor.

[0005] In one embodiment, the first non-transparent bridge includes a first sub-non-transparent bridge and a second sub-non-transparent bridge, the input end of the first sub-non-transparent bridge is connected to the output end of the first processor, the output end of the first sub-non-transparent bridge is connected to the input end of the second sub-non-transparent bridge, the output end of the second sub-non-transparent bridge is connected to the input end of the signal relay device, and the output end of the signal relay device is connected to the input end of the second processor.

[0006] In one embodiment, the first controller further includes a first memory, and the second controller further includes a second memory. The first memory is respectively communicatively connected to the first processor and the first non-transparent bridge, and the second memory is respectively communicatively connected to the second processor and the signal relay device.

[0007] In one embodiment, the first controller also includes a first driver module, and the second controller also includes a second driver module. The first driver module is communicatively connected to the first processor, and the second driver module is communicatively connected to the second processor. The first driver module and the second driver module are used to establish a mapping relationship between the first memory and the second memory.

[0008] In one embodiment, the first controller further includes a first communication module and a first cache module, the second controller further includes a second communication module and a second cache module, the input end of the first communication module is connected to the output end of the first cache module, and the output end of the first communication module is connected to the input end of the first driving module; The input end of the second communication module is connected to the output end of the second buffer module, and the output end of the second communication module is connected to the input end of the second driving module.

[0009] In one of the embodiments, the second controller further includes a card slot, and the card slot is used for detachably installing the second non-transparent bridge to achieve replacement of the signal relay device with the second non-transparent bridge.

[0010] In order to solve the above technical problem, in a second aspect, a dual-controller communication method is provided, which is applied to the dual-controller communication system in the first aspect, and the method includes: In response to the first controller receiving a data transmission instruction, the data transmission instruction including transmission data, determining whether a signal relay device is set on the second controller; If a signal relay device is provided on the second controller, a first target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the signal relay device; If the signal relay device is not provided on the second controller, determining whether a second non-transparent bridge is provided on the second controller; If a second non-transparent bridge is provided on the second controller, a second target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the second non-transparent bridge; If the second non-transparent bridge is not provided on the second controller, a fault warning is issued; The first controller transmits the transmission data to the second controller based on the first target transmission path and / or the second transmission path.

[0011] In one embodiment, determining a first target transmission path corresponding to the transmission data according to the first non-transparent bridge and the signal relay device, and transmitting the transmission data to the second controller based on the first target transmission path by the first controller includes: In response to the first controller receiving the data transmission instruction, acquiring the transmission data from the first cache module and sending the transmission data to the first communication module; In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain encapsulated data, and sends the encapsulated data to the first driving module; In response to the first driving module receiving the packaged data, the first driving module stores the packaged data in the target data pair column; In response to the target data queue meeting the preset condition, the first driving module sends the target transmission data in the target data queue meeting the preset condition to the memory access queue in the first memory; The first driver module sends a notification to the first non-transparent bridge, and at the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge; The first non-transparent bridge sends the target transmission data to the signal relay device, and transmits the target transmission data to the second memory through the signal relay device.

[0012] In one embodiment, determining a second target transmission path corresponding to the transmission data according to the first non-transparent bridge and the second non-transparent bridge, and transmitting the transmission data to the second controller based on the second target transmission path by the first controller includes: In response to the first controller receiving the data transmission instruction, acquiring the transmission data from the first cache module and sending the transmission data to the first communication module; In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain encapsulated data, and sends the encapsulated data to the first driving module; In response to the first driving module receiving the packaged data, the first driving module stores the packaged data in the target data pair column; In response to the target data queue meeting the preset condition, the first driving module sends the target transmission data in the target data queue meeting the preset condition to the memory access queue in the first memory; The first driver module sends a notification to the first non-transparent bridge, and at the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge; The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and transmits the target transmission data to the second memory through the second non-transparent bridge.

[0013] In one embodiment, the method further comprises: In response to the second memory receiving the target transmission data, the second driver module sends a message to the first controller to notify the first controller to start cache update based on the target transmission data; The second controller polls the target transmission data in the second memory and synchronizes the target transmission data to the second communication module, and the second communication module synchronizes the target transmission data to the second cache module; In response to the second controller confirming receipt of the target transmission data, sending feedback information to the first controller; In response to the first controller receiving the feedback message, the first controller synchronizes the feedback information to the first communication module.

[0014] In one embodiment, the first non-transparent bridge sends the target transmission data to the signal relay device, and the target transmission data is transmitted to the second memory through the signal relay device, including: In response to the first sub-non-transparent bridge receiving a data read request protocol sent by a first node corresponding to the first controller, acquiring the data read request protocol, and sending the data read request protocol to the address translation register; In response to the address translation register receives a data read request protocol, the data read request protocol is parsed to obtain the protocol request address and the first node ID; Convert the protocol request address to the target port address through the address conversion register, and convert the first node ID to the proxy device ID; Based on the proxy device ID, the data read request protocol and the target port address are sent to the proxy device in the second sub-non-transparent bridge, the proxy device converts the proxy device ID to obtain the target ID, the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID; The data read request protocol is forwarded to the target port based on the target port address.

[0015] In one embodiment, the first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and the target transmission data is transmitted to the second memory through the second non-transparent bridge, including: In response to the first non-transparent bridge receiving a data read request protocol sent by a first node corresponding to the first controller, acquiring the data read request protocol, and sending the data read request protocol to the address translation register; In response to the address translation register receives a data read request protocol, the data read request protocol is parsed to obtain the protocol request address and the first node ID; Convert the protocol request address to the target port address through the address conversion register, and convert the first node ID to the proxy device ID; Based on the proxy device ID, the data read request protocol and the target port address are sent to the proxy device in the second non-transparent bridge, the proxy device converts the proxy device ID to obtain the target ID, the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID; The data read request protocol is forwarded to the target port based on the target port address.

[0016] In one embodiment, after forwarding the data read request protocol to the target port based on the target port address, the method further includes: Get the matching ID and complete the data protocol ID, the data protocol ID is completed when the target port receives the data request protocol is completed, the completion data protocol ID sent to the first node; Convert the matching ID and the completion data protocol ID into the first node ID; In response to the matching ID and the completion data protocol ID being converted to the first node ID being completed, the completion data protocol is forwarded to the first node.

[0017] In order to solve the above technical problem, a third aspect provides a computer program product, including a computer program, which implements the steps of the method of the first aspect when executed by a processor.

[0018] In order to solve the above technical problems, in the fourth aspect, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, and when the processor executes the computer program, the following steps are implemented: when the processor executes the computer program, the steps of the method in the first aspect are implemented.

[0019] In order to solve the above technical problems, in a fifth aspect, the present application provides a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the steps of the method of the above first aspect are implemented.

[0020] Different from the prior art, the dual-controller communication system in the present application includes a first controller and a second controller: the first controller includes a first processor and a first non-transparent bridge; the second controller includes a second processor and a signal relay device; the input end of the first non-transparent bridge is connected to the output end of the first processor, the output end of the first non-transparent bridge is connected to the input end of the signal relay device, and the output end of the signal relay device is connected to the input end of the second processor. In this way, using a physical non-transparent bridge and a signal relay device to realize the communication between the first control system and the second control system can avoid multiple address conversions during the communication process, can reduce the communication cost of the first controller and the second controller, and improve the reliability of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a structural schematic diagram of a dual-controller communication system in the prior art; Figure 2 It is a structural schematic diagram of another dual-controller communication system in the prior art; Figure 3A schematic diagram of the structure of a dual-controller communication system in one embodiment; Figure 4 A schematic diagram of the structure of a dual-controller communication system in another embodiment; Figure 5 A schematic diagram of the structure of a dual-controller communication system in yet another embodiment; Figure 6 A schematic diagram of the structure of a dual-controller communication system in yet another embodiment; Figure 7 A schematic diagram of a dual-controller communication method in one embodiment; Figure 8 A schematic diagram of a flow chart of a dual-controller communication method in another embodiment; Fig. 9 A schematic diagram of a flow chart of a dual-controller communication method in yet another embodiment; Fig.10 is a structural block diagram of a dual-controller communication device in one embodiment; Fig.11 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0023] See also Figure 1 In the related technology 1, a dual-controller communication system based on dual NTB (non-transparent bridge) includes a first cache module (Cache), a first driver module (NTB driver), a first processor (CPU) and a first non-transparent bridge (NTB) on controller 1, and a second cache module (Cache), a second driver module (NTB driver), a second processor (CPU) and a second non-transparent bridge (NTB) on controller 2.

[0024] By respectively mounting a first non-transparent bridge and a second non-transparent bridge on a board corresponding to the first controller and a board corresponding to the second controller, the first non-transparent bridge and the second non-transparent bridge can directly address a remote memory address (second controller memory) through an address translation mechanism, and copy local memory data (data in the first controller memory) to a remote memory (second controller memory) through a method of CPU and DMA (Direct Memory Access), thereby realizing data communication.

[0025] See also Figure 2In the related technology 2, a dual-controller communication system based on dual NTB (non-transparent bridge) includes a first cache module (Cache) on controller 1, a first cache communication module (communication layer), a first driver module (NTB driver), a first processor (CPU) and a first non-transparent bridge (NTB), a second cache module (Cache) on controller 2, a second cache communication module (communication layer), a second driver module (NTB driver), a second processor (CPU) and a second non-transparent bridge (NTB).

[0026] In the related technology 2, the first communication module and the second communication module are respectively set on the controller 1 and the controller 2 to be responsible for the maintenance of the communication link, the assembly of the Nvme protocol, and the management of the heartbeat. By respectively mounting the first non-transparent bridge and the second non-transparent bridge on the board corresponding to the first controller and the board corresponding to the second controller, the first non-transparent bridge and the second non-transparent bridge can directly address the remote memory address (the second controller memory) through the address translation mechanism, and copy the local memory data (the data of the first controller memory) to the remote memory (the second controller memory) through one of the CPU and DMA (Direct Memory Access), thereby realizing data communication.

[0027] From the above, it can be seen that in the related technology, two non-transparent bridges are mainly used to realize communication between dual controllers. However, each time a non-transparent bridge is added, an address conversion will be performed, which will lead to problems such as increased communication delay and reduced system performance.

[0028] In order to solve the above technical problem, in one embodiment, the present application provides a dual-controller communication system, and the system includes a first controller and a second controller.

[0029] The first controller includes a first processor and a first non-transparent bridge; the second controller includes a second processor and a signal relay device; the input end of the first non-transparent bridge is connected to the output end of the first processor, the output end of the first non-transparent bridge is connected to the input end of the signal relay device, and the output end of the signal relay device is connected to the input end of the second processor.

[0030] like Figure 3 As shown, the first non-transparent bridge is the NTB card on the controller 1 , and the signal relay device is the Retimer card on the controller 2 .

[0031] A controller is a device that changes the wiring of the main circuit or control circuit and the resistance value in the circuit in a predetermined order to control the start, speed regulation, braking and reversal of the motor. It is composed of a program counter, an instruction register, an instruction decoder, a timing generator and an operation controller. It is the "decision-making body" that issues commands, that is, it coordinates and directs the operation of the entire computer system.

[0032] The first processor and the second processor are both central processing units (CPUs), which are the computing and control core of the computer system and the final execution unit for information processing and program execution. Since its creation, the CPU has made great progress in logical structure, operating efficiency, and functional extension.

[0033] The communication between the dual controllers here can be achieved by using a non-transparent bridge of PCIE to connect the controllers. Specifically, it can be a non-transparent bridge NTB, which is a type of PCIE bridge chip. It connects the independent memory systems of two or more computers to the same PCIE structure, and supports the functions of registers and memory conversion windows.

[0034] In one embodiment, the first non-transparent bridge includes a first sub-non-transparent bridge and a second sub-non-transparent bridge, the input end of the first sub-non-transparent bridge is connected to the output end of the first processor, the output end of the first sub-non-transparent bridge is connected to the input end of the second sub-non-transparent bridge, the output end of the second sub-non-transparent bridge is connected to the input end of the signal relay device, and the output end of the signal relay device is connected to the input end of the second processor.

[0035] The present application designs two NTBs in the first non-transparent bridge by using the Patition method. This is because a non-transparent bridge cannot directly connect the first processor and the second processor, so two virtual non-transparent bridges (the first sub-non-transparent bridge and the second sub-non-transparent bridge) are set in the first non-transparent bridge by using the Patition method.

[0036] Specific as Figure 4 As shown, two areas are divided by Pattern (partition 0 and partition 1 in the figure), partition 0 corresponds to the first sub-non-transparent bridge, and partition 1 corresponds to the second sub-non-transparent bridge. Node 0 can be the first processor, and node 1 can be the second processor. US P2P refers to PCI-to-PCI bridge, which is used to connect the PCI main bus and PCI secondary bus. The PCI bus where the PCI bridge is located is called the "main bus" (that is, the parent bus of the secondary bus), and the PCI bus connected to the bridge device is called the "secondary bus" (that is, the child bus of the main bus).

[0037] By setting up two virtual sub-transparent bridges on a physical non-transparent bridge, each sub-transparent bridge corresponds to a partition, partition 0 corresponds to the first sub-non-transparent bridge, and partition 1 corresponds to the second sub-non-transparent bridge. In this way, a physical non-transparent bridge is realized to connect the first processor and the second processor, and a physical non-transparent bridge is realized to realize the connectivity between the dual controllers.

[0038] Signal relay device Retimer card, Retimer card is a signal conditioning chip, which is used to balance and enhance signals. It is similar to a PHY chip. When the signal passes through the Retimer card, the signal is reconstructed through the clock inside the Retimer card, which can increase the signal transmission energy and then continue to transmit, which can improve the reliability of the server chassis system.

[0039] In this implementation, the data transmission link is: controller 1 CPU data (first processor) -> NTB1partition1 DMA (link between the first processor and the first sub-non-transparent bridge) -> NTB1 (NTB1 partition1->NTB1 partiton2, link between the first sub-non-transparent bridge and the second sub-non-transparent bridge) ->NTB1 partition2DMA (link between the second sub-non-transparent bridge and the signal relay device, from the signal relay device to the second processor) -> controller 2 CPU data (second processor).

[0040] In another embodiment, Figure 5 As shown, in this embodiment, the first non-transparent bridge is the NTB card on the controller 1 , and the second non-transparent bridge is the NTB card on the controller 2 .

[0041] The input end of the first non-transparent bridge is connected to the output end of the first processor (CPU on controller 1), the output end of the first non-transparent bridge is connected to the input end of the second non-transparent bridge, and the output end of the second non-transparent bridge is connected to the input end of the second processor (CPU on controller 2).

[0042] In this implementation, address conversion is implemented through the first non-transparent bridge and the second non-transparent bridge, thereby realizing data transmission between the first controller and the second controller. In this implementation, the data transmission link is: controller 1 CPU data (first processor) -> NTB1 DMA (link between the first processor and the first non-transparent bridge) -> NTB1 (first non-transparent bridge) -> NTB2 (second non-transparent bridge) -> NTB2 DMA (link between the second processor and the second non-transparent bridge) -> controller 2 CPU data (second processor).

[0043] The first non-transparent bridge and the signal relay device in the prior art are both mounted on the controller. In the present application, a card slot is provided on the main board where the second controller is located. The card slot can be suitable for the installation of the non-transparent bridge (NTB card) and the signal relay device (Retimer card), i.e., the position of the NTB card and the Retimer card shown in the figure. In this way, different combinations of the first non-transparent bridge and the signal relay device can be flexibly applied according to different needs to realize the communication between the first controller and the second controller.

[0044] By setting a card slot, the present application can use a second non-transparent bridge to replace the signal relay device, which can flexibly respond to user needs.

[0045] In one embodiment, see Figure 6 The first controller also includes a first memory (memory on controller 1), and the second controller also includes a second memory (memory on controller 2). The first memory is respectively communicated with the first processor and the first non-transparent bridge, and the second memory is respectively communicated with the second processor and the signal relay device.

[0046] ‌Memory has many functions in computers, mainly including storing and quickly accessing data, improving data processing efficiency, supporting multitasking, and accelerating the operation of specific applications. Memory is an important component in a computer, used to temporarily store the calculation data in the CPU and exchange data with external storage such as hard disks. It is a bridge for communication between external storage and the CPU, and all programs in the computer are run in memory.

[0047] In the present application, the first memory located on the first controller and the second memory located on the second controller are provided to support the operation of the software module in the present application.

[0048] The first controller also includes a first driving module, and the second controller also includes a second driving module. The first driving module is communicatively connected to the first processor, and the second driving module is communicatively connected to the second processor. The first driving module and the second driving module are used to establish a mapping relationship between the first memory and the second memory.

[0049] The first driver module and the second driver module can be NTB drivers. The NTB driver defines an API that encapsulates a common set of functions and allows clients interested in NTB functions to discover NTB devices supported by the hardware driver. The client here refers to the upper-level component that calls the NTB API, and the "driver" or "hardware driver" refers to the NTB hardware driver for a specific manufacturer and model. The first driver module and the second driver module are set to support the sending and receiving management of the data link. The driver module is specifically responsible for the establishment of the NTB channel and the establishment of the memory mapping, and the mapping relationship between the memory of controller 1 and the memory of controller 2. It is responsible for establishing multiple DMA queues (circular queues) in the memory, the establishment of the command buffer queue, and the device management, etc.

[0050] The first controller also includes a first communication module and a first cache module, and the second controller also includes a second communication module and a second cache module. The input end of the first communication module is connected to the output end of the first cache module, and the output end of the first communication module is connected to the input end of the first driving module; the input end of the second communication module is connected to the output end of the second cache module, and the output end of the second communication module is connected to the input end of the second driving module.

[0051] The first cache module is the cache on controller 1, and the second cache module is the cache on controller 2. The cache module (Cache) is a memory hierarchy located between the processor CPU and the memory, and is used to store the data and instructions recently accessed by the CPU. It improves the performance and response speed of the system by reducing the number of accesses to the memory. The cache module is set to be responsible for maintaining data management in the software, and can be a 4K continuous page as the data management area.

[0052] The first communication module is the communication layer on controller 1, and the second communication module is the communication layer on controller 2. The first communication module and the second communication module are set up to be responsible for the maintenance of the communication link, the assembly of the Nvme protocol, and the management of the heartbeat, including the establishment of the login connection and the recording of the login handle. The heartbeat is established for each physical port communication, responsible for data transmission, channel priority establishment, data object serialization, etc.

[0053] Compared with the prior art solution of implementing communication between the first controller and the second controller by mounting two non-transparent bridges on the mainboard corresponding to the controller as connecting devices, the present application sets a card slot on the mainboard corresponding to the second controller to flexibly implement two non-transparent bridges as connecting devices, or non-transparent bridges and signal relay devices as connecting devices, which can flexibly respond to different needs.

[0054] In one embodiment, Figure 7As shown, the present application provides a dual-controller communication method, which is applied to the above-mentioned dual-controller communication system, and the method specifically includes the following steps: Step 101: In response to a first controller receiving a data transmission instruction, the data transmission instruction including transmission data, determining whether a signal relay device is set on a second controller.

[0055] Step 102: If a signal relay device is provided on the second controller, a first target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the signal relay device.

[0056] Step 103: If the signal relay device is not set on the second controller, determine whether a second non-transparent bridge is set on the second controller.

[0057] Step 104: If a second non-transparent bridge is provided on the second controller, a second target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the second non-transparent bridge.

[0058] Step 105: If the second non-transparent bridge is not provided on the second controller, a fault warning is issued.

[0059] Step 106: The first controller transmits the transmission data to the second controller based on the first target transmission path and / or the second transmission path.

[0060] Specifically, when configuring the dual-controller communication system, the present application will determine whether a signal relay device is set on the second controller. If a signal relay device is set, the communication between the first controller and the second controller is carried out according to the first target transmission path determined by the signal relay device and the first non-transparent bridge. If the signal relay device is not set on the second controller, it is determined whether a second non-transparent bridge is set on the second controller. If a second non-transparent bridge is set, the communication between the first controller and the second controller is carried out according to the second target transmission path determined by the second non-transparent bridge and the first non-transparent bridge. If the second non-transparent bridge is not set on the second controller, it is considered that the first controller and the second controller cannot communicate, and a fault warning is issued to contact the operator for timely maintenance. In the present application, the communication between the first controller and the second controller can be flexibly realized by determining whether it is through a dual non-transparent bridge or a first non-transparent bridge and a signal relay device.

[0061] See also Figure 8 In one embodiment, a first target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the signal relay device, and the first controller transmits the transmission data to the second controller based on the first target transmission path: Step 201: In response to the first controller receiving a data transmission instruction, the first controller obtains transmission data from the first cache module and sends the transmission data to the first communication module.

[0062] Step 202, in response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain encapsulated data, and sends the encapsulated data to the first driver module.

[0063] Step 203 , in response to the first driving module receiving the packaged data, the first driving module stores the packaged data into a target data pair array.

[0064] Step 204 , in response to the target data queue satisfying a preset condition, the first driver module sends the target transmission data in the target data queue satisfying the preset condition to the memory access queue in the first memory.

[0065] Specifically, the data transmission instruction here can be a data synchronization instruction. After the first controller finds the data to be transmitted (changed data) from the first cache module, it calls the communication interface to send it to the second cache module of the second controller. The data is converted into a data sequence in the first communication module (communication layer on controller 1), and the data sequence is encapsulated by protocol to obtain the encapsulated data, which is sent to the first driver module. The first driver module (NTB driver on controller 1) caches the encapsulated data in the buf queue of 2000, and is responsible for aggregating the encapsulated data in sequential continuous memory to improve transmission efficiency, and uniformly sends the data in the buf space to the first memory (memory data shown in the figure) DMA queue space (target data queue).

[0066] Here, a circular cache area is formed by the buf queue on the first driver module to aggregate the received encapsulated data and then send them out uniformly. The data transmission efficiency is improved by increasing the block size of the encapsulated data.

[0067] The specific steps of converting the data into a data sequence and performing protocol encapsulation on the data sequence to obtain the encapsulated data can be shown in the following code: Struct data{ Char *data Int len } The target data queue here is the DMA queue in the illustrated memory data, and the DMA queue is set as a circular queue in this application. A circular queue is a special queue that adds some restrictions on the basis of the queue so that the queue can be recycled in a fixed-size storage space. A circular queue can be implemented with an array, in which the elements are arranged in a certain order, and when the queue head or queue tail pointer reaches the end of the array, it will automatically be recycled from the head of the array. One advantage of a circular queue is that when the queue is full, new elements can continue to be stored by overwriting the elements at the head of the queue, which can make the queue have the ability to be recycled to a certain extent and save storage space.

[0068] The first driver module receives the packaged data, and the step of storing the packaged data in the target data array can be shown in the following code: Struct msg header{ int seqnumber Struct *data } In a feasible implementation, the target data queue may include a first circular subqueue and a second circular subqueue, the first circular subqueue being used to store data indexes. The second circular subqueue is used to store data corresponding to the data indexes, an index value is set for the second circular subqueue, a correspondence is established between the index value corresponding to the second circular subqueue and the stored data index in the first circular subqueue, when acquiring data in the target data queue, the data to be acquired may be matched with the stored data index in the first circular subqueue, the stored data index matching the data to be acquired is used as the target stored data index, and the data corresponding to the target stored data index is acquired according to the correspondence, and the data is sent to the opposite end, so that it is beneficial to quickly acquire the required data from the target data queue, and the reliability of the system can be improved.

[0069] Step 205: The first driver module sends a notification to the first non-transparent bridge, and at the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge.

[0070] Step 206: The first non-transparent bridge sends the target transmission data to the signal relay device, and the signal relay device transmits the target transmission data to the second memory.

[0071] After all the encapsulated data are stored in the target data queue in the first memory, the first driver module will send a notification to the first non-transparent bridge, informing it that the target transmission data in the target data queue will be sent to the first non-transparent bridge, and then the address will be converted through the first non-transparent bridge to send the target transmission data in the target data queue to the second memory on the second controller.

[0072] Specifically, in this implementation, sending the target transmission data in the target data queue to the second memory on the second controller includes: Step 301: in response to the first sub-non-transparent bridge receiving a data read request protocol sent by a first node corresponding to a first controller, the data read request protocol is acquired and sent to an address translation register.

[0073] See also Fig. 9 , step 301 corresponds to Fig. 9 In the above process ①, the host corresponding to partition 0, that is, the host where node 0 is located, the first controller corresponds to the host and sends a data read request protocol to the NT EP (NT terminal) of partition 0. After receiving the data read request protocol, the NT EP terminal parses the data read request protocol and compares the address carried in the header of the data read request protocol with the address of the address conversion register (address conversion register 0, address conversion register 2) in the computer configuration. If the address corresponding to the data read request protocol falls on which address conversion memory, the data read and write request is sent to which address conversion register. Here, the address carried in the header of the data read request protocol is set to match the address of the address conversion register address.

[0074] The address of the data read request protocol here is 0xE000_0000, and the address conversion memory 2 is clicked. Since the address conversion memory 2 is a direct conversion window for port 3, the address of the data read request protocol is converted to the address of the target port through the address conversion memory 2. In this case, the address is from 0xE000_0000 to 0x1000_0000.

[0075] This operation also hits the part of the rule search table that starts the ID conversion and determines the destination partition number. The destination port is determined using the converted address and the destination partition number. In this embodiment, the destination port is determined to be port 3 in downstream partition 1.

[0076] Step 302: In response to the address conversion register receiving the data read request protocol, the data read request protocol is parsed to obtain the protocol request address and the first node ID.

[0077] Step 303: convert the protocol request address into a target port address through an address conversion register, and convert the first node ID into a proxy device ID.

[0078] Step 302 and step 303 correspond to Fig. 9 In the above process ②, after the data read request protocol reaches the address conversion register address conversion memory 2, the data read request protocol will be parsed through the address conversion register 2 to obtain the protocol request address and the first node ID (node ​​0). Here, the protocol request address is the address of the data read request protocol. The protocol request address is converted into a target port address. Here, the target port address refers to the address of the target port of the target partition, which is port 3 in the figure. The first node ID is converted into a target ID through the address conversion memory. Here, the target ID refers to the ID of the proxy device corresponding to the data read request protocol.

[0079] The ID routing method is used here, where a function of a device can be uniquely found by ID = Bus Number + Device Number + Function Number.

[0080] The conversion of the first node ID to the target ID in the present application is specifically to convert the BDF of the data read request protocol jump partition into the BDF of the NT proxy function. This proxy function allows the data read request protocol to look like it comes from the target partition. It also allows the completion of the data read request protocol return, converts the corresponding BDF of the data read request protocol completion back to the original BDF, and finds a way to return to the original partition, that is, the original partition sent by the data read request protocol.

[0081] When processing TLP (Transaction Layer Protocol) packets, it is usually necessary to convert the BDF (Bus, Device, Function) of the TLP back to the original BDF value. You can define a decode_tlp_bdf function that accepts an encoded TLP BDF value as a parameter, and then extracts the various parts of the BDF through shift and AND operations. Finally, it returns the original BDF value.

[0082] As can be seen in the figure, the original TLP shows the requester (first node) ID as 0.1.0. ID translation converts the device and function numbers of the BDF to match the device and function of the proxy function (NT Proxy Fun). The bus number is not changed because ID translation does not know the bus number of the proxy function at this time. The value of the target ID ends up being 0.31.7. Among them, 31 is the proxy device number.

[0083] Step 304, based on the proxy device ID, the data read request protocol and the target port address are sent to the proxy device in the second sub-non-transparent bridge, the proxy device converts the proxy device ID to obtain the target ID, the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID.

[0084] Step 305: forward the data read request protocol to the target port based on the target port address.

[0085] Step 304 and step 305 correspond to Fig. 9 In the above process ③, after the data read request protocol comes out from the export port of the proxy device, the export editor of the proxy device will convert the ID of the proxy device, specifically the bus number of the proxy function, and for example, change the target ID from 0.31.7 to 1.31.7. This is to match the ID corresponding to the data read request protocol with the proxy device ID. After the target ID is converted, a matching ID is obtained, and the data read request protocol is forwarded to the target port based on the target port address (shown as EP3).

[0086] Step 207 : In response to the second memory receiving the target transmission data, the second driving module sends a message to the first controller to notify the first controller to start cache update based on the target transmission data.

[0087] Step 208: The second controller polls the target transmission data in the second memory and synchronizes the target transmission data to the second communication module. The second communication module synchronizes the target transmission data to the second cache module.

[0088] Step 209 : in response to the second controller confirming receipt of the target transmission data, sending feedback information to the first controller.

[0089] Step 210 , in response to the first controller receiving the feedback message, the first controller synchronizes the feedback information to the first communication module.

[0090] Specifically, the second driver module sends a message to the other end to inform the cache data update, the second controller polls the message, and after receiving the message, synchronizes the message to the second communication module, and the second communication module synchronizes the message to the second cache module on the second controller.

[0091] In this application, the first controller and the second controller establish a 1M*N queue space cache mapping area, which is responsible for the transmission of multiple queues and multiple channel messages of the first controller and the second controller. Each queue has 1M space and is responsible for sending messages. The messages are mainly divided into two types: read and write. Among them, the read type is responsible for reading messages from the opposite end, and the write type is responsible for writing the opposite end to the opposite end controller synchronously.

[0092] After confirming receipt of the message, the second controller sends a feedback message to the first controller. The first controller confirms that the second controller has successfully received the message and sends a synchronization message to the second communication module. The second communication module is responsible for deleting the process transaction layer.

[0093] In one embodiment, determining a second target transmission path corresponding to the transmission data according to the first non-transparent bridge and the second non-transparent bridge, and transmitting the transmission data to the second controller based on the second target transmission path by the first controller includes: Step 401: In response to the first controller receiving a data transmission instruction, the first controller obtains transmission data from the first cache module and sends the transmission data to the first communication module.

[0094] Step 402, in response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain encapsulated data, and sends the encapsulated data to the first driver module.

[0095] Step 403 , in response to the first driving module receiving the packaged data, the first driving module stores the packaged data into a target data pair array.

[0096] Step 404 , in response to the target data queue satisfying a preset condition, the first driver module sends the target transmission data in the target data queue satisfying the preset condition to the memory access queue in the first memory.

[0097] Step 405: The first driver module sends a notification to the first non-transparent bridge, and at the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge.

[0098] The specific implementation of steps 401 to 405 can be found in the description of steps 201 to 205 in the specification, which will not be described in detail here.

[0099] Step 406: The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and the target transmission data is transmitted to the second memory through the second non-transparent bridge.

[0100] After all the encapsulated data are stored in the target data queue in the first memory, the first driver module will send a notification to the first non-transparent bridge and the second non-transparent bridge, informing them that the target transmission data in the target data queue will be sent, and then perform address conversion through the first non-transparent bridge and the second non-transparent bridge, and send the target transmission data in the target data queue to the second memory on the second controller.

[0101] The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and the target transmission data is transmitted to the second memory through the second non-transparent bridge, including: Step 501: in response to the first non-transparent bridge receiving a data read request protocol sent by a first node corresponding to a first controller, acquiring the data read request protocol, and sending the data read request protocol to an address translation register; Step 502: In response to the address translation register receiving the data read request protocol, the data read request protocol is parsed to obtain the protocol request address and the first node ID; Step 503: convert the protocol request address into a target port address through an address conversion register, and convert the first node ID into a proxy device ID; Step 504: Based on the proxy device ID, the data read request protocol and the target port address are sent to the proxy device in the second non-transparent bridge. The proxy device converts the proxy device ID to obtain the target ID. The target port converts the target ID to generate a matching ID. The matching ID matches the first node ID. Step 505: forward the data read request protocol to the target port based on the target port address.

[0102] It can be understood that the specific implementation principle of steps 501-505 is consistent with the implementation principle of steps 301-305. The only difference is whether a first non-transparent bridge or a signal relay device is set on the second controller in steps 301-305 and steps 501-505. Therefore, it will not be repeated here.

[0103] Step 407: In response to the second memory receiving the target transmission data, the second driver module sends a message to the first controller to notify the first controller to start cache update based on the target transmission data.

[0104] Step 408: The second controller polls the target transmission data in the second memory and synchronizes the target transmission data to the second communication module. The second communication module synchronizes the target transmission data to the second cache module.

[0105] Step 409 , in response to the second controller confirming receipt of the target transmission data, sending feedback information to the first controller.

[0106] Step 410 : In response to the first controller receiving the feedback message, the first controller synchronizes the feedback information to the first communication module.

[0107] The specific implementation of steps 407 to 410 refers to the description of steps 207 to 210 in the specification, which will not be described in detail here.

[0108] In one embodiment, after forwarding the data read request protocol to the target port based on the target port address, that is, after step 305 or step 505, the following is further included: Step 306, obtaining a matching ID and a completion data protocol ID, where the completion data protocol ID is an ID of the completion data protocol sent to the first node when the target port completes receiving the data request protocol.

[0109] Step 307: Convert the matching ID and the completion data protocol ID into the first node ID.

[0110] Step 306 and step 307 correspond to Fig. 9 In the above process ④, in this application, the target device uses the completion message to actively send data to the first node. Unlike the data read request protocol, the completion data protocol corresponding to the completion data is transmitted using ID routing. Using the request ID (matching ID) of the proxy function, the request ID (matching ID) and the completion ID (ID of the completion data protocol) can be converted back to the BDF of the original partition (partition 0).

[0111] The completion ID here refers to the ID corresponding to the request that sends the completion data protocol. Here, the matching ID and completion ID are converted to match the node 0 (the first node) that originally sent the data read request protocol. The completion ID is translated to match the NT EP that the host originally accessed. The proxy function ID is also used to determine the target port to return to the original source partition (partition 0 where the first node is located).

[0112] Step 308, in response to the completion of converting the matching ID and the completion data protocol ID into the first node ID, forwarding the completion data protocol to the first node.

[0113] Step 308 corresponds to Fig. 9 In the above process ⑤, since the requester ID (matching ID) and completion ID have been modified, there is no need to edit the completion data protocol export. The only operation here is to forward the completion data protocol to node 0.

[0114] It should be understood that although Figure 7-Figure 9 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 6-Figure 8At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0115] In one embodiment, Fig.10 As shown, a dual-controller communication device is provided, including: a judgment module 20, a determination module 21 and a transmission module 22, wherein: The judgment module is used to judge whether a signal relay device is set on the second controller in response to the first controller receiving a data transmission instruction, the data transmission instruction including transmission data.

[0116] A determination module, for determining a first target transmission path corresponding to the transmission data according to the first non-transparent bridge and the signal relay device if a signal relay device is provided on the second controller; for determining whether a second non-transparent bridge is provided on the second controller if no signal relay device is provided on the second controller; for determining a second target transmission path corresponding to the transmission data according to the first non-transparent bridge and the second non-transparent bridge if a second non-transparent bridge is provided on the second controller; and for issuing a fault warning if no second non-transparent bridge is provided on the second controller; The transmission module is used for the first controller to transmit the transmission data to the second controller based on the first target transmission path and / or the second transmission path.

[0117] In one embodiment, the above device can implement another implementation of the dual-controller communication method, and the specific steps are as follows: Determining a first target transmission path corresponding to the transmission data according to the first non-transparent bridge and the signal relay device, the first controller transmitting the transmission data to the second controller based on the first target transmission path includes: In response to the first controller receiving the data transmission instruction, acquiring the transmission data from the first cache module and sending the transmission data to the first communication module; In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain encapsulated data, and sends the encapsulated data to the first driving module; In response to the first driving module receiving the packaged data, the first driving module stores the packaged data in the target data pair column; In response to the target data queue meeting the preset condition, the first driving module sends the target transmission data in the target data queue meeting the preset condition to the memory access queue in the first memory; The first driver module sends a notification to the first non-transparent bridge, and at the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge; The first non-transparent bridge sends the target transmission data to the signal relay device, and transmits the target transmission data to the second memory through the signal relay device.

[0118] In one embodiment, the above device can implement another implementation of the dual-controller communication method, and the specific steps are as follows: Determining a second target transmission path corresponding to the transmission data according to the first non-transparent bridge and the second non-transparent bridge, the first controller transmitting the transmission data to the second controller based on the second target transmission path includes: In response to the first controller receiving the data transmission instruction, acquiring the transmission data from the first cache module and sending the transmission data to the first communication module; In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain encapsulated data, and sends the encapsulated data to the first driving module; In response to the first driving module receiving the packaged data, the first driving module stores the packaged data in the target data pair column; In response to the target data queue meeting the preset condition, the first driving module sends the target transmission data in the target data queue meeting the preset condition to the memory access queue in the first memory; The first driver module sends a notification to the first non-transparent bridge, and at the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge; The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and transmits the target transmission data to the second memory through the second non-transparent bridge.

[0119] In one embodiment, the above device can implement another implementation of the dual-controller communication method, and the specific steps are as follows: The method also includes: In response to the second memory receiving the target transmission data, the second driver module sends a message to the first controller to notify the first controller to start cache update based on the target transmission data; The second controller polls the target transmission data in the second memory and synchronizes the target transmission data to the second communication module, and the second communication module synchronizes the target transmission data to the second cache module; In response to the second controller confirming receipt of the target transmission data, sending feedback information to the first controller; In response to the first controller receiving the feedback message, the first controller synchronizes the feedback information to the first communication module.

[0120] In one embodiment, the above device can implement another implementation of the dual-controller communication method, and the specific steps are as follows: The first non-transparent bridge sends the target transmission data to the signal relay device, and the target transmission data is transmitted to the second memory through the signal relay device, including: In response to the first sub-non-transparent bridge receiving a data read request protocol sent by a first node corresponding to the first controller, acquiring the data read request protocol, and sending the data read request protocol to the address translation register; In response to the address translation register receives a data read request protocol, the data read request protocol is parsed to obtain the protocol request address and the first node ID; Convert the protocol request address to the target port address through the address conversion register, and convert the first node ID to the proxy device ID; Based on the proxy device ID, the data read request protocol and the target port address are sent to the proxy device in the second sub-non-transparent bridge, the proxy device converts the proxy device ID to obtain the target ID, the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID; The data read request protocol is forwarded to the target port based on the target port address.

[0121] In one embodiment, the above device can implement another implementation of the dual-controller communication method, and the specific steps are as follows: The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and the target transmission data is transmitted to the second memory through the second non-transparent bridge, comprising: In response to the first non-transparent bridge receiving a data read request protocol sent by a first node corresponding to the first controller, acquiring the data read request protocol, and sending the data read request protocol to the address translation register; In response to the address translation register receives a data read request protocol, the data read request protocol is parsed to obtain the protocol request address and the first node ID; Convert the protocol request address to the target port address through the address conversion register, and convert the first node ID to the proxy device ID; Based on the proxy device ID, the data read request protocol and the target port address are sent to the proxy device in the second non-transparent bridge, the proxy device converts the proxy device ID to obtain the target ID, the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID; The data read request protocol is forwarded to the target port based on the target port address.

[0122] In one embodiment, the above device can implement another implementation of the dual-controller communication method, and the specific steps are as follows: After forwarding the data read request protocol to the target port based on the target port address, it also includes: Get the matching ID and complete the data protocol ID, the data protocol ID is completed when the target port receives the data request protocol is completed, the completion data protocol ID sent to the first node; Convert the matching ID and the completion data protocol ID into the first node ID; In response to the matching ID and the completion data protocol ID being converted to the first node ID being completed, the completion data protocol is forwarded to the first node.

[0123] For the specific definition of the dual-controller communication device, please refer to the definition of the dual-controller communication method above, which will not be repeated here. Each module in the above dual-controller communication device can be implemented in whole or in part by software, hardware and a combination thereof. The above modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.

[0124] In one embodiment, the present application also provides a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium, and the computer program includes program instructions. When the program instructions are executed by a computer, the computer can execute the dual-controller communication method provided by the above methods.

[0125] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Fig.11 As shown. The computer device includes a processor, a memory, a network interface, a display screen and an input device connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a dual-controller communication method is implemented. The display screen of the computer device can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covering the display screen, or a key, trackball or touchpad set on the computer device housing, or an external keyboard, touchpad or mouse, etc.

[0126] Those skilled in the art will understand that Fig.11 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0127] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the following steps when executing the computer program: Step 101: In response to a first controller receiving a data transmission instruction, the data transmission instruction including transmission data, determining whether a signal relay device is set on a second controller.

[0128] Step 102: If a signal relay device is provided on the second controller, a first target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the signal relay device.

[0129] Step 103: If the signal relay device is not set on the second controller, determine whether a second non-transparent bridge is set on the second controller.

[0130] Step 104: If a second non-transparent bridge is provided on the second controller, a second target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the second non-transparent bridge.

[0131] Step 105: If the second non-transparent bridge is not provided on the second controller, a fault warning is issued.

[0132] Step 106: The first controller transmits the transmission data to the second controller based on the first target transmission path and / or the second transmission path.

[0133] In one embodiment, when the processor executes the computer program, the processor further implements the following steps: Determining a first target transmission path corresponding to the transmission data according to the first non-transparent bridge and the signal relay device, the first controller transmitting the transmission data to the second controller based on the first target transmission path includes: In response to the first controller receiving the data transmission instruction, acquiring the transmission data from the first cache module and sending the transmission data to the first communication module; In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain encapsulated data, and sends the encapsulated data to the first driving module; In response to the first driving module receiving the packaged data, the first driving module stores the packaged data in the target data pair column; In response to the target data queue satisfying a preset condition, the first driving module sends the target transmission data in the target data queue satisfying the preset condition to the memory access queue in the first memory; The first driver module sends a notification to the first non-transparent bridge, and at the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge; The first non-transparent bridge sends the target transmission data to the signal relay device, and transmits the target transmission data to the second memory through the signal relay device.

[0134] In one embodiment, when the processor executes the computer program, the processor further implements the following steps: Determining a second target transmission path corresponding to the transmission data according to the first non-transparent bridge and the second non-transparent bridge, the first controller transmitting the transmission data to the second controller based on the second target transmission path includes: In response to the first controller receiving the data transmission instruction, acquiring the transmission data from the first cache module and sending the transmission data to the first communication module; In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain encapsulated data, and sends the encapsulated data to the first driving module; In response to the first driving module receiving the packaged data, the first driving module stores the packaged data in the target data pair column; In response to the target data queue satisfying a preset condition, the first driving module sends the target transmission data in the target data queue satisfying the preset condition to the memory access queue in the first memory; The first driver module sends a notification to the first non-transparent bridge, and at the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge; The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and transmits the target transmission data to the second memory through the second non-transparent bridge.

[0135] In one embodiment, when the processor executes the computer program, the processor further implements the following steps: The method also includes: In response to the second memory receiving the target transmission data, the second driver module sends a message to the first controller to notify the first controller to start cache update based on the target transmission data; The second controller polls the target transmission data in the second memory and synchronizes the target transmission data to the second communication module, and the second communication module synchronizes the target transmission data to the second cache module; In response to the second controller confirming receipt of the target transmission data, sending feedback information to the first controller; In response to the first controller receiving the feedback message, the first controller synchronizes the feedback information to the first communication module.

[0136] In one embodiment, when the processor executes the computer program, the processor further implements the following steps: The first non-transparent bridge sends the target transmission data to the signal relay device, and the target transmission data is transmitted to the second memory through the signal relay device, including: In response to the first sub-non-transparent bridge receiving a data read request protocol sent by a first node corresponding to the first controller, acquiring the data read request protocol, and sending the data read request protocol to the address translation register; In response to the address translation register receives a data read request protocol, the data read request protocol is parsed to obtain the protocol request address and the first node ID; Convert the protocol request address into a target port address through an address conversion register, and convert the first node ID into a proxy device ID; Based on the proxy device ID, the data read request protocol and the target port address are sent to the proxy device in the second sub-non-transparent bridge, the proxy device converts the proxy device ID to obtain the target ID, the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID; The data read request protocol is forwarded to the target port based on the target port address.

[0137] In one embodiment, when the processor executes the computer program, the processor further implements the following steps: The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and the target transmission data is transmitted to the second memory through the second non-transparent bridge, comprising: In response to the first non-transparent bridge receiving a data read request protocol sent by a first node corresponding to the first controller, acquiring the data read request protocol, and sending the data read request protocol to the address translation register; In response to the address translation register receives a data read request protocol, the data read request protocol is parsed to obtain the protocol request address and the first node ID; Convert the protocol request address into a target port address through an address conversion register, and convert the first node ID into a proxy device ID; Based on the proxy device ID, the data read request protocol and the target port address are sent to the proxy device in the second non-transparent bridge, the proxy device converts the proxy device ID to obtain the target ID, the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID; The data read request protocol is forwarded to the target port based on the target port address.

[0138] In one embodiment, when the processor executes the computer program, the processor further implements the following steps: After forwarding the data read request protocol to the target port based on the target port address, it also includes: Get the matching ID and complete the data protocol ID, the data protocol ID is completed when the target port receives the data request protocol is completed, the completion data protocol ID sent to the first node; Convert the matching ID and the completion data protocol ID into the first node ID; In response to the matching ID and the completion data protocol ID being converted to the first node ID being completed, the completion data protocol is forwarded to the first node.

[0139] In one embodiment, a computer readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented: Step 101: In response to a first controller receiving a data transmission instruction, the data transmission instruction including transmission data, determining whether a signal relay device is set on a second controller.

[0140] Step 102: If a signal relay device is provided on the second controller, a first target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the signal relay device.

[0141] Step 103: If the signal relay device is not set on the second controller, determine whether a second non-transparent bridge is set on the second controller.

[0142] Step 104: If a second non-transparent bridge is provided on the second controller, a second target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the second non-transparent bridge.

[0143] Step 105: If the second non-transparent bridge is not provided on the second controller, a fault warning is issued.

[0144] Step 106: The first controller transmits the transmission data to the second controller based on the first target transmission path and / or the second transmission path.

[0145] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented: Determining a first target transmission path corresponding to the transmission data according to the first non-transparent bridge and the signal relay device, the first controller transmitting the transmission data to the second controller based on the first target transmission path includes: In response to the first controller receiving the data transmission instruction, acquiring the transmission data from the first cache module and sending the transmission data to the first communication module; In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain encapsulated data, and sends the encapsulated data to the first driving module; In response to the first driving module receiving the packaged data, the first driving module stores the packaged data in the target data pair column; In response to the target data queue meeting the preset condition, the first driving module sends the target transmission data in the target data queue meeting the preset condition to the memory access queue in the first memory; The first driver module sends a notification to the first non-transparent bridge, and at the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge; The first non-transparent bridge sends the target transmission data to the signal relay device, and transmits the target transmission data to the second memory through the signal relay device.

[0146] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented: Determining a second target transmission path corresponding to the transmission data according to the first non-transparent bridge and the second non-transparent bridge, the first controller transmitting the transmission data to the second controller based on the second target transmission path includes: In response to the first controller receiving the data transmission instruction, acquiring the transmission data from the first cache module and sending the transmission data to the first communication module; In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain encapsulated data, and sends the encapsulated data to the first driving module; In response to the first driving module receiving the packaged data, the first driving module stores the packaged data in the target data pair column; In response to the target data queue meeting the preset condition, the first driving module sends the target transmission data in the target data queue meeting the preset condition to the memory access queue in the first memory; The first driver module sends a notification to the first non-transparent bridge, and at the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge; The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and transmits the target transmission data to the second memory through the second non-transparent bridge.

[0147] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented: The method also includes: In response to the second memory receiving the target transmission data, the second driver module sends a message to the first controller to notify the first controller to start cache update based on the target transmission data; The second controller polls the target transmission data in the second memory and synchronizes the target transmission data to the second communication module, and the second communication module synchronizes the target transmission data to the second cache module; In response to the second controller confirming receipt of the target transmission data, sending feedback information to the first controller; In response to the first controller receiving the feedback message, the first controller synchronizes the feedback information to the first communication module.

[0148] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented: The first non-transparent bridge sends the target transmission data to the signal relay device, and the target transmission data is transmitted to the second memory through the signal relay device, including: In response to the first sub-non-transparent bridge receiving a data read request protocol sent by a first node corresponding to the first controller, acquiring the data read request protocol, and sending the data read request protocol to the address translation register; In response to the address translation register receives a data read request protocol, the data read request protocol is parsed to obtain the protocol request address and the first node ID; Convert the protocol request address into a target port address through an address conversion register, and convert the first node ID into a proxy device ID; Based on the proxy device ID, the data read request protocol and the target port address are sent to the proxy device in the second sub-non-transparent bridge, the proxy device converts the proxy device ID to obtain the target ID, the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID; The data read request protocol is forwarded to the target port based on the target port address.

[0149] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented: The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and the target transmission data is transmitted to the second memory through the second non-transparent bridge, comprising: In response to the first non-transparent bridge receiving a data read request protocol sent by a first node corresponding to the first controller, acquiring the data read request protocol, and sending the data read request protocol to the address translation register; In response to the address translation register receives a data read request protocol, the data read request protocol is parsed to obtain the protocol request address and the first node ID; Convert the protocol request address into a target port address through an address conversion register, and convert the first node ID into a proxy device ID; Based on the proxy device ID, the data read request protocol and the target port address are sent to the proxy device in the second non-transparent bridge, the proxy device converts the proxy device ID to obtain the target ID, the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID; The data read request protocol is forwarded to the target port based on the target port address.

[0150] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented: After forwarding the data read request protocol to the target port based on the target port address, it also includes: Get the matching ID and complete the data protocol ID, the data protocol ID is completed when the target port receives the data request protocol is completed, the completion data protocol ID sent to the first node; Convert the matching ID and the completion data protocol ID into the first node ID; In response to the matching ID and the completion data protocol ID being converted to the first node ID being completed, the completion data protocol is forwarded to the first node.

[0151] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be implemented by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0152] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0153] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application.

Claims

1. A dual-controller communication system, characterized in that: The system comprises a first controller and a second controller: The first controller includes a first processor and a first non-transparent bridge; The second controller includes a second processor and a signal relay device; The input end of the first non-transparent bridge is connected to the output end of the first processor, the output end of the first non-transparent bridge is connected to the input end of the signal relay device, and the output end of the signal relay device is connected to the input end of the second processor.

2. The system according to claim 1, characterized in that The first non-transparent bridge includes a first sub-non-transparent bridge and a second sub-non-transparent bridge, the input end of the first sub-non-transparent bridge is connected to the output end of the first processor, the output end of the first sub-non-transparent bridge is connected to the input end of the second sub-non-transparent bridge, the output end of the second sub-non-transparent bridge is connected to the input end of the signal relay device, and the output end of the signal relay device is connected to the input end of the second processor.

3. The system according to claim 1, characterized in that The first controller further includes a first memory, and the second controller further includes a second memory. The first memory is respectively connected to the first processor and the first non-transparent bridge for communication, and the second memory is respectively connected to the second processor and the signal relay device for communication.

4. The system according to claim 1, characterized in that The first controller also includes a first driving module, and the second controller also includes a second driving module. The first driving module is communicatively connected to the first processor, and the second driving module is communicatively connected to the second processor. The first driving module and the second driving module are used to establish a mapping relationship between the first memory and the second memory.

5. The system according to claim 1, characterized in that The first controller further includes a first communication module and a first cache module, and the second controller further includes a second communication module and a second cache module, the input end of the first communication module is connected to the output end of the first cache module, and the output end of the first communication module is connected to the input end of the first driving module; The input end of the second communication module is connected to the output end of the second buffer module, and the output end of the second communication module is connected to the input end of the second driving module.

6. The system according to claim 1, characterized in that The second controller also includes a card slot, which is used to detachably install the second non-transparent bridge to achieve the use of the second non-transparent bridge to replace the signal relay device.

7. A dual controller communication method, characterized in that: The dual-controller communication method is applied to the dual-controller communication system according to any one of claims 1 to 6, and the method comprises: In response to the first controller receiving a data transmission instruction, the data transmission instruction including transmission data, determining whether a signal relay device is set on the second controller; If a signal relay device is provided on the second controller, a first target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the signal relay device; If the signal relay device is not provided on the second controller, determining whether a second non-transparent bridge is provided on the second controller; If a second non-transparent bridge is provided on the second controller, a second target transmission path corresponding to the transmission data is determined according to the first non-transparent bridge and the second non-transparent bridge; If the second non-transparent bridge is not provided on the second controller, a fault warning is issued; The first controller transmits the transmission data to the second controller based on the first target transmission path and / or the second transmission path.

8. The method according to claim 7, characterized in that Determining a first target transmission path corresponding to the transmission data according to the first non-transparent bridge and the signal relay device, the first controller transmitting the transmission data to the second controller based on the first target transmission path comprises: In response to the first controller receiving the data transmission instruction, acquiring the transmission data from the first cache module and sending the transmission data to the first communication module; In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain encapsulated data, and sends the encapsulated data to the first driving module; In response to the first driving module receiving the packaged data, the first driving module stores the packaged data in the target data pair column; In response to the target data queue meeting the preset condition, the first driving module sends the target transmission data in the target data queue meeting the preset condition to the memory access queue in the first memory; The first driver module sends a notification to the first non-transparent bridge, and at the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge; The first non-transparent bridge sends the target transmission data to a signal relay device, and transmits the target transmission data to a second memory through the signal relay device.

9. The method according to claim 7, characterized in that: Determining a second target transmission path corresponding to the transmission data according to the first non-transparent bridge and the second non-transparent bridge, the first controller transmitting the transmission data to the second controller based on the second target transmission path comprises: In response to the first controller receiving the data transmission instruction, acquiring the transmission data from the first cache module and sending the transmission data to the first communication module; In response to the first communication module receiving the transmission data, the first communication module converts the transmission data into a data sequence, performs protocol encapsulation on the data sequence to obtain encapsulated data, and sends the encapsulated data to the first driving module; In response to the first driving module receiving the packaged data, the first driving module stores the packaged data in the target data pair column; In response to the target data queue meeting the preset condition, the first driving module sends the target transmission data in the target data queue meeting the preset condition to the memory access queue in the first memory; The first driver module sends a notification to the first non-transparent bridge, and at the same time, the target transmission data in the memory access queue is sent to the first non-transparent bridge, and the management data in the first driver module is synchronized to the first non-transparent bridge; The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and transmits the target transmission data to the second memory through the second non-transparent bridge.

10. The method according to claim 8 or 9, characterized in that: The method further comprises: In response to the second memory receiving the target transmission data, the second driver module sends a message to the first controller to notify the first controller to start cache update based on the target transmission data; The second controller polls the target transmission data in the second memory and synchronizes the target transmission data to the second communication module, and the second communication module synchronizes the target transmission data to the second cache module; In response to the second controller confirming receipt of the target transmission data, sending feedback information to the first controller; In response to the first controller receiving the feedback message, the first controller synchronizes the feedback information to the first communication module.

11. The method according to claim 8, characterized in that The first non-transparent bridge sends the target transmission data to a signal relay device, and the target transmission data is transmitted to a second memory through the signal relay device, including: In response to the first sub-non-transparent bridge receiving a data read request protocol sent by a first node corresponding to the first controller, acquiring the data read request protocol, and sending the data read request protocol to the address translation register; In response to the address translation register receiving the data read request protocol, the data read request protocol is parsed to obtain the protocol request address and the first node ID; Convert the protocol request address to the target port address through the address conversion register, and convert the first node ID to the proxy device ID; The data read request protocol and the target port address are sent to the proxy device in the second sub-non-transparent bridge based on the proxy device ID, the proxy device converts the proxy device ID to obtain the target ID, the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID; The data read request protocol is forwarded to the target port based on the target port address.

12. The method according to claim 9, characterized in that The first non-transparent bridge sends the target transmission data to the second non-transparent bridge, and the target transmission data is transmitted to the second memory through the second non-transparent bridge, comprising: In response to the first non-transparent bridge receiving a data read request protocol sent by a first node corresponding to the first controller, acquiring the data read request protocol, and sending the data read request protocol to the address translation register; In response to the address translation register receiving the data read request protocol, the data read request protocol is parsed to obtain the protocol request address and the first node ID; Convert the protocol request address to the target port address through the address conversion register, and convert the first node ID to the proxy device ID; Sending the data read request protocol and the target port address to the proxy device in the second non-transparent bridge based on the proxy device ID, the proxy device converts the proxy device ID to obtain the target ID, the target port converts the target ID to generate a matching ID, and the matching ID matches the first node ID; The data read request protocol is forwarded to the target port based on the target port address.

13. The method according to claim 11 or 12, characterized in that: The method further comprises: forwarding the data read request protocol to the target port based on the target port address; Get the matching ID and complete data protocol ID, the completion of the data protocol ID is the target port to receive the data request protocol is completed, sent to the first node to complete the data protocol ID; Convert the matching ID and the completion data protocol ID into a first node ID; In response to the conversion of the matching ID and the completion data protocol ID to the first node ID being completed, the completion data protocol is forwarded to the first node.

14. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 7 to 13 are implemented.

15. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 7 to 13 are implemented.

16. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 7 to 13 are implemented.

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