Neural network general pre-processing acceleration method and device, equipment and medium
By generating general operating streams and automatic data slices, the problem of insufficient preprocessing performance of intelligent digital signal processors is solved, and efficient preprocessing acceleration is achieved.
Patent Information
- Application Number
- CN202411811324.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-10
- Publication Date
- 2025-03-28
AI Technical Summary
When using intelligent digital signal processors for preprocessing in the prior art, the versatility and acceleration performance of preprocessing need to be improved.
By obtaining and parsing configuration files, a general operation flow is generated, the preprocessing of different neural networks is divided into multiple sub-operations, and the data slice is automatically completed based on the number of cores of the intelligent digital signal processor, the preprocessing calculation is completed through a single IO read and write operation, and the storage index table is automatically generated.
The diversity and efficient acceleration of preprocessing are achieved, greatly reducing the time for data reading, writing and processing, and improving the preprocessing performance of using smart digital signal processors.
Smart Images
Figure CN119722427A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of big data processing acceleration, and relates to a general neural network pre-processing acceleration method, device, equipment and medium. Background Art
[0002] In recent years, with the further development of artificial intelligence and big data technology, artificial intelligence has involved more and more fields, which are closely related to the lives of users and have also helped the development of various industries and fields. At present, in practical applications, most neural networks are still based on servers or high-performance terminals to complete network training and reasoning. In order to reduce costs and meet the needs of edge computing, embedded development will become the first choice. From some progress in the development of embedded neural networks, the neural network part is usually calculated using a dedicated AI chip, but the data must be pre-processed and quantized before entering the neural network. The pre-processing includes mean scaling, normalization, channel conversion, and image size transformation. Quantization is divided into UINT8, INT8, and INT16. After pre-processing and quantization, the data is processed into standard input data and then input into the AI chip.
[0003] Common pre-processing methods include: using ARM chips for calculations, but they are inefficient and heat dissipation is not easy to solve; using FPGA chips for calculations is suitable for application scenarios that require high parallelism, low latency and flexibility, but they are expensive and have limited resources; using intelligent digital signal processors (DSPs) for calculations can meet the current demand for high computing resources and have advantages in timeliness. However, when using intelligent digital signal processors for calculations, the versatility and acceleration performance of pre-processing need to be improved. Summary of the invention
[0004] In response to the problems existing in the above-mentioned traditional technologies, the present invention proposes a universal pre-processing acceleration method for neural networks, a universal pre-processing acceleration device for neural networks, a computer device and a computer-readable storage medium, which can effectively improve the versatility and acceleration performance of pre-processing when using intelligent digital signal processors for calculations.
[0005] In order to achieve the above objectives, the embodiments of the present invention adopt the following technical solutions: On the one hand, a general pre-processing acceleration method for a neural network is provided, comprising the steps of: Get the input image to be processed; Obtain and parse the configuration file to generate a general operation flow for the input image; the configuration file is configured and generated according to the image input format of the input image and the data input format of the network that processes the input image, and the configuration file is used to combine multiple sub-operations of the pre-processing division corresponding to different neural networks into a general operation flow according to the set operation sequence, and the multiple sub-operations include resizing, color channel order adjustment, dimension change, mean scaling, normalization and quantization of the image; After automatically completing data slicing of the input image according to the number of cores of the intelligent digital signal processor, the pre-processing calculation of the input image is completed through one IO read and write operation according to the generated general operation flow, and a storage index table is automatically generated; The data after pre-processing calculation of the input image is stored in a specific memory area according to the storage index table.
[0006] On the other hand, a general neural network pre-processing acceleration device is also provided, comprising: An image acquisition module is used to acquire input images to be processed; A configuration parsing module is used to obtain and parse a configuration file to generate a general operation flow for an input image; the configuration file is configured and generated according to an image input format of the input image and a data input format of a network that processes the input image, and the configuration file is used to combine multiple sub-operations of pre-processing corresponding to different neural networks into a general operation flow according to a set operation sequence, and the multiple sub-operations include resizing, color channel order adjustment, dimension change, mean scaling, normalization, and quantization of the image; The processing and calculation module is used to automatically complete data slicing of the input image according to the number of cores of the intelligent digital signal processor, complete the pre-processing calculation of the input image through one IO read and write operation according to the generated general operation flow, and automatically generate a storage index table; The data storage module is used to store the data after pre-processing calculation of the input image into a specific memory area according to the storage index table.
[0007] On the other hand, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the steps of the above-mentioned general pre-processing acceleration method for neural networks are implemented.
[0008] On the other hand, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above-mentioned general pre-processing acceleration method of a neural network are implemented.
[0009] One of the above technical solutions has the following advantages and beneficial effects: The above-mentioned neural network universal pre-processing acceleration method, device, equipment and medium, after reasonably dividing the various pre-processing corresponding to different neural networks into multiple sub-operations, completes the combination of multiple sub-operations and generates a universal operation flow in the form of configuration files for the image input format determined by different neural networks and the data input format of the network, and processes the image data according to the generated operation flow, thereby achieving diversity in pre-processing without redundant calculations. On the intelligent digital signal processor side, multi-core parallel processing is achieved by automatically slicing the image data and reading and writing all the above-mentioned operation flows at once, and a storage index table is automatically generated to realize the storage of processed data, which greatly reduces the time for data reading, writing and processing, and effectively improves the versatility and acceleration performance of pre-processing when using an intelligent digital signal processor for calculations. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0011] Figure 1 A schematic diagram of a general pre-processing acceleration method for a neural network in one embodiment; Figure 2 A schematic diagram of storage of a hwc-rgb image dimension changed to chw-rgb in one embodiment; Figure 3 Schematic diagram of the module structure of a general pre-processing acceleration device for a neural network in one embodiment. DETAILED DESCRIPTION
[0012] In order to make the purpose, technical scheme and advantages of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and Examples. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art of the present invention. The terms used in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention.
[0013] It should be noted that the reference to "embodiment" in this article means that the specific features, structures or characteristics described in conjunction with the embodiment may be included in at least one embodiment of the present invention. The presentation of this phrase at various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It will be appreciated by those skilled in the art that the embodiments described herein may be combined with other embodiments. The term "and / or" used in the specification of the present invention and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes these combinations.
[0014] The following will describe the implementation of the present invention in detail with reference to the accompanying drawings in the embodiment diagram of the present invention.
[0015] In artificial intelligence deep learning technology, the traditional neural network pre-processing method is to receive the original input data to be processed and extract data from the original input data to obtain the first floating-point coefficient corresponding to the original input data; according to the current shift parameter, the first floating-point coefficient is shifted and iteratively processed until the first floating-point coefficient after shifting is greater than the preset threshold, and the first floating-point coefficient after iteration and the shift parameter corresponding to the current iteration are obtained; after each shift iterative processing, the current shift parameter is increased by the first value to obtain the shift parameter corresponding to the next shift iterative processing; the shift parameter of the first iteration is the preset value; according to the shift parameter corresponding to the current iteration, the original input data is shifted and the fixed-point parameter is obtained to complete the neural network pre-processing. This traditional method reduces the precision loss of the fixed-point calculation of the original floating-point data and can optimize the data, but it does not meet the diversity (i.e., versatility) of the pre-processing, and the improvement of the acceleration performance is also relatively limited. It requires multiple IO (input and output) reading and writing to achieve pre-processing.
[0016] In one embodiment, Figure 1 As shown, a general neural network pre-processing acceleration method is provided, which may include the following processing steps S10 to S16: S10, obtaining an input image to be processed; S12, obtaining and parsing a configuration file to generate a general operation flow for the input image; the configuration file is configured and generated according to the image input format of the input image and the data input format of the network that processes the input image, and the configuration file is used to combine multiple sub-operations of the pre-processing division corresponding to different neural networks into a general operation flow according to a set operation order, and the multiple sub-operations include resizing the image, adjusting the color channel order, changing the dimension, scaling the mean, normalizing, and quantizing; S14, after automatically completing data slicing of the input image according to the number of cores of the intelligent digital signal processor, complete pre-processing calculation of the input image through one IO read and write operation according to the generated general operation flow and automatically generate a storage index table; S16, storing the data after pre-processing and calculation of the input image into a specific memory area according to the storage index table.
[0017] It can be understood that for each input image, the various pre-processing corresponding to different neural networks is first reasonably divided into multiple sub-operations, which may include resizing, color channel order adjustment, dimension change, mean scaling, normalization, and quantization. For different neural networks, the image input format and the network data input format can be determined first, the configuration file parameters can be set, the configuration file can be parsed to complete the combination of multiple sub-operations and generate a general operation flow, and the image data can be processed according to the generated operation flow. In this way, the data input format and the image input format of the neural network are set by configuration, and a general operation flow can be automatically and arbitrarily generated according to the information of the configuration file, thereby realizing the diversity of pre-processing and no redundant calculations. On the intelligent digital signal processor side, multi-core parallel processing is realized by automatically slicing the image data, and the storage index table is automatically generated. At the same time, all the above operation flows can be read and written at one time, which greatly reduces the time for data reading and writing.
[0018] The above-mentioned neural network general pre-processing acceleration method, after reasonably dividing the various pre-processing corresponding to different neural networks into multiple sub-operations, completes the combination of multiple sub-operations and generates a general operation flow in the form of configuration files for the image input format determined by different neural networks and the data input format of the network, and processes the image data according to the generated operation flow, thereby realizing the diversity of pre-processing without redundant calculations. On the intelligent digital signal processor side, multi-core parallel processing is realized by automatically slicing the image data and reading and writing all the above-mentioned operation flows at once, and a storage index table is automatically generated to realize the storage of processed data, which greatly reduces the time for data reading, writing and processing, and effectively improves the versatility and acceleration performance of pre-processing when using an intelligent digital signal processor for calculations.
[0019] It should be noted that the general operation flow specifically refers to the processing workflow formed by connecting the selected processing operations according to the configured operation order, based on which processing operations and operation order are needed in the pre-processing part. For example, for the yolov5s network, the image it reads is UINT8's BGR HWC data (that is, the image input format). The network's data input format requires RGB's CHW data layout and needs to undergo mean scaling and normalization operations. The operation flow is to transform the image size -> adjust the color channel order (such as RGB2BRG) -> change the dimension (such as HWC2CHW) -> normalization -> mean scaling -> quantization; similarly, it can be applied to pre-processing with diverse requirements, and different operation flows can be automatically generated without redundant calculations.
[0020] The color channel order adjustment is because OpenCV (a cross-platform computer vision library) uses the BGR format by default, while many other image processing libraries or frameworks (such as PIL or Matplotlib) use the RGB format. Therefore, this conversion is required before image display or processing.
[0021] HWC and CHW are two different formats for representing the layout of tensor data, especially used to describe the structure of image data, referring to the number of images processed simultaneously; where H (Height) refers to the height of the image, W (Width) refers to the width of the image, and C (Channels) refers to the number of color channels (for example, for RGB images, C=3).
[0022] In one embodiment, normalization and mean scaling are combined into one sub-operation in a common operation flow.
[0023] It can be understood that in this embodiment, the normalization and mean scaling are integrated into one sub-operation, which can further reduce the data interaction and reduce the operations, and the optimization of division into multiplication can further speed up the calculation. Formula (1) is the multiplication before optimization, and formula (2) is the multiplication after the division optimization, as shown below: (1) (2) Among them, nor m represents normalization, data is the input data for the normalization operation, mean and scale are the mean value and scaling factor of the data, both of which are constants, so mean *255 is also a constant, 1 / ( scale *255) is also a constant, thus realizing the change from division to multiplication.
[0024] In one embodiment, normalization, mean scaling, and quantization are combined into one sub-operation in a common operation flow.
[0025] It can be understood that quantization can be divided into asymmetric affine quantization (asymmetric_affine) and dynamic fixed-point quantization (dynamic_fixed_point). This embodiment can integrate normalization, mean scaling and quantization into one sub-operation. Taking dynamic fixed-point quantization as an example, the formula of dynamic fixed-point quantization is as follows: (3) in, For the quantified data, indata is the input data for the quantization operation. ,So ;if ,So , is the quantization scaling factor, which is a constant.
[0026] This embodiment combines normalization, mean scaling, and quantization into one sub-operation, which can further reduce data interaction and operations. Therefore, formula (2) and formula (3) are combined and optimized to be expressed as follows: (4) In one embodiment, regarding the above step S14, the process of automatically completing data slicing of the input image according to the number of cores of the intelligent digital signal processor may specifically include the following processing: If the input image is three-channel image data, the number of slices is a multiple of 3; the multiple is the number of cores of the intelligent digital signal processor; If the input image is single-channel image data, it is directly segmented according to the number of cores of the intelligent digital signal processor.
[0027] It can be understood that, at the intelligent digital signal processor end, the traditional method is to distribute the data of each sub-operation that does not affect the result after each data slicing to multiple intelligent digital signal processors for processing in order, and then integrate the processing results into a specific memory area. In this embodiment, all pre-processing operations for each input image are determined by automatically generating an operation flow, and all pre-processing calculations are completed in one operation and data slicing is automatically completed. All pre-processing calculations can be completed and a storage index table is automatically generated through a single IO read and write operation, and the pre-processed data is directly stored in a specific memory area according to the storage index table, thereby achieving the simplification of hardware operations and the minimization of IO reading.
[0028] Among them, automatic data slicing is automatically completed according to the number of channels of the image data and the number of cores of the intelligent digital signal processor. For example, three-channel image data will be sliced into multiples of 3, which is related to the number of cores of the intelligent digital signal processor. For example, the intelligent digital signal processor is a 6-core processor, the image data will be sliced into 6 parts, and the intelligent digital signal processor is a 7-, 8- or 9-core processor, The image data will be sliced into 9 parts; for example, if the image data is a single channel, it is directly divided according to the number of cores of the intelligent digital signal processor. For example, if the image data is a single channel, the number of slices should be a divisible integer. For example, if a picture of size 640 is divided by 7 cores, the result is not divisible, then the image data is sliced into 6 parts.
[0029] Among them, the storage index table is automatically generated: an input image, which is generally a hwc-bgr data structure, where h is width, w is length, and c is the number of channels. The output data structure is hwc-bgr, hwc-rgb, chw-bgr or chw-rgb, which includes two operations: color channel adjustment (rbg2bgr) and dimension change (hwc2chw), through two address mappings (such as Figure 2 The data handling process shown in the figure can generate a storage index table, based on which the pre-processed data is directly stored in a specific storage area. For example, the storage diagram of the hwc-rgb image dimension change to chw-bgr is as follows Figure 2 As shown, Rij represents the data of the i-th row and j-th column of the R channel, Gij represents the data of the i-th row and j-th column of the G channel, and Bij represents the data of the i-th row and j-th column of the B channel. i=0,1,2,3; j=0,1,2,3.
[0030] It should be understood that although Figure 1 The steps in the method are shown in sequence as indicated by the arrows, but the steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of the steps, and the steps can be executed in other orders. Figure 1 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequentially, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.
[0031] In one embodiment, Figure 3As shown, a general pre-processing acceleration device 100 for a neural network is provided, comprising an image acquisition module 11, a configuration analysis module 13, a processing and calculation module 15, and a data storage module 17. Among them, the image acquisition module 11 is used to obtain the input image to be processed. The configuration analysis module 13 is used to obtain and analyze the configuration file to generate a general operation flow for the input image; the configuration file is configured and generated according to the image input format of the input image and the data input format of the network that processes the input image, and the configuration file is used to combine multiple sub-operations of the pre-processing division corresponding to different neural networks into a general operation flow according to the set operation sequence, and the multiple sub-operations include image size transformation, color channel order adjustment, dimension change, mean scaling, normalization, and quantization. The processing and calculation module 15 is used to automatically complete data slicing of the input image according to the number of cores of the intelligent digital signal processor, and then complete the pre-processing calculation of the input image through one IO read and write operation according to the generated general operation flow and automatically generate a storage index table. The data storage module 17 is used to store the data after the pre-processing calculation of the input image in a specific memory area according to the storage index table.
[0032] The above-mentioned neural network universal pre-processing acceleration device 100, after reasonably dividing the various pre-processings corresponding to different neural networks into multiple sub-operations, completes the combination of multiple sub-operations and generates a universal operation flow in the form of configuration files for the image input format determined by different neural networks and the data input format of the network, and processes the image data according to the generated operation flow, thereby realizing the diversity of pre-processing without redundant calculations. On the intelligent digital signal processor side, multi-core parallel processing is realized by automatically slicing the image data and reading and writing all the above-mentioned operation flows at once, and a storage index table is automatically generated to realize the storage of processed data, which greatly reduces the time for data reading, writing and processing, and effectively improves the versatility and acceleration performance of pre-processing when using an intelligent digital signal processor for calculations.
[0033] In one embodiment, normalization and mean scaling are combined into one sub-operation in a common operation flow.
[0034] In one embodiment, normalization, mean scaling, and quantization are combined into one sub-operation in a common operation flow.
[0035] In one embodiment, the process of automatically completing data slicing of the input image according to the number of cores of the intelligent digital signal processor may include: If the input image is three-channel image data, the number of slices is a multiple of 3; the multiple is the number of cores of the intelligent digital signal processor; If the input image is single-channel image data, it is directly segmented according to the number of cores of the intelligent digital signal processor.
[0036] It can be understood that, regarding the specific limitations of the neural network general pre-processing acceleration device 100, reference can be made to the corresponding limitations of the neural network general pre-processing acceleration method mentioned above, and no further details will be given here. Each module in the above-mentioned neural network general pre-processing acceleration device 100 can be implemented in whole or in part by software, hardware, and a combination thereof. The above-mentioned modules can be embedded in or independent of a device with data processing functions in the form of hardware, or can be stored in the memory of the aforementioned device in the form of software, so that the processor can call and execute the operations corresponding to the above modules. The aforementioned device can be, but is not limited to, various types of data calculation and processing devices already available in the art.
[0037] In one embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the following processing steps when executing the computer program: obtaining an input image to be processed; obtaining and parsing a configuration file to generate a general operation flow for the input image; the configuration file is configured and generated according to an image input format of the input image and a data input format of a network that processes the input image, and the configuration file is used to combine multiple sub-operations of pre-processing divisions corresponding to different neural networks into a general operation flow according to a set operation sequence, and the multiple sub-operations include resizing the image, adjusting the color channel order, changing the dimension, scaling the mean, normalizing, and quantizing the image; after automatically completing data slicing of the input image according to the number of cores of the intelligent digital signal processor, completing pre-processing calculations of the input image through one IO read and write operation according to the generated general operation flow and automatically generating a storage index table; and storing the data after the pre-processing calculations of the input image in a specific memory area according to the storage index table.
[0038] In one embodiment, when the processor executes the computer program, it can also implement the steps or sub-steps added in each embodiment of the above-mentioned general pre-processing acceleration method for neural network.
[0039] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, and the computer program implements the following processing steps when executed by a processor: obtaining an input image to be processed; obtaining and parsing a configuration file to generate a general operation flow for the input image; the configuration file is configured and generated according to an image input format of the input image and a data input format of a network that processes the input image, and the configuration file is used to combine multiple sub-operations of pre-processing divisions corresponding to different neural networks into a general operation flow according to a set operation sequence, and the multiple sub-operations include resizing the image, adjusting the color channel order, changing the dimension, scaling the mean, normalizing, and quantizing the image; after automatically completing data slicing of the input image according to the number of cores of the intelligent digital signal processor, completing pre-processing calculations on the input image through a single IO read and write operation according to the generated general operation flow and automatically generating a storage index table; and storing the data after the pre-processing calculations on the input image in a specific memory area according to the storage index table.
[0040] In one embodiment, when the computer program is executed by a processor, the steps or sub-steps added in each embodiment of the above-mentioned general pre-processing acceleration method for neural networks can also be implemented.
[0041] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided by the present invention can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus dynamic random access memory (RambusDRAM, referred to as RDRAM) and interface dynamic random access memory (DRDRAM).
[0042] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0043] The above embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of protection of the invention. It should be pointed out that, for those of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present invention, which all belong to the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be subject to the attached claims.
Claims
1. A general pre-processing acceleration method for neural networks, characterized in that: Includes steps: Get the input image to be processed; Obtain and parse a configuration file to generate a general operation flow for the input image; the configuration file is configured and generated according to the image input format of the input image and the data input format of the network that processes the input image, and the configuration file is used to combine multiple sub-operations of the pre-processing division corresponding to different neural networks into the general operation flow according to a set operation order, and the multiple sub-operations include resizing, color channel order adjustment, dimension change, mean scaling, normalization and quantization of the image; After automatically completing data slicing of the input image according to the number of cores of the intelligent digital signal processor, completing pre-processing calculation of the input image through one IO read and write operation according to the generated general operation flow and automatically generating a storage index table; The data after pre-processing and calculation of the input image is stored in a specific memory area according to the storage index table.
2. The neural network general pre-processing acceleration method according to claim 1, characterized in that: The general operation flow combines normalization and mean scaling into one sub-operation.
3. The neural network general pre-processing acceleration method according to claim 1, characterized in that: The general operation flow combines normalization, mean scaling, and quantization into one sub-operation.
4. The neural network general pre-processing acceleration method according to any one of claims 1 to 3, characterized in that: The process of automatically completing data slicing of the input image according to the number of cores of the intelligent digital signal processor includes: If the input image is three-channel image data, the number of slices is a multiple of 3; the multiple is the number of cores of the intelligent digital signal processor; If the input image is single-channel image data, it is directly segmented according to the number of cores of the intelligent digital signal processor.
5. A general neural network pre-processing acceleration device, characterized in that: include: An image acquisition module is used to acquire input images to be processed; A configuration parsing module is configured to obtain and parse a configuration file to generate a general operation flow for the input image; the configuration file is configured and generated according to the image input format of the input image and the data input format of the network that processes the input image, and the configuration file is used to combine multiple sub-operations of the pre-processing division corresponding to different neural networks into the general operation flow according to a set operation sequence, and the multiple sub-operations include resizing, color channel order adjustment, dimension change, mean scaling, normalization and quantization of the image; A processing and calculation module, configured to automatically slice the input image according to the number of cores of the intelligent digital signal processor, complete the pre-processing calculation of the input image through one IO read and write operation according to the generated general operation flow, and automatically generate a storage index table; The data storage module is used to store the data after pre-processing calculation of the input image in a specific memory area according to the storage index table.
6. The neural network general pre-processing acceleration device according to claim 5, characterized in that: The general operation flow combines normalization and mean scaling into one sub-operation.
7. The neural network general pre-processing acceleration device according to claim 5, characterized in that: The general operation flow combines normalization, mean scaling, and quantization into one sub-operation.
8. The neural network general pre-processing acceleration device according to any one of claims 5 to 7, characterized in that: The process of automatically completing data slicing of the input image according to the number of cores of the intelligent digital signal processor includes: If the input image is three-channel image data, the number of slices is a multiple of 3; the multiple is the number of cores of the intelligent digital signal processor; If the input image is single-channel image data, it is directly segmented according to the number of cores of the intelligent digital signal processor.
9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the general pre-processing acceleration method for a neural network as described in any one of claims 1 to 4 are implemented.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the general pre-processing acceleration method for a neural network as described in any one of claims 1 to 4 are implemented.