Processing method for solving chip stacking problem of SLP product
By using lasers to burn out special blind holes and placing chips on the plates of SLP products, the problem of inability to reduce the area and thickness of chips after stacking in the existing SLP technology is solved, and higher integration and miniaturization are achieved.
Patent Information
- Application Number
- CN202411545987.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-01
- Publication Date
- 2025-03-28
AI Technical Summary
The existing SLP technology has the problem that the area and thickness cannot be further reduced during the stacking process of chips, which limits the application and development of SLP technology.
By burning out special blind holes on the plate with laser before printing green oil, the shape and position of the blind holes are determined according to the chip design, and the chip is placed in the special blind holes.
It effectively reduces the overall area and thickness of SLP products, avoids the problem of excessive area and thickness when stacking chips, and improves the level of integration and miniaturization of electronic products.
Smart Images

Figure CN119730078A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of printed circuit boards, and in particular to a processing method for solving the problem of stacking chips in SLP products. Background Art
[0002] As electronic products such as smartphones, tablets, and wearable devices develop towards intelligence, miniaturization, and diversified functions, the number of components to be carried on PCBs has greatly increased, but the required size, weight, and volume have been shrinking.
[0003] Using a PCB with the same function, SLP can greatly reduce the area and thickness of the HDI board, with the thickness reduced by about 30% and the area reduced by about 50%, which can free up more space for developing new hardware for electronic products or increasing battery capacity.
[0004] SLP is a system-level packaging technology, which is a single standard package with multiple active electronic components with different functions and optional passive devices, such as functional chips including processors, memory, MEMS and optical devices, integrated into one package to achieve certain functions, thereby achieving a basically complete function and forming a system or subsystem, but SLP products have the problem of stacked chips. Summary of the invention
[0005] The purpose of the present invention is to solve at least one of the technical problems existing in the prior art. To this end, the present invention proposes a processing method for solving the problem of stacking chips in SLP products, which can reduce the area of the SLP product and the thickness of the assembled chips.
[0006] A processing method for stacking chips of SLP products according to an embodiment of the present invention includes:
[0007] Step 1: Laminating the multilayer substrate material and the copper foil by heat and pressure to form a multilayer board;
[0008] Step 2: Form an anti-oxidation layer on the surface of the copper foil by browning;
[0009] Step 3: Drill holes of the required size and position on the board;
[0010] Step 4: Remove the epoxy resin residue produced during the drilling process;
[0011] Step 5: Copper deposition on the surface of the plate and hole wall;
[0012] Step 6: Use an acid solution to remove the copper layer not protected by the resist to form the desired circuit pattern;
[0013] Step 7: Mill special blind grooves on the plate;
[0014] Step 8: Print green oil on the board to form a solder mask;
[0015] Step 9: Place the chip in the special blind slot.
[0016] The processing method for solving the problem of stacked chips in SLP products according to an embodiment of the present invention has at least the following beneficial effects: the processing method for solving the problem of stacked chips in SLP products burns special blind holes on the plate by laser before printing green oil, and the shape and position of the special blind holes are designed according to the chips to be accommodated. After the processing is completed, the chips are placed in the special blind holes, thereby reducing the overall area and thickness of the SLP product and avoiding the problem of stacked chips in the SLP product.
[0017] According to some embodiments of the present invention, in step 7, the location for opening the special blind slot is selected according to the chip design location.
[0018] According to some embodiments of the present invention, in step 7, the size of the special blind slot is determined according to the size of the chip to be accommodated.
[0019] According to some embodiments of the present invention, in step 7, a carbon dioxide laser is used to mill the blind groove.
[0020] According to some embodiments of the present invention, in step 7, ultraviolet laser is used to mill the blind groove.
[0021] According to some embodiments of the present invention, in step 9, the plate is surface treated before the chip is placed in the special blind groove.
[0022] According to some embodiments of the present invention, in step 9, surface treatment of the plate includes cleaning, leveling and pre-treating the surface of the plate.
[0023] According to some embodiments of the present invention, in step 3, drilling is performed by a carbon dioxide laser.
[0024] According to some embodiments of the present invention, in step 1, multiple layers of copper foil, prepreg, and core board are laminated.
[0025] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] The present invention is further described below in conjunction with the accompanying drawings and embodiments:
[0027] Figure 1 It is a flow chart of a method for processing stacked chips of SLP products according to an embodiment of the present invention;
[0028] Figure 2It is a structural schematic diagram of a lamination step in a processing method for stacking chips of an SLP product according to an embodiment of the present invention;
[0029] Figure 3 It is a structural schematic diagram of an acid etching step in a processing method for stacking chips of SLP products according to an embodiment of the present invention;
[0030] Figure 4 It is a structural schematic diagram of the step of milling special blind grooves in the processing method for processing stacked chips of SLP products according to an embodiment of the present invention.
[0031] Reference numerals:
[0032] Core board 10; prepreg 20; copper foil 30; outer layer pattern 40; special blind slot 50. DETAILED DESCRIPTION
[0033] This section will describe in detail the specific embodiments of the present invention. The preferred embodiments of the present invention are shown in the accompanying drawings. The purpose of the accompanying drawings is to supplement the description of the text part of the specification with graphics, so that people can intuitively and vividly understand each technical feature and the overall technical solution of the present invention, but it cannot be understood as a limitation on the scope of protection of the present invention.
[0034] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., and orientations or positional relationships indicated are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.
[0035] In the description of the present invention, "several" means one or more, "more" means more than two, "greater than", "less than", "exceed" etc. are understood as not including the number itself, and "above", "below", "within" etc. are understood as including the number itself. If there is a description of "first" or "second", it is only used for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.
[0036] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.
[0037] refer to Figures 1 to 4 A processing method for stacking chips of SLP products according to an embodiment of the present invention is described.
[0038] like Figures 1 to 4As shown, the processing method for solving the problem of stacked chips of SLP products according to an embodiment of the present invention includes:
[0039] Step 1: Laminating the multi-layer substrate material and the copper foil 30 by heat and pressure to form a multi-layer board;
[0040] Step 2: forming an anti-oxidation layer on the surface of the copper foil 30 by browning;
[0041] Step 3: Drill holes of the required size and position on the board;
[0042] Step 4: Remove the epoxy resin residue produced during the drilling process;
[0043] Step 5: Copper deposition on the surface of the plate and hole wall;
[0044] Step 6: Use an acid solution to remove the copper layer not protected by the resist to form the desired circuit pattern;
[0045] Step 7: milling a special blind groove 50 on the plate;
[0046] Step 8: Print green oil on the board to form a solder mask;
[0047] Step 9: Place the chip in the special blind slot 50.
[0048] The existing SLP technology mainly achieves PCB integration and miniaturization by stacking chips. This method can greatly reduce the area and thickness of HDI boards, reducing the thickness by about %, and the area by about %, which can free up more space for developing new hardware for electronic products or increasing battery capacity. However, the existing SLP technology has the problem of stacking chips during implementation. This problem will prevent the area and thickness of SLP products from being further reduced, limiting the application and development of SLP technology.
[0049] In order to further reduce the area and thickness of SLP products and improve the integration and miniaturization level of electronic products, the processing method for stacking chips of SLP products processes a special blind groove 50 after the SLP product is processed to the outer layer, after the outer layer circuit is etched out and before the green ink is printed. According to the size of the chip, a carbon dioxide laser or UV laser is used to burn a blind groove of the size of the chip, and the chip is placed in the special blind groove 50, thereby reducing the area of the SLP product and the thickness after the chip is assembled.
[0050] like Figure 1As shown, lamination is first performed to combine multiple layers of flexible or rigid substrate materials with copper foil 30 by heat and pressure to form a multilayer board, ensuring the stability of the board and the reliability of the circuit. An anti-oxidation layer is formed on the surface of the copper foil 30 by browning to prevent the copper foil 30 from being oxidized during subsequent processing, which helps to improve the corrosion resistance and extend the service life of the circuit board. Holes of the required size and position are drilled on the board by mechanical or laser technology to prepare for subsequent electroplating and assembly. The epoxy resin residue generated during the drilling process is removed to ensure the cleanliness of the hole wall and the adhesion of subsequent electroplating. A layer of copper is deposited on the hole wall and the surface of the board to achieve the interconnection of the multilayer circuit. The copper layer not protected by the resist is removed by an acidic solution to form the required circuit pattern. The acid etching step requires precise control of the etching time and acid strength to ensure the accuracy of the circuit pattern. After the etching of the outer layer circuit is completed, special blind holes are processed on the board using laser technology. These blind holes are used for subsequent chip placement. A layer of green solder mask is printed on the circuit board to protect the copper layer from oxidation and contamination and to facilitate welding. Finally, the chip is precisely placed in the special blind hole. This step requires high-precision automated equipment to ensure the correct position and orientation of the chip to achieve optimal electrical connection and mechanical stability. Through the above steps, the SLP product stacking chip processing method can effectively reduce the overall area and thickness of the product, while avoiding possible problems when stacking chips, and improving the performance and reliability of electronic products.
[0051] In the step of milling the special blind slot 50, the opening position of the special blind slot 50 is selected according to the chip design position. The size of the special blind slot 50 is determined according to the size of the chip to be accommodated.
[0052] Before placing the chip, the surface of the plate is treated by immersion nickel-palladium-gold or immersion nickel-gold.
[0053] like Figure 1 As shown, after the inner core board 10 is manufactured according to the graphic manufacturing process, the semi-cured sheet 20 and the core board 10 are placed on both sides of the core board 10, respectively, the copper foil 30, the semi-cured sheet 20 and the core board 10 are pressed together, and micro blind holes and copper filling are made according to the SLP product process by carbon dioxide laser drilling.
[0054] like Figure 2 As shown, an outer layer pattern 40 is etched out on the pressed plate by acid etching.
[0055] like Figure 3As shown, a special blind groove 50 is processed before printing green ink, and a carbon dioxide laser or ultraviolet laser is used to mill the blind groove. By using a carbon dioxide laser or a UV laser to burn a blind groove of the size of a chip, the processing efficiency can be greatly improved, the production cost can be reduced, and the production efficiency can be improved. The special blind groove 50 is used to accommodate the chip, thereby preventing the chip from being directly stacked on the surface of the plate, resulting in an excessively large area and thickness of the SLP product.
[0056] Therefore, the processing method for solving the stacked chip problem of SLP products is to burn special blind holes on the plate by laser before printing green ink. The shape and position of the special blind holes are designed according to the chips to be accommodated. After the processing is completed, the chips are placed in the special blind holes, thereby reducing the overall area and thickness of the SLP product and avoiding the problem of stacked chips in the SLP product.
[0057] The embodiments of the present invention are described in detail above with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge scope of ordinary technicians in the technical field without departing from the purpose of the present invention.
Claims
1. A processing method for stacking chips of SLP products, characterized in that: include: Step 1: Laminating the multilayer substrate material and the copper foil by heat and pressure to form a multilayer board; Step 2: Form an anti-oxidation layer on the surface of the copper foil by browning; Step 3: Drill holes of the required size and position on the board; Step 4: Remove the epoxy resin residue produced during the drilling process; Step 5: Copper deposition on the surface of the plate and hole wall; Step 6: Use an acid solution to remove the copper layer not protected by the resist to form the desired circuit pattern; Step 7: Mill special blind grooves on the plate; Step 8: Print green oil on the board to form a solder mask; Step 9: Place the chip in the special blind slot.
2. The processing method for solving the problem of stacked chips in SLP products according to claim 1, characterized in that: In step 7, the opening position of the special blind groove is selected according to the chip design position.
3. The processing method for solving the problem of stacked chips in SLP products according to claim 2, characterized in that: In step 7, the size of the special blind slot is determined according to the size of the chip to be accommodated.
4. The processing method for solving the problem of stacked chips in SLP products according to claim 3, characterized in that: In step 7, the blind grooves are milled using a CO2 laser.
5. The processing method for solving the problem of stacked chips in SLP products according to claim 3, characterized in that: In step 7, blind grooves are milled using UV laser.
6. The processing method for solving the problem of stacked chips in SLP products according to claim 1, characterized in that: In step 9, the surface of the sheet is treated before the chip is placed in the special blind groove.
7. The processing method for solving the problem of stacked chips in SLP products according to claim 6, characterized in that: In step 9, the surface treatment of the board includes cleaning, leveling and pre-treating the board surface.
8. The processing method for solving the problem of stacked chips in SLP products according to claim 1, characterized in that: In step 3, drilling is performed by means of a CO2 laser.
9. The processing method for solving the problem of stacked chips in SLP products according to claim 1, characterized in that: In step 1, multiple layers of copper foil, prepreg, and core board are laminated.
Citation Information
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