A field plate terminal structure reinforced against single particle radiation and its preparation method

Abstract

The present invention discloses a field plate terminal structure with single particle radiation reinforcement and a preparation method thereof, belonging to the field of microelectronics technology. The structure includes a substrate, an epitaxial layer, a device main junction region and a carrier lifetime control region, a field oxide layer, an anode, a field plate, which is arranged on the field oxide layer, and a cathode, wherein the anode is in contact with the field plate; the carrier lifetime control region is located in the region of the field plate corresponding to the epitaxial layer. The present invention reduces the number of hole carriers moving to the edge of the main junction by introducing a carrier lifetime control layer (i.e., the carrier lifetime control region) on the upper surface layer of the semiconductor material in the terminal region, thereby alleviating the current density and heat accumulation at the edge of the main junction and improving the SEB resistance of the field plate terminal structure.

Description

Technical Field

[0001] The present invention belongs to the field of microelectronics technology and relates to semiconductor devices, in particular to a field plate terminal structure reinforced against single particle radiation and a preparation method thereof. Background Art

[0002] Power semiconductor devices are widely used in spacecraft power systems, performing power conversion and transformation, providing essential energy support for the normal operation of spacecraft. However, due to their inherent high-voltage and high-current operating mode, power semiconductor devices are highly susceptible to single event burnout (SEB) in the presence of high-energy particle radiation in space. This destructive effect can directly lead to device failure, seriously threatening the stable operation of spacecraft on orbit.

[0003] For power semiconductor devices, due to the high operating voltage and large terminal area of ​​the device, high-energy particles in the space radiation environment have a high probability of impacting the terminal area, and the terminal structure's resistance to single-event burnout must be considered. Common terminal structures for power semiconductor devices include field plates (FP), field limiting rings (FLRs), and junction termination extensions (JTE). Among them, the field plate terminal is widely used in modern power semiconductor devices due to its simple structure and technical advantages such as being able to be formed simultaneously with the anode contact metal, without adding additional process steps. However, for the field plate terminal structure, when high-energy particles from space impact the terminal area, due to the blocking effect of the SiO2 layer, there is no extraction path for hole carriers in the terminal surface area. As a result, the hole carriers introduced by the high-energy particle impact can only be collected by the anode metal when they move to the edge of the main junction. This leads to extremely high current density and rapid local heat accumulation at the edge of the main junction, thereby causing SEB failure. Summary of the Invention

[0004] The present invention addresses the problem in the prior art that when high-energy particles from space collide with the field plate terminal region, due to the blocking effect of the SiO2 layer, there is no extraction path for hole carriers in the terminal surface region, resulting in the hole carriers introduced by the high-energy particles from space being collected by the anode metal only when they move to the edge of the main junction. This leads to extremely high current density and rapid local heat accumulation at the edge of the main junction, thereby causing SEB failure. The present invention proposes a field plate terminal structure reinforced against single-particle radiation and a preparation method thereof. This structure reduces the number of hole carriers moving to the edge of the main junction by introducing a carrier lifetime control layer (i.e., a carrier lifetime control region) into the upper surface layer of the semiconductor material in the terminal region, thereby alleviating the current density and heat accumulation at the edge of the main junction and improving the SEB resistance of the field plate terminal structure.

[0005] The first object of the present invention is to provide a field plate terminal structure hardened against single particle radiation, comprising:

[0006] substrate;

[0007] an epitaxial layer, disposed on the substrate;

[0008] The device main junction region and the carrier lifetime control region are respectively arranged in different regions of the upper surface layer of the epitaxial layer;

[0009] a field oxide layer, disposed on the epitaxial layer and located on the carrier lifetime control region;

[0010] an anode, disposed on the main junction region of the device;

[0011] a field plate, disposed on the field oxide layer;

[0012] a cathode, disposed on the back side of the substrate;

[0013] Wherein, the anode contacts the field plate; the carrier lifetime control region is located in the region of the field plate corresponding to the epitaxial layer;

[0014] The minority carrier lifetime in the carrier lifetime control region is controlled to be less than 1 ns.

[0015] Preferably, the substrate is an N-type heavily doped substrate with an N-type heavily doped concentration of 5e18 cm -3 ~1e20cm -3 ;

[0016] The epitaxial layer is an N-type lightly doped epitaxial layer, and its N-type lightly doping concentration is 1e13 cm -3 ~1e17cm -3 .

[0017] Preferably, the main junction region of the device is formed by introducing P-type impurity ions into the upper surface layer of the epitaxial layer;

[0018] The carrier lifetime control region is formed by irradiating the upper surface layer of the epitaxial layer through light ion irradiation technology.

[0019] Preferably, the junction depth of the main junction region of the device is 0.5 μm to 10 μm, and the doping concentration of the main junction region of the device is 1e18 cm -3 ~1e20 cm -3 ;

[0020] The thickness of the carrier lifetime control region is 0.1 μm to 10 μm.

[0021] Preferably, the thickness of the substrate is 100 μm to 300 μm; the thickness of the epitaxial layer is 10 μm to 100 μm; and the thickness of the field oxide layer is 0.1 μm to 3 μm.

[0022] Preferably, the length of the field plate is 0.1 μm to 30 μm.

[0023] Preferably, the substrate is made of silicon material, germanium material, silicon carbide material, gallium nitride material or gallium arsenide material;

[0024] The epitaxial layer is made of silicon material, germanium material, silicon carbide material, gallium nitride material or gallium arsenide material;

[0025] The field oxide layer is silicon dioxide;

[0026] The anode and field plate are made of aluminum or copper;

[0027] The cathode is made of aluminum or copper.

[0028] A second object of the present invention is to provide a method for preparing a field plate terminal structure hardened against single particle radiation, comprising the following steps:

[0029] growing an epitaxial layer on a substrate;

[0030] growing a field oxide layer on the surface of the epitaxial layer, and removing the field oxide layer from a portion of the epitaxial layer surface;

[0031] By high-temperature impurity diffusion or ion implantation, P-type impurities are introduced into the upper surface layer of the epitaxial layer after the field oxide layer is removed to form the main junction region of the device;

[0032] Depositing metal on the main junction region of the device and a portion of the field oxide layer to form an anode and a field plate;

[0033] Depositing metal on the back side of the substrate to form a cathode;

[0034] The light ion irradiation technology is used to irradiate the partial area of ​​the epitaxial layer corresponding to the field plate, that is, to form a carrier lifetime control region in the upper surface layer of the irradiated epitaxial layer.

[0035] Preferably, the field plate and the anode are generated simultaneously using the same mask; an anode metal contact is formed between the anode and the main junction region of the device; and a cathode metal contact is formed between the cathode and the substrate.

[0036] A third object of the present invention is to provide an application of a field plate terminal structure hardened against single particle radiation in a semiconductor device.

[0037] Compared with the prior art, the present invention has the following beneficial effects:

[0038] The present invention provides a field plate terminal structure with single-event radiation hardening and a method for fabricating it. This invention addresses the problem that when high-energy particles strike the field plate terminal region, the hole carriers induced by the particles must migrate to the edge of the main junction before being collected by the device electrodes, which can easily lead to thermal failure at the main junction edge. The proposed reinforcement structure accelerates the recombination velocity of hole carriers along the collection path, thereby reducing the density of hole carriers that migrate to the main junction edge, alleviating heat accumulation at the main junction edge and suppressing SEB failure.

[0039] During the process of implementing the reinforcement structure proposed in the present invention, the lifetime of minority carriers can be precisely controlled by monitoring the dose of light ion irradiation. By performing electrical testing on the device after each step of irradiation and thus performing step-by-step irradiation, the electrical performance and radiation resistance of the device can be better balanced. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 Schematic diagram of setting up an epitaxial layer structure on a substrate.

[0041] Figure 2 Schematic diagram of the field oxide layer structure set on the epitaxial layer.

[0042] Figure 3 This is a schematic diagram of the structure of the device main junction area set on the upper surface of the epitaxial layer.

[0043] Figure 4 Schematic diagram of the anode and field plate structure set on the main junction region and field oxide layer of the device.

[0044] Figure 5 Schematic diagram of a cathode structure arranged on the back side of the substrate.

[0045] Figure 6 Schematic diagram of the field plate termination structure for single-event radiation hardening.

[0046] Figure 7This is a conventional unreinforced field plate terminal structure established based on TCAD simulation software in the comparative example.

[0047] Figure 8 This is the breakdown characteristic curve of the conventional unreinforced field plate terminal structure established based on TCAD simulation software in the comparative example.

[0048] Figure 9 The transient change curves of the internal peak temperature of the conventional unreinforced field plate terminal structure in the comparative example obtained by TCAD simulation when the reverse bias voltage is 157V and 158V respectively.

[0049] Figure 10 The distribution of current density and lattice temperature inside the conventional unreinforced field plate terminal structure in the comparison example at the moment of single-particle burnout obtained by TCAD simulation when the reverse bias voltage is 158V.

[0050] Figure 11 This is the field plate terminal structure for single particle radiation hardening established in Example 1 based on TCAD simulation software.

[0051] Figure 12 This is the field plate terminal structure for single particle radiation hardening established in Example 2 based on TCAD simulation software.

[0052] Among them, 1. substrate; 2. epitaxial layer; 3. field oxide layer; 4. device main junction region; 5. anode; 6. field plate; 7. cathode; 8. carrier lifetime control region. DETAILED DESCRIPTION

[0053] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0054] The purpose of the present invention is to provide a field plate terminal structure with single particle radiation reinforcement and a preparation method thereof. By introducing a carrier lifetime control layer (i.e., a carrier lifetime control region) on the upper surface of the semiconductor material in the terminal area, the number of hole carriers moving to the edge of the main junction can be reduced, thereby alleviating the current density and heat accumulation at the edge of the main junction and improving the anti-SEB capability of the field plate terminal structure.

[0055] To achieve the above purpose, see Figures 1 to 6As shown, the first aspect of the present invention provides a field plate terminal structure with single particle radiation hardening, including a substrate 1, an epitaxial layer 2, a device main junction region 4 and a carrier lifetime control region 8, a field oxide layer 3, an anode 5, a field plate 6 and a cathode 7;

[0056] The epitaxial layer 2 is provided on the substrate 1;

[0057] The device main junction region 4 and the carrier lifetime control region 8 are respectively arranged in different regions of the upper surface layer of the epitaxial layer 2;

[0058] A field oxide layer 3 is provided on the epitaxial layer 2 and located on the carrier lifetime control region 8;

[0059] an anode 5, disposed on the main junction region 4 of the device;

[0060] A field plate 6 is provided on the field oxide layer 3;

[0061] a cathode 7, disposed on the back side of the substrate 1;

[0062] The anode 5 is in contact with the field plate 6; the carrier lifetime control region 8 is located in the region of the field plate 6 corresponding to the epitaxial layer 2;

[0063] The minority carrier lifetime in the carrier lifetime control region is controlled to be less than 1 ns.

[0064] The present invention introduces a carrier lifetime control layer (i.e., a carrier lifetime control region) on the upper surface of the semiconductor material in the field plate terminal region, thereby reducing the number of hole carriers moving to the edge of the main junction, thereby alleviating the current density and heat accumulation at the edge of the main junction and improving the anti-SEB capability of the field plate terminal structure.

[0065] The substrate is an N-type heavily doped substrate with an N-type heavily doped concentration of 5e18 cm -3 ~1e20cm -3 The epitaxial layer is an N-type lightly doped epitaxial layer, and its N-type lightly doping concentration is 1e13 cm -3 ~1e17cm -3 .

[0066] The main junction region of the device is formed by introducing P-type impurity ions into the upper surface layer of the epitaxial layer;

[0067] The carrier lifetime control region is formed by irradiating the upper surface layer of the epitaxial layer through light ion irradiation technology.

[0068] The junction depth of the main junction region of the device is 0.5 μm to 10 μm, and the doping concentration of the main junction region of the device is 1e18 cm -3 ~1e20 cm-3 ; The thickness of the carrier lifetime control region is 0.1μm to 10μm.

[0069] The thickness of the substrate is 100 μm to 300 μm, the thickness of the epitaxial layer is 10 μm to 100 μm, the thickness of the field oxide layer is 0.1 μm to 3 μm, and the length of the field plate is 0.1 μm to 30 μm.

[0070] The substrate is made of silicon material, germanium material, silicon carbide material, gallium nitride material, gallium arsenide material or other semiconductor material;

[0071] The epitaxial layer is made of silicon material, germanium material, silicon carbide material, gallium nitride material, gallium arsenide material or other semiconductor material;

[0072] The field oxide layer is silicon dioxide;

[0073] The anode and field plate are made of aluminum or copper;

[0074] The cathode is made of aluminum or copper.

[0075] In one embodiment, see Figures 1 to 6 As shown, a field plate terminal structure with single event radiation hardening includes:

[0076] N-type heavily doped substrate 1;

[0077] an N-type lightly doped epitaxial layer 2 located on the N-type heavily doped substrate 1;

[0078] a field oxide layer 3 located on the N-type lightly doped epitaxial layer 2;

[0079] A device main junction region 4 and a carrier lifetime control region 8 located on the upper surface of the N-type lightly doped epitaxial layer 2;

[0080] an anode 5 and a field plate 6 located above the main junction region 4 of the device and extending onto a portion of the field oxide layer 3;

[0081] A cathode 7 is located on the back side of the N-type heavily doped substrate 1 .

[0082] See also Figure 6 As shown, the carrier lifetime control region 8 is located in the upper surface layer of the semiconductor material in the terminal region, wherein the left edge of the carrier lifetime control region is located in the middle position between the edge of the device main junction 4 and the edge of the field plate 6, the right edge of the carrier lifetime control region 8 does not exceed the right edge of the field plate 6, the upper edge of the region is the semiconductor material / silicon dioxide material interface, and the lower edge of the region does not exceed the junction depth of the main junction 4.

[0083] The minority carrier lifetime in the carrier lifetime control region 8 is controlled to be less than 1 ns.

[0084] A second aspect of the present invention provides a method for preparing a field plate terminal structure hardened against single particle radiation, comprising the following steps:

[0085] growing an epitaxial layer on a substrate;

[0086] growing a field oxide layer on the surface of the epitaxial layer, and removing the field oxide layer from a portion of the epitaxial layer surface;

[0087] By high-temperature impurity diffusion or ion implantation, P-type impurities are introduced into the upper surface layer of the epitaxial layer after the field oxide layer is removed to form the main junction region of the device;

[0088] Depositing metal on the main junction region of the device and a portion of the field oxide layer to form an anode and a field plate;

[0089] Depositing metal on the back side of the substrate to form a cathode;

[0090] The light ion irradiation technology is used to irradiate the partial area of ​​the epitaxial layer corresponding to the field plate, that is, to form a carrier lifetime control region in the upper surface layer of the irradiated epitaxial layer.

[0091] The field plate and the anode are generated simultaneously using the same mask; an anode metal contact is formed between the anode and the main junction region of the device; and a cathode metal contact is formed between the cathode and the substrate.

[0092] In one embodiment, a method for preparing a field plate terminal structure hardened against single event radiation includes the following process steps:

[0093] (1) Epitaxial layer growth: growing an N-type lightly doped epitaxial layer on an N-type heavily doped substrate;

[0094] (2) Field oxide layer growth and etching: A layer of silicon dioxide is grown on the surface of the N-type lightly doped epitaxial layer as a field oxide layer, and the field oxide layer grown in the main junction area of ​​the epitaxial layer surface is removed through photolithography and etching processes;

[0095] (3) Formation of the device main junction region: P-type impurities are introduced into the main junction window region on the surface of the epitaxial layer through high-temperature impurity diffusion or ion implantation to form the device main junction region;

[0096] (4) Anode metal contact and field plate formation: metal is deposited on the main junction and part of the field oxide layer to form the anode metal contact and field plate;

[0097] (5) Cathode metal contact formation: depositing metal on the back side of the substrate to form a cathode metal contact;

[0098] (6) Local carrier lifetime control: Using light ion irradiation technology, the minority carrier lifetime is controlled by using irradiation-induced defects as recombination centers, and a carrier lifetime control layer is formed on the surface of the semiconductor material in the terminal area.

[0099] The field plate and the anode metal contact can be generated using the same mask without adding additional process steps. The metal material used for the anode metal contact and the field plate is aluminum or copper.

[0100] The cathode metal contact material is aluminum or copper.

[0101] The light ion irradiation technology can utilize hydrogen ions, helium ions, etc., and by controlling the energy and dose of light ion irradiation, the position and density of defects can be controlled, thereby achieving local carrier lifetime control.

[0102] A third aspect of the present invention provides an application of a field plate terminal structure hardened against single particle radiation in a semiconductor device.

[0103] The following describes a field plate terminal structure and a preparation method for single particle radiation hardening provided by the present invention in conjunction with specific embodiments.

[0104] Example 1

[0105] A field plate termination structure hardened against single event radiation, see Figures 1 to 6 Shown, including:

[0106] N-type heavily doped substrate 1;

[0107] an N-type lightly doped epitaxial layer 2 located on the N-type heavily doped substrate 1;

[0108] a field oxide layer 3 located on the N-type lightly doped epitaxial layer 2;

[0109] A device main junction region 4 and a carrier lifetime control region 8 located on the upper surface of the N-type lightly doped epitaxial layer 2;

[0110] an anode 5 and a field plate 6 located above the main junction region 4 of the device and extending onto a portion of the field oxide layer 3;

[0111] A cathode 7 is located on the back side of the N-type heavily doped substrate 1 .

[0112] The materials used for each layer in the structure provided in this embodiment are as follows:

[0113] The substrate 1 is an N-type heavily doped silicon substrate; the epitaxial layer 2 is an N-type lightly doped silicon epitaxial layer; the field oxide layer 3 is silicon dioxide; the anode 5 and the field plate 6 are both made of aluminum; and the cathode 7 is made of copper.

[0114] The device main junction region 4 is formed by an ion implantation process, and the implanted ions are boron ions.

[0115] The carrier lifetime control region 8 is formed by hydrogen ion irradiation technology.

[0116] It should be noted that the field plate terminal structure is as follows Figure 11 As shown, the actual N + The substrate thickness is 200μm. In order to more clearly show the terminal structure of the board, the N + The substrate thickness is 40 μm, and the field plate terminal structure parameters are shown in Table 1.

[0117] Table 1 shows the structural parameters of the field plate terminal

[0118] Structural parameters value <![CDATA[N + Substrate doping concentration]]> <![CDATA[1e19 cm -3 ]]> <![CDATA[N + Substrate thickness]]> 200μm N-epitaxial layer doping concentration <![CDATA[5e14 cm -3 ]]> <![CDATA[N - Epitaxial layer thickness]]> 40μm Field oxide thickness 1μm Surface doping concentration in the main junction region of the device <![CDATA[1e20 cm -3 ]]> Main knot deep 5μm Field plate length 11μm

[0119] In this embodiment, the left edge of the carrier lifetime control region is located at X=27 μm, the right edge of the region is located at X=32 μm, the upper edge of the region is located at Y=0 μm, that is, the interface between the epitaxial silicon layer and the field oxide layer silicon dioxide material, and the lower edge of the region is located at Y=1 μm.

[0120] This embodiment provides a method for preparing a field plate terminal structure hardened against single-particle radiation, comprising the following steps:

[0121] (1) Epitaxial layer growth: An N-type lightly doped silicon epitaxial layer is formed on an N-type heavily doped silicon substrate by epitaxial growth, such as Figure 1 As shown, in this embodiment, the thickness of the N-type heavily doped silicon substrate is 200 μm, and the doping concentration is 1e19 cm -3 The thickness of the N-type lightly doped silicon epitaxial layer is 40 μm, and the doping concentration is 5e14 cm -3 ;

[0122] (2) Field oxide layer growth and etching: The silicon wafer formed in step 1 is cleaned, and a layer of silicon dioxide is grown on the surface of the cleaned silicon wafer using a dry-wet-dry three-step thermal oxidation method as a field oxide layer. The field oxide layer grown in the main junction area of ​​the silicon epitaxial layer surface is removed by photolithography and etching processes, such as Figure 2 As shown, the thickness of the field oxide layer in this embodiment is 1 μm;

[0123] (3) Formation of the device main junction region: The silicon wafer surface formed in step 2 is cleaned and placed in an oxidation furnace for growth, thereby growing an ion implantation protection oxide layer with a thickness of 90nm to 110nm in the main junction implantation window region. Next, P-type impurity ions are implanted into the silicon epitaxial layer surface in the main junction implantation window region through an ion implantation process to form a PN junction, and the ion implantation protection oxide layer in the main junction implantation window region is removed. Then, the silicon wafer surface is cleaned and placed in a diffusion furnace for diffusion, so that the PN junction depth is increased and the implanted P-type impurity ions are activated. At this point, the device main junction region is formed, as shown in FIG. Figure 3 As shown, the surface doping concentration of the main junction region of the device in this embodiment is 1e20 cm -3 , the junction depth is 5 μm; wherein the ions used in the ion implantation process are boron ions;

[0124] (4) Formation of anode and field plate: On the surface of the silicon wafer formed in step 3, the anode and field plate are formed above the main junction region and part of the field oxide layer using the same mask through metal deposition, photolithography and etching processes. The anode is located above the main junction region and extends outward to form a field plate above the part of the field oxide layer beyond the edge of the main junction, such as Figure 4 As shown, the length of the field plate in this embodiment is 11 μm, and the metal materials used for the anode and the field plate are both aluminum;

[0125] (5) Cathode formation: Metal is deposited on the back of the silicon substrate to form a cathode, such as Figure 5 As shown, the cathode material in this embodiment is copper;

[0126] (6) Local carrier lifetime control: Using light ion irradiation technology, by controlling the energy and dose of irradiation, a carrier lifetime control layer is formed on the surface of the silicon material in the terminal area, such as Figure 6 As shown, for the carrier lifetime control region in this embodiment, the left edge of the region is located midway between the device's main junction edge and the right edge of the field plate, the right edge of the region does not exceed the right edge of the field plate, and the upper edge of the region is the silicon / silicon dioxide interface. The carrier lifetime control region thickness is 1μm. Furthermore, the light ion irradiation technology described in this embodiment utilizes hydrogen ions, resulting in a minority carrier lifetime within the carrier lifetime control region of less than 1ns.

[0127] Example 2

[0128] A field plate terminal structure with single-particle radiation hardening is the same as Example 1, except that the carrier lifetime control region is expanded in this embodiment; the range of the carrier lifetime control region in this embodiment is: the left edge of the carrier lifetime control region is located at X = 26 μm, the right edge of the carrier lifetime control region is located at X = 34 μm, the upper edge of the region is located at Y = 0 μm, that is, the interface between the epitaxial layer silicon and the field oxide layer silicon dioxide material, and the lower edge of the region is located at Y = 4 μm.

[0129] Comparative Example

[0130] A field plate terminal structure is the same as that of embodiment 1, except that the field plate terminal structure is not reinforced, that is, the structure is not provided with a carrier lifetime control region, and the structure is a conventional structure.

[0131] The reinforcement effect of the field plate terminal structure for single-particle radiation reinforcement proposed in the present invention is verified based on TCAD simulation using Sentaurus TCAD simulation software.

[0132] In order to illustrate the relevant performance of the field plate terminal structure for single particle radiation hardening provided by the present invention, it is described in conjunction with the accompanying drawings. Figures 7-10 As shown, the performance description of the conventional unreinforced field plate terminal structure is provided for comparative example.

[0133] Figure 7 The conventional unreinforced field plate terminal structure established based on TCAD simulation software provided in the comparative example. It should be pointed out that in the TCAD simulation analysis of the field plate terminal structure in Example 1, Example 2 and the comparative example, in order to improve the efficiency of TCAD simulation, the N set in the simulation + The substrate thickness is 40 μm.

[0134] Figure 8 This is a breakdown characteristic curve of the conventional unreinforced field plate terminal structure established in the comparative example obtained by TCAD simulation. It can be seen that the breakdown voltage of the structure is 257V.

[0135] In the single event effect TCAD simulations of Example 1, Example 2, and the comparative example, the high energy particle radiation model used is as follows: In the simulation, the LET (Linear Energy Transfer) value of the incident high energy particle is set to 75 MeV·cm 2 / mg, the particle range is 40μm, the high-energy particle impact time is 2ns, the particle impact direction is perpendicular to the terminal structure surface, and the particle impact position is in the field plate area (X=30μm).

[0136] Figure 9The transient change curve of the internal peak temperature of the conventional unreinforced field plate terminal structure in the established comparative example obtained by TCAD simulation when the reverse bias voltage is 157V and 158V respectively, it can be seen that when the reverse bias voltage is 157V, accompanied by the impact of high-energy particles, the internal temperature of the field plate terminal structure gradually increases. At 12ns, the internal peak temperature of the field plate terminal structure reaches 1464K, and then gradually recovers to the initial temperature of 300K. Under the reverse bias voltage of 158V, accompanied by the impact of high-energy particles, the internal peak temperature of the field plate terminal structure shows a sharp increase. Finally, at 10ns, the internal peak temperature of the field plate terminal structure reaches 1691K, which exceeds the melting point of silicon material, and single particle burning occurs, resulting in catastrophic failure of the field plate terminal structure. Therefore, the SEB safe operating area of ​​the conventional unreinforced field plate terminal structure in the established comparative example is 157V.

[0137] Figure 10 The following figure shows the distribution of current density (a) and lattice temperature (b) within the conventional unreinforced field plate terminal structure at the moment of single-event burnout, obtained from TCAD simulation at a reverse bias voltage of 158 V. It can be seen that due to the current crowding effect, the edge of the main junction exhibits extremely high current density. Ultimately, under the influence of high current and strong electric field, sufficient heat accumulates at the edge of the main junction to trigger a single-event burnout.

[0138] See also Figure 11 As shown, the field plate terminal structure for single particle radiation hardening provided in Example 1 is established using TCAD simulation software.

[0139] Figure 11 The field plate terminal structure for single-particle radiation hardening of Example 1 was established using TCAD simulation software. It should be noted that the field plate terminal structure parameters used in Example 1 are the same as those of the comparative example. The only difference between Example 1 and the comparative example is the introduction of a carrier lifetime control region in Example 1. The left edge of the carrier lifetime control region in Example 1 is located at X = 27 μm, the right edge of the region is located at X = 32 μm, the upper edge of the region is located at Y = 0 μm, and the lower edge of the region is located at Y = 1 μm. Under the same high-energy particle radiation conditions as those in the comparative example, single-particle effect simulations were performed on the reinforced field plate terminal structure in Example 1. The simulation results showed that when the minority carrier lifetime in the carrier lifetime control region decreased from 1 ns to 0.1 ns, the SEB safe operating area of ​​the reinforced field plate terminal structure in Example 1 increased from 166 V to 216 V, as shown in Table 2. It can be seen that compared with the conventional unreinforced field plate terminal structure in the comparative example, the SEB safe operating area of ​​the reinforced field plate terminal structure in Example 1 was significantly improved, which verifies the effectiveness of the single-particle radiation-resistant field plate terminal structure proposed in the present invention.

[0140] Table 2 SEB safe operating area under different minority carrier lifetimes in Example 1

[0141] Minority carrier lifetime 1ns 0.7ns 0.5ns 0.3ns 0.1ns SEB safe working area 166 V 171V 178V 193V 216V

[0142] See also Figure 12 As shown, the field plate terminal structure for single particle radiation hardening provided in Example 2 is established using TCAD simulation software.

[0143] The only difference between Example 2 and Example 1 is that the range of the carrier lifetime control region is further expanded in Example 2. The range of the carrier lifetime control region in Example 2 is: the left edge of the carrier lifetime control region is located at X = 26 μm, the right edge of the region is located at X = 34 μm, the upper edge of the region is located at Y = 0 μm, and the lower edge of the region is located at Y = 4 μm. Under the same high-energy particle radiation conditions as the comparative example, a single particle effect simulation was carried out on the reinforced field plate terminal structure in Example 2. The simulation results showed that when the minority carrier lifetime in the carrier lifetime control region decreased from 1ns to 0.1ns, the SEB safe operating area of ​​the reinforced field plate terminal structure in Example 2 increased from 186V to 257V, as shown in Table 3. It can be seen that compared with Example 1, the SEB safe operating area of ​​the reinforced field plate terminal structure in Example 2 is further improved, which indicates that with the increase of the carrier lifetime control region, the SEB resistance of the field plate terminal structure reinforced against single particle radiation proposed in the present invention will be more significantly improved. At the same time, this further verifies the effectiveness of the field plate terminal structure reinforced against single particle radiation proposed in the present invention.

[0144] Table 3 SEB safe operating area under different minority carrier lifetimes in Example 2

[0145] Minority carrier lifetime 1ns 0.7ns 0.5ns 0.3ns 0.1ns SEB safe working area 186 V 197V 208V 230V 257V

[0146] It should be noted that the SEB reinforcement design concept proposed in the present invention for controlling the local carrier lifetime on the hole carrier collection path is not only applicable to field plate terminal structures, but also to planar terminal structures such as field limiting rings and junction terminal extensions, as well as composite planar terminal structures composed of these planar terminal structures, thereby effectively alleviating carrier accumulation at the edge of the main junction of power semiconductor devices.

[0147] In summary, the present invention provides a field plate terminal structure with single-particle radiation hardening and a method for preparing the same. The field plate terminal structure comprises: a substrate, an epitaxial layer, a field oxide layer, a device main junction region and a carrier lifetime control region located on the upper surface of the epitaxial layer, an anode, a field plate, and a cathode. The carrier lifetime control region is located on the upper surface of the semiconductor material in the terminal region. The introduction of the carrier lifetime control region can accelerate the recombination velocity of hole carriers on the collection path under high-energy particle impact, reduce the density of hole carriers moving to the edge of the main junction, thereby alleviating current density and heat accumulation at the edge of the main junction, and suppressing device failure caused by single-particle burnout.

[0148] The above description is merely a specific embodiment of the present invention and does not constitute any limitation of the present invention. Those skilled in the art will readily appreciate that the present invention is susceptible to various modifications and variations. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

Claims

1. A field plate terminal structure hardened against single event radiation, characterized in that: include: substrate; an epitaxial layer, disposed on the substrate; The device main junction region and the carrier lifetime control region are respectively arranged in different regions of the upper surface layer of the epitaxial layer; a field oxide layer, disposed on the epitaxial layer and located on the carrier lifetime control region; an anode, disposed on the main junction region of the device; a field plate, disposed on the field oxide layer; a cathode, disposed on the back side of the substrate; Wherein, the anode contacts the field plate; the carrier lifetime control region is located in the region of the field plate corresponding to the epitaxial layer; The minority carrier lifetime in the carrier lifetime control region is controlled to be less than 1 ns.

2. The field plate terminal structure hardened against single event radiation according to claim 1, characterized in that: The substrate is an N-type heavily doped substrate with an N-type heavily doped concentration of 5e18 cm -3 ~1e20 cm -3 ; The epitaxial layer is an N-type lightly doped epitaxial layer, and its N-type lightly doping concentration is 1e13 cm -3 ~1e17cm -3 .

3. The field plate terminal structure hardened against single event radiation according to claim 1, characterized in that: The main junction region of the device is formed by introducing P-type impurity ions into the upper surface layer of the epitaxial layer; The carrier lifetime control region is formed by irradiating the upper surface layer of the epitaxial layer through light ion irradiation technology.

4. The field plate terminal structure hardened against single event radiation according to claim 3, characterized in that: The junction depth of the main junction region of the device is 0.5 μm to 10 μm, and the doping concentration of the main junction region of the device is 1e18 cm -3 ~1e20 cm -3 ; The thickness of the carrier lifetime control region is 0.1μm to 10μm.

5. The field plate terminal structure hardened against single event radiation according to claim 1, characterized in that: The thickness of the substrate is 100 μm to 300 μm; the thickness of the epitaxial layer is 10 μm to 100 μm; and the thickness of the field oxide layer is 0.1 μm to 3 μm.

6. The field plate terminal structure hardened against single event radiation according to claim 1, characterized in that: The length of the field plate is 0.1 μm to 30 μm.

7. The field plate termination structure hardened against single event radiation according to claim 1, characterized in that: The substrate is made of silicon material, germanium material, silicon carbide material, gallium nitride material or gallium arsenide material; The epitaxial layer is made of silicon material, germanium material, silicon carbide material, gallium nitride material or gallium arsenide material; The field oxide layer is silicon dioxide; The anode and field plate are made of aluminum or copper; The cathode is made of aluminum or copper.

8. A method for preparing a field plate terminal structure hardened against single-particle radiation according to any one of claims 1 to 7, characterized in that: The following steps are involved: growing an epitaxial layer on a substrate; growing a field oxide layer on the surface of the epitaxial layer, and removing the field oxide layer from a portion of the epitaxial layer surface; By high-temperature impurity diffusion or ion implantation, P-type impurities are introduced into the upper surface layer of the epitaxial layer after the field oxide layer is removed to form the main junction region of the device; Depositing metal on the main junction region of the device and a portion of the field oxide layer to form an anode and a field plate; Depositing metal on the back side of the substrate to form a cathode; The light ion irradiation technology is used to irradiate the partial area of ​​the epitaxial layer corresponding to the field plate, that is, to form a carrier lifetime control region in the upper surface layer of the irradiated epitaxial layer.

9. The method for preparing a field plate terminal structure hardened against single event radiation according to claim 8, characterized in that: The field plate and the anode are generated simultaneously using the same mask; an anode metal contact is formed between the anode and the main junction region of the device; and a cathode metal contact is formed between the cathode and the substrate.

10. Use of the field plate terminal structure for single-particle radiation hardening according to any one of claims 1 to 7 in a semiconductor device.

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