Chip simulation waveform automatic analysis and analysis method and system

Through the deep learning model, the chip simulation waveform file is automatically parsed, key features are extracted and compared and analyzed, and the problems of inefficient and error-prone manual analysis in the existing technology are solved, and efficient and accurate waveform file analysis and analysis are achieved.

CN119849313APending Publication Date: 2025-04-18SHANDONG SINOCHIP SEMICON CO LTD
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Patent Information

Application Number
CN202411933649.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-26
Publication Date
2025-04-18

AI Technical Summary

Technical Problem

The analysis and analysis of existing chip simulation waveform files mainly relies on manual operations, which are inefficient and error-prone, making it difficult to meet the needs of modern chip design complexity and iteration speed.

Method used

A deep learning model is adopted, a deep convolutional neural network and a graph neural network is combined, and an attention mechanism is introduced to automatically parse the chip simulation waveform file, extract digital logic state and timing characteristics, and compare and analyze with preset test expectations.

Benefits of technology

It significantly improves testing efficiency, reduces the need for manual intervention, reduces the risk of human error, and makes the chip design and verification process more efficient and reliable.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a chip simulation waveform automatic analysis and analysis method and system, and belongs to the technical field of chip simulation testing. The method comprises the following steps: generating a waveform file for chip testing through a simulation tool, and preprocessing the obtained waveform file; building a deep learning model, training the deep learning model by using the waveform data, the deep learning model being a hybrid deep learning model, combining a deep convolutional neural network and a graph neural network, and introducing an attention mechanism; analyzing the waveform file by using the trained deep learning model, and extracting a digital logic state and a time sequence feature; and comparing the extracted features with a preset test expectation, and generating a comparison result by judging whether the waveform accords with the expectation. By introducing the deep learning model, automatic analysis and analysis of the waveform file are realized, and the test efficiency is remarkably improved.
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Description

Technical Field

[0001] The invention relates to a chip simulation waveform automatic parsing and analysis method and system, belonging to the technical field of chip simulation testing. Background Art

[0002] In the complex process of chip design and verification, simulation testing plays a vital role. This step aims to verify whether the chip's functions meet the design expectations by simulating the chip's behavioral data under different test conditions. The waveform files generated by the simulation tool in this process record the various behavioral characteristics of the chip in detail, which is the key basis for engineers to evaluate chip performance.

[0003] However, existing waveform file parsing and analysis technologies mainly rely on manual operations. Engineers need to manually review these waveform data and visually determine whether the chip's behavior meets the expected standards. This traditional parsing method is not only inefficient, but also prone to errors. As the complexity and iteration speed of modern chip design continue to increase, the requirements for test efficiency and accuracy are also getting higher and higher. Traditional manual parsing methods can no longer meet current needs.

[0004] Specifically, manual analysis of waveform files has the following problems: First, it is inefficient. Engineers need to spend a lot of time to view and analyze waveform data one by one, which is particularly time-consuming in large-scale chip design and verification processes; second, it is prone to errors. Due to factors such as human subjectivity and fatigue, it may lead to misjudgment or omission of waveform data, thus affecting the accuracy of test results. Therefore, the industry urgently needs a technical solution that can efficiently and accurately parse waveform files and automatically perform comparison analysis to replace traditional manual analysis methods. Summary of the invention

[0005] The purpose of the present invention is to provide a chip simulation waveform automatic parsing and analysis method and system, to achieve automatic parsing and analysis of waveform files, so as to improve test efficiency and accuracy.

[0006] In order to achieve the above object, the present invention is implemented through the following technical solutions: A chip simulation waveform automatic parsing and analysis method comprises the following steps: Generate a waveform file for chip testing through a simulation tool and pre-process the acquired waveform file; Build a deep learning model and use waveform data to train the deep learning model. The deep learning model is a hybrid deep learning model that combines a deep convolutional neural network and a graph neural network and introduces an attention mechanism. Use the trained deep learning model to parse the waveform file and extract the digital logic state and timing features; The extracted features are compared with the preset test expectations to determine whether the waveform meets the expectations and generate comparison results.

[0007] Preferably, the preprocessing includes denoising, normalization and feature extraction, wherein the denoising process adopts a multi-level adaptive denoising method combining wavelet transform and adaptive filtering technology.

[0008] Preferably, the normalization includes global normalization and dynamic normalization; The global normalization formula is as follows: , in, is the original waveform data, , are the minimum and maximum values ​​of the waveform data, is the normalized waveform data point; The dynamic normalization method is as follows: Divide the waveform data into overlapping sliding windows; Calculate the local mean within each window and standard deviation : , , in, is a sliding window, is the window size, that is, the number of data points in the sliding window, The first data points; According to the calculated mean and standard deviation, the data in the window is normalized. The formula is as follows: , in, is the waveform data point; The normalized data of each window are fused to generate an overall normalized waveform signal.

[0009] Preferably, the feature extraction is to extract key features in the waveform, including: Rising and falling edge detection: Calculate the first-order derivative of the waveform to identify the rising and falling edge positions of the signal; Peak detection: Apply local maximum detection algorithm to extract peaks and valleys in the waveform; Hold time calculation: Analyze the stable area of ​​the waveform and calculate the hold time of the signal at a specific level; Time-frequency joint feature extraction: Use short-time Fourier transform to capture the instantaneous frequency changes of the waveform and extract the time-frequency joint features; Feature selection: Use gradient boosting tree to evaluate the importance of each feature and select the most valuable features.

[0010] Feature dimensionality reduction: Principal component analysis is used to reduce the dimensionality of high-dimensional features, retaining the main information and reducing redundant features.

[0011] Preferably, the deep convolutional neural network is used to extract local timing features of the waveform and capture timing changes at different scales; the graph neural network is used to model the relationships and dependencies between different signals, capture global features, and enhance the understanding of complex waveform data; the attention mechanism improves the ability to extract key features by dynamically adjusting the weights of each layer of the network.

[0012] Preferably, the deep learning model training process uses the AdamW optimizer combined with the gradient clipping technology; the Dropout and L2 regularization methods are used to prevent the model from overfitting and enhance the generalization ability of the model; The deep learning model adopts a phased training strategy. First, the deep convolutional neural network is independently trained to extract local temporal features, and then the graph neural network and attention mechanism module are jointly trained to gradually optimize the extraction capabilities of global features and key features.

[0013] Preferably, the AdamW optimizer parameter update formula is as follows: , , , , , in, is the current gradient, and is the momentum parameter, is the learning rate, is a small constant to prevent division by zero, represents the first-order momentum estimate, represents the second-order momentum estimate, represents the parameter vector, represents the bias-corrected second-order momentum estimate, Represents the bias-corrected first-order momentum estimate.

[0014] Preferably, the L2 regularization adds the sum of squares of weights to the loss function, and the specific formula is as follows: in, is the regularization parameter, are model parameters, represents the loss function after regularization, represents the original loss function.

[0015] Preferably, the extracted features are compared with the preset test expectations, specifically in the following manner: Obtain digital logic states and timing characteristics, and use dynamic time warping algorithms to accurately match the timing characteristics and evaluate the time alignment of the waveforms; The cosine similarity method is used to calculate the similarity between the logic state and the timing characteristics, quantifying how well the waveform matches the expectation; The autoencoder identifies abnormal patterns in logic states and timing features, detecting abnormal situations where waveforms deviate from the expected; Combined with the rule engine and machine learning decision tree, it analyzes the matching results and anomaly detection results, determines whether the waveform meets expectations, and generates corresponding error and anomaly prompts.

[0016] A chip simulation waveform automatic parsing and analysis system, comprising: Waveform file acquisition module: used to generate waveform files for chip testing through simulation tools; Data preprocessing module: preprocess the acquired waveform files, including denoising, normalization and feature extraction. The denoising process adopts a multi-level adaptive denoising method combining wavelet transform and adaptive filtering technology; Deep learning model training module: uses a large amount of waveform data to train the deep learning model, which is a hybrid deep learning model that combines a deep convolutional neural network with a graph neural network and introduces an attention mechanism; Waveform parsing module: Use the trained deep learning model to parse the waveform file and extract the digital logic state and timing characteristics; Automatic comparison and analysis module: compares the extracted features with the preset test expectations, determines whether the waveform meets the expectations, and generates comparison results; Analysis result output module: Generate analysis report, including waveform comparison results, logic error prompts, and timing anomaly prompts; User interface module: Provides a graphical user interface that supports visual display and interactive analysis of waveform data.

[0017] A chip simulation waveform automatic parsing and analysis device comprises a processor and a memory storing program instructions, wherein the processor is configured to execute the chip simulation waveform automatic parsing and analysis method when running the program instructions.

[0018] The advantages of the present invention are that the present invention realizes automatic parsing and analysis of waveform files by introducing a deep learning model, significantly improving the test efficiency. This change reduces the need for manual intervention, thereby reducing the risk of human error, making the chip design and verification process more efficient and reliable.

[0019] The core of the present invention is to use deep learning technology to analyze waveforms, which greatly improves the accuracy and reliability of waveform analysis. By training the deep learning model, the system can accurately extract the key features of the waveform and compare and analyze them with the preset test expectations to ensure the correctness of the chip function. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The accompanying drawings are used to provide further understanding of the present invention and constitute a part of the specification. They are used to explain the present invention together with the embodiments of the present invention and do not constitute a limitation of the present invention.

[0021] Figure 1 It is a schematic diagram of the process of the present invention.

[0022] Figure 2 Schematic diagram of the data preprocessing process.

[0023] Figure 3 Schematic diagram of the deep learning model training process.

[0024] Figure 4 Schematic diagram of the waveform analysis process.

[0025] Figure 5 Schematic diagram of distributed processing architecture. DETAILED DESCRIPTION

[0026] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0027] Example 1 like Figure 1 As shown, a chip simulation waveform automatic parsing and analysis method can quickly extract key features in the waveform file, and can also perform intelligent comparison based on preset test expectations, thereby automatically generating a detailed analysis report to help engineers quickly locate and solve problems.

[0028] The following steps are involved: S1: Generate a waveform file for chip testing through a simulation tool and preprocess the acquired waveform file.

[0029] As a refinement of the above embodiment, the user inputs a waveform file, and the system automatically identifies the file format and performs preliminary analysis, including data format conversion and missing value processing. By standardizing the data input format, the data consistency and integrity of subsequent processing steps are ensured, preparing for denoising and feature extraction.

[0030] Specifically, Figure 2 As shown, the preprocessing includes denoising, normalization and feature extraction. (1) Denoising: Multi-level adaptive denoising technology is used, combined with wavelet transform and adaptive filtering methods to effectively remove multi-source noise in the waveform.

[0031] Wavelet transform decomposition refers to the use of discrete wavelet transform (DWT) to decompose waveform signals into different frequency levels and separate high-frequency noise and low-frequency signals.

[0032] Adaptive filtering means dynamically adjusting the filter parameters for each frequency band, applying adaptive filters based on real-time noise characteristics, and accurately removing noise.

[0033] Signal reconstruction refers to reconstructing the denoised signals of each frequency band into clear time domain signals through inverse wavelet transform (IDWT), ensuring the retention of key timing information and improving the clarity of the signal.

[0034] (2) Normalization includes global normalization and dynamic normalization; The global normalization first scales the entire waveform data to a uniform range (such as 0 to 1) to eliminate the amplitude differences between different waveforms. The formula is as follows: , in, is the original waveform data, , are the minimum and maximum values ​​of the waveform data, is the normalized waveform data point; The dynamic normalization method is as follows: Divide the waveform data into overlapping sliding windows; Calculate the local mean within each window and standard deviation : , , in, is a sliding window, is the window size, that is, the number of data points in the sliding window, The first data points; According to the calculated mean and standard deviation, the data in the window is normalized. The formula is as follows: , in, is the waveform data point; The normalized data of each window are fused to generate an overall normalized waveform signal.

[0035] (3) Feature extraction: Using intelligent feature extraction algorithms to automatically identify and extract key features in the waveform Rising and falling edge detection: Calculates the first derivative of a waveform to identify the rising and falling edge locations of a signal.

[0036] Peak Detection: Apply a local maximum detection algorithm to extract peaks and valleys in a waveform.

[0037] Hold Time Calculation: Analyzes the stable area of ​​the waveform and calculates the time the signal remains at a specific level.

[0038] Time-frequency joint feature extraction: Use short-time Fourier transform (STFT) to capture the instantaneous frequency changes of the waveform and extract time-frequency joint features.

[0039] Feature selection: Use Gradient Boosting Trees to evaluate the importance of each feature and select the most valuable features.

[0040] Feature dimensionality reduction: Principal component analysis (PCA) is used to reduce the dimensionality of high-dimensional features, retaining the main information and reducing redundant features.

[0041] S2: Build a deep learning model and use waveform data to train the deep learning model. The deep learning model is a hybrid deep learning model that combines a deep convolutional neural network and a graph neural network, and introduces an attention mechanism.

[0042] As a refinement of the above embodiment, Figure 3 As shown in the figure, the deep learning model training process is as follows: Data preparation, collect a large amount of waveform data covering various chip design and test scenarios from multiple sources. By combining automated tools and expert manual annotation methods, the data is accurately annotated to ensure its quality and accuracy. Subsequently, data cleaning is performed to handle missing values, outliers, and duplicate data to ensure the integrity and consistency of the data set. The data set is divided into training set, validation set, and test set, usually allocated in a ratio of 70% training, 15% validation, and 15% testing. In addition, data augmentation techniques in the time domain and frequency domain, such as random noise addition, time offset, and frequency perturbation, are used to increase the diversity of the data and improve the generalization ability of the model.

[0043] Model selection and design: Select and design a deep learning model suitable for waveform analysis, combining deep convolutional neural network (DCNN), graph neural network (GNN) and attention mechanism. DCNN is used to extract local temporal features of waveforms and can capture temporal changes at different scales. GNN is used to model the relationship and dependency between different signals, capture global features, and enhance the understanding of complex waveform data. The attention mechanism is introduced into the model to dynamically adjust the weights of each layer of the network to improve the ability to extract key features, ensure that the model can effectively focus on important information, and thus improve the overall analysis performance.

[0044] Model training, using the prepared data set to train the deep learning model, using the AdamW optimizer combined with gradient clipping technology to ensure the stability and efficiency of the training process. In order to prevent the model from overfitting, the Dropout and L2 regularization methods are applied to enhance the generalization ability of the model. A phased training strategy is adopted. First, the DCNN part is independently trained to extract local temporal features, and then the GNN and attention mechanism modules are jointly trained to gradually optimize the extraction capabilities of global features and key features. Finally, overall fine-tuning is performed to ensure that each module works together to improve the parsing accuracy and efficiency of the overall model.

[0045] Optimization algorithm: Use AdamW optimizer, and its parameter update formula is as follows: The AdamW optimizer parameter update formula is as follows: , , , , , in, is the current gradient, and is the momentum parameter, is the learning rate, is a small constant to prevent division by zero, represents the first-order momentum estimate, represents the second-order momentum estimate, represents the parameter vector, represents the bias-corrected second-order momentum estimate, Represents the bias-corrected first-order momentum estimate.

[0046] Regularization technology: Apply Dropout and L2 regularization methods to prevent model overfitting and enhance the generalization ability of the model. Dropout reduces the model's dependence on specific paths by randomly discarding a portion of neurons; L2 regularization adds the sum of the squares of weights to the loss function. The formula is as follows: in, is the regularization parameter, are model parameters, represents the loss function after regularization, represents the original loss function.

[0047] Model validation: The trained model is validated through the validation set, and the k-fold cross-validation method is used to comprehensively evaluate the performance of the model to ensure the stability and reliability of the results. Multi-dimensional performance evaluation indicators, including parsing accuracy, recall, and F1-Score, are used to comprehensively measure the parsing ability and generalization performance of the model. The specific evaluation formula is as follows: Accuracy: , Recall: , F1-Score: , in, , , , denote true positives, true negatives, false positives, and false negatives, respectively. Indicates accuracy.

[0048] S3: Use the trained deep learning model to parse the waveform file and extract the digital logic state and timing features; As a refinement of the above embodiment, the waveform file is parsed using a trained deep learning model, such as Figure 4 As shown, the specific method is as follows: Waveform file input: User inputs the waveform file.

[0049] Model loading: The system loads the latest trained deep learning model from the model library. During the loading process, the system verifies the model version and parameter configuration to ensure the compatibility and performance of the model. The model library supports version control and dynamic updates to ensure that the optimal model version is used during the parsing process. The loaded model includes deep convolutional neural network (DCNN), graph neural network (GNN) and attention mechanism modules, which can fully parse the timing and logic features in the waveform.

[0050] Waveform parsing: Use the loaded deep learning model to parse the input waveform file. The model first extracts the local timing features of the waveform through DCNN, and then models the relationship between different signals through GNN to capture global features. The attention mechanism layer dynamically adjusts the weights of each layer of the network, focusing on key feature areas. During the parsing process, the model uses the parameters and structures learned during training to identify the digital logic state and timing features in the waveform and generate the corresponding parsing results. During the parsing process, the model calculates the activation value of the feature map, and the formula is as follows: , in, is the activation value of the lth layer, is the convolution kernel weight, is the bias, is the activation function, and ∗ represents the convolution operation.

[0051] Analysis result output: The system generates a structured analysis report that records the logic state and timing characteristics in the waveform in detail. The analysis results can be exported in multiple data formats (such as JSON, XML, CSV) to facilitate subsequent analysis and processing. The report includes key timing information, logic state switching points, signal fluctuations, etc., to help users quickly understand and diagnose waveform problems.

[0052] S4: Compare the extracted features with the preset test expectations, determine whether the waveform meets the expectations, and generate a comparison result.

[0053] As a refinement of the above embodiment, the extracted features are compared with the preset test expectations, and the specific method is as follows: Logic state input: Receive and import logic state data obtained through the waveform analysis process. Logic state data includes the high and low level transition points of the signal, the state changes of the logic gate, etc., to ensure that the data format is consistent with the preset test expected data for subsequent comparison and analysis.

[0054] Timing feature input: Receive and import the logic state data obtained through the waveform analysis process. The logic state data includes the high and low level transition points of the signal, the state changes of the logic gate, etc., to ensure that the data format is consistent with the preset test expected data for subsequent comparison and analysis.

[0055] Preset test expected input: Receive and import the logic state data obtained through the waveform analysis process. The logic state data includes the high and low level transition points of the signal, the state changes of the logic gate, etc., to ensure that the data format is consistent with the preset test expected data for subsequent comparison and analysis.

[0056] Comparison analysis: The system uses advanced intelligent algorithms to compare and analyze the input logic state and timing characteristics with the preset test expected data. The specific steps include: Feature matching: Use the dynamic time warping (DTW) algorithm to accurately match timing features and evaluate the time alignment of waveforms.

[0057] Similarity calculation: Use metrics such as cosine similarity to calculate the similarity between logic states and timing features, quantifying how well the waveform matches expectations.

[0058] Anomaly Detection: Apply deep learning models such as autoencoders to identify abnormal patterns in logic states and timing features, and automatically detect abnormal situations where waveforms deviate from expected ones.

[0059] Comprehensive judgment: Combined with the rule engine and machine learning decision tree, it comprehensively analyzes the matching results and anomaly detection results, determines whether the waveform meets expectations, and generates corresponding error and anomaly prompts.

[0060] Output analysis results: Generate detailed analysis results, including waveform comparison results, logic error prompts, timing anomaly prompts, etc.

[0061] Feedback of analysis results: Detailed analysis results are sent back to the system database as the basis for subsequent data accumulation and model optimization. Through the data-driven continuous improvement mechanism, the system can optimize the comparison algorithm and model parameters based on historical analysis results, improve the overall intelligence level and the accuracy of comparison analysis.

[0062] Self-learning model optimization: Based on the analysis results and feedback, the analysis algorithm is continuously updated and optimized to improve the intelligence level of the system. The optimized model is applied again to the comparison analysis to form a closed loop.

[0063] It should be noted that the multi-level adaptive data preprocessing module in this embodiment includes: Adaptive denoising: Combining wavelet transform and adaptive filtering technology, the denoising parameters are dynamically adjusted according to different frequency scales to effectively remove multi-source noise interference and retain key timing information.

[0064] Feature enhancement: Through the adaptive enhancement algorithm, key features in the waveform (such as rising edge, falling edge, hold time, etc.) are automatically identified and highlighted to improve the accuracy of subsequent analysis and feature identifiability.

[0065] Hybrid Deep Learning Model: Combination of DCNN and GNN: Deep convolutional neural network (DCNN) is used to extract the local timing features of the waveform, and then the relationship and dependency between different signals are modeled through graph neural network (GNN) to achieve a comprehensive understanding of complex waveform data.

[0066] Attention mechanism: The attention mechanism is introduced into the model, so that it can dynamically adjust the weights of each layer of the network according to the different characteristics of the input waveform, enhance the ability to extract key features, and improve the generalization and adaptability of the model.

[0067] Example 2 A chip simulation waveform automatic parsing and analysis system, comprising: Waveform file acquisition module: used to generate waveform files for chip testing through simulation tools; Data preprocessing module: preprocess the acquired waveform files, including denoising, normalization and feature extraction. The denoising process adopts a multi-level adaptive denoising method combining wavelet transform and adaptive filtering technology; Deep learning model training module: uses a large amount of waveform data to train the deep learning model, which is a hybrid deep learning model that combines a deep convolutional neural network with a graph neural network and introduces an attention mechanism; Waveform parsing module: Use the trained deep learning model to parse the waveform file and extract the digital logic state and timing characteristics; Automatic comparison and analysis module: compares the extracted features with the preset test expectations, determines whether the waveform meets the expectations, and generates comparison results; User interface module: Provides a graphical user interface that supports visual display and interactive analysis of waveform data.

[0068] Example 3 like Figure 5 As shown, a chip simulation waveform automatic parsing and analysis system adds the following functions: Edge computing processing: Deploy parsing and analysis algorithms on local hardware devices to reduce data transmission delays and improve real-time performance.

[0069] Distributed processing architecture: Combine edge computing and cloud computing to implement a distributed processing architecture, perform parsing and analysis locally and in the cloud simultaneously, and improve processing efficiency and reliability.

[0070] Intelligent scheduling system: According to the complexity and processing requirements of waveform data, local and cloud resources are intelligently scheduled to optimize the utilization of computing resources.

[0071] Expanded support for more waveform formats: Supports more types of waveform file formats to adapt to the output of different simulation tools.

[0072] Real-time monitoring: Supports real-time parsing and analysis of waveform data, and timely feedback of test results.

[0073] Specifically, it includes the following modules: Waveform data acquisition module: responsible for collecting waveform data from simulation tools or test equipment.

[0074] Edge computing node: performs preliminary processing and analysis on the collected waveform data to reduce the amount of data transmission and improve real-time performance.

[0075] Edge computing node 1: processes part of the waveform data.

[0076] Edge computing node 2: processes another part of the waveform data.

[0077] Edge computing node N: processes the remaining waveform data.

[0078] Data transmission module: transmits the waveform data processed by the edge computing node to the cloud to ensure the reliability and security of data transmission.

[0079] Cloud processing center: comprehensively processes and analyzes the transmitted waveform data, utilizing the powerful computing power of cloud computing resources.

[0080] Waveform data storage module: stores waveform data in the cloud storage system for subsequent analysis and query.

[0081] Waveform analysis module: performs in-depth analysis on stored waveform data to extract key logic states and timing features.

[0082] Automated comparison and analysis module: compares the characteristics of waveform data with preset test expectations, determines whether the waveform meets expectations through algorithms, and generates comparison results.

[0083] Analysis result output module: Generates detailed analysis reports, including waveform comparison results, logic error prompts, timing anomaly prompts, etc.

[0084] Self-learning model optimization module: By analyzing the results, the waveform analysis algorithm is continuously updated and optimized to improve the intelligence level of the system. The optimized model is applied to the waveform analysis module again.

[0085] User interface and result display module: displays the analysis results to the user and provides a user interaction interface.

[0086] On the basis of the preferred implementation scheme, the following functions are added: Edge computing processing: Deploy parsing and analysis algorithms on local hardware devices to reduce data transmission delays and improve real-time performance.

[0087] Distributed processing architecture: Combine edge computing and cloud computing to implement a distributed processing architecture, perform parsing and analysis locally and in the cloud simultaneously, and improve processing efficiency and reliability.

[0088] Intelligent scheduling system: According to the complexity and processing requirements of waveform data, local and cloud resources are intelligently scheduled to optimize the utilization of computing resources.

[0089] Expanded support for more waveform formats: Supports more types of waveform file formats to adapt to the output of different simulation tools.

[0090] Real-time monitoring: Supports real-time parsing and analysis of waveform data, and timely feedback of test results.

[0091] It should be noted that by introducing edge computing, the present invention can perform preliminary processing and analysis of waveform data on local hardware devices, reducing data transmission delays and improving real-time performance. This is particularly important for application scenarios that require real-time monitoring of chip performance.

[0092] Combining edge computing and cloud computing, the present invention realizes a distributed processing architecture, which can intelligently schedule local and cloud resources and optimize the utilization of computing resources. This not only improves the overall performance of the system, but also improves processing efficiency and reliability, making it possible to parse and analyze large-scale chip simulation waveforms.

[0093] The embodiment of the present disclosure also provides a device for automatically parsing and analyzing chip simulation waveforms, including a processor and a memory. Optionally, the device may also include a communication interface and a bus. The processor, the communication interface, and the memory may communicate with each other through the bus. The communication interface may be used for information transmission. The processor may call the logic instructions in the memory to execute the method for automatically parsing and analyzing chip simulation waveforms of the above embodiment.

[0094] In addition, the logic instructions in the above-mentioned memory can be implemented in the form of software functional units and can be stored in a computer-readable storage medium when sold or used as an independent product.

[0095] The memory, as a computer-readable storage medium, can be used to store software programs and computer executable programs, such as program instructions / modules corresponding to the method in the embodiment of the present disclosure. The processor executes the function application and data processing by running the program instructions / modules stored in the memory, that is, the automatic parsing and analysis method of chip simulation waveform in the above embodiment is realized.

[0096] The memory may include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application required for at least one function; the data storage area may store data created according to the use of the terminal device, etc. In addition, the memory may include a high-speed random access memory and may also include a non-volatile memory.

[0097] Finally, it should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A chip simulation waveform automatic parsing and analysis method, characterized in that: The following steps are involved: Generate a waveform file for chip testing through a simulation tool and pre-process the acquired waveform file; Build a deep learning model and use waveform data to train the deep learning model. The deep learning model is a hybrid deep learning model that combines a deep convolutional neural network and a graph neural network and introduces an attention mechanism. Use the trained deep learning model to parse the waveform file and extract the digital logic state and timing features; The extracted features are compared with the preset test expectations to determine whether the waveform meets the expectations and generate comparison results.

2. The chip simulation waveform automatic parsing and analysis method according to claim 1, characterized in that: The preprocessing includes denoising, normalization and feature extraction, wherein the denoising process adopts a multi-level adaptive denoising method combining wavelet transform and adaptive filtering technology.

3. The chip simulation waveform automatic parsing and analysis method according to claim 2 is characterized in that: The normalization includes global normalization and dynamic normalization; The global normalization formula is as follows: , in, is the original waveform data, , are the minimum and maximum values ​​of the waveform data, is the normalized waveform data point; The dynamic normalization method is as follows: Divide the waveform data into overlapping sliding windows; Calculate the local mean within each window and standard deviation : , , in, is a sliding window, is the window size, that is, the number of data points in the sliding window, The first data points; According to the calculated mean and standard deviation, the data in the window is normalized. The formula is as follows: , in, is the waveform data point; The normalized data of each window are fused to generate an overall normalized waveform signal.

4. The chip simulation waveform automatic parsing and analysis method according to claim 1, characterized in that: The feature extraction is to extract key features from the waveform, including: Rising and falling edge detection: Calculate the first-order derivative of the waveform to identify the rising and falling edge positions of the signal; Peak detection: Apply local maximum detection algorithm to extract peaks and valleys in the waveform; Hold time calculation: Analyze the stable area of ​​the waveform and calculate the hold time of the signal at a specific level; Time-frequency joint feature extraction: Use short-time Fourier transform to capture the instantaneous frequency changes of the waveform and extract the time-frequency joint features; Feature selection: Use gradient boosting trees to evaluate the importance of each feature and select the most valuable features; Feature dimensionality reduction: Principal component analysis is used to reduce the dimensionality of high-dimensional features, retaining the main information and reducing redundant features.

5. The chip simulation waveform automatic parsing and analysis method according to claim 1, characterized in that: The deep convolutional neural network is used to extract local timing features of the waveform and capture timing changes at different scales; the graph neural network is used to model the relationships and dependencies between different signals, capture global features, and enhance the understanding of complex waveform data; the attention mechanism improves the ability to extract key features by dynamically adjusting the weights of each layer of the network.

6. The chip simulation waveform automatic parsing and analysis method according to claim 5, characterized in that: The deep learning model training process uses the AdamW optimizer combined with gradient clipping technology; the Dropout and L2 regularization methods are used to prevent the model from overfitting and enhance the generalization ability of the model; The deep learning model adopts a phased training strategy. First, the deep convolutional neural network is independently trained to extract local temporal features, and then the graph neural network and attention mechanism module are jointly trained to gradually optimize the extraction capabilities of global features and key features.

7. The chip simulation waveform automatic parsing and analysis method according to claim 6, characterized in that: The AdamW optimizer parameter update formula is as follows: , , , , , in, is the current gradient, and is the momentum parameter, is the learning rate, is a small constant to prevent division by zero, represents the first-order momentum estimate, represents the second-order momentum estimate, represents the parameter vector, represents the bias-corrected second-order momentum estimate, Represents the bias-corrected first-order momentum estimate.

8. The chip simulation waveform automatic parsing and analysis method according to claim 6, characterized in that: The L2 regularization adds the sum of squares of weights to the loss function. The specific formula is as follows: in, is the regularization parameter, are model parameters, represents the loss function after regularization, represents the original loss function.

9. The chip simulation waveform automatic parsing and analysis method according to claim 1, characterized in that: Compare the extracted features with the preset test expectations as follows: Obtain digital logic states and timing characteristics, and use dynamic time warping algorithms to accurately match the timing characteristics and evaluate the time alignment of the waveforms; The cosine similarity method is used to calculate the similarity between the logic state and the timing characteristics, quantifying how well the waveform matches the expectation; The autoencoder identifies abnormal patterns in logic states and timing features, detecting abnormal situations where waveforms deviate from the expected; Combined with the rule engine and machine learning decision tree, it analyzes the matching results and anomaly detection results, determines whether the waveform meets expectations, and generates corresponding error and anomaly prompts.

10. A chip simulation waveform automatic parsing and analysis system using the method according to any one of claims 1 to 8, characterized in that: include: Waveform file acquisition module: used to generate waveform files for chip testing through simulation tools; Data preprocessing module: preprocess the acquired waveform files, including denoising, normalization and feature extraction. The denoising process adopts a multi-level adaptive denoising method combining wavelet transform and adaptive filtering technology; Deep learning model training module: uses a large amount of waveform data to train the deep learning model, which is a hybrid deep learning model that combines a deep convolutional neural network with a graph neural network and introduces an attention mechanism; Waveform parsing module: Use the trained deep learning model to parse the waveform file and extract the digital logic state and timing characteristics; Automatic comparison and analysis module: compares the extracted features with the preset test expectations, determines whether the waveform meets the expectations, and generates comparison results; Analysis result output module: Generate analysis report, including waveform comparison results, logic error prompts, and timing anomaly prompts; User interface module: Provides a graphical user interface that supports visual display and interactive analysis of waveform data.

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