A modulation method for CLLC converter to realize bidirectional symmetric power transmission

Abstract

The application provides a modulation method for a CLLC converter to realize bidirectional symmetric power transmission, comprising the following steps: when reverse power transmission is performed, the CLLC converter is operated in an OP mode, wherein the OP mode comprises a P stage and an O stage; in the P stage, a secondary side current is negative, the converter transmits reverse power, and the secondary side current enters the O stage after zero current switching is completed; in the O stage, the secondary side current becomes positive, enters a negative P mode, and reverse power transmission is completed; when switching between the P stage and the O stage, a 50% complementary square wave driving signal of a primary side is used for control, so that the switching frequency is the same when forward transmission and reverse transmission are performed under the same voltage gain and opposite loads, and bidirectional switching of the reverse power transmission and the forward power transmission is realized by adjusting the alignment edges of the primary side driving signal and the secondary side driving signal. The application introduces the OP mode to replace a traditional NP mode to realize bidirectional power transmission, and the frequency modulation range of the CLLC converter is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of CLLC converter, and particularly relates to a modulation method for CLLC converter to realize bidirectional symmetric power transmission. BACKGROUND

[0002] The CLLC converter is a typical resonant converter, and its main feature is to realize soft switching operation through a resonant cavity, thereby reducing switching loss and improving conversion efficiency. The CLLC converter is widely used in power electronics, especially in occasions requiring high efficiency energy conversion and bidirectional power transmission. However, the traditional CLLC converter still has certain challenges in gain characteristics, frequency modulation range and symmetry during bidirectional power transmission.

[0003] Under the requirement of bidirectional operation, the reverse operation in the existing modulation scheme is to reverse the original and secondary side drive signals, that is, the secondary side is driven with 50% duty cycle, and the primary side is synchronized rectified, which will make the reverse gain curve of the converter become the inverse of the forward gain curve. Then, the prior art scheme has the following problems:

[0004] (1) Generally, bidirectional power switching is carried out under the condition that the gain is unchanged, which will make the CLLC converter switch from the PO mode to the NP mode, and the frequency span range is large, resulting in problems such as wide comprehensive frequency modulation range and low efficiency.

[0005] (2) Worse still, the more flat gain curve under the NP mode limits the gain range of the converter. Specifically, in order to meet the required bidirectional gain range, a rectangular box is used to enclose the operating area, as shown in Figure 6 The upper limit of the gain range is limited by the NP mode, considering the symmetric switching frequency range. Even if the gain curve can be extended, the required high switching frequency may be difficult to achieve due to the limitation of switching devices, which may be dangerous, especially in high power applications. SUMMARY

[0006] The present application aims to at least solve one of the technical problems in the related art to some extent.

[0007] To this end, a first object of the present application is to provide a modulation method for CLLC converter to realize bidirectional symmetric power transmission.

[0008] A second object of the present application is to provide an electronic device.

[0009] A third object of the present application is to provide a computer readable storage medium.

[0010] A fourth object of the present application is to provide a computer program product.

[0011] To achieve the above object, the first aspect of the present application proposes a modulation method for CLLC converter to realize bidirectional symmetric power transmission, comprising:

[0012] The topology of the CLLC converter is obtained, and the connection relationship of the H-bridge circuits of the primary side and the secondary side, the resonant cavity and the input and output ports is determined.

[0013] In the reverse power transmission, the CLLC converter is operated in OP mode, wherein the OP mode includes P stage and O stage: in the P stage, the secondary side current is negative, the converter transmits reverse power, and the secondary side current enters the O stage after completing zero current switching; in the O stage, the secondary side current becomes positive, enters negative P mode, and completes reverse power transmission.

[0014] When switching between the P stage and the O stage, the primary side 50% complementary square wave driving signal is used for control, to ensure that the switching frequency is the same in forward and reverse transmission under the same voltage gain and opposite load, and the bidirectional switching of reverse and forward power transmission is realized by adjusting the aligned edges of the primary side and the secondary side driving signals.

[0015] Optionally, the topology of the CLLC converter is obtained, the connection relationship of the H-bridge circuits of the primary side and the secondary side, the resonant cavity and the input and output ports is determined, and the resonant parameters are set, comprising:

[0016] The CLLC converter is composed of two H-bridges and a resonant cavity, and the input side in forward operation is the primary side and the output side is the secondary side; wherein the switch tubes of the primary side are S1-S4, and the switch tubes of the secondary side are S5-S8; the resonant cavity includes the primary side resonant inductor L r1 , the resonant capacitor C r1 , the transformer with a transformation ratio of n:1 and its excitation inductance L m , the secondary side resonant inductor L r2 and C r2 ; wherein the primary side input terminals and the secondary side output terminals can be connected in parallel with large capacitors C in and C out , the resonant cavity input end points A and B are generated by the primary side H-bridge square wave voltage v AB , the output end points C and D are v CD , the primary side input voltage is V p , and the output voltage V s is rectified by the secondary side H-bridge; wherein in the circuit, the loop resonant current of the primary side is i p , the excitation current is i m , and the loop resonant current of the secondary side is i s .

[0017] Optionally, it further comprises:

[0018] In the forward power transmission, the CLLC converter is operated in the original PO mode, the primary side switches are controlled to be turned on alternately, the input voltage of the resonant cavity presents a square wave change, and the synchronous rectification mode is adopted in the secondary side H bridge circuit, so that the load side obtains a stable output.

[0019] Optionally, the CLLC converter is operated in the OP mode in the reverse power transmission, and the method comprises the following steps.

[0020] In the P phase [φ t1 ~ φ t2 ], the phase is the same as the P phase in the forward original PO mode, the secondary side current i s is negative, and the converter transmits reverse power; when the time reaches φ t2 , the resonant circuit changes due to the reverse of v AB , the primary side resonant circuit continues to consume power, the secondary side switches S5 and S8 are turned off, and the anti-parallel diodes thereof cannot conduct the negative i s , the secondary side current i s remains at zero, and the secondary side enters a dead time, that is, the O phase; when i s approaches zero, the secondary side switches S5 and S8 are turned off to complete zero current switching, and the primary side switches S1 and S4 are turned off when the primary side current i p is at a medium value;

[0021] In the O phase [φ t2 ~ φ t3 ], at φ t2 , the secondary side switches S6 and S7 are turned on under zero voltage switching, the primary side current remains positive, and the CLLC converter enters a negative half cycle; at φ t3 , the secondary side switches S6 and S7 continue to be turned on, v CD is reversed, the secondary side electric i s becomes positive, reverse power is provided, the converter enters a negative P mode, and the reverse power transmission is completed.

[0022] Optionally, the method further comprises the following steps.

[0023] In the OP mode, the time domain state of the P phase is as follows.

[0024]

[0025] In the OP mode, the time domain state of the O phase is as follows.

[0026]

[0027] Wherein, φ = 2 π f r t, k = L m / L r1 , P1, P2, P3, P4, O1, O2, and M are undetermined variables;

[0028] In order to determine the undetermined variables, a boundary condition is constructed, and the formula is:

[0029]

[0030] The precise time-domain behavior of the OP mode is calculated by simultaneously solving the above formula 1), formula 2), and formula 3).

[0031] To achieve the above object, the second aspect of the present application provides an electronic device, comprising: a processor, and a memory connected with the processor in communication;

[0032] The memory stores computer-executable instructions.

[0033] The processor executes the computer-executable instructions stored in the memory to implement the method according to any one of the above first aspect.

[0034] To achieve the above object, the third aspect of the present application provides a computer-readable storage medium, the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are executed by a processor to implement the method according to any one of the above first aspect.

[0035] Additional aspects and advantages of the present application will be in part apparent and in part pointed out below. BRIEF DESCRIPTION OF DRAWINGS

[0036] The above and / or additional aspects and advantages of the present application will become apparent and be readily appreciated from the following description, including the references to the figures, in which:

[0037] Figure 1 A topology schematic diagram of the CLLC converter provided by the embodiments of the present application;

[0038] Figure 2 A bidirectional gain characteristic schematic diagram of the CLLC converter provided by the embodiments of the present application;

[0039] Figure 3 A waveform schematic diagram of the CLLC converter in the PO mode provided by the embodiments of the present application;

[0040] Figure 4 A waveform schematic diagram of the CLLC converter in the NP mode provided by the embodiments of the present application;

[0041] Figure 5 A three-stage equivalent circuit schematic diagram of the CLLC converter provided by the embodiments of the present application;

[0042] Figure 6 A bidirectional gain curve and a gain design range limitation diagram of the CLLC converter provided in the embodiments of the present application;

[0043] Figure 7 A waveform diagram of the CLLC converter in the OP mode provided in the embodiments of the present application;

[0044] Figure 8 A bidirectional modulation strategy diagram of the CLLC converter provided in the embodiments of the present application;

[0045] Figure 9 A gain curve diagram of the CLLC converter under the bidirectional modulation strategy provided in the embodiments of the present application;

[0046] Figure 10 A bidirectional modulation parameter design flowchart provided in the embodiments of the present application;

[0047] Figure 11 An OP mode experimental waveform and a time domain model comparison diagram provided in the embodiments of the present application;

[0048] FIG. 12(a), FIG. 12(b) and FIG. 12(c) are respectively waveform comparison diagrams of PO, OP and NP under the same working condition provided in the embodiments of the present application;

[0049] Figure 13 A gain curve diagram of different modes provided in the embodiments of the present application;

[0050] Figure 14 An efficiency curve diagram under different modes provided in the embodiments of the present application. DETAILED DESCRIPTION

[0051] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, in which the same or similar notations represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the accompanying drawings are exemplary and are intended to explain the present application, and cannot be understood as a limitation of the present application.

[0052] Firstly, the key technical terms related to the embodiments of the present application are explained, as shown in Table 1.

[0053] Table 1

[0054]

[0055]

[0056] In the embodiments of the present application, the CLLC converter is a bidirectional isolated DC-DC converter. Due to its resonant working principle, it can effectively realize excellent soft switching characteristics, thereby having high efficiency. Its symmetrical resonant cavity makes it very suitable for use in scenarios requiring bidirectional power transmission, such as energy storage systems.

[0057] The topology of the CLLC converter is shown in Figure 1 . Referring to Figure 1 , the CLLC converter is composed of two H-bridges and a resonant cavity. The input side is the primary side and the output side is the secondary side when working in the forward direction. The switch tubes of the primary side are S1-S4, and the switch tubes of the secondary side are S5-S8. The switch tubes are usually silicon-based or silicon carbide (SiC)-based metal oxide semiconductor field effect transistors (MOSFETs), or gallium nitride high mobility transistors (GaNHEMTs). The resonant cavity includes a primary resonant inductor L r1 , a resonant capacitor C r1 , a transformer with a transformation ratio of n:1 and its excitation inductor L m , a secondary resonant inductor L r2 , and C r2 . Large capacitors C in and C out may be connected in parallel between the input terminals of the primary side and the output terminals of the secondary side to stabilize the terminal voltage. The square wave voltage v AB is generated by the primary H-bridge between the input points A and B of the resonant cavity, and the voltage between the output points C and D is v CD . The primary input voltage is V p , and the output voltage V s is rectified by the secondary H-bridge. In the circuit, the loop resonant current of the primary side is i p , the excitation current is i m , and the loop resonant current of the secondary side is i s .

[0058] The CLLC converter is usually modulated by pulse frequency. According to the relationship between the switching frequency f s and the resonant frequency , it can be divided into three modes: f s <f r , f s =f r , and f s >f r . The bidirectional gain characteristics of the CLLC converter under frequency modulation are shown in Figure 2 . For ease of description, in the embodiments of the present application, the bidirectional normalized gain is uniformly defined as V s / (nV p ), regardless of the direction of power transmission.

[0059] For the existing CLLC converter:

[0060] In f s <f r (When the switching frequency is less than the resonant frequency), CLLC converters are generally designed to operate in the PO mode, such as... Figure 3 As shown. The primary-side switches S1 and S4 and switches S2 and S3 are alternately turned on, each occupying 50% of the cycle. Therefore, the resonant cavity input voltage u... AB It presents a square wave, which excites the resonant cavity to generate a resonant current. The primary current i p From the secondary current i s and excitation current i m It is formed by superposition. Secondary current i s It resonates to its peak value within half a cycle and then decays to zero. Secondary current i s The resonant phase is called the P-phase, and the phase after the resonant current decreases to zero is called the O-phase. In the simplest driving mode, the secondary-side switches remain normally closed, and only their anti-parallel diodes control the secondary-side current i. s When the voltage is not zero, it is passively turned on, achieving the effect of uncontrolled rectification. To reduce the conduction loss of the diode during secondary-side rectification, CLLC converters often employ synchronous rectification technology. Therefore, during the positive half-cycle, the secondary-side switches S5 and S8, when the secondary-side current i... s When the current is greater than 0, the circuit is turned on, allowing current to flow through the active switch and reducing losses.

[0061] In f s =f r In this case, the CLLC converter operates in the P mode, which can be regarded as a special case of the PO mode, that is, the O mode time is reduced to 0.

[0062] In f s >f r In general, CLLC converters operate in NP mode, such as... Figure 4 As shown. The primary-side switches S1 and S4 and S2 and S3 are also alternately turned on, each occupying 50% of the cycle. During this time, the secondary-side current, under the rectification of the uncontrolled diode, does not have a zero-current phase. Within half a cycle, the secondary-side current is initially negative, at which point v... AB and v CD The polarities are opposite, which is the N stage; thereafter, the secondary current i s Become positive, v AB and v CD With the same polarity, it is the P stage. The equivalent circuit diagrams for P, N, and O stages are as follows: Figure 5 As shown.

[0063] It can be seen that, compared with the PO mode and the NP mode, the CLLC converter has better operating characteristics in the PO mode. The reasons include: (1) In the NP mode, the switching frequency is greater than f r, the switching loss is large. At the same time, in terms of variation, the same amplitude of gain drop will lead to a large increase in switching frequency (the gain curve is flatter), thereby increasing the switching loss. (2) In the NP mode, the current on the reverse side is cut off at its peak, resulting in a large turn-off loss.

[0064] Therefore, it is desirable for the CLLC to work in the PO mode as much as possible.

[0065] As described in the above background, under the requirement of bidirectional operation, the reverse operation in the existing modulation scheme is to reverse the primary and secondary side drive signals, that is, the secondary side is driven with a 50% duty cycle, and the primary side is synchronized to rectify. This will make the reverse gain curve of the converter become the inverse of the forward gain curve, as shown in Figure 2 .

[0066] The existing technical solutions have the following problems:

[0067] (1) Generally, bidirectional power switching is carried out under the condition of constant gain, which will make the CLLC converter switch from the PO mode to the NP mode, and the frequency span range is large, resulting in problems such as wide comprehensive frequency modulation range and low efficiency.

[0068] (2) Worse still, the flatter gain curve in the NP mode limits the gain range of the converter. Specifically, in order to meet the required bidirectional gain range, a rectangular box is used to enclose the operating area, as shown in Figure 6 . The upper limit of the gain range is limited by the NP mode, considering the symmetric switching frequency range. Even if the gain curve can be extended, the required high switching frequency may be difficult to achieve due to the limitations of the switching device, especially in high-power applications, which can be dangerous.

[0069] Therefore, in view of the above problems, the embodiments of the present application provide a modulation method for a CLLC converter to achieve bidirectional symmetric power transmission, which realizes symmetric bidirectional power transmission characteristics, reduces the frequency modulation range of the CLLC converter, and improves the comprehensive efficiency.

[0070] Specifically, the present application includes the following steps:

[0071] Step 101, obtaining the topology structure of the CLLC converter, determining the connection relationship of the H-bridge circuit of the primary side and the secondary side, the resonant cavity and the input and output ports;

[0072] Step 102, when transmitting reverse power, making the CLLC converter work in the OP mode, wherein the OP mode includes P phase and O phase: in the P phase, the secondary side current is negative, the converter transmits reverse power, and the secondary side current enters the O phase after completing the zero current switching; in the O phase, the secondary side current becomes positive, enters the negative P mode, and completes the reverse power transmission;

[0073] Step 103, when switching between the P phase and the O phase, the original side 50% complementary square wave driving signal is used for control, ensuring that the switching frequency is the same when transmitting forward and reverse under the same voltage gain and opposite load, and realizing bidirectional switching of reverse and forward power transmission by adjusting the aligned edges of the original side and the secondary side driving signals.

[0074] It should be noted that the topology of the CLLC converter has been described in the above embodiment, and will not be repeated here.

[0075] In view of the problems existing in the prior art, the present application embodiment proposes a new CLLC working mode-OP mode, and the waveform diagram is as shown in Figure 7 The working principle is as follows:

[0076] In the P phase [φ t1 ~φ t2 ]: This phase is the same as the P phase in the original forward PO mode, and the secondary side current i s is negative. Therefore, the converter is transmitting reverse power (v CD ·i s <0). At φ t2 , due to the reverse of v AB , the resonant circuit changes, and the main side resonant circuit continues to consume power. Since S5 and S8 are turned off, and their anti-parallel diodes cannot conduct negative i s , i s remains at zero, and the secondary side enters the dead time, i.e. the O phase. When i s approaches zero, S5 and S8 are turned off, completing zero current switching (ZCS). S1 and S4 are turned off when the main side current i p is at a medium value.

[0077] In the O phase [φ t2 ~φ t3 ]: At φ t2 , S6 and S7 are turned on under zero voltage switching (ZVS). Due to the change in the combination of the main side switches, the CLLC converter enters the negative half cycle. The main side current remains positive. At φ t3 , S6 and S7 continue to be turned on, v CD is reversed, i s becomes positive, providing reverse power (v CD ·i s <0). Therefore, the converter enters the negative P mode.

[0078] Since in each half cycle, the O phase must occur before the P phase, the present application embodiment calls this power transmission mode OP mode.

[0079] In addition, in the OP mode, the time-domain state of the P stage is:

[0080]

[0081] In the OP mode, the time-domain state of the O stage is:

[0082]

[0083] wherein φ = 2πf r t, k = L m / L r1 , P1, P2, P3, P4, O1, O2, and M are undetermined variables;

[0084] To determine the undetermined variables, boundary conditions are constructed, and the formula is:

[0085]

[0086] By simultaneously solving the above formula 1), formula 2), and formula 3), the accurate time-domain behavior of the OP mode can be calculated.

[0087] In addition, based on the OP mode, as described in step 103, the embodiments of the present application also propose a new bidirectional modulation strategy, as shown in Figure 8 . This scheme realizes reverse power transmission by replacing the NP mode with the OP mode. In the primary side, the driving signals of the PO mode and the OP mode are both the same 50% complementary square wave. Under the same voltage gain and opposite load, the switching frequency of the PO mode is the same as that of the OP mode. The bidirectional switching operation of the forward and reverse can keep the switching frequency unchanged. The only change of control is to adjust the aligned edges of the primary and secondary driving signals.

[0088] In the embodiments of the present application, the gain curve of the CLLC converter under the bidirectional modulation strategy is as shown in Figure 9 It can be seen that the gain curves of the PO mode and the OP mode overlap, and the bidirectional switching operation is represented by the same point on the gain curve. Therefore, the reverse gain range is the same as the forward gain range, and is no longer limited by the high resonance region. Figure 9 It also shows that the switching frequency range is saved beyond the part of the resonance frequency, because the maximum switching frequency f s,max is not greater than the resonance frequency f r .

[0089] These characteristics bring two main advantages, significantly reducing switching loss:

[0090] 1. The saved switching frequency range reduces f s .

[0091] 2. Replacing NP mode with OP mode reduces the hard-off current, thus reducing the off energy E off .

[0092] In addition, the parameter design method proposed in the embodiments of the present application is also very rich when considering one-way operation. The parameter design includes two parts: the values of the converter elements and the control parameters. The design of these two parts can be coupled or independent, and can be designed for optimization of any desired characteristics, which is not specifically limited in the present application. Unlike the complex asymmetric parameter design method which reconsiders the entire design process, the parameter design of the scheme proposed in the present application only needs to easily extend the one-way parameter design to the other direction, whether the forward design is open-loop or closed-loop, using SR with sensor or SR without sensor.

[0093] Because of the symmetry of PO and OP, when the control parameter design in PO mode is completed, i.e. the switching frequency f s and the duty cycle D p and D s , the same parameter values can be directly applied to OP mode for the same gain and opposite load, and the only change is to transfer the aligned edge from the rising edge to the falling edge.

[0094] It should be noted that the symmetry of PO and OP is defined as: under the condition of meeting the boundary condition frequency equal constraint and the opposite load current constraint, the forward PO and reverse OP gains are the same, the resonant current waveform is symmetric about the center (t = 1 / 4*T, i = 0) in half a cycle, and the resonant voltage waveform is symmetric about t = 1 / 4*T in half a cycle.

[0095] Figure 10 The complete parameter design process of PO mode is shown. The parameter design process includes the following steps:

[0096] Step I: Element parameter design.

[0097] In this step, some element parameters in the CLLC converter need to be designed, such as L r1 , L r2 , L m , n, C r1 , C r2 , etc.

[0098] Step II: Control parameter design.

[0099] This step involves the design of the switching frequency f s and the duty cycle D p and D s . Specifically:

[0100] In open-loop control, fs_PO Designed according to the required gain M and load current I0; f s_PO Designed according to the set value and feedback loop.

[0101] Duty cycle D p_PO Always designed as 50%.

[0102] When there is sensor synchronous rectification, D s_PO Designed according to the current sensor measurement value and dead zone; when there is no sensor synchronous rectification, D s_PO Designed according to prediction.

[0103] Step III: Save the design parameters.

[0104] In this step, the selected switching frequency f s_PO , duty cycle D p_PO and D s_PO are saved, and the working condition M and load current I0 are recorded.

[0105] Step IV: Control parameter design of OP mode under working condition M and load current I0.

[0106] In this step, the control parameter design is adjusted as:

[0107] f s_OP = f s_PO

[0108] D p_OP = D p_PO

[0109] D s_OP = D s_PO

[0110] That is, the switching frequency f s and duty cycle D p of OP mode and D s are consistent with PO mode.

[0111] In addition, the embodiments of the present application are tested on the experimental platform shown in Table 2, and the waveform diagram of OP mode can be obtained as Figure 11 shown, so it can be seen that the OP mode proposed in the present application indeed exists, and the theoretical time domain model and the actual one are highly consistent, and the modeling is accurate.

[0112] Table 2

[0113] Parameter Value Primary MOSFET 2 x C3M0075120J in parallel Secondary MOSFET 2 x C3M0065090J in parallel [[ L r1 ]]> 23.9uH <![CDATA[L r2 ]]> 3.9uH [[ L m ]]> 88.6uH [C r1 ]]> 54.1nF [C r2 ]]> 330.7nF Transformer turns ratio n 2.47 Resonant frequency f s ]]> 140kHz

[0114] Under the same external working condition (V p = 300V, I s = ±10A, Vs The time-domain waveforms of PO, NP, and OP (with opposite forward and reverse currents) at 158V are shown in Figure 12. The waveform symmetry of PO and OP, as well as the significant frequency difference between them and NP, can be observed.

[0115] The gain curves of PO, NP and OP were measured experimentally as follows: Figure 13 As shown, the gain curves conform to theoretical expectations, and the PO and OP curves almost overlap, ensuring that the bidirectional power transfer frequency range is below the resonant frequency, thus saving the switching frequency range and reducing switching losses during reverse transmission. Efficiency is then measured, such as... Figure 14 As shown, the OP mode significantly improves the converter's operating efficiency under the same external operating conditions, proving the effectiveness of the proposed solution.

[0116] Based on the analysis of diode mechanisms and mode theory, this application's embodiments discovered the OP mode, which possesses gain characteristics symmetrical to the PO mode, significantly improving reverse performance. Furthermore, this application's embodiments propose a symmetrical modulation scheme, integrating the OP mode to provide a good solution for a high-efficiency, wide-gain, low-switching-frequency-range bidirectional DC-DC converter. This application can be used with any unidirectional CLLC converter design to achieve the same reverse performance.

[0117] To implement the above embodiments, this application also proposes an electronic device, including: a processor and a memory communicatively connected to the processor; the memory stores computer execution instructions; the processor executes the computer execution instructions stored in the memory to implement the method provided in the foregoing embodiments.

[0118] To implement the above embodiments, this application also proposes a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, are used to implement the methods provided in the foregoing embodiments.

[0119] To implement the above embodiments, this application also proposes a computer program product, including a computer program that, when executed by a processor, implements the methods provided in the foregoing embodiments.

[0120] The collection, storage, use, processing, transmission, provision, and disclosure of user personal information involved in this application all comply with the provisions of relevant laws and regulations and do not violate public order and good morals.

[0121] It is important to note that user's personal information shall be collected for legitimate and reasonable uses of the service and not shared or sold outside of those legitimate uses. Further, such collection / sharing shall occur after receiving the consent of the users, including but not limited to, informing the users to read the user agreement / user notice before using the function, and signing the agreement / authorization including the authorization of relevant user information. In addition, any necessary steps shall be taken to protect and secure access to such personal information data, and ensure that other individuals with access to the personal information data follow their privacy policies and procedures.

[0122] The present application contemplates providing an implementation in which the user has the option to opt in or opt out of allowing the collection of personal information data. That is, the present disclosure contemplates providing users with control to permit, deny, or eliminate the collection of some or all personal information data by a company, a marketing partner, or any other party. If a user opts in to allow the collection of personal information data, the user can also have the option to revoke permission to collect such information data, and an opt out mechanism is provided.

[0123] In the foregoing detailed description of embodiments, reference is made to descriptive terms such as "one embodiment", "some embodiments", "an example", "a specific example" or "some examples" etc. which indicate that the particular feature, structure, material, or characteristic being described is included in at least one embodiment or example of the application. The illustrative examples of the application described herein are not meant to be limiting to a particular embodiment or example, but are included to further describe and teach aspects of the application. Furthermore, the use of descriptive terms such as "first", "second" and the like does not imply a relative importance or a particular order of the features, structures, materials or characteristics being described. Thus, the features, structures, materials or characteristics associated with the first and second can comprise at least one of the features, structures, materials or characteristics. The term "plurality" is intended to mean at least two, for example two, three, etc., unless otherwise specifically indicated.

[0124] Furthermore, the terms "first", "second", and the like, do not denote any absolute or chronological importance, but are used to distinguish one feature from another, and are used interchangeably with the designations "one", "another", and "at least one". The meaning of "a", "an", and "the" includes singular and plural references unless otherwise clear from the context. The terms "comprising", "having", "including", and "containing" are to be construed as open-ended terms (i.e., meaning "including, but not limited to") unless otherwise noted.

[0125] Any process or method described in a flowchart or otherwise described herein can be understood as representing code modules, segments, or portions of code that include one or more executable instructions for implementing specific logic functions (or steps) of the application, and alternate implementations are possible. In this description and in the claims, the terms "code modules", "code segments", or "code portions" are used to generally refer to information that is a combination of one or more executable instructions, and / or other data, that when executed by one or more processing units, is capable of implementing the functionality of the application. The various code modules, segments, or portions can be stored in a computer readable medium such as a memory or hard disk, or transmitted between a computer and a peripheral device, over a network, etc.

[0126] The logic and / or steps represented in the flowcharts and / or described herein, for example, can be considered as a sequence of executable instructions stored in a computer readable medium, which can be executed by an instruction execution system, apparatus or device, such as a computer-based system, processor- based system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions, or a combination thereof. For the purposes of this specification, a "computer readable medium" can be any apparatus that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. The computer readable medium can specifically include the following, which are non-exhaustive list: electrical connection (electrical device having one or more wires), portable computer diskette (magnetic device), random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or Flash memory), optical fiber device, and portable compact disc read-only memory (CDROM). In addition, the computer readable medium can even be paper or other suitable medium upon which the program is printed, as the program can be electronically captured, for example, by optically scanning the paper or other suitable medium, then electronically converted into a form that can be edited, compiled, or interpreted, or otherwise processed in electronic form into an executable form suitable for use in the instruction execution system, apparatus or device.

[0127] It should be understood that parts of the present application can be implemented in hardware, software, firmware or a combination thereof. In the above embodiments, a plurality of steps or methods can be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. As in another embodiment, if implemented in hardware, any of the following technologies known in the art or their combination can be used: discrete logic circuit with logic gate circuit for implementing logic functions on data signals, application specific integrated circuit with suitable combination logic gate circuit, programmable gate array (PGA), field programmable gate array (FPGA), etc.

[0128] Those skilled in the art of the present technology can understand that all or part of the steps carried out by the above-mentioned embodiment method can be completed by a program instructing the relevant hardware, and the program can be stored in a computer readable storage medium. When the program is executed, it includes one of the steps of the method embodiment or a combination thereof.

[0129] In addition, each of the function units in each embodiment of the present application can be integrated in one processing module, or each unit can be physically present separately, or two or more units can be integrated in one module. The integrated module can be realized in the form of hardware or in the form of a software function module. When the integrated module is realized in the form of a software function module and sold or used as an independent product, it can also be stored in a computer readable storage medium.

[0130] The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc. Although the embodiments of the present application have been shown and described above, it should be understood that the above embodiments are exemplary and should not be construed as limiting the present application, and those skilled in the art can make changes, modifications, replacements and variations to the above embodiments within the scope of the present application.

[0131] It should be understood that various forms of flow shown above can be used to reorder, add or delete steps. For example, each step described in the present application can be executed in parallel, sequentially or in different order, as long as the desired results of the technical solutions of the present application can be achieved, which is not limited herein.

[0132] The above detailed description does not constitute a limitation on the scope of protection of the present application. Those skilled in the art should understand that various modifications, combinations, sub-combinations and replacements can be made according to design requirements and other factors. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A modulation method for a CLLC converter to achieve bidirectional symmetrical power transfer, characterized in that... ,include: Obtain the topology of the CLLC converter and determine the connection relationships of the H-bridge circuit, resonant cavity, and input / output ports on the primary and secondary sides; During reverse power transfer, the CLLC converter operates in OP mode, which includes a P phase and an O phase: In the P phase, the secondary current is negative, the converter transfers reverse power, and the secondary current enters the O phase after completing zero-current switching; in the O phase, the secondary current becomes positive, enters negative P mode, and completes reverse power transfer. When switching between the P-stage and the O-stage, a 50% complementary square wave drive signal on the primary side is used for control to ensure that the switching frequency is the same when transmitting in the forward and reverse directions under the same voltage gain and opposite loads. Bidirectional switching of power transmission in the reverse and forward directions is achieved by adjusting the alignment edges of the primary and secondary drive signals.

2. The method according to claim 1, characterized in that, The process of obtaining the topology of the CLLC converter, determining the connection relationships of the H-bridge circuits, resonant cavities, and input / output ports on the primary and secondary sides, and setting the resonant parameters includes: The CLLC converter consists of two H-bridges and a resonant cavity, with the input side (in forward operation) as the primary side and the output side as the secondary side; wherein, the switching transistor on the primary side is... The secondary switch is The resonant cavity includes a primary-side resonant inductor. and resonant capacitor , change ratio Transformer and its magnetizing inductor Secondary resonant inductor and Large capacitors can be connected in parallel between the primary input terminals and the secondary output terminals. and A square wave voltage is generated between the input terminals A and B of the resonant cavity by the primary-side H-bridge. The voltage between the output terminals C and D is then The primary input voltage is The output voltage is rectified by the secondary-side H-bridge. In the circuit, the resonant current of the primary side loop is... The excitation current is The resonant current of the secondary circuit is .

3. The method according to claim 2, characterized in that, Also includes: During forward power transfer, the CLLC converter operates in the original PO mode, controlling the primary-side switches to alternately conduct, causing the resonant cavity input voltage to exhibit a square wave change, and employing synchronous rectification in the secondary-side H-bridge circuit to achieve a stable output on the load side.

4. The method according to claim 3, characterized in that, The method of enabling the CLLC converter to operate in OP mode during reverse power transfer includes: In the P phase This stage is the same as the P stage in the forward original PO mode, with the secondary current... If the value is negative, the converter transmits reverse power; when the time arrives... At that time, due to When the circuit is reversed, the resonant circuit changes. The main-side resonant circuit continues to consume power, while the secondary-side switching transistor... and It is turned off, and its anti-parallel diode cannot conduct in the negative direction. Secondary current Maintaining at zero, the secondary side enters the dead time, i.e., phase O; when When approaching zero, the secondary switching transistor and The zero-current switch is turned off, and the primary-side switching transistor is simultaneously switched off. and Main side current Turn off when the value is moderate; In phase O ,exist At that time, the secondary switch tube and When switched on under zero-voltage switching, the main-side current remains positive, and the CLLC converter enters the negative half-cycle; At that time, the secondary switch tube and Continue opening, Reverse, secondary side electricity When the value becomes positive, it provides reverse power, and the converter enters negative P mode to complete the reverse power transfer.

5. The method according to claim 4, characterized in that, Also includes: In the OP mode, the time-domain state of the P phase is: In the OP mode, the time-domain state of the O phase is: in, , , , , , , , , , ,and It is an undetermined variable; It is the primary resonant current of the resonant cavity. It is the secondary resonant current of the resonant cavity. It is the primary-side capacitance of the resonant cavity. Terminal voltage, It is the secondary capacitance of the resonant cavity. Terminal voltage, It is the inherent resonant frequency of the resonant cavity. ; To determine the undetermined variables, boundary conditions are constructed using the following formula: in, yes The expression in P mode, yes The expression in mode O, yes The expression in P mode, yes The expression in P mode, yes The expression in mode O, yes The expression in P mode, and These are the phase angles corresponding to the P and O modes. It is the switching frequency; By combining Equations 1), 2), and 3 above, the precise time-domain behavior of the OP mode can be calculated.

6. An electronic device, characterized in that, include: A processor, and a memory communicatively connected to the processor; The memory stores computer-executed instructions; The processor executes computer execution instructions stored in the memory to implement the method as described in any one of claims 1-5.

7. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by a processor, are used to implement the method as described in any one of claims 1-5.

8. A computer program product, characterized in that, Includes a computer program that, when executed by a processor, implements the method of any one of claims 1-5.

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