Boost PFC (Power Factor Correction) circuit and method based on multi-mode frequency conversion sub-loop control

By introducing multi-mode frequency conversion loop-dividing control technology into the PFC circuit, the switching frequency is automatically adjusted to adapt to different load modes, and the existing PFC circuit lacks performance in a wide input voltage and a wide output power range is solved, achieving the effect of low total harmonic distortion and high power factor.

CN120185372APending Publication Date: 2025-06-20XIAMEN UNIV

Patent Information

Application Number
CN202510462695.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-14
Publication Date
2025-06-20

AI Technical Summary

Technical Problem

Existing PFC circuits have difficulty maintaining low total harmonic distortion and high power factor over a wide input voltage and a wide output power range, and the control algorithms are not sufficient to provide the same performance in different load modes.

Method used

The boost PFC circuit based on multi-mode frequency conversion loop control is adopted to automatically adjust the switching frequency by inputting AC voltage, output load current and current working mode to achieve smooth transition and rapid response between CCM, MCM and DCM working modes.

Benefits of technology

Within the wide input voltage range of 90 to 240Vac and the wide output power range of 30 to 1000W, a power factor of approximately 0.987 to 0.999 and a total harmonic distortion of 1% to 13% are achieved, improving the dynamic response capability and electromagnetic compatibility of the PFC circuit.

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Abstract

The invention discloses a boost PFC circuit and method based on multi-mode frequency conversion sub-loop control, and relates to the field of power electronics. The PFC control circuit dynamically switches the DCM / MCM / CCM mode according to the load condition, and high PF and low THD are realized in a wide load range. The switching frequency of the PFC circuit is automatically adjusted according to the load, the input alternating current power supply voltage and the working mode, and smooth transition and quick response between different modes are achieved. The change of the switching frequency is beneficial to dispersing the harmonic energy of the switching frequency and reducing the electromagnetic EMI interference. In a CCM mode and an MCM mode, a PWM signal of a PFC switching tube is independently generated through a current control loop in the ring-dividing frequency conversion control technology, and a voltage control loop is only used for adjusting the duty ratio of the PWM signal, eliminating ripple interference of power frequency and reducing THD. The PFC control circuit realizes low THD and high PF performance in a wide working range by combining respective advantages of a multi-mode control method, a frequency conversion control method and a ring division control method.
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Description

Technical Field

[0001] The present invention relates to PFC circuit technology in the field of power electronics, and in particular to a boost PFC circuit and method based on multi-mode variable-frequency split-loop control with wide input voltage, wide output power, low total harmonic distortion and high power factor. Background Art

[0002] The main function of the PFC (Power Factor Correction) power factor correction circuit is to improve the power factor (PF) in the power system, reduce reactive power, improve the utilization efficiency of electric energy, and meet the requirements of the power grid for harmonics and electromagnetic compatibility, improve harmonic distortion, and reduce the interference of the load to the power grid. At present, international, national or industry standards generally require that the PF value > 0.9 - 0.95, and the total harmonic distortion THD (Total Harmonic Distortion) value needs to be less than 5% - 10% range. Therefore, how to effectively reduce the THD value of the PFC circuit has always been a hot topic in the technical research of the power supply field.

[0003] The boost AC-DC converter circuit is widely used as a PFC circuit because of its simple topology structure, high conversion efficiency, easy implementation of control strategy and other advantages. With the change of the load power, the circuit may work in different modes. In medium and high power heavy load occasions, the boost PFC circuit works in the inductor current continuous conduction mode (CCM, Continuous Conduction Mode). In low power light load, the boost PFC circuit works in the inductor current discontinuous mode (DCM, Discontinuous Conduction Mode); when in medium and light load, the boost PFC circuit will simultaneously appear CCM and DCM modes in a power frequency cycle, which is called the mixed conduction mode (Mixed Conduction Mode, MCM). Control algorithms under different loads usually need to be designed separately to obtain better performance such as PF and THD. However, when the load change range is wide, relying only on the control algorithm of one working mode is not enough to provide the same performance in other modes. In order to adapt to a wide power range from dozens of watts (W) to several kilowatts (kW), the PFC boost circuit must combine multiple working modes (such as CCM / MCM / DCM, etc.) to achieve high efficiency, low harmonics and fast dynamic response under different load conditions. In addition, in order to adapt to the global universal voltage input (85 - 264V AC), the PFC should have a wide input voltage range.

[0004] The PFC circuit is developing towards the direction of wide output power range, high power factor, low total harmonic distortion, and fast dynamic response based on digital control. To support these wide operating ranges, including wide input voltage range and wide load range, as well as the demand for higher power density (using lower and smaller inductors), and to maintain low THD and high PF. The PFC circuit not only needs to support multiple operating modes (such as CCM / CRM / MCM / DCM modes, etc.), and achieve high PF and fast response in a wide load range through dynamic switching of operating modes. Also, automatically adjust the switching frequency according to the load situation to reduce the transient response time and optimize power management. To achieve low harmonic distortion, passive or active filtering techniques are adopted, or split-loop control is used to reduce the output voltage ripple and its high-order harmonic effects. The following are similar studies and patents on hybrid multi-mode boost power factor correction circuits and methods for wide voltage input, wide output power, low harmonic distortion, and high power factor:

[0005] Reference 1, "A Discrete Average Current Mode Control CCM Boost PFC Converter With Hybrid Pulse Train Modulation and Dual Edge Modulation" (IEEE Transactions on Industrial Electronics, vol. 70, no. 10, pp. 10003-10013, Oct. 2023) proposes a split-loop control method based on average current mode. The PWM control signal of the PFC switch tube is generated through an independent current loop, while the voltage loop is only used to adjust the duty cycle of the PWM control signal, effectively eliminating the ripple interference of the double power supply frequency in the traditional voltage loop, thus obtaining low total harmonic distortion. At the input voltage V i = 110Vac, output power P o =320W, this method achieves a power factor of 0.999 and a total harmonic distortion of 2.1%. However, this method only supports the CCM operating mode. For this reason, the inductor of the boost circuit is designed as L =2mH, and the frequency of PWM is fixed at f s= 50 kHz, the system input voltage is 90 - 132 Vac and the output power range is 160 - 320 W. In contrast, the present invention introduces a CCM / MCM / DCM hybrid operating mode and combines it with variable frequency control technology. By automatically adjusting the switching frequency of the PFC circuit according to the load, the input AC power supply voltage, and the operating mode, it helps to smoothly switch between CCM and DCM and improve the dynamic response ability. In the case of a wide input voltage range of 90 - 240 Vac and an output power range of 30 - 1000 W, this method achieves a power factor of approximately 0.987 - 0.999 and a total harmonic distortion of 1% - 13%.

[0006] Reference 2, "A Digital Pulse Train Controlled High Power Factor DCM Boost PFC Converter Over a Universal Input Voltage Range" (IEEE Transactions on Industrial Electronics, vol. 66, no. 4, pp. 2814 - 2824, April 2019) proposes a method based on digital pulse sequence control. This method adjusts the output of the PWM control signal of the voltage loop by controlling the pulse coefficient through the current loop K i to improve the power factor performance of the boost PFC circuit in the DCM operating mode within the universal input voltage range of 90 - 264 Vac. When the input voltage is 110 Vac or 220 Vac, within the output power range of 30 - 120 W, the PF and THD of the boost PFC circuit are 0.993 - 0.997 and 5% - 7%, 0.988 - 0.998 and 4% - 11% respectively. However, this method only supports the DCM operating mode. Therefore, the inductor of the boost circuit is designed to be L = 200 uH, and the frequency of the PWM is fixed at f s = 50 kHz, and the system output power range is 30 - 120 W. In contrast, the present invention combines the CCM / MCM / DCM hybrid operating mode and variable frequency technology, automatically adjusts the switching frequency of the PFC circuit according to the load, the input AC power supply voltage, and the operating mode, helps to smoothly switch between CCM and DCM and improve the dynamic response ability, and supports operation within the wide input voltage range of 90 - 240 Vac and the wide output power range of 30 - 1000 W. In the case of a wide input voltage range of 90 - 240 Vac and an output power range of 30 - 1000 W, it achieves a power factor of approximately 0.987 - 0.999 and a total harmonic distortion of 1% - 13%.

[0007] Reference 3, "Digital DCM Detection and Mixed Conduction Mode Control for Boost PFC Converters" (IEEE Transactions on Power Electronics, vol. 29, no. 1, pp. 347 - 355, Jan. 2014) proposes a mixed conduction mode (MCM) control method based on ACM. By detecting the zero - crossing of the inductor current in real - time, it realizes the MCM conduction mode with the switching between CCM and DCM within a half - cycle, thus improving the THD and PF performance of the boost PFC circuit under different output power conditions. When the input voltage is 120Vac, within the output power range of 50 - 700W, the PF and THD of the boost PFC circuit are 0.983 - 0.999 and 1.3% - 13% respectively. However, the voltage loop and current loop of this method still adopt the traditional serial method, which has the ripple interference of the power supply frequency. In addition, this method only supports operation at a fixed frequency f s = 130kHz. When the load changes, it cannot adjust the optimal operating frequency in time, resulting in a decline in system performance. In contrast, the present invention combines the variable - frequency split - loop control technology, automatically adjusts the switching frequency of the PFC circuit through the load, input AC power supply voltage and operating mode. The double - loop independent control architecture of the voltage loop and current loop reduces the output voltage ripple and the influence of its higher - order harmonics, and broadens the input voltage range to 90 - 240Vac. In addition, the variable - frequency technology helps the PFC circuit to smoothly switch between CCM and DCM and improves the dynamic response ability. In the case of a wide input voltage range of 90 - 240Vac and an output power of 30 - 1000W, a power factor of approximately 0.987 - 0.999 and a total harmonic distortion of 1% - 13% are achieved.

[0008] Chinese Patent CN119276109A discloses a multi-mode power factor correction circuit, a control circuit and an adaptive switching method. The control loop of this circuit adopts analog design. The conduction logic signal is composed of the inductor current zero-crossing signal, the switching period signal and the highest frequency control signal; the turn-off logic signal is composed of the current detection signal and the current reference signal. The conduction and turn-off signals are input into the SR flip-flop to parameterize the PWM control signal, realizing smooth switching among the continuous current mode (CCM), the critical current mode (CRM) and the discontinuous current mode (DCM), optimizing the THD performance and improving the efficiency. However, this circuit does not mention the input voltage range, the output power range, and the specific THD and PF performance achieved. In contrast, the present invention adopts a split-loop variable-frequency technology based on digital control, reduces the output voltage ripple and its high-order harmonic interference through a dual-loop independent control architecture of a voltage loop and a current loop, and automatically adjusts the switching frequency of the PFC circuit according to the load, the input AC power supply voltage and the working mode. In addition, the present invention introduces CCM / MCM / DCM multi-mode operation, and realizes a power factor of approximately 0.987 - 0.999 and a total harmonic distortion of 1% - 13% under the condition of a wide input voltage range of 90 - 240Vac and an output power of 30 - 1000W.

[0009] Chinese Patent CN104702132A discloses a control method and device for a switching tube. Based on the linear function relationship between the pre-determined input voltage value and the switching frequency of the switching tube, the switching frequency of the switching tube corresponding to the current input voltage value of the active PFC circuit is determined, and the switching tube of the active PFC circuit is controlled according to the determined switching frequency of the switching tube to improve the efficiency of the active power factor correction circuit. The control loop of this circuit only divides the effective value of the input voltage into different voltage range intervals, and determines the PFC switching frequency through the highest efficiency of the active PFC circuit, but does not mention the output power range, and the specific THD and PF performance achieved. In contrast, the variable-frequency technology adopted by the present invention adjusts the switching frequency of the PFC circuit through three parameters: the load, the input AC power supply voltage and the working mode, so as to achieve smooth transition and fast response between different modes. In addition, the present invention combines the split-loop control technology, completes voltage regulation and current shaping through a dual-loop independent control architecture of a voltage loop and a current loop, reduces the output voltage ripple and its high-order harmonic influence, and introduces a CCM / MCM / DCM hybrid working mode, broadening the input voltage range and the output power range to 90 - 240Vac and 30W - 1000W respectively, thereby realizing a power factor of approximately 0.987 - 0.999 and a total harmonic distortion of 1% - 13%.

[0010] Chinese Patent CN111817547A discloses a multi-mode BOOST PFC controller. This controller uses analog circuit design and introduces a discontinuous current interval detection module, a frequency limiting module, and a drive signal generation module. When the operating frequency of the circuit is lower than the highest frequency, the circuit operates in the BCM mode. When the operating frequency reaches the set highest frequency, the circuit enters the DCM mode, solving the problem that the input current waveform is severely distorted after the traditional PFC controller enters the DCM mode due to frequency limiting. However, it does not mention the input voltage and output power ranges, as well as the specific THD and PF performance achieved. In contrast, the present invention is based on digital control. By introducing a CCM / MCM / DCM hybrid operating mode and combining frequency conversion technology, the switching frequency of the PFC circuit is automatically adjusted according to the load, the input AC power supply voltage, and the operating mode to achieve smooth transition and fast response between different modes, and the input voltage and output power ranges are respectively broadened to 90 - 240 Vac and 30 - 1000 W. In addition, the present invention combines split-loop control technology. Through a dual-loop independent control architecture of the voltage loop and the current loop, the output voltage ripple and the influence of its higher harmonics are reduced, so that the boost PFC circuit can achieve a power factor of approximately 0.987 - 0.999 and a total harmonic distortion of 1% - 13% under an input voltage of 90 - 240 Vac and an output power of 30 - 1000 W.

[0011] In summary, in recent years, some boost PFC circuits and methods for achieving low total harmonic distortion and high power factor have emerged, but these inventions do not cover the boost PFC circuit and method based on multi-mode variable-frequency split-loop control in the present invention. In the existing literature and invention patents, there is still no PFC circuit design that combines the multi-mode variable-frequency control circuit and the split-loop control technology in the present invention, nor is there a design that can still maintain low total harmonic distortion and high power factor in a wide input voltage range and a wide output power operating range. Summary of the Invention

[0012] The object of the present invention is to provide a boost PFC circuit and method based on multi-mode variable-frequency split-loop control, achieving low total harmonic distortion and high power factor for the boost power factor correction circuit within the global universal AC voltage input and wide output power range.

[0013] To achieve this goal, the present invention adopts the following innovative technologies:

[0014] (1) Automatically adjust the switching frequency of the PFC circuit based on the input AC voltage, output load current, and current working mode, so as to achieve smooth transition between modes and fast system response; (2) Apply the variable-frequency control technology to the traditional CCM split-loop circuit, which not only expands its output power range, makes it compatible with the MCM / CCM hybrid working mode, but also effectively reduces the output voltage ripple and high-order harmonic interference; (3) Support the variable-frequency DCM, MCM, and CCM working modes and their dynamic switching.

[0015] The specific technical solution of the present invention is as follows:

[0016] The boost PFC circuit based on multi-mode variable-frequency split-loop control is divided into two parts: a boost circuit and a multi-mode variable-frequency split-loop control circuit;

[0017] The boost circuit includes an input filter, a rectifier bridge, an inductor L, a PFC switch tube Q, a diode D, an output capacitor C, an output load current I o , a resistor R1; the input of the input filter is connected to the input power supply V ac , the output is connected to the input end of the rectifier bridge, the output end of the rectifier bridge is connected to the inductor, the inductor is connected to the drain of the PFC switch tube and the anode of the diode, and the cathode of the diode is connected to the output capacitor and the output load current I o ;

[0018] The multi-mode variable-frequency split-loop control circuit includes a first sampling ratio circuit K V1 , a second sampling ratio circuit K V2 , a third sampling ratio circuit K V3 , a fourth sampling ratio circuit K V4 , a first analog-to-digital converter ADC1, a second analog-to-digital converter ADC2, a third analog-to-digital converter ADC3, a fourth analog-to-digital converter ADC4, a working mode switching module, a CCM split-loop variable-frequency control module, a DCM variable-frequency control module, a variable-frequency function control module, a voltage comparator CMP1, a voltage comparator CMP2, an OR gate OR1, and a drive circuit;

[0019] The first sampling ratio circuit K V1 , the second sampling ratio circuit K V2 , the third sampling ratio circuit K V3 , the fourth sampling ratio circuit K V4 and the corresponding first analog-to-digital converter ADC1, second analog-to-digital converter ADC2, third analog-to-digital converter ADC3, and fourth analog-to-digital converter ADC4 are used to respectively sample the input power supply V of the boost circuit ac , the inductor current I L , the output voltage V o and the output load current I oPerform proportional sampling; the output terminals of the first analog-to-digital converter ADC1, the second analog-to-digital converter ADC2, and the third analog-to-digital converter ADC3 are respectively connected to the input terminals of the CCM split-loop frequency conversion control module and the DCM frequency conversion control module to generate CCM and DCM operating mode control signals; the output terminals of the first analog-to-digital converter ADC1 and the fourth analog-to-digital converter ADC4 are connected to the input terminal of the frequency conversion function control module; the output terminal of the frequency conversion function control module is connected to the input terminals of the CCM split-loop frequency conversion control module and the DCM frequency conversion control module, and dynamically adjusts the control signal frequencies of the CCM split-loop frequency conversion control module and the DCM frequency conversion control module according to the input power supply V ac and the output load current I o ; the output terminals of the CCM split-loop frequency conversion control module and the DCM frequency conversion control module are connected to the input terminal of the operating mode switching module; the output terminal of the operating mode switching module is connected to the input terminal of the drive circuit, and switches the DCM / CCM operating mode control signal according to the switching signal MODE signal, thereby driving the PFC switch tube Q. The input terminals of the voltage comparator CMP1 are respectively connected to the output terminal of the second sampling ratio circuit K V2 and the zero-crossing threshold voltage V ZCD to detect the zero-crossing point of the inductor current I L and generate the ZCD_flag signal; the input terminals of the voltage comparator CMP2 are respectively connected to the output of the fourth analog-to-digital converter ADC4 and the low-power threshold voltage V LP to detect the low output power and generate the LP_flag signal; the input of the OR gate OR1 is connected to the outputs of the voltage comparators CMP1 and CMP2, and the output terminal is connected to the selection port of the operating mode switching module to generate the MODE signal.

[0020] Furthermore, the frequency conversion function control module is used to calculate the frequency conversion frequency range in different operating modes, and automatically adjusts the switching frequency of the PFC switch tube through the input AC power supply voltage, output load current, and operating mode. The specific calculation method of the frequency conversion frequency range is as follows:

[0021] To make the boost-type PFC circuit operate in the CCM mode, that is, the inductor current I L is greater than zero throughout the switching cycle;

[0022] (1)

[0023] where ; in the formula, V i represents the voltage after V ac passes through the rectifier bridge; f s represents the switching frequency; V o represents the output voltage; L represents the inductor; ΔI LIndicates the inductor current ripple. Without considering the conduction voltage drops of the diode and the transistor, Equation (1) can be expanded as:

[0024] (2)

[0025] Since , where T S is the period of the output PWM, T on is the conduction time, and D is the duty cycle of the output PWM; Equation (2) can be simplified to:

[0026] (3)

[0027] Where , the equivalent load impedance . Equation (3) gives the critical switching frequency in the CCM / MCM operating mode, and the relationships between the corresponding switching frequency f s and the voltage V i , and the output load current I o are as follows:

[0028] (4)

[0029] In Equation (4), since the output voltage V o and the inductor L are set, the variable frequency range in different operating modes can be calculated according to the detected V i voltage range and the output load current I o , and thus the variable frequency functions F CCM / F MCM / F DCM .

[0030] Furthermore, a control method for a boost PFC circuit based on multi-mode variable frequency split-loop control includes the following steps:

[0031] (1)Initializing the boost circuit and the multi-mode variable frequency split-loop control circuit;

[0032] (2)The multi-mode variable frequency split-loop control circuit monitors whether the voltages V MAIN and V ISENSE change by means of the analog signals V i and the output load current I o . If so, go to step (3); if not, continue to monitor;

[0033] (3)The multi-mode variable frequency split-loop control circuit, according to the detected V i voltage range and the output load current I o , and the set output voltage V oand an inductor L, determine the corresponding frequency conversion function F in the CCM / MCM / DCM operating modes according to formula (4). CCM / F MCM / F DCM ;

[0034] (4) Determine whether the output load current I o is less than the low power mode current threshold I LP . If so, go to step (7); otherwise, go to step (5), where the low power mode current threshold I LP is set according to a certain proportion of the rated output current;

[0035] (5) Determine whether the ZCD_flag output signal is set. If so, go to step (8); otherwise, go to step (6);

[0036] (6) The PFC circuit operates in the CCM mode, and calculate the PWM frequency f DCM according to the frequency conversion function F o determined in step (3) and the output load current I s ;

[0037] (7) The PFC circuit operates in the DCM mode, and calculate the PWM frequency f MCM according to the frequency conversion function F o determined in step (3) and the output load current I s ;

[0038] (8) The PFC circuit operates in the MCM mode, and calculate the PWM frequency f CCM according to the frequency conversion function F o determined in step (3) and the output load current I s .

[0039] In step (4), the current threshold I LP can be set to 10% - 30% of the rated load current.

[0040] Compared with the prior art, the outstanding technical effects of the present invention are as follows:

[0041] 1. Based on the boost PFC circuit and method of multi-mode frequency conversion split-loop control, the present invention dynamically switches the CCM / MCM / DCM operating modes and operating frequencies through inductor current zero-crossing detection and low power mode detection technologies, so as to achieve the PFC function with low THD and high PF performance within a wide operating range.

[0042] 2. The method for the variable frequency function control module of the present invention to calculate the variable frequency range under different working modes automatically adjusts the switching frequency of the PFC circuit by inputting the AC power supply voltage, output load current, and working mode, so as to achieve smooth transition and fast response between different modes, further reduce THD and improve PF performance within a wide working range. At the same time, it also helps to disperse the harmonic energy of the switching frequency and reduce electromagnetic EMI interference.

[0043] 3. By introducing multi-mode variable frequency control to improve the traditional CCM split-loop technology, it can support the MCM / CCM working mode, not only expanding the application working range of the traditional split-loop technology but also further reducing the output voltage ripple and high-order harmonic interference. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 It is the general block diagram of a boost PFC circuit and method based on multi-mode variable frequency split-loop control according to the present invention.

[0045] Figure 2 It is the schematic diagram of the working range and mode of the boost PFC circuit with multi-mode variable frequency split-loop control according to the present invention.

[0046] Figure 3 It is the schematic diagram of the CCM / DCM switching timing based on variable frequency control in the MCM working mode according to the present invention.

[0047] Figure 4 It is the flowchart of the method based on multi-mode variable frequency control according to the present invention.

[0048] Figure 5 It is the simulation THD performance and comparison chart of the embodiment of the boost PFC circuit based on multi-mode variable frequency split-loop control according to the present invention.

[0049] Figure 6 It is the simulation PF performance and comparison chart of the embodiment of the boost PFC circuit based on multi-mode variable frequency split-loop control according to the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0050] In order to make the objectives, technical solutions and advantages of the present invention clearer, the following embodiments will further illustrate the method of the present invention in conjunction with the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the principles of the circuit structure and method of the present invention shall be included within the protection scope of the present invention.

[0051] See Figure 1, the embodiment of the boost PFC circuit based on multi-mode variable frequency split-loop control includes two parts: a boost circuit 0 and a multi-mode variable frequency split-loop control circuit 1. The embodiment of the boost circuit 0 includes an input filter 01, a rectifier bridge 02, an inductor L 03, a PFC switching transistor Q 04, a diode D 05, a capacitor C 06, an output load current I o 07, and a resistor R1 08; the input terminals P1 and P2 of the input filter 01 are respectively connected to both ends of the input power supply V ac for filtering; the output terminals P3 and P4 of the input filter 01 are respectively connected to the input terminals P6 and P7 of the rectifier bridge 02; the rectifier bridge 02 rectifies the input AC power supply V ac ; the output terminal P8 of the rectifier bridge 02 is connected to one end of the inductor L 03; the other end of the inductor L 03 is connected to the drain of the PFC switching transistor Q 04 and the anode of the diode D 05; the cathode of the diode D 05 is connected to one end of the capacitor C 06 and one end of the output load current I o 07; the source of the PFC switching transistor Q 04, the other end of the capacitor C 06, and the other end of the output load current I o 07 are connected to the ground; one end of the resistor R1 08 is connected to the output terminal P5 of the rectifier bridge 02, and the other end of the resistor R1 08 is connected to the ground.

[0052] See Figure 1 , the multi-mode variable frequency split-loop control circuit 1 includes a first sampling ratio circuit K V1 111, a second sampling ratio circuit K V2 112, a third sampling ratio circuit K V3 113, a fourth sampling ratio circuit K V4 114, a first analog-to-digital converter ADC1131, a second analog-to-digital converter ADC2132, a third analog-to-digital converter ADC3133, a fourth analog-to-digital converter ADC4134, a working mode switching module 14, a CCM split-loop variable frequency control module 16, a DCM variable frequency control module 17, a variable frequency function control module 18, a voltage comparator CMP1151, a voltage comparator CMP2153, an OR gate OR1152, and a drive circuit 12;

[0053] The first sampling ratio circuit K V1 111, the second sampling ratio circuit K V2 112, the third sampling ratio circuit K V3 113, the fourth sampling ratio circuit K V4114 and the corresponding first analog-to-digital converter ADC1131, second analog-to-digital converter ADC2132, third analog-to-digital converter ADC3133, and fourth analog-to-digital converter ADC4134 are used to respectively sample the input power supply V of the boost circuit ac , the inductor current I L , the output voltage V o and the output load current I o for proportional sampling; the output terminals of the first analog-to-digital converter ADC1131, second analog-to-digital converter ADC2132, and third analog-to-digital converter ADC3133 are respectively connected to the input terminals of the CCM split-loop frequency conversion control module 16 and the DCM frequency conversion control module 17 to respectively generate CCM and DCM operating mode control signals; the output terminals of the first analog-to-digital converter ADC1131 and the fourth analog-to-digital converter ADC4134 are connected to the input terminal of the frequency conversion function control module 18; the output terminal of the frequency conversion function control module 18 is connected to the input terminals of the CCM split-loop frequency conversion control module 16 and the DCM frequency conversion control module 17, and dynamically adjusts the control signal frequencies of the CCM split-loop frequency conversion control module 16 and the DCM frequency conversion control module 17 according to the input power supply V ac and the output load current I o ; the output terminals of the CCM split-loop frequency conversion control module 16 and the DCM frequency conversion control module 17 are connected to the input terminal of the operating mode switching module 14; the output terminal of the operating mode switching module 14 is connected to the input terminal of the drive circuit 12, and switches the DCM / CCM operating mode control signal according to the switching signal MODE signal to drive the PFC switch tube Q04. The input terminals of the voltage comparator CMP1151 are respectively connected to the output terminal of the second sampling ratio circuit K V2 112 and the zero-crossing threshold voltage V ZCD to detect the zero-crossing point of the inductor current I L and generate the ZCD_flag signal; the input terminals of the voltage comparator CMP2153 are respectively connected to the output of the fourth analog-to-digital converter ADC4134 and the low-power threshold voltage V LP to detect the low output power and generate the LP_flag signal; the input of the OR gate OR1152 is connected to the outputs of the voltage comparators CMP1151 and CMP2153, and the output terminal is connected to the selection port of the operating mode switching module 14 to generate the MODE signal.

[0054] The generation circuit and method of the switching signal MODE of the operating mode switching module are as follows:

[0055] (1) The voltage comparator CMP1151 is used to determine the output of the second sampling ratio circuit K V2 112 and the zero-crossing threshold voltage V ZCDThe magnitude of is used to detect the inductor current I L and generate a ZCD_flag signal at the zero crossing point;

[0056] 2) The voltage comparator CMP2153 is used to determine the output of the fourth analog-to-digital converter ADC4 134 and the low-power threshold voltage V LP The magnitude of is used to detect low power and generate an LP_flag signal;

[0057] 3) The OR gate OR1152 performs an "OR" operation on ZCD_flag and LP_flag, and its operation logic is as follows: , where " " represents the binary "OR" operation. MODE = 1, the PFC circuit operates in the variable-frequency DCM mode; MODE = 0, the PFC circuit operates in the variable-frequency CCM mode; when the MODE signal changes within one cycle, the PFC circuit operates in the variable-frequency MCM mode.

[0058] Figure 2 shows a schematic diagram of the multi-mode working boundary of the multi-mode PFC boost circuit proposed by the present invention. Through the critical working mode curve and the threshold , where D represents the duty cycle of the output PWM; represents the switching frequency; represents the inductor; represents the equivalent load impedance in the low-power mode, V O represents the output voltage, I LP represents the current threshold in the low-power mode; clearly defines the switching conditions between the three working modes of CCM (continuous conduction mode) / MCM (mixed conduction mode) / DCM (discontinuous conduction mode). Figure 2 In, the abscissa is the duty cycle of the output PWM , and the ordinate is , where R represents the equivalent load resistance, represents the inductor. When calculating, according to the indexes designed in the embodiments of the present invention: the output voltage V O = 400V, the inductor = 600uH, the range of the input voltage V i is 90 - 240Vac, and the typical working frequencies of each mode. Compared with the present invention, the applicable range of the PFC boost circuit mentioned in Reference 1 is Figure 2 in the "blue dashed rectangle", only supporting the CCM working mode; the applicable range of the PFC boost circuit mentioned in Reference 2 is Figure 2The "green dashed rectangle" only supports the DCM operating mode. Within the wide input voltage range of 90 - 240 Vac and the wide output power range of 30 - 1000 W, the control strategy proposed by the present invention makes the duty cycle dynamic range in the interval of [0.1515, 0.6818], that is, the "red solid trapezoid" area in the figure. The black solid line in the figure depicts the critical operating condition curve. , it can be seen from Equation (3) that when the operating point is above the critical curve, the system automatically operates in the CCM operating mode; when the operating point is below the critical curve, the system is further divided into MCM and DCM operating modes according to the parameter and the threshold . When takes a value greater than , the PFC boost circuit is in the MCM operating mode; when takes a value less than , the PFC boost circuit is in the DCM operating mode.

[0059] Figure 3 shows the schematic diagram of the CCM / DCM switching timing based on variable frequency control in the MCM operating mode described in the invention. This figure divides the MCM operating mode into three typical stages T1 - T3 by detecting the inductor current I L , clearly shows the dynamic conversion process between the CCM and DCM operating modes, and verifies the accurate detection and switching ability of the system for the two operating modes. In the T1 stage, the inductor current I L continues to remain positive, and the switching signal MODE is not triggered. At this time, the switching frequency f s of the PFC circuit is 66 kHz, and the circuit stably operates in the CCM operating mode. When entering the T2 stage, the inductor current I L has a zero-crossing section, triggering MODE to be set to high level, indicating that the system has entered the DCM operating state. At the same time, the switching frequency f s of the PFC circuit is reduced to 36 kHz. In the subsequent T3 stage, the inductor current I L returns to be continuously positive, and there is no zero-current event within the entire sampling period. At this time, MODE jumps to low level, and the switching frequency f s of the PFC circuit is also readjusted to 66 kHz. The state conversion of this flag bit intuitively reflects the complete transition process of the boost-type PFC converter from the DCM mode to the CCM mode.

[0060] See Figure 4 , which is an embodiment of the multi-mode variable frequency control method described in the present invention, and its steps are as follows:

[0061] Initialize Z1, the boost circuit, and the multi-mode variable frequency split-loop control circuit;

[0062] Z2. The multi-mode variable-frequency split-ring control circuit monitors the voltage V MAIN and V ISENSE to check if there are any changes in the monitored voltage V i and the output load current I o . If there are changes, it proceeds to step Z3; if not, it continues to monitor;

[0063] Z3. The multi-mode variable-frequency split-ring control circuit calculates the parameters of the corresponding variable-frequency functions F i in the CCM / MCM / DCM operating modes based on the detected voltage range of 90 - 240 Vac for V o , the output load current I o , the set output voltage V CCM / F MCM / F DCM , and the inductance L = 600 uH. Taking the CCM operating mode as an example, when V DCM i = 90 Vac and I o = 0.625 A, the duty cycle is in the range of [0.682, 1], and it is calculated using formula (4); similarly, when V i = 110 Vac, . To ensure that the circuit operates stably in the CCM mode within the input voltage range of [90 Vac, 110 Vac], the variable-frequency range of the CCM mode switching frequency is set. In this embodiment, a first-order linear variable-frequency function is used to obtain the variable-frequency function in the CCM mode as follows:

[0064] (5)

[0065] Similarly, the variable-frequency functions in the DCM and MCM modes are respectively:

[0066] (6)

[0067] (7)

[0068] Z4. Determine whether the output load current I o is less than the low-power mode current threshold I LP . If so, it proceeds to step Z7; otherwise, it proceeds to step Z5, where the low-power mode current threshold I LP is set to 30% of the rated output current;

[0069] Z5. Determine whether the ZCD_flag output signal is set. If so, it proceeds to step Z8; otherwise, it proceeds to step Z6;

[0070] Z6. The PFC circuit operates in the CCM mode, and calculates the PWM frequency f according to the frequency conversion function F determined in step Z3 and the output load current I. CCM and the output load current I o Calculate the PWM frequency f s ;

[0071] Z7. The PFC circuit operates in the DCM mode, and calculates the PWM frequency f according to the frequency conversion function F determined in step Z3 and the output load current I. DCM and the output load current I o Calculate the PWM frequency f s ;

[0072] Z8. The PFC circuit operates in the MCM mode, and calculates the PWM frequency f according to the frequency conversion function F determined in step Z3 and the output load current I. MCM and the output load current I o Calculate the PWM frequency f s .

[0073] Figure 5 Fig. is the simulation THD performance and comparison chart of the hybrid multi-mode boost PFC circuit based on split-ring frequency conversion control. Figure 5 In (a), it is the THD performance chart under the input voltage of 120Vac and the output power range of 30 - 500W. When 50W < P o < 100W, the THD of the present invention is about 4% - 5%, which is better than the THD performance of Reference 2 and Reference 3; when 100W < P o < 500W, the THD of the present invention is about 1.6% - 4%, approaching the performance of Reference 1 and 3. However, Reference 1 only supports the CCM operating mode, so it only gives the THD within the output power range of 160 - 320W; Reference 2 only supports the DCM operating mode, so it only gives the THD within the output power range of 30 - 120W; the THD performance of Reference 3 in the DCM operating mode is inferior to that of the present invention, and it only gives the THD under the input voltage of 120Vac. Figure 5 In (b), it is the THD performance chart under the input voltage of 220Vac and the output power range of 30 - 1000W. Among them, Reference 2 only gives the THD within the output power range of 30 - 120W, while the present invention supports operation in the range of 75W < P o < 1000W, and the THD remains at 3.4% - 16%.

[0074] Figure 6 Fig. is the simulation PF performance and comparison chart of the hybrid multi-mode boost PFC circuit based on split-ring frequency conversion control. Figure 6 In (a), it is the PF performance chart under the input voltage of 120Vac and the output power range of 30 - 500W. When 50W < P oWhen < 100W, the PF of the present invention is about 0.995 - 0.999, which is superior to the PF performance of References 2 and 3; when 100W < P o < 500W, the PF of the present invention is about 0.99 - 0.999, which is close to the performance of References 1 and 3. However, Reference 1 only supports the CCM operating mode, so it only gives the PF within the output power range of 160 - 320W; Reference 2 only supports the DCM operating mode, so it only gives the PF within the output power range of 30 - 120W; the PF performance of Reference 3 is inferior to that of the present invention in the DCM operating mode, and it only gives the PF at an input voltage of 120Vac. Figure 6 In (b) is the PF performance graph under an input voltage of 220Vac and an output power range of 30 - 1000W. Among them, Reference 2 only gives the PF within the output power range of 30 - 120W, while the present invention supports operation in the range of 75W < P o < 1000W, and the PF remains at 0.956 - 0.999.

[0075] The present invention proposes a boost PFC circuit and method based on multi - mode variable - frequency split - loop control. This method automatically adjusts the switching frequency of the PFC circuit based on the input AC voltage, output load current, and current operating mode, realizing smooth transition between modes and fast system response; the present invention also applies variable - frequency control technology to the traditional CCM split - loop circuit, not only expanding its output power range, making it compatible with the MCM / CCM hybrid operating mode, but also effectively reducing the output voltage ripple and high - order harmonic interference; the present invention supports variable - frequency DCM, MCM, and CCM operating modes and their dynamic switching; through the above innovations, the boost PFC circuit and method based on multi - mode variable - frequency split - loop control proposed by the present invention can achieve PFC functions with low THD and high PF performance within a wide operating range.

[0076] This embodiment supports the CCM / MCM / DCM hybrid operating mode, and within a wide input voltage range of 90 - 240Vac and a wide output power range of 30 - 1000W, it realizes a power factor of approximately 0.987 - 0.999 and a total harmonic distortion of 1% - 13%. In existing literature and invention patents, there is no design that combines the multi - mode variable - frequency control circuit and split - loop control technology in the present invention, so as to realize a boost PFC circuit and method with low total harmonic distortion and high power factor within a wide input voltage and wide output power operating range.

[0077] The above - mentioned embodiments are only preferred embodiments of the present invention and cannot be considered as limiting the scope of implementation of the present invention. All equivalent changes and improvements made according to the scope of the application of the present invention should still fall within the scope covered by the patent of the present invention.

Claims

1. A boost PFC circuit based on multi-mode variable frequency loop control, characterized in that It includes two parts: boost circuit and multi-mode frequency conversion sub-loop control circuit; The boost circuit includes an input filter, a rectifier bridge, an inductor L, a PFC switch tube Q, a diode D, an output capacitor C, an output load current I o ; The input of the input filter is connected to the input power supply V ac The output is connected to the input of the rectifier bridge, the output of the rectifier bridge is connected to the inductor L, the inductor L is connected to the drain of the PFC switch tube Q and the anode of the diode D, and the cathode of the diode D is connected to the output capacitor C and the output load current I o ; The multi-mode variable frequency split-loop control circuit comprises a first sampling ratio circuit K V1 , the second sampling ratio circuit K V2 , the third sampling ratio circuit K V3 , the fourth sampling ratio circuit K V4 , a first analog-to-digital converter ADC1, a second analog-to-digital converter ADC2, a third analog-to-digital converter ADC3, a fourth analog-to-digital converter ADC4, a working mode switching module, a CCM sub-ring frequency conversion control module, a DCM frequency conversion control module, a frequency conversion function control module, a voltage comparator CMP1, a voltage comparator CMP2, an OR gate OR1, and a driving circuit; The first sampling ratio circuit K V1 , the second sampling ratio circuit K V2 , the third sampling ratio circuit K V3 , the fourth sampling ratio circuit K V4 and the corresponding first analog-to-digital converter ADC1, the second analog-to-digital converter ADC2, the third analog-to-digital converter ADC3, and the fourth analog-to-digital converter ADC4 are used to respectively ac , inductor current I L , output voltage V o and the output load current I o Proportional sampling is performed; the output ends of the first analog-to-digital converter ADC1, the second analog-to-digital converter ADC2, and the third analog-to-digital converter ADC3 are respectively connected to the input ends of the CCM sub-ring frequency conversion control module and the DCM frequency conversion control module to generate CCM and DCM working mode control signals respectively; the output ends of the fourth analog-to-digital converter ADC4 and the first analog-to-digital converter ADC1 are connected to the input end of the frequency conversion function control module; the output end of the frequency conversion function control module is connected to the input end of the CCM sub-ring frequency conversion control module and the DCM frequency conversion control module, and the CCM sub-ring frequency conversion control module is connected to the DCM frequency conversion control module according to the input power supply V ac And the output load current I o Dynamically adjust the control signal frequency of the CCM sub-ring frequency conversion control module and the DCM frequency conversion control module; the output end of the CCM sub-ring frequency conversion control module and the DCM frequency conversion control module are connected to the input end of the working mode switching module; the output end of the working mode switching module is connected to the input end of the driving circuit, and the DCM / CCM working mode control signal is switched according to the switching signal MODE signal to drive the PFC switch tube Q; the input end of the voltage comparator CMP1 is respectively connected to the second sampling ratio circuit K V2 The output terminal, zero-crossing threshold voltage V ZCD Connected to detect the inductor current I L The input end of the voltage comparator CMP2 is respectively connected to the output of the fourth analog-to-digital converter ADC4 and the low-power threshold voltage V LP The input of the OR gate OR1 is connected to the output of the voltage comparators CMP1 and CMP2, and the output end is connected to the selection port of the working mode switching module to generate a MODE signal.

2. A control method for a boost PFC circuit based on multi-mode variable frequency split-loop control as claimed in claim 1, characterized in that The following steps are involved: (1) Initialization of the boost circuit and multi-mode frequency conversion loop control circuit; (2) The multi-mode variable frequency sub-loop control circuit uses the analog signal V MAIN and V ISENSE Monitor voltage V i and the output load current I o Whether there is a change, if so, proceed to step (3); if there is no change, continue monitoring; (3) The control circuit detects V i Voltage range and output load current I o , and set the output voltage V o and inductor L, determine the corresponding frequency conversion function F in CCM / MCM / DCM working mode according to formula (4): CCM / F MCM / F DCM ; (4) Determine the output load current I o Is it less than the low power mode current threshold I LP If yes, go to step (7); otherwise go to step (5), where the low power mode current threshold I LP Set according to a certain proportion of the rated output current; (5) Determine whether the ZCD_flag output signal is set. If so, proceed to step (8); otherwise, proceed to step (6); (6) The PFC circuit operates in CCM mode, according to the frequency conversion function F determined in step (3) DCM and the output load current I o Calculate PWM frequency f s ; (7) The PFC circuit operates in DCM mode. According to the frequency conversion function F determined in step (3), MCM and the output load current I o Calculate PWM frequency f s ; (8) The PFC circuit operates in MCM mode, according to the frequency conversion function F determined in step (3) CCM and the output load current I o Calculate PWM frequency f s .

3. A boost PFC circuit based on multi-mode variable frequency split-loop control as claimed in claim 1, characterized in that The frequency conversion function control module is used to calculate the frequency conversion range under different working modes, and automatically adjust the switching frequency of the PFC circuit according to the input AC power supply voltage, output load current and working mode. The specific calculation method of the frequency conversion range is as follows: In order to make the boost PFC circuit in CCM mode, that is, the inductor current I L It is greater than zero during the entire switching cycle; (1) in ; Where V i Indicates V ac The voltage after the rectifier bridge; f s Indicates the switching frequency; V o represents output voltage; L represents inductance; ΔI L represents the inductor current ripple; without considering the diode and transistor conduction voltage drop, equation (1) is expanded to: (2) because , where T S is the output PWM period, T on is the on-time, D is the duty cycle of the output PWM; Formula (2) is simplified to: (3) in, , equivalent load impedance ; Formula (3) gives the critical switching frequency in CCM / MCM working mode, and the corresponding switching frequency f is obtained s and voltage V i , output load current I o The relationship between is as follows: (4) In formula (4), due to the output voltage V o and inductor L are set according to the V detected during operation i Voltage range and output load current I o Calculate the frequency conversion range under different working modes, so as to design the frequency conversion function F of different working modes CCM / F MCM / F DCM .

4. A boost PFC circuit based on multi-mode variable frequency split-loop control as claimed in claim 1, characterized in that The generation circuit and switching method of the switching signal MODE of the working mode switching module are: (1) The voltage comparator CMP1 is used to determine the output of the second sampling ratio circuit and the zero-crossing threshold voltage V ZCD The size of the inductor current I L The zero crossing point and generate ZCD_flag signal; (2) The voltage comparator CMP2 is used to determine the output of the fourth analog-to-digital converter ADC4 and the low-power threshold voltage V LP The size of is used to detect low power and generate the LP_flag signal; (3) OR gate OR1 performs an OR operation on ZCD_flag and LP_flag. Its operation logic is as follows: ,in" " represents binary "OR" operation; MODE = 1, the PFC circuit operates in variable frequency DCM mode; MODE = 0, the PFC circuit operates in variable frequency CCM mode; when the MODE signal changes within a cycle, the PFC circuit operates in variable frequency MCM mode.

Citation Information

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