Fused quantum cryptography system and fusion encryption method and fusion decryption method thereof

Abstract

The invention belongs to the technical field of post quantum information security, and particularly discloses a fusion post quantum cryptography system and a fusion encryption method and a fusion decryption method thereof, the fusion encryption method is applied to a sending end, and the fusion encryption method comprises the following steps: encrypting original plaintext data by using a public key of a Streamline NTRU Prime algorithm to generate corresponding ciphertext data; signing the ciphertext data by using a private key of a Diithium algorithm to obtain a ciphertext signature; and sending the ciphertext data and the ciphertext signature to a receiving end. The fusion decryption method is applied to a receiving end, and comprises the following steps: receiving ciphertext data and a ciphertext signature; verifying the ciphertext signature by using a public key of a Diithium algorithm; and under the condition that the ciphertext signature is verified to be valid, decrypting the ciphertext data by using a private key of a Streamline NTRU Prime algorithm to generate original plaintext data.

Description

Technical Field

[0001] This application belongs to the technical field of post - quantum information security. More specifically, it relates to a fused post - quantum cryptosystem and its fused encryption method and fused decryption method. Background Art

[0002] In the digital age, information security issues have gradually emerged. Cryptography is an important discipline in modern information security technology, and its importance has been increasing day by day. Transmitting encrypted information can increase the difficulty of eavesdropping and cracking by attackers, thereby improving information security. In recent years, significant breakthroughs have been made in the field of quantum technology, indicating that quantum computing technology will soon penetrate into various industries and fields. However, the development of quantum computing will bring an unprecedented impact on traditional cryptographic systems. The proposed Shor algorithm and Grover algorithm mark that quantum computers can break traditional public - key encryption algorithms in polynomial time. Therefore, in the post - quantum era, traditional public - key encryption algorithms represented by RSA in the prior art will no longer be secure. Summary of the Invention

[0003] Aiming at the defects of the prior art, the purpose of this application is to provide a fused post - quantum cryptosystem and its fused encryption method and fused decryption method, aiming to solve the problem of low security caused by using traditional public - key encryption algorithms.

[0004] To achieve the above - mentioned purpose, in the first aspect, this application provides a fused post - quantum cryptography encryption method, including: Using the public key of the Streamlined NTRU Prime algorithm to encrypt the original plaintext data to generate corresponding ciphertext data; Using the private key of the Dilithium algorithm to sign the ciphertext data to obtain a ciphertext signature; Sending the ciphertext data and the ciphertext signature to the receiving end.

[0005] The sender of this application uses the post - quantum encryption algorithm Streamlined NTRU Prime to encrypt the plaintext data to form ciphertext data, and then uses the post - quantum signature algorithm Dilithium to sign the ciphertext. By fusing the two algorithms for encryption, it can resist quantum computer attacks and improve security.

[0006] In the second aspect, this application provides a fused post - quantum cryptography decryption method, including: Receiving the ciphertext data and the ciphertext signature; Using the public key of the Dilithium algorithm to verify the ciphertext signature; When it is verified that the ciphertext signature is valid, the private key of the Streamlined NTRU Prime algorithm is used to decrypt the ciphertext data to generate the original plaintext data.

[0007] The recipient of this application first needs to verify the ciphertext signature. If the signature is valid, the SNTRUP private key is used to decrypt the ciphertext data to restore the plaintext data.

[0008] Thirdly, this application provides a post-quantum cryptosystem, including an encryption module and a decryption module. Among them, the encryption module is used to encrypt by using the post-quantum cryptography encryption method described in the first aspect, and the decryption module is used to decrypt by using the post-quantum cryptography decryption method described in the second aspect.

[0009] This application provides a post-quantum cryptosystem. The sender uses the post-quantum encryption algorithm Streamlined NTRU Prime to encrypt the plaintext data to form ciphertext data, and then uses the post-quantum signature algorithm Dilithium to sign the ciphertext. The recipient first needs to verify the ciphertext signature. If the signature is valid, the SNTRUP private key is used to decrypt the ciphertext data to restore the plaintext data. By fusing the two algorithms for encryption and decryption, it can resist quantum computer attacks and improve security.

[0010] According to a post-quantum cryptosystem provided by this application, the system further includes: An NTT sub-module for implementing polynomial multiplication in the Dilithium algorithm; A Dilithium algorithm parameter y generation sub-module for generating the Dilithium algorithm parameter y.

[0011] This application implements the NTT sub-module hardware in a pipelined manner, divides the operations in the Dilithium algorithm key generation, signature, and verification into segments, and processes one segment for each request, which can reduce the storage space of intermediate results and reduce system resource consumption.

[0012] According to a post-quantum cryptosystem provided by this application, the encryption module includes a key generation sub-module. The key generation sub-module is used to generate the public key and private key of the Streamlined NTRU Prime algorithm, and the public key and private key of the Dilithium algorithm respectively. The key generation sub-module specifically includes a Short polynomial module, and the Short polynomial module is used to generate Short polynomials and polynomials .

[0013] According to a post-quantum cryptographic system provided by the present application, the encryption module and the decryption module include an SHA-512 sub-module, and the SHA-512 sub-module is used to complete the HashConfirm operation and the HashSession operation. Specifically, the SHA-512 sub-module includes: A padding module, which is used to pad the input message; A control unit, which is used to control the SHA-512 sub-module according to the input; A dual-port RAM, which is used to temporarily store data; A core module, which is used to perform 80 rounds of loop operations according to the input message.

[0014] According to a post-quantum cryptographic system provided by the present application, the encryption module includes A polynomial encoding sub-module, which is used to encode the private key.

[0015] According to a post-quantum cryptographic system provided by the present application, the decryption module includes A polynomial decoding sub-module, which is used to decode the private key.

[0016] According to a post-quantum cryptographic system provided by the present application, the encryption module includes A polynomial encoding sub-module, which is used to encode the public key.

[0017] According to a post-quantum cryptographic system provided by the present application, the encryption module includes A polynomial decoding sub-module, which is used to decode the public key.

[0018] In a fourth aspect, the present application provides an electronic device, including: at least one memory, which is used to store a program; at least one processor, which is used to execute the program stored in the memory. When the program stored in the memory is executed, the processor is used to execute the post-quantum cryptographic encryption method described in the first aspect or any possible implementation manner of the first aspect.

[0019] In a fifth aspect, the present application provides an electronic device, including: at least one memory, which is used to store a program; at least one processor, which is used to execute the program stored in the memory. When the program stored in the memory is executed, the processor is used to execute the post-quantum cryptographic decryption method described in the second aspect or any possible implementation manner of the second aspect.

[0020] In a sixth aspect, the present application provides a computer-readable storage medium. The computer-readable storage medium stores a computer program. When the computer program runs on a processor, it enables the processor to execute the post-quantum cryptographic encryption method described in the first aspect or any possible implementation manner of the first aspect.

[0021] In a seventh aspect, the present application provides a computer-readable storage medium storing a computer program which, when run on a processor, causes the processor to execute the post-quantum cryptographic decryption method described in the first aspect or any possible implementation of the first aspect.

[0022] In an eighth aspect, the present application provides a computer program product which, when run on a processor, causes the processor to execute the post-quantum cryptographic encryption method described in the first aspect or any possible implementation of the first aspect.

[0023] In a ninth aspect, the present application provides a computer program product which, when run on a processor, causes the processor to execute the post-quantum cryptographic decryption method described in the first aspect or any possible implementation of the first aspect.

[0024] It can be understood that the beneficial effects of the fourth to ninth aspects above can be referred to the relevant descriptions in the first or second aspect above, and will not be elaborated here.

[0025] Generally speaking, compared with the prior art, the above technical solutions conceived by the present application have the following beneficial effects: The sender uses the post-quantum encryption algorithm Streamlined NTRU Prime to encrypt the plaintext data to form ciphertext data, and then uses the post-quantum signature algorithm Dilithium to sign the ciphertext. The receiver first needs to use the Dilithium public key to verify the ciphertext signature. If the signature is valid, the receiver uses the SNTRUP private key to decrypt the ciphertext data and restore the plaintext data. By integrating the two algorithms for encryption and decryption, quantum computer attacks can be resisted and security can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0027] Figure 1 is a schematic flowchart of the post-quantum cryptographic encryption method provided by an embodiment of the present application; Figure 2 is a schematic flowchart of the post-quantum cryptographic decryption method provided by an embodiment of the present application; Figure 3 is a schematic structural diagram of the post-quantum cryptographic system provided by an embodiment of the present application; Figure 4 It is a schematic diagram of the working process of the post-fusion quantum cryptosystem provided by an embodiment of the present application; Figure 5 It is a schematic diagram of the structure of the Dilithium algorithm parameter y generation sub-module provided by an embodiment of the present application; Figure 6 It is a schematic diagram of the structure of the Short polynomial module provided by an embodiment of the present application; Figure 7 It is a schematic diagram of the structure of the SHA-512 sub-module provided by an embodiment of the present application; Figure 8 It is provided by an embodiment of the present application Schematic diagram of the structure of the polynomial encoding sub-module; Figure 9 It is provided by an embodiment of the present application Schematic diagram of the structure of the polynomial decoding sub-module; Figure 10 It is provided by an embodiment of the present application Schematic diagram of the structure of the polynomial encoding sub-module; Figure 11 It is provided by an embodiment of the present application Schematic diagram of the structure of the polynomial decoding sub-module; Figure 12 It is one of the schematic diagrams of the structure of the electronic device provided by an embodiment of the present application; Figure 13 It is the second schematic diagram of the structure of the electronic device provided by an embodiment of the present application. Detailed implementation manners

[0028] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0029] The term "and / or" in this article is an association relationship describing associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. The symbol " / " in this article represents an "or" relationship between associated objects. For example, A / B represents A or B.

[0030] In the embodiments of the present application, words such as "exemplary" or "for example" are used to represent examples, illustrations or explanations. Any embodiment or design solution described as "exemplary" or "for example" in the embodiments of the present application should not be construed as being more preferred or having more advantages than other embodiments or design solutions. Rather, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific manner.

[0031] In the description of the embodiments of the present application, unless otherwise specified, the meaning of "a plurality of" refers to two or more. For example, a plurality of processing units refers to two or more processing units, etc.; a plurality of elements refers to two or more elements, etc.

[0032] Next, in combination with Figure 1 the post-quantum cryptographic encryption method provided in the embodiments of the present application will be introduced.

[0033] Figure 1 is a schematic flowchart of the post-quantum cryptographic encryption method provided in the embodiments of the present application. As Figure 1 shown, this method is applied to the sender and includes the following steps: Step 100, encrypt the original plaintext data using the public key of the Streamlined NTRU Prime algorithm to generate the corresponding ciphertext data; Streamlined NTRU Prime is a post-quantum cryptographic algorithm that reaches the IND-CCA2 security level and adopts the Key Encapsulation Mechanism (KEM). The structure of the Streamlined NTRU Prime algorithm is similar to the original NTRU algorithm. It removes the torus structure on the basis of the classical NTRU algorithm to reduce the attack surface, thereby achieving the purpose of enhancing the anti-attack ability of the algorithm and improving security.

[0034] Streamlined NTRU Prime is the first complete algorithm in the NTRU Prime algorithm family. This algorithm has smaller ciphertexts and faster encapsulation and decapsulation speeds, but its key generation speed is slower. The algorithm is divided into two levels. The inner layer uses an asymmetric encryption algorithm, while the outer layer uses a key encapsulation algorithm.

[0035] During the encapsulation process, the sender can first encrypt the original plaintext data using the public key of the Streamlined NTRU Prime algorithm to generate the corresponding ciphertext data.

[0036] Step 110, sign the ciphertext data using the private key of the Dilithium algorithm to obtain the ciphertext signature; The CRYSTALS-Dilithium algorithm is a lattice-based digital signature scheme. The core operations of the algorithm are the operations of polynomial matrices and vectors, and the security is based on modular learning with errors and the shortest integer solution problem.

[0037] Specifically, first generate the keys of the Dilithium algorithm, including the private key and the public key, and then use the private key to generate a signature for the ciphertext data.

[0038] After the sender encrypts the original plaintext data using the public key of the Streamlined NTRU Prime algorithm to generate the corresponding ciphertext data, the sender uses the private key of the Dilithium algorithm to sign the ciphertext data to obtain a ciphertext signature.

[0039] Step 120: Send the ciphertext data and the ciphertext signature to the receiver.

[0040] A post-quantum cryptography encryption method provided by this application. The sender uses the post-quantum encryption algorithm Streamlined NTRU Prime to encrypt the plaintext data to form ciphertext data, and then uses the post-quantum signature algorithm Dilithium to sign the ciphertext. By integrating the two algorithms for encryption, it can resist quantum computer attacks and improve security.

[0041] Next, Figure 2 introduce the post-quantum cryptography decryption method provided in the embodiments of this application.

[0042] Figure 2 is a schematic flowchart of the post-quantum cryptography decryption method provided in the embodiments of this application. As Figure 2 shown, this method is applied to the receiver and includes the following steps: Step 200: Receive the ciphertext data and the ciphertext signature; Step 210: Verify the ciphertext signature using the public key of the Dilithium algorithm; After receiving the ciphertext data and the ciphertext signature sent by the sender, the receiver uses the public key to verify the validity of the ciphertext signature for the ciphertext data.

[0043] Step 220: When the ciphertext signature is verified to be valid, decrypt the ciphertext data using the private key of the Streamlined NTRU Prime algorithm to generate the original plaintext data.

[0044] When the receiver verifies that the ciphertext signature is valid, the receiver decrypts the ciphertext data using the private key of the Streamlined NTRU Prime algorithm to generate the original plaintext data.

[0045] A post-quantum cryptography decryption method provided by this application. The receiver first needs to verify the ciphertext signature. If the signature is valid, the receiver uses the SNTRUP private key to decrypt the ciphertext data and restore the plaintext data. By integrating the two algorithms for decryption, it can resist quantum computer attacks and improve security.

[0046] Next, in combination with Figures 3 - 11 the integrated post-quantum cryptosystem provided in the embodiments of the present application will be introduced.

[0047] Figure 3 is a schematic structural diagram of the integrated post-quantum cryptosystem provided in the embodiments of the present application. As Figure 3 shown, the system includes an encryption module 310 and a decryption module 320. Among them, the encryption module 310 is used to encrypt using the integrated post-quantum cryptography encryption method in the above embodiments, and the decryption module 320 is used to decrypt using the integrated post-quantum cryptography decryption method in the above embodiments.

[0048] The encryption module can be present in the sending end, and the decryption module can be present in the receiving end.

[0049] Figure 4 is a schematic diagram of the working process of the integrated post-quantum cryptosystem provided in the embodiments of the present application. As Figure 4 shown, in an embodiment of the present application, when the integrated post-quantum cryptosystem works, at the sending end, the public key of the Streamlined NTRUPrime algorithm is used to encrypt the original plaintext data to generate the corresponding ciphertext data, and the private key of the Dilithium algorithm is used to sign the ciphertext data to obtain the ciphertext signature. Through the intermediate transmission medium, the sending end sends the ciphertext data and the ciphertext signature to the receiving end. The receiving end first uses the public key of the Dilithium algorithm to verify the received ciphertext signature. If the digital signature is valid, the private key of the Streamlined NTRU Prime is used to decrypt the ciphertext data to restore the plaintext data.

[0050] Compared with the software implementation form, the post-quantum cryptosystem implemented by hardware has unique advantages in terms of resource consumption, security, power consumption, and speed. It can be applied to both traditional high-performance devices and resource-constrained Internet of Things terminal devices.

[0051] In a post-quantum cryptosystem provided by the present application, the sender uses the post-quantum encryption algorithm StreamlinedNTRU Prime to encrypt the plaintext data to form ciphertext data, and then uses the post-quantum signature algorithm Dilithium to sign the ciphertext. The receiver first needs to verify the ciphertext signature. If the signature is valid, the private key of SNTRUP is used to decrypt the ciphertext data to restore the plaintext data. By integrating the two algorithms for encryption and decryption, it can resist quantum computer attacks and improve security.

[0052] In some embodiments, the system further includes: an NTT sub-module for implementing polynomial multiplication in the Dilithium algorithm; The dilithium algorithm parameter y generation sub-module is used to generate the dilithium algorithm parameter y.

[0053] Preferably, the hardware implementation of the dilithium algorithm supports all its security levels, and the polynomial multiplication is implemented using the NTT algorithm.

[0054] Preferably, the NTT sub-module hardware can be implemented in a pipelined manner, and the operations in the dilithium algorithm key generation, signature, and verification are divided into segments. Each request processes one segment. This method can reduce the storage space of intermediate results and reduce the consumption of system resources.

[0055] Figure 5 FIG. is a schematic structural diagram of the dilithium algorithm parameter y generation sub-module provided by an embodiment of the present application. As Figure 5 shown, the input end of this module includes the input data din, the clock signal clock, and the reset signal reset, and the output end includes the output data dout, the data valid signal valid, and the completion signal done.

[0056] For the input data din, its value is a 512-bit parameter , and for the output data dout, its value is each coefficient of the polynomial y. and are used as the input of the hash module, and the output result is used by the sampling module to generate coefficients that meet the requirements.

[0057] y can generate the parameter w and the parameter z. The parameter w is used as a factor to generate the parameter and the parameter h, and the signature result is represented by the parameter .

[0058] In some embodiments, the encryption module 310 includes a key generation sub-module. The key generation sub-module is used to generate the public key and private key of the Streamlined NTRU Prime algorithm, as well as the public key and private key of the dilithium algorithm. The key generation sub-module specifically includes a Short polynomial module. The Short polynomial module is used to generate the Short polynomial and the polynomial .

[0059] Preferably, the hardware implementation of the Streamlined NTRU Prime algorithm supports all its security levels.

[0060] Figure 6 FIG. is a schematic structural diagram of the Short polynomial module provided by an embodiment of the present application. As Figure 6As shown, the input end of the module includes input data din, clock signal clock, and reset signal reset, and the output end includes output data dout, completion signal done, and output valid signal valid. Among them, the input data din is an arbitrary 32-bit integer, and the output data dout is a 2-bit integer that meets the polynomial requirement. The RAM in the module adopts a dual-port design, and the a port and b port can perform read and write operations simultaneously within one clock cycle, and the port bit width is 32 bits. Under the control of the finite state machine, the first elements of the input are set to even numbers, and the remaining elements are set to odd numbers, and all 32 bits are stored in the RAM, then the sorting module is called to sort all 32-bit data, and the sorted result is stored in the RAM again. Finally, the high 30 bits of all data are discarded, and all 2-bit data are decremented and output. At this time, the state machine jumps to the idle state and waits for the next call.

[0061] Preferably, in the key generation stage, a Short polynomial is required to generate the polynomial that constitutes the private key. In the encapsulation stage, this module is used to generate the Short polynomial as the input plaintext.

[0062] In some embodiments, the encryption module 310 and the decryption module 320 include an SHA-512 sub-module. The SHA-512 sub-module is used to complete the HashConfirm operation and the HashSession operation. The SHA-512 sub-module specifically includes: A padding module for padding the input message; A control unit for controlling the SHA-512 sub-module according to the input; A dual-port RAM for temporarily storing data; A core module for performing 80 rounds of loop operations according to the input message.

[0063] Figure 7 is the structural schematic diagram of the SHA-512 sub-module provided by the embodiment of the present application. As Figure 7 shown, in the encapsulation and decapsulation stages of the Streamlined NTRU Prime algorithm, the SHA-512 module is used to complete the HashConfirm and HashSession operations. The input end of this module includes input data din, type selection signal type, clock signal clock, and reset signal reset, and the output end includes output data dout and completion signal done. For the input data din, its value can be the encoded ciphertext and the encoded input plaintext etc. The type value is used to indicate that the current operation to be performed is a HashConfirm or HashSession operation. Therefore, according to different values of type, the corresponding operations can be completed in the hash module.

[0064] According to the principle of the SHA-512 algorithm, its core is 80 rounds of loop operations. Therefore, the overall hardware structure can be divided into the peripheral control logic and the core module responsible for 80 rounds of loop. The peripheral control circuit mainly includes a padding module for padding the input message, a control unit for controlling the operation of the module, and a dual-port RAM for temporarily storing data.

[0065] Preferably, the control unit in the peripheral circuit can be a finite automaton, which controls the operation of the SHA-512 module according to signals such as the input clock clock and reset reset, and finally correctly outputs the 64-bit dout result and sets the completion signal done to 1.

[0066] The padding module needs to pad the input data according to the SHA-512 algorithm rules and input the padded data into the core module for calculation. 80 constants required for the operation are stored in the core module, and 80 rounds of loop operations are completed under the control of the finite state machine. Finally, the operation result is output and stored in the RAM.

[0067] Preferably, the RAM adopts a dual-port design, which can perform read and write operations simultaneously in one clock cycle. The a port is fixed as the output port, and the b port is the input port. When the clock edge arrives, read and write are performed from the a and b ports respectively. Therefore, the working efficiency of this module can be improved.

[0068] In some embodiments, the encryption module 320 includes a polynomial encoding sub-module for encoding the private key.

[0069] Figure 8 This is provided by the embodiments of the present application The structural schematic diagram of the polynomial encoding sub-module is as Figure 8 shown. This module is used for private key encoding in the key generation stage. The input end of this module includes 2-bit input data din, clock signal clock, valid signal valid, and reset signal reset. The output end includes 8-bit output data dout and completion signal done. Under the control of the finite state machine, the 2-bit input data is continuously shifted and temporarily stored in the register, compressed to generate one-byte output data, and finally the encoded data is output through the dout port.

[0070] In some embodiments, the decryption module 320 includes A polynomial decoding sub-module for decoding the private key.

[0071] Figure 9 This is provided by an embodiment of the present application The structural schematic diagram of the polynomial decoding sub-module is as Figure 9 shown. This module is used for private key decoding in the decapsulation phase. The input terminals of this module include 8-bit input data din, clock signal clock, valid signal valid, reset signal reset, etc. The output terminals include 2-bit output data dout and completion signal done. When the valid signal valid is at a high level, the input data is stored in the shift register. Under the control of the finite state machine, two consecutive 2-bit data in the register are taken out in sequence as the output, and the corresponding positions in the register are set to 0. After 4 state transitions, the input data has been restored to 4 pieces of 2-bit data. At this time, the completion signal done is set to 1, waiting to enter the next cycle.

[0072] In some embodiments, the encryption module 310 includes A polynomial encoding sub-module for encoding the public key.

[0073] Figure 10 This is provided by an embodiment of the present application The structural schematic diagram of the polynomial encoding sub-module is as Figure 10 shown. This module is used for public key encoding in the key generation phase. The input terminals of this module include the elements for auxiliary encoding input din_m, the input data din to be encoded, clock signal clock, valid signal valid and reset signal reset. The output terminals include the encoded output data dout and completion signal done. Since the public key is a polynomial, its coefficients all belong to , so din is designed with a 13-bit width, and 1 byte of dout is generated as the output after encoding and compression. A dual-port RAM is designed in the encoding module for temporarily storing the data generated during the calculation process. Both ports a and b of this RAM have read and write functions. The key task of the polynomial encoding module is to calculate , under the control of the finite state machine, through operations such as addition, shift and multiplication, finally 1 byte of dout after encoding and compression is generated, the completion signal done is set to 1, and the finite state machine jumps to the idle state, waiting to enter the next cycle.

[0074] In some embodiments, the encryption module 310 includes A polynomial decoding sub-module for decoding the public key.

[0075] Figure 11This is provided by an embodiment of the present application A schematic structural diagram of the polynomial decoding sub-module is shown in Figure 11 As shown, this module is used for encapsulating and decoding the stage public key. The input end of this module includes elements for auxiliary decoding input din_m, input data din to be decoded, clock signal clock, valid signal valid, and reset signal reset. The output end includes decoded output data dout and completion signal done. Among them, the bit width of the input data din is 8 bits, and the bit width of the output data dout is 13 bits. A dual-port RAM is also used in the decoding module, and its design is the same as that in the encoding module. The divisor in the encoding module is , so there is no need to design an additional division circuit during implementation, and only shift operations need to be performed to complete it. In the decoding module, the divisor is not an integer power of 2, so a simple dedicated divider is designed separately to meet the decoding function requirements. Under the control of the finite state machine, through operations such as addition, shift, division, and multiplication, 1 byte of input is restored to 13-bit elements as output, the completion signal done is set to 1, and the finite state machine jumps to the idle state, waiting to enter the next cycle.

[0076] Based on the post-fusion quantum cryptography encryption method in the above embodiment Figure 12 One of the schematic diagrams of the physical structure of an electronic device is shown in Figure 12 As shown, an embodiment of the present application provides an electronic device, which may include: a processor 1210, a communication interface 1220, a memory 1230, and a communication bus 1240. Among them, the processor 1210, the communication interface 1220, and the memory 1230 complete mutual communication through the communication bus 1240. The processor 1210 can call the logical instructions in the memory 1230 to execute the post-fusion quantum cryptography encryption method in the above embodiment.

[0077] In addition, when the logical instructions in the above-mentioned memory 1230 are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the post-fusion quantum cryptography encryption method described in various embodiments of the present application.

[0078] Based on the post - fusion quantum - password decryption method in the above - mentioned embodiments, Figure 13 illustrates a second schematic structural diagram of an electronic device, as Figure 13 shown. An embodiment of the present application provides an electronic device, which may include: a processor 1310, a communications interface 1320, a memory 1330, and a communication bus 1340. Among them, the processor 1310, the communications interface 1320, and the memory 1330 complete mutual communication through the communication bus 1340. The processor 1310 can call the logical instructions in the memory 1330 to execute the post - fusion quantum - password decryption method in the above - mentioned embodiments.

[0079] In addition, when the logical instructions in the above - mentioned memory 1330 are implemented in the form of software functional units and sold or used as an independent product, they can be stored in a computer - readable storage medium. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to enable a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the post - fusion quantum - password decryption method described in various embodiments of the present application.

[0080] Based on the post - fusion quantum - password encryption method in the above - mentioned embodiments, an embodiment of the present application provides a computer - readable storage medium. The computer - readable storage medium stores a computer program. When the computer program runs on a processor, it enables the processor to execute the post - fusion quantum - password encryption method in the above - mentioned embodiments.

[0081] Based on the post - fusion quantum - password decryption method in the above - mentioned embodiments, an embodiment of the present application provides a computer - readable storage medium. The computer - readable storage medium stores a computer program. When the computer program runs on a processor, it enables the processor to execute the post - fusion quantum - password decryption method in the above - mentioned embodiments.

[0082] Based on the post - fusion quantum - password encryption method in the above - mentioned embodiments, an embodiment of the present application provides a computer program product. When the computer program product runs on a processor, it enables the processor to execute the post - fusion quantum - password encryption method in the above - mentioned embodiments.

[0083] Based on the post - fusion quantum - password decryption method in the above - mentioned embodiments, an embodiment of the present application provides a computer program product. When the computer program product runs on a processor, it enables the processor to execute the post - fusion quantum - password decryption method in the above - mentioned embodiments.

[0084] It can be understood that the processor in the embodiments of the present application may be a central processing unit (CPU), or may also be other general-purpose processors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. The general-purpose processor may be a microprocessor or any conventional processor.

[0085] The method steps in the embodiments of the present application may be implemented in a hardware manner or by a processor executing software instructions. The software instructions may be composed of corresponding software modules, and the software modules may be stored in a random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, removable hard disks, CD-ROMs, or any other form of storage medium well known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium may also be a component of the processor. The processor and the storage medium may be located in the ASIC.

[0086] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the processes or functions described in the embodiments of the present application are generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transmitted through the computer-readable storage medium. The computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center in a wired manner (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or a wireless manner (such as infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or a data center that includes one or more integrated available media. The available medium can be a magnetic medium (such as a floppy disk, a hard disk, a magnetic tape), an optical medium (such as a DVD), or a semiconductor medium (such as a solid state disk (SSD)), etc.

[0087] It can be understood that the various numerical numbers involved in the embodiments of the present application are only for the convenience of description and are not used to limit the scope of the embodiments of the present application.

[0088] It is easy for those skilled in the art to understand that the above is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements, and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A post-quantum cryptographic encryption method, characterized in that: The method is applied at the sending end, and includes: Use the public key of the Streamlined NTRU Prime algorithm to encrypt the original plaintext data and generate the corresponding ciphertext data; Use the private key of the Dilithium algorithm to sign the ciphertext data and obtain the ciphertext signature; The ciphertext data and the ciphertext signature are sent to the receiving end.

2. A fusion post-quantum cryptographic decryption method, characterized in that: The method is applied at the receiving end, and includes: Receive ciphertext data and ciphertext signature; Use the public key of the Dilithium algorithm to verify the ciphertext signature; When the ciphertext signature is verified to be valid, the ciphertext data is decrypted using the private key of the Streamlined NTRU Prime algorithm to generate original plaintext data.

3. A fusion post-quantum cryptographic system, characterized in that: It comprises an encryption module and a decryption module, wherein the encryption module is used to encrypt using the post-fusion quantum cryptography encryption method as claimed in claim 1, and the decryption module is used to decrypt using the post-fusion quantum cryptography decryption method as claimed in claim 2.

4. The fused post-quantum cryptographic system according to claim 3, characterized in that: The system further comprises: NTT submodule, used to implement polynomial multiplication in the Dilithium algorithm; The Dilithium algorithm parameter y generation submodule is used to generate the parameter y of the Dilithium algorithm.

5. The fusion post-quantum cryptographic system according to claim 3, characterized in that: The encryption module includes a key generation submodule, which is used to generate a public key and a private key of the Streamlined NTRU Prime algorithm and a public key and a private key of the Dilithium algorithm, respectively. The key generation submodule specifically includes a Short polynomial module, which is used to generate a Short polynomial. and polynomial .

6. The fusion post-quantum cryptographic system according to claim 3, characterized in that: The encryption module and the decryption module include a SHA-512 submodule, and the SHA-512 submodule is used to complete the HashConfirm operation and the HashSession operation. The SHA-512 submodule specifically includes: A filling module, used to fill the input message; A control unit, configured to control the SHA-512 submodule according to an input; Dual-port RAM for temporary data storage; The core module is used to perform 80 rounds of loop operations based on the input message.

7. The fusion post-quantum cryptographic system according to claim 3, characterized in that: The encryption module comprises The polynomial encoding submodule is used to encode the private key.

8. The fused post-quantum cryptographic system according to claim 3, characterized in that: The decryption module comprises The polynomial decoding submodule is used to decode the private key.

9. The fused post-quantum cryptographic system according to claim 3, characterized in that: The encryption module comprises The polynomial encoding submodule is used to encode the public key.

10. The fused post-quantum cryptographic system according to claim 3, characterized in that: The encryption module comprises The polynomial decoding submodule is used to decode the public key.

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