A readout electronics circuit system for a through radiation detector, a method of co-operation, a device and a medium

Abstract

The present application relates to a kind of readout electronics circuit system of crossing radiation detector, cooperative working method, equipment and medium, comprising: four first connectors, for receiving the analog charge signal and air temperature air pressure digital signal output by crossing radiation detector;Four ESD protection circuits are used to provide ESD protection;Four SAMPA chips are used to obtain digitized scientific data;An environmental monitoring module is used to monitor the environmental parameter value of readout electronics circuit system;A FPGA module is used to process the air temperature air pressure digital signal of crossing radiation detector, the environmental parameter value of readout electronics circuit system, the state parameter of FPGA module, digitized scientific data;A first hardware interface is used to receive serial data instruction and trigger signal;A second hardware interface is used to send the processed scientific data and clock signal to back-end summary electronics, the present application can be widely applied in high-energy particle detection technology field.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of high-energy particle detection, and in particular to a readout electronics circuit system of a through-radiation detector, a cooperative working method, equipment and a medium. BACKGROUND

[0002] With the deepening of scientific research, especially in the field of space physics and astrophysics, more and more high-energy detection tasks require detection systems with high precision, high sensitivity and long-term stability. In high-energy cosmic radiation detection, how to efficiently and accurately measure the energy and properties of high-energy particles has become a key to technological development. The High Energy Cosmic Radiation Detector (HERD) is an important scientific experiment project on the Chinese space station, which is planned to be launched in 2027 and will be in orbit for more than 10 years. HERD will become a revolutionary and innovative platform in the field of space astronomy and particle astrophysics, and through its various advanced detection means, it will greatly promote the multi-faceted detection of high-energy cosmic radiation. Its core scientific tasks include accurate measurement of cosmic ray energy spectrum, high-sensitivity dark matter signal search, research on the origin and propagation mechanism of cosmic rays, and high-energy gamma-ray patrol and multi-messenger astronomical observation, etc., and the scientific goals have a significant leading position internationally.

[0003] To complete these scientific tasks, HERD has adopted a unique and innovative approach in its design, using a five-sided sensitive detector configuration to significantly improve the effective acceptance and detection accuracy. In particular, in the measurement of high-energy cosmic rays, HERD system first expands the energy range of direct cosmic ray measurement to the PeV level. To achieve this goal, HERD system works cooperatively through five kinds of detectors, including three-dimensional imaging calorimeter, optical fiber tracker, plastic scintillator detector, silicon charge detector and through-radiation detector (TRD), to jointly complete the accurate detection and data acquisition of incident high-energy particles. Among them, the through-radiation detector (TRD) undertakes the key energy calibration task and hard X-ray patrol observation task. In this system, TRD uses the phenomenon of through-radiation (TR) generated by high-energy charged particles when passing through different media to deduce the Lorentz factor of the particles. Combined with the charge information of the particles, the momentum of the particles is further calculated, and in this way, the three-dimensional imaging calorimeter is absolutely calibrated for TeV energy particles. Through efficient signal acquisition and accurate energy calibration, TRD not only supports accurate energy calibration of high-energy protons, but also provides strong technical support in hard X-ray patrol.

[0004] The design of readout electronics circuit system in TRD occupies a core position in the whole system. However, the readout electronics circuit system in the prior art often faces the following challenges: (1) insufficient radiation resistance: space high-energy particles are easy to cause single event effects of the chip, causing system failure; (2) low efficiency of multi-channel signal processing: the traditional architecture is difficult to support parallel processing and low-noise transmission of hundreds of channels; (3) poor maintainability: hardware replacement is difficult in the space station environment, and the system needs to be highly modularized; (4) insufficient high-voltage stability: the high-voltage arcing and other abnormal events of the detector lack a rapid protection mechanism. SUMMARY

[0005] In view of the above problems, the purpose of the present application is to provide a readout electronics circuit system of a penetrating radiation detector, a cooperative working method, equipment and medium, which can improve the reliability, accuracy and maintainability of the penetrating radiation detector.

[0006] To achieve the above-mentioned purpose, the present application adopts the following technical solutions: in a first aspect, a readout electronics circuit system of a penetrating radiation detector is provided, comprising:

[0007] Four first connectors for receiving analog charge signals and air temperature and pressure digital signals output by the penetrating radiation detector;

[0008] Four ESD protection circuits for providing ESD protection for the analog charge signals output by the first connectors and outputting to the corresponding SAMPA chips;

[0009] Four SAMPA chips for low-noise amplification, signal shaping, analog-to-digital conversion and high-speed data output processing of the input analog charge signals based on a trigger signal to obtain digitized scientific data;

[0010] A clock and reset circuit for providing a global clock signal and ensuring that the system can recover to the initial state when starting or needing to clear the current state;

[0011] An environment monitoring module for monitoring the environmental parameter values of the readout electronics circuit system;

[0012] An FPGA module for receiving the air temperature and pressure digital signals of the penetrating radiation detector, the environmental parameter values of the readout electronics circuit system, and obtaining the state parameters of the FPGA module, performing packaging processing and sending to the second connector; based on serial data instructions, performing serial-parallel conversion, verification, synchronous packet filtering, packaging processing and caching of the digitized scientific data, and sending to the second connector; and receiving the high-voltage voltage, high-voltage current and temperature digital signals of the high-voltage circuit of the penetrating radiation detector, configuring the control instructions of the high-voltage circuit of the penetrating radiation detector;

[0013] A first hardware interface is used to receive serial data commands and trigger signals sent by the back-end aggregation electronics through a third connector, as well as to send the packaged digital signals of temperature and pressure of the trans-radiation detector, the digital signals of high voltage, high voltage current and temperature of the high voltage circuit, the environmental parameter values ​​of the electronic circuit system and the status parameters of the FPGA module to the back-end aggregation electronics through the third connector.

[0014] A second hardware interface is provided for transmitting processed scientific data and clock signals to the back-end aggregation electronics via the third connector;

[0015] A fourth connector is used to provide power to the high-voltage circuit of the through-radiation detector based on the control commands of the FPGA module, control the high voltage boost or buck of the high-voltage circuit of the through-radiation detector, and monitor the high voltage, high voltage current and temperature digital signals of the high-voltage circuit of the through-radiation detector.

[0016] A power management module is used to convert the input voltage into several output voltages to meet the power supply requirements of each module in the readout electronics circuit system and to provide power to each module in the readout electronics circuit system.

[0017] Furthermore, the readout electronics circuit system includes a charge measurement board and a power communication board. The charge measurement board is provided with a first connector, an ESD protection circuit, a SAMPA chip, a clock circuit, a reset circuit, a second connector, an FPGA module, and a fourth connector. The power communication board is provided with an environmental monitoring module, a third connector, a first hardware interface, a second hardware interface, a fifth connector, and a power management module.

[0018] Furthermore, the environmental monitoring module includes:

[0019] A temperature monitoring circuit is used to monitor the temperature of the SAMPA chip;

[0020] A current monitoring circuit is used to monitor the operating current of the SAMPA chip;

[0021] The ADC module is used to perform analog-to-digital conversion on the data monitored by the temperature monitoring circuit and the current monitoring circuit when environmental parameters are polled, and then send the data to the FPGA module through the second connector.

[0022] Furthermore, the FPGA module is equipped with:

[0023] The reset management module is used to control the global reset of each module in the readout electronics circuit system;

[0024] The scientific data processing module is used to perform serial-to-parallel conversion, verification, synchronization packet filtering, caching, and packaging of the digitized scientific data obtained from the SAMPA chip before transmitting it to the second connector.

[0025] The instruction and status processing module is used to receive serial data instructions sent by the back-end aggregation electronics, and to parse, verify, and configure them. It configures the operation of each module of the readout electronics circuit system through the serial data instructions; receives the environmental parameter values ​​of the through-radiation detector and the environmental parameter values ​​of the readout electronics circuit system, and obtains the status parameters of the FPGA module, and transmits them to the back-end aggregation electronics after packaging; and responds to the instruction reception status.

[0026] The trigger management module is used to receive trigger signals sent by the backend aggregation electronics and determine whether the trigger signals are valid, so as to control the SAMPA chip to start acquiring signals.

[0027] The SAMPA control module is used to provide the SAMPA chip with the required clock signals, trigger signals, and function configurations.

[0028] The SAMPA self-power-off protection module is used to perform self-power-off protection on the SAMPA chip based on the power supply current of the SAMPA chip.

[0029] The high-voltage control module is used to control the high-voltage boost or buck of the high-voltage module on the high-voltage circuit of the through-radiation detector based on the high-voltage voltage, high-voltage current and temperature of the high-voltage circuit, as well as the preset safe voltage value and maximum output current value.

[0030] Furthermore, the scientific data processing module includes:

[0031] The serial-to-parallel conversion and scientific data verification unit is used to perform serial-to-parallel conversion, verification, and synchronization packet filtering on the digitized scientific data obtained from the SAMPA chip.

[0032] The scientific data caching unit is used to cache scientific data after serial-to-parallel conversion, verification, and synchronization packet filtering.

[0033] The scientific data packaging and transmission unit is used to package and transmit the cached scientific data to the second connector.

[0034] Furthermore, the instruction and status processing module includes:

[0035] The RS422 command channel switching control unit is used to select the RS422 listening interface to be used.

[0036] The command parsing and response unit is used to receive serial data commands sent through the selected RS422 listening interface and to provide a response indicating whether the serial data command was received correctly.

[0037] The system status management and FPGA status acquisition unit is used to package the environmental parameter values ​​of the through-radiation detector, the environmental parameter values ​​of the readout electronic circuit system, and the status parameters of the FPGA module.

[0038] An environmental parameter acquisition unit is used to control the ADC module to digitize the environmental parameter values ​​of the readout electronic circuit system.

[0039] Furthermore, the power management module includes a DC-DC converter and several low-dropout linear regulators;

[0040] The DC-DC converter is used to convert the input voltage into several output voltages, which are then supplied to the FPGA module or the low-dropout linear regulator.

[0041] The nine low-dropout linear regulators provide power to the chips on the readout electronics circuitry system.

[0042] Secondly, a method for the coordinated operation of a readout electronics circuit system for a through-radiation detector is provided, including:

[0043] Receive serial data commands and trigger signals sent by the back-end aggregation electronics;

[0044] It receives analog charge signals and digital signals of temperature and pressure output from the through-radiation detector;

[0045] Provides ESD protection for the corresponding analog charge signal;

[0046] The analog charge signal after ESD protection is amplified with low noise, shaped, converted from analog to digital and processed with high-speed data output to obtain digitized scientific data.

[0047] Monitor the temperature of the SAMPA chip, the temperature of the FPGA module, and the operating current of the SAMPA chip;

[0048] Digital signals of high voltage, high voltage current and temperature in the high voltage circuit of the radiation detector are monitored.

[0049] The system acquires the status parameters of the FPGA module and processes the digital signals of air temperature and pressure from the radiation detector, the digital signals of high voltage, high voltage current, and temperature from the high voltage circuit of the radiation detector, the environmental parameter values ​​of the electronic circuit system, and the status parameters of the FPGA module. Based on serial data instructions, it performs serial-to-parallel conversion, verification, synchronization packet filtering, packaging, and buffering of digitized scientific data. It also receives the digital signals of high voltage, high voltage current, and temperature from the high voltage circuit of the radiation detector and configures the control instructions for the high voltage circuit of the radiation detector.

[0050] The packaged digital signals of air temperature and pressure from the trans-radiation detector, the digital signals of high voltage, high voltage current and temperature from the high voltage circuit of the trans-radiation detector, the environmental parameter values ​​of the electronic circuit system and the status parameters of the FPGA module, as well as the processed scientific data and clock signals are sent to the back-end aggregation electronics.

[0051] Based on control commands, power is supplied to the high-voltage circuit of the through-radiation detector, and the high-voltage boost or buck is configured.

[0052] Power is supplied to the various modules of the readout electronic circuit system.

[0053] Thirdly, a processing device is provided, including computer program instructions, wherein when the computer program instructions are executed by the processing device, they are used to implement the steps corresponding to the above-described method for the coordinated operation of the readout electronics circuit system of the through-radiation detector.

[0054] Fourthly, a computer-readable storage medium is provided, wherein computer program instructions are stored on the computer-readable storage medium, wherein the computer program instructions, when executed by a processor, are used to implement the steps corresponding to the above-described cooperative operation method of the readout electronic circuit system.

[0055] The present invention has the following advantages due to the adoption of the above technical solutions:

[0056] 1. This invention is composed of a radiation-resistant hardware architecture and a modular software framework, which supports efficient acquisition and processing of 768 channels of signals, and expands the dynamic range to the TeV level.

[0057] 2. The hardware of this invention uses a combination of SAMPA chip and FPGA module. Through SLVS level compatible design, power consumption and noise are reduced. It has the advantages of high integration and radiation resistance. It can avoid the introduction of additional power consumption and failure points by level conversion chip. The system power consumption is reduced by 30%, the single-event latch-up resistance is enhanced, and the reliability is improved through dual-channel hot standby communication mechanism.

[0058] 3. The modular design of this invention can significantly improve system maintainability. Combined with intelligent high-voltage protection and power management schemes, on-orbit maintenance time is reduced by 50%, and high-voltage anomaly response time is ≤10 ms. This ensures long-term stable operation of the equipment in extreme space environments and is suitable for high-energy cosmic ray calibration and hard X-ray sky survey observation missions.

[0059] 4. The instruction transmission of this invention adopts a master-slave half-duplex UART protocol, and scientific data is transmitted synchronously through the LVDS interface with an 80MHz clock. The dual-channel redundancy design ensures communication reliability.

[0060] 5. This invention uses an FPGA module to monitor the voltage / current of the high-voltage module in real time, responds in stages to minor and severe discharge events, and combines a rate-deceleration and voltage-boosting strategy (100 V / s below the safety threshold, 20 V / s after exceeding the threshold) to reduce the risk of arcing.

[0061] 6. The hardware of this invention consists of two independent boards: charge measurement and power communication. They can be quickly assembled and disassembled using RM series aerospace-grade connectors. The software supports fault module isolation and dynamic functional reconfiguration.

[0062] In summary, this invention can be widely applied in the field of high-energy particle detection technology. Attached Figure Description

[0063] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts. In the drawings:

[0064] Figure 1 This is a schematic diagram of a readout electronics circuit system provided in an embodiment of the present invention;

[0065] Figure 2 This is a timing diagram of a scientific data interface provided in an embodiment of the present invention;

[0066] Figure 3 This is a schematic diagram of an FPGA module structure provided in an embodiment of the present invention;

[0067] Figure 4 This is a schematic diagram of the FEE working mode provided in an embodiment of the present invention;

[0068] Figure 5 This is a schematic diagram of a high-voltage control process provided in an embodiment of the present invention;

[0069] Figure 6 This is a schematic diagram of a high-voltage protection mechanism provided in an embodiment of the present invention. Detailed Implementation

[0070] Exemplary embodiments of the invention will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the invention are shown in the drawings, it should be understood that the invention can be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of the invention and to fully convey the scope of the invention to those skilled in the art.

[0071] It should be understood that the terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “described” as used herein may also include the plural forms. The terms “comprising,” “including,” “containing,” and “having” are inclusive and therefore indicate the presence of the stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or combinations thereof. The method steps, processes, and operations described herein are not construed as requiring them to be performed in a particular order described or illustrated unless the order of performance is explicitly indicated. It should also be understood that additional or alternative steps may be used.

[0072] Although terms such as first, second, third, etc., may be used in this document to describe multiple elements, components, regions, layers, and / or segments, these elements, components, regions, layers, and / or segments should not be limited by these terms. These terms may be used only to distinguish one element, component, region, layer, or segment from another. Unless the context clearly indicates otherwise, terms such as "first," "second," and other numerical terms used herein do not imply order or sequence. Therefore, the first element, component, region, layer, or segment discussed below may be referred to as the second element, component, region, layer, or segment without departing from the teachings of the exemplary embodiments.

[0073] Currently, existing readout electronics circuit systems often face the following challenges: (1) Insufficient radiation resistance: High-energy particles in space can easily cause single-event effects on chips, leading to system failures; (2) Low efficiency of multi-channel signal processing: Traditional architectures are difficult to support parallel processing and low-noise transmission of hundreds of channels; (3) Poor maintainability: Hardware replacement is difficult in the space station environment, and the system needs to be highly modularized; (4) Insufficient high-voltage stability: Abnormal events such as high-voltage arcing of detectors lack rapid protection mechanisms. This invention provides a readout electronics circuit system for a through-radiation detector, comprising: four first connectors for receiving analog charge signals and digital temperature and pressure signals output from the through-radiation detector; four ESD protection circuits for providing ESD protection for the analog charge signals output from the corresponding first connectors and outputting them to the corresponding SAMPA chips; four SAMPA chips for performing low-noise amplification, signal shaping, analog-to-digital conversion, and high-speed data output processing on the input analog charge signals based on trigger signals to obtain digitized scientific data; a clock and reset circuit for providing a global clock signal and ensuring that the system can return to its initial state upon startup or when the current state needs to be cleared; an environmental monitoring module for monitoring the environmental parameter values ​​of the readout electronics circuit system; an FPGA module for receiving the digital temperature and pressure signals from the through-radiation detector, the environmental parameter values ​​of the readout electronics circuit system, and acquiring the status parameters of the FPGA module, packaging them, and sending them to the second connector; and for performing serial-to-parallel conversion, verification, synchronization packet filtering, packaging, and buffering on the digitized scientific data based on serial data instructions before sending it to the second connector; and receiving... The system includes: a first hardware interface for receiving serial data commands and trigger signals from the back-end aggregation electronics via a third connector; a second hardware interface for sending processed scientific data and clock signals to the back-end aggregation electronics via the third connector; a fourth connector for providing power to the high-voltage circuit of the trans-radiation detector based on the control commands of the FPGA module, controlling the high-voltage boost or buck of the high-voltage circuit, and monitoring the high-voltage, high-current, and temperature digital signals of the trans-radiation detector's high-voltage circuit; a power management module for converting the input voltage into several output voltages to meet the power supply requirements of each module within the readout electronics circuit system.The readout electronics system of this invention adopts a radiation-resistant SAMPA chip + FPGA architecture, which has the advantages of high integration, low noise, and low power consumption. It supports 768 channels of signal processing, which plays a crucial role in improving signal quality and accuracy. Through this efficient signal processing, it ensures that the signals collected from the through-radiation detector are accurately transmitted to the backend for further analysis, thereby supporting the energy calibration of high-energy particles and multi-band observation missions. In addition to its efficient data processing capabilities, this invention also has the advantage of modular design. This design not only improves the maintainability of the system but also greatly enhances the convenience of on-orbit maintenance and replacement. Through this design, astronauts can quickly install and remove the readout electronics system in the space station, ensuring the stability and reliability of the system during long-term operation. The modular design makes it easier and faster to replace the system when it fails or needs to be upgraded, greatly improving the maintenance efficiency and service life of the equipment. Therefore, the role of the readout electronics system in TRD is not only to provide the necessary signal processing functions, but its hardware and software design also directly affects the accuracy, efficiency, and maintainability of the entire detection system. This technological breakthrough has propelled the development of high-energy space detection technology and provided strong support for solving cutting-edge scientific questions such as the origin of cosmic rays and the search for dark matter.

[0074] Example 1

[0075] like Figure 1 As shown, this embodiment provides a readout electronics circuit system for a through-radiation detector, including four first connectors 1, four ESD protection circuits 2, four SAMPA chips 3 (an analog front-end chip), a clock and reset circuit 4, an environmental monitoring module 5, a second connector 6, an FPGA module 7, a JTAG interface 8, a first hardware interface 9, a third connector 10, a second hardware interface 11, a fourth connector 12, a fifth connector 13, and a power management module 14.

[0076] The first connector 1 is used to receive 128 analog charge signals and temperature and pressure digital signals output by the through-radiation detector, wherein each first connector 1 inputs 32 analog charge signals.

[0077] ESD (Electro-Static Discharge) protection circuit 2 provides ESD protection for the 32 analog charge signals output from the corresponding first connector 1 and outputs them to the corresponding SAMPA chip 3 to prevent electrostatic damage to the SAMPA chip 3, protect the MOSFET input terminal of the SAMPA, and maintain signal integrity.

[0078] SAMPA chip 3 is used to perform low-noise amplification, signal shaping, analog-to-digital conversion, and high-speed data output processing on the input 32-channel analog charge signals based on trigger signals, and transmits the processed digitized scientific data to FPGA module 7.

[0079] Clock and reset circuit 4 is used to provide a global clock signal and to ensure that the system can be restored to its initial state at startup or when the current state needs to be cleared.

[0080] The environmental monitoring module 5 is used to monitor the environmental parameter values ​​of the readout electronic circuit system, including the two temperatures of the readout electronic circuit system (the temperature of SAMPA chip 3 and the temperature of FPGA module 7) and the operating current of SAMPA chip 3.

[0081] The second connector 6 is used to transmit environmental parameter values ​​of the through-radiation detector and read out environmental parameter values ​​of the electronic circuit system, status parameters of the FPGA module 7, serial data commands, serial data command responses, scientific data of the through-radiation detector, clock signals and trigger signals, etc. Among them, the environmental parameter values ​​of the through-radiation detector include the temperature and pressure digital signals of the through-radiation detector and the high voltage, high voltage current and temperature of the high voltage circuit.

[0082] FPGA module 7 is used to receive digital signals of air temperature and pressure from the through-radiation detector, read environmental parameter values ​​of the electronic circuit system, and obtain status parameters of FPGA module 7. After packaging, the data is sent to the first hardware interface 9 through the second connector 6. Based on serial data instructions, the digitized scientific data is converted from serial to parallel, verified, filtered for synchronization packets, packaged, and buffered before being sent to the second hardware interface 11 through the second connector 6. It also receives digital signals of high voltage, high voltage current, and temperature from the high voltage circuit of the through-radiation detector and configures control instructions for the high voltage circuit of the through-radiation detector.

[0083] JTAG interface 8 is used for firmware download and online debugging of FPGA module 7.

[0084] The first hardware interface 9 is used to receive serial data commands and trigger signals sent by the back-end aggregation electronics through the third connector 10, and to send the packaged and processed temperature and pressure digital signals of the cross-radiation detector, the high voltage, high voltage current and temperature digital signals of the high voltage circuit, the environmental parameter values ​​of the electronic circuit system and the status parameters of the FPGA module 7 to the back-end aggregation electronics through the third connector 10.

[0085] The second hardware interface 11 is used to send the processed scientific data and clock signals to the back-end aggregation electronics via the third connector 10.

[0086] The fourth connector 12 is used for control commands based on the FPGA module 7 to provide power to the high-voltage circuit of the through-radiation detector, configure high voltage boost or buck, and monitor the high voltage, high voltage current and temperature digital signals of the high-voltage circuit of the through-radiation detector and send them to the FPGA module 7.

[0087] The power management module 14 is used to convert the voltage input to the fifth connector 13 into several output voltages to meet the power supply requirements of each module in the readout electronics circuit system and to provide power to each module in the readout electronics circuit system.

[0088] In a preferred embodiment, due to the structural constraints of the through-radiation detector, the board size of the readout electronics circuit system cannot exceed 215mm × 65mm. Therefore, the system is divided into two boards according to the system's function and signal flow. The signal and power transmission between the two boards are connected board-to-board using a second connector 6 (models such as RM312 and RM322 series). That is, the readout electronics circuit system includes a charge measurement board (Board A) and a power communication board (Board B). The charge measurement board is equipped with a first connector 1, an ESD protection circuit 2, a SAMPA chip 3, a clock and reset circuit 4, a second connector 6, an FPGA module 7, a JTAG interface 8, and a fourth connector 12. The power communication board is equipped with an environmental monitoring module 5, a first hardware interface 9, a third connector 10, a second hardware interface 11, a fifth connector 13, and a power management module 14.

[0089] In a preferred embodiment, the ESD protection circuit 2 is implemented using an aerospace-grade TVS diode, JANTXV1N5772 or SRV05-4S, which features low clamping voltage, low capacitance (<0.6 pF typical), low leakage current, and low response time (typically <1.0 ns). This circuit prevents sudden changes in the high voltage across the radiation detector (such as high-voltage arcing), which could cause high transient voltages to couple to the input of the SAMPA chip 3 through the radiation detector. Alternatively, static electricity may be introduced during transportation or commissioning, generating extremely high voltage and current upon contact with the FEE, potentially damaging the circuit components.

[0090] In a preferred embodiment, the selection of ASIC chips mainly considers mixed-signal SAMPA chips 3 that are radiation resistant, multi-channel, low noise, low power consumption, and have a large dynamic range.

[0091] In a preferred embodiment, the SAMPA chip 3 monolithically integrates 32 electronic channels, and the input and output differential pins are all based on the SLVS level standard, which has superior performance and strong anti-radiation performance.

[0092] In a preferred embodiment, the clock circuit 4 can be a radiation-resistant temperature-compensated crystal oscillator circuit with a frequency of 80MHz.

[0093] In a preferred embodiment, the reset circuit 5 can be implemented using an aerospace-grade Schmitt inverter SNJ54AHC14W as the RC reset circuit 5.

[0094] In a preferred embodiment, the environmental monitoring module 5 includes a temperature monitoring circuit, a current monitoring circuit, and an ADC module.

[0095] The temperature monitoring circuit is used to monitor the temperature of the SAMPA chip 3 through a thermistor, operational amplifier, and multi-channel low-power ADC.

[0096] The current monitoring circuit is used to monitor the operating current of the SAMPA chip 3 through sampling resistors, operational amplifiers, and multi-channel low-power ADCs.

[0097] The ADC module is used to convert the data monitored by the temperature monitoring circuit and the current monitoring circuit into analog and digital data when environmental parameters are polled, and then send the data to the FPGA module 7 through the second connector 6.

[0098] The air temperature and pressure inside the radiation detector, as well as the high voltage, high current, and temperature monitoring of the high-voltage circuit within the detector, are directly transmitted as digital quantities to FPGA module 7 for packet processing. Monitoring the current of SAMPA chip 3 is primarily used to detect whether single-event lockout has occurred. If the current reading abnormally increases, the SAMPA power supply needs to be automatically shut off; after a certain period, the lockout is released, and power is automatically restored. Monitoring high voltage and current mainly monitors the high-voltage operating status. If high-voltage arcing is detected, the high voltage will be automatically reduced. This automatic power-off and high-voltage reduction protection function can be enabled / disabled via ground-injected commands (initially enabled upon power-up).

[0099] In a preferred embodiment, FPGA module 7 can employ a FLASH-type FPGA chip, such as the MPF300T-1FCG484I, which is a high-performance, radiation-resistant FPGA with field-programmable characteristics. This FPGA chip integrates powerful and flexibly configurable programmable resources to implement various functions such as input / output interfaces, general-purpose digital logic, memory, digital signal processing, and clock management. It also provides abundant dedicated clock and routing resources, enabling the implementation of complex, high-speed logic circuits. Furthermore, this FPGA chip is compatible with the SLVS level standard and is fully compatible with the differential input / output pin levels of the SAMPA chip 3, allowing for direct interconnection. Compared to other FPGA chips, it does not require level conversion, saving hardware resources while reducing power consumption and improving reliability. Another advantage is that it provides low-voltage signals based on SLVS transmission, reducing power consumption and increasing signal transmission speed.

[0100] In a preferred embodiment, the first hardware interface 9 can be an RS-422 hardware interface, the trigger signal adopts simplex mode, dual-channel hot standby, and the transmitted trigger signal is a low-level active pulse signal; the serial data command, telemetry parameters, and FPGA status parameters are sent in master-slave half-duplex mode, with dual-channel hot standby; both simplex mode and master-slave half-duplex mode adopt the UART protocol with a baud rate of 115200bps.

[0101] In a preferred embodiment, the second hardware interface 11 can be an LVDS hardware interface, employing a dual-channel hot standby mode, with the scientific data interface timing as follows: Figure 2 As shown. Data is transmitted on the falling edge of the driver's clock and received on the rising edge of the receiver's clock. Bytes are used as the basic unit of data transmission, with the most significant bit (MSB) first. The data or clock line is high when idle and returns to high after data transmission is complete. The transmission clock frequency is 80 MHz (clock signal duty cycle 50% ± 5%), and the falling edge of the transmitting chip's clock and the data offset are less than 10% of the (+ / -) clock cycle.

[0102] In a preferred embodiment, the power management module 14 includes a DC-DC converter and nine low-dropout linear regulators (LDOs). The DC-DC converter can be an aerospace-grade, low-noise, high-output-current device, such as the RSHF4644ARH, capable of converting the input voltage into four output voltages to supply the FPGA module 7 or the LDOs to meet the power supply requirements of various circuit components. The output voltage of the DC-DC converter is regulated by the next-stage LDO to ensure that each circuit receives an appropriate and low-noise voltage. The nine LDOs supply power to the four SAMPA chips 3, operational amplifiers, ADCs, and other chips on the readout electronics circuitry system. To ensure that the power supply starts up in a predetermined sequence during power-up and to avoid system instability, a precise power management strategy is introduced. Specifically, the PG pin of the DC-DC converter is connected to the enable (EN) pin of the next-stage DC-DC converter or LDO. When the PG pin outputs a valid signal, the enable pin of the next-stage power module is activated, thereby controlling the startup sequence of the power modules. Through a carefully designed power management scheme, the system can achieve an accurate and stable voltage supply during startup, while ensuring that all parts of the system can be correctly activated in the expected sequence.

[0103] In a preferred embodiment, the FPGA module 7 includes a reset management module, a scientific data processing module, an instruction and status processing module, a trigger management module, a SAMPA control module, a SAMPA self-power-off protection module, and a high-voltage control module.

[0104] The reset management module is used to control the global reset of each module in the readout electronics circuit system.

[0105] The scientific data processing module is used to perform serial-to-parallel conversion, verification, synchronization packet filtering, caching, and packaging of the digitized scientific data obtained from the SAMPA chip, and then transmit it to the second connector through the scientific data transmission interface.

[0106] The instruction and status processing module is used to receive serial data instructions sent by the back-end aggregation electronics through the third connector 10, the first hardware interface 9, and the second connector 6 via the serial instruction and status interface, and to parse, verify, and configure them. It configures the operation of each module of the readout electronics circuit system through the serial data instructions, and configures telemetry instructions to obtain various environmental monitoring parameters, etc. It receives environmental parameter values ​​from the through-radiation detector and the readout electronics circuit system, and obtains the status parameters of the FPGA module 7, and transmits them to the back-end aggregation electronics through the RS422 listening interface after packaging. It also responds to the instruction reception status (if an error occurs, the error count is incremented by 1 and the error reason is given). The status parameters of FPGA module 7 include the normal or abnormal status flag bits of each module or hardware circuit input within FPGA module 7, the environmental parameter values ​​of the through-radiation detector, and the environmental parameter values ​​of the readout electronic circuit system, including the operating current of the two SAMPA chips 3, the temperature of one SAMPA chip 3, the temperature of one FPGA module 7, the air temperature and air pressure digital signals of one through-radiation detector, and the four high voltages, four high currents, and one high temperature of the high voltage circuit of the through-radiation detector. (Because each pair of SAMPA chips 3 shares a power supply, only the operating current of the two SAMPA chips 3 is monitored, and only one of the SAMPA chips 3's temperature is monitored; because there are four high voltage modules on the high voltage circuit of the through-radiation detector, the output voltage and output current of the four high voltage modules must be monitored. The four high voltage modules have a total of four high voltage currents and four high voltages, so only one temperature of the high voltage circuit needs to be monitored.)

[0107] The trigger management module is used to receive trigger signals sent by the back-end aggregation electronics through the third connector 10, the first hardware interface 9 and the second connector 6 via the external trigger input interface, and to determine whether the trigger signal is valid, so as to control the SAMPA chip 3 to start acquiring signals.

[0108] The SAMPA control module provides the necessary clock signals, trigger signals, and function configurations for the SAMPA chip 3. When switching detection functions, it needs to write to the internal control register of the SAMPA chip 3. First, it parses the relevant instructions configured by the SAMPA chip 3, and then sends the parameters to the SAMPA control module. The parameters are then transmitted to the SAMPA chip 3 via the I2C protocol. It is mainly responsible for configuring the time window, threshold, synchronization packet filtering, and trigger delay of the SAMPA chip 3.

[0109] The SAMPA self-power-off protection module is used to provide self-power-off protection for the SAMPA chip 3 based on its supply current. To prevent abnormal current increases in the SAMPA chip 3 due to single-event latch-up, real-time monitoring and power-off protection of the supply current are required. The system monitors the supply current of the SAMPA chip 3 through the environmental monitoring module 5 and compares the monitored supply current with the set power-off threshold. If the supply current of the SAMPA chip 3 exceeds the power-off threshold three times consecutively, it is considered that the SAMPA chip 3 may be experiencing single-event latch-up. To eliminate the impact of this abnormality on the lifespan of the SAMPA chip 3, a power-off enable signal is output to the power management module 14, disconnecting all power to the SAMPA chip 3. After waiting for approximately 100ms, the power-off enable signal is deactivated, allowing the SAMPA chip 3 to automatically power on.

[0110] The high-voltage control module is used to control the high-voltage boost or buck of the high-voltage module on the high-voltage circuit of the through-radiation detector based on the high-voltage voltage, high-voltage current and temperature of the high-voltage circuit, as well as the preset safe voltage value and maximum output current value.

[0111] Specifically, the scientific data processing module includes a serial-to-parallel conversion and scientific data verification unit, a scientific data caching unit (FIFO unit), and a scientific data packaging and sending unit.

[0112] The serial-to-parallel conversion and scientific data verification unit is used to perform serial-to-parallel conversion, verification, and synchronization packet filtering on the digitized scientific data obtained from the SAMPA chip 3.

[0113] The scientific data caching unit is used to cache scientific data after serial-to-parallel conversion, verification, and synchronization packet filtering.

[0114] The scientific data packaging and transmission unit is used to package the cached scientific data and then transmit it to the second connector through the scientific data transmission interface.

[0115] Specifically, the instruction and status processing module includes two RS422 listening interfaces, an RS422 instruction channel switching control unit, a command parsing and response unit, a system status management and FPGA status acquisition unit, and an environmental parameter acquisition unit.

[0116] The RS422 command channel switching control unit is used to select the RS422 listening interface to be used and adopts the UART protocol specification. It receives serial data commands sent through the selected RS422 listening interface via serial commands and status interfaces, reads the environmental parameter values ​​of the radiation detector and the environmental parameter values ​​of the electronic circuit system, as well as the status parameters of FPGA module 7, and has the highest priority.

[0117] The command parsing and response unit is used to receive serial data commands issued via the selected RS422 listening interface through the serial command and status interface, using the UART protocol specification, and to provide a response indicating whether the serial data command was received correctly.

[0118] The system status management and FPGA status acquisition unit is used to package the environmental parameter values ​​of the through-radiation detector, the environmental parameter values ​​of the readout electronics circuit system, and the status parameters of FPGA module 7.

[0119] The environmental parameter acquisition unit is used to control the ADC module in the environmental monitoring module 5 to digitize the environmental parameters of the readout electronic circuit system.

[0120] Specifically, the high-voltage circuit of the through-radiation detector has four high-voltage modules. A high-voltage control module configures the maximum output current and high-voltage output values ​​of these modules. The first and second high-voltage modules are always on, while the third and fourth are selected as primary / backup modules. Several DAC (Digital-to-Analog Converter) chips on the high-voltage circuit are controlled via an SPI bus. The analog voltage signal output by the DAC chips is proportional to the voltage and maximum output current of the high-voltage modules. GPIO (General Purpose Input / Output Interface) controls the cold standby switching of the third and fourth high-voltage modules. In configuration mode, the high-voltage modules are controlled, performing voltage boosting and bucking. When the operating voltage and output current of a high-voltage module are abnormal, it is considered that arcing or other abnormalities have occurred, and the high-voltage control module automatically bucks the high-voltage module to a safe voltage value.

[0121] In a preferred embodiment, the high-voltage circuit of the through-radiation detector requires a high voltage during its on-orbit operation. When a detector unit discharges or enters the SAA (South Atlantic Anomaly Area) region, high-voltage protection logic is activated, requiring the high voltage to be reduced to a safe range. The high-voltage control module within FPGA module 7 controls several DAC chips on the high-voltage circuit of the through-radiation detector to output the desired analog voltage, thereby setting the desired high-voltage output of the high-voltage module. The high-voltage control module within FPGA module 7 reads back the high-voltage voltage and current output by the high-voltage module through the ADC on the high-voltage circuit of the through-radiation detector. Figure 5 and Figure 6 As shown, the specific control process of the high-voltage control module is as follows:

[0122] Based on the monitored high voltage, the speed of the high voltage rise and fall process of the high voltage module is controlled. Specifically, when the high voltage rises, a safe voltage is set. When the monitored high voltage is below the safe voltage, the risk is low, and the voltage rises at a rate of 100V / s. When the monitored high voltage exceeds the safe voltage, the voltage output rise rate is reduced to 20V / s. When the high voltage falls, it falls at a rate of 200V / s.

[0123] Based on the maximum output current value, the speed of the high voltage drop process of the high voltage module is controlled. Specifically, since the high voltage current has no rise or fall process, the maximum output current value is set, for example, 100 microamps. The high voltage and high voltage current of the high voltage circuit are continuously monitored. When the high voltage is unstable with large fluctuations or the high voltage current value increases significantly (e.g., 5 microamps), it is considered a slight discharge; when the high voltage current value increases significantly (e.g., tens of microamps), it is considered a severe discharge, and the high voltage drop of the high voltage module is controlled.

[0124] The high-voltage protection mechanism of the high-voltage control module is as follows:

[0125] The high-voltage control module continuously monitors the high-voltage voltage and current of the high-voltage circuit. It identifies minor and severe discharges based on the characteristics of the output signal and takes corresponding measures to terminate the discharge process. Upon detecting a severe discharge, the high voltage is directly shut off. Upon detecting a minor discharge and accumulating a certain discharge time, the high-voltage protection mechanism is triggered, reducing the high voltage to a safe level at a certain rate and maintaining this level for a period of time. After the high-voltage protection ends, the high voltage is then increased back to the set value. If discharge continues at the safe voltage level, the high voltage is further shut off. A limit is set for the number of high-voltage protection cycles (e.g., 3 times); exceeding this limit after multiple protection cycles will result in the high voltage being shut off directly.

[0126] In a preferred embodiment, the readout electronics system of the through-radiation detector of the present invention operates in the following modes during orbit: calibration mode, survey mode, baseline mode, and SAA operating mode. The operating modes are as follows: Figure 4 As shown, (1) Calibration mode: receive the trigger signal sent by the HERD trigger system to collect data and group the event according to the trigger number; (2) Survey mode: collect data independently, store the event data separately, and download it separately; (3) Baseline mode: collect, store and download data in a unified manner according to the trigger signal sent by the HERD trigger system; (4) SAA mode: reduce the high voltage of the through radiation detector in areas with high space particle flow intensity such as SAA area, and the readout electronics circuit system does not collect data.

[0127] Example 2

[0128] This embodiment provides a method for the coordinated operation of a readout electronics circuit system of a through-radiation detector, including the following steps:

[0129] 1) The first hardware interface 9 receives serial data commands and trigger signals sent by the back-end aggregation electronics through the third connector 10.

[0130] 2) The first connector 1 receives 128 analog charge signals and digital temperature and pressure signals output by the through-radiation detector.

[0131] 3) The ESD protection circuit 2 provides ESD protection for the 32 analog charge signals output from the corresponding first connector 1 and outputs them to the corresponding SAMPA chip 3.

[0132] 4) Based on the trigger signal, the SAMPA chip 3 performs low-noise amplification, signal shaping, analog-to-digital conversion and high-speed data output processing on the input 32-channel analog charge signals, and transmits the processed digitized scientific data to the FPGA module 7.

[0133] 5) The environmental monitoring module 5 monitors and reads the environmental parameter values ​​of the electronic circuit system, including the two temperatures of the electronic circuit system (the temperature of SAMPA chip 3 and the temperature of FPGA module 7) and the operating current of SAMPA chip 3.

[0134] 6) The fourth connector 12 monitors the high voltage, high voltage current and temperature digital signals of the high voltage circuit of the through-radiation detector and sends them to the FPGA module 7.

[0135] 7) FPGA module 7 receives the temperature and pressure digital signals from the through-radiation detector, reads the environmental parameter values ​​of the electronic circuit system, and obtains the status parameters of FPGA module 7. After packaging, it sends the data to the first hardware interface 9 through the second connector 6. Based on serial data instructions, it performs serial-to-parallel conversion, verification, synchronization packet filtering, packaging, and buffering of the digitized scientific data and sends it to the second hardware interface 11 through the second connector 6. It also receives the high voltage, high voltage current, and temperature digital signals from the high voltage circuit of the through-radiation detector and configures the control instructions for the high voltage circuit of the through-radiation detector.

[0136] 8) The first hardware interface 9 sends the packaged digital signals of temperature and pressure of the trans-radiation detector, the digital signals of high voltage, high voltage current and temperature of the high voltage circuit of the trans-radiation detector, the environmental parameter values ​​of the electronic circuit system and the status parameters of the FPGA module 7 to the back-end aggregation electronics through the third connector 10. The second hardware interface 11 sends the processed scientific data and clock signal to the back-end aggregation electronics through the third connector 10.

[0137] 9) The fourth connector is used for control commands based on FPGA module 7 to provide power to the high-voltage circuit of the through-radiation detector, configure high voltage boost or buck, and monitor the high voltage, high voltage current and temperature digital signals of the high-voltage circuit of the through-radiation detector.

[0138] 10) The power management module 14 converts the voltage input to the fifth connector 13 into several output voltages to meet the power supply requirements of each module in the readout electronics circuit system and to provide power to each module in the readout electronics circuit system.

[0139] Example 3

[0140] This embodiment provides a processing device corresponding to the cooperative working method of the readout electronics circuit system of the through-radiation detector provided in Embodiment 2. The processing device can be applied to client processing devices, such as mobile phones, laptops, tablets, desktop computers, etc., to execute the method of Embodiment 2.

[0141] The processing device includes a processor, a memory, a communication interface, and a bus. The processor, memory, and communication interface are connected via the bus to enable communication between them. The memory stores a computer program that can run on the processing device. When the processing device runs the computer program, it executes the cooperative operation method of the readout electronics circuit system of the through-radiation detector provided in Embodiment 2.

[0142] In some implementations, the memory may be high-speed random access memory (RAM), and may also include non-volatile memory, such as at least one disk storage device.

[0143] In other implementations, the processor can be any type of general-purpose processor, such as a central processing unit (CPU) or a digital signal processor (DSP), and there is no limitation here.

[0144] Furthermore, the logical instructions in the aforementioned memory can be implemented as software functional units and sold or used as independent products, and can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0145] Those skilled in the art will understand that the structure of the above-described computing device is only a partial structure related to the present invention and does not constitute a limitation on the computing device to which the present invention is applied. A specific computing device may include more or fewer components, or combine certain components, or have different component arrangements.

[0146] Example 4

[0147] This embodiment provides a computer program product corresponding to the cooperative operation method of the readout electronics circuit system of the through-radiation detector provided in Embodiment 2. The computer program product may include a computer-readable storage medium on which computer-readable program instructions for executing the cooperative operation method of the readout electronics circuit system of the through-radiation detector described in Embodiment 2 are loaded.

[0148] A computer-readable storage medium can be a tangible device that holds and stores instructions for use by an instruction execution device. A computer-readable storage medium can be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any combination thereof.

[0149] The computer-readable storage medium provided in the above embodiments has a similar implementation principle and technical effect to the above method embodiments, and will not be described again here.

[0150] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0151] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0152] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0153] The above embodiments are only used to illustrate the present invention. The structure, connection method and manufacturing process of each component can be varied. All equivalent transformations and improvements made on the basis of the technical solution of the present invention should not be excluded from the protection scope of the present invention.

Claims

1. A readout electronics circuit system for a through-radiation detector, characterized in that, include: Four primary connectors are used to receive analog charge signals and digital temperature and pressure signals output by the through-radiation detector; Four ESD protection circuits are used to provide ESD protection for the analog charge signal output from the corresponding first connector and output it to the corresponding SAMPA chip. The four SAMPA chips are used to perform low-noise amplification, signal shaping, analog-to-digital conversion, and high-speed data output processing on the input analog charge signal based on the trigger signal to obtain digitized scientific data. A clock and reset circuit is used to provide a global clock signal and to ensure that the system can be restored to its initial state at startup or when the current state needs to be cleared. An environmental monitoring module is used to monitor the environmental parameter values ​​of the readout electronic circuit system; An FPGA module is used to receive digital signals of air temperature and pressure from the through-radiation detector, read environmental parameter values ​​of the electronic circuit system, and obtain the status parameters of the FPGA module, package them, and send them to the second connector; based on serial data instructions, it performs serial-to-parallel conversion, verification, synchronization packet filtering, packaging, and buffering of digitized scientific data before sending it to the second connector; and it receives digital signals of high voltage, high voltage current, and temperature from the high voltage circuit of the through-radiation detector, and configures control instructions for the high voltage circuit of the through-radiation detector. A first hardware interface is used to receive serial data commands and trigger signals sent by the back-end aggregation electronics through a third connector, as well as to send the packaged digital signals of temperature and pressure of the trans-radiation detector, the digital signals of high voltage, high voltage current and temperature of the high voltage circuit, the environmental parameter values ​​of the electronic circuit system and the status parameters of the FPGA module to the back-end aggregation electronics through the third connector. A second hardware interface is provided for transmitting processed scientific data and clock signals to the back-end aggregation electronics via the third connector; A fourth connector is used to provide power to the high-voltage circuit of the through-radiation detector based on the control commands of the FPGA module, and to control the high-voltage boost or buck of the high-voltage circuit of the through-radiation detector. And digital signals of high voltage, high voltage current and temperature of the high voltage circuit of the through-radiation detector; A power management module is used to convert the input voltage into several output voltages to meet the power supply requirements of each module in the readout electronics circuit system and to provide power to each module in the readout electronics circuit system.

2. The readout electronics circuit system of a through-radiation detector as described in claim 1, characterized in that, The readout electronics circuit system includes a charge measurement board and a power communication board. The charge measurement board is provided with a first connector, an ESD protection circuit, a SAMPA chip, a clock circuit, a reset circuit, a second connector, an FPGA module, and a fourth connector. The power communication board is provided with an environmental monitoring module, a third connector, a first hardware interface, a second hardware interface, a fifth connector, and a power management module.

3. The readout electronics circuit system of a through-radiation detector as described in claim 1, characterized in that, The environmental monitoring module includes: A temperature monitoring circuit is used to monitor the temperature of the SAMPA chip; A current monitoring circuit is used to monitor the operating current of the SAMPA chip; The ADC module is used to perform analog-to-digital conversion on the data monitored by the temperature monitoring circuit and the current monitoring circuit when environmental parameters are polled, and then send the data to the FPGA module through the second connector.

4. The readout electronics circuit system of a through-radiation detector as described in claim 3, characterized in that, The FPGA module is equipped with: The reset management module is used to control the global reset of each module in the readout electronics circuit system; The scientific data processing module is used to perform serial-to-parallel conversion, verification, synchronization packet filtering, caching, and packaging of the digitized scientific data obtained from the SAMPA chip before transmitting it to the second connector. The instruction and status processing module is used to receive serial data instructions sent by the back-end aggregation electronics, and to parse, verify, and configure them. It configures the operation of each module of the readout electronics circuit system through the serial data instructions; receives the environmental parameter values ​​of the through-radiation detector and the environmental parameter values ​​of the readout electronics circuit system, and obtains the status parameters of the FPGA module, and transmits them to the back-end aggregation electronics after packaging; and responds to the instruction reception status. The trigger management module is used to receive trigger signals sent by the backend aggregation electronics and determine whether the trigger signals are valid, so as to control the SAMPA chip to start acquiring signals. The SAMPA control module is used to provide the SAMPA chip with the required clock signals, trigger signals, and function configurations. The SAMPA self-power-off protection module is used to perform self-power-off protection on the SAMPA chip based on the power supply current of the SAMPA chip. The high-voltage control module is used to control the high-voltage boost or buck of the high-voltage module on the high-voltage circuit of the through-radiation detector based on the high-voltage voltage, high-voltage current and temperature of the high-voltage circuit, as well as the preset safe voltage value and maximum output current value.

5. The readout electronics circuit system of a through-radiation detector as described in claim 4, characterized in that, The scientific data processing module includes: The serial-to-parallel conversion and scientific data verification unit is used to perform serial-to-parallel conversion, verification, and synchronization packet filtering on the digitized scientific data obtained from the SAMPA chip. The scientific data caching unit is used to cache scientific data after serial-to-parallel conversion, verification, and synchronization packet filtering. The scientific data packaging and transmission unit is used to package and transmit the cached scientific data to the second connector.

6. The readout electronics circuit system of a through-radiation detector as described in claim 4, characterized in that, The instruction and status processing module includes: The RS422 command channel switching control unit is used to select the RS422 listening interface to be used. The command parsing and response unit is used to receive serial data commands sent through the selected RS422 listening interface and to provide a response indicating whether the serial data command was received correctly. The system status management and FPGA status acquisition unit is used to package the environmental parameter values ​​of the through-radiation detector, the environmental parameter values ​​of the readout electronic circuit system, and the status parameters of the FPGA module. An environmental parameter acquisition unit is used to control the ADC module to digitize the environmental parameter values ​​of the readout electronic circuit system.

7. The readout electronics circuit system of a through-radiation detector as described in claim 1, characterized in that, The power management module includes a DC-DC converter and several low-dropout linear regulators; The DC-DC converter is used to convert the input voltage into several output voltages, which are then supplied to the FPGA module or the low-dropout linear regulator. The nine low-dropout linear regulators provide power to the chips on the readout electronics circuitry system.

8. A method for the coordinated operation of a readout electronics circuit system for a through-radiation detector, characterized in that, include: Receive serial data commands and trigger signals sent by the back-end aggregation electronics; It receives analog charge signals and digital signals of temperature and pressure output from the through-radiation detector; Provides ESD protection for the corresponding analog charge signal; The analog charge signal after ESD protection is amplified with low noise, shaped, converted from analog to digital and processed with high-speed data output to obtain digitized scientific data. Monitor the temperature of the SAMPA chip, the temperature of the FPGA module, and the operating current of the SAMPA chip; Digital signals of high voltage, high voltage current and temperature in the high voltage circuit of the radiation detector are monitored. The status parameters of the FPGA module are obtained, and the digital signals of air temperature and pressure of the radiation detector, the digital signals of high voltage, high voltage current and temperature of the high voltage circuit of the radiation detector, the environmental parameter values ​​of the electronic circuit system and the status parameters of the FPGA module are packaged and processed. Based on serial data instructions, the system performs serial-to-parallel conversion, verification, synchronization packet filtering, packaging, and caching of digitized scientific data. It also receives digital signals of high voltage, high current and temperature from the high voltage circuit of the through-radiation detector, and configures control commands for the high voltage circuit of the through-radiation detector. The packaged digital signals of air temperature and pressure from the trans-radiation detector, the digital signals of high voltage, high voltage current and temperature from the high voltage circuit of the trans-radiation detector, the environmental parameter values ​​of the electronic circuit system and the status parameters of the FPGA module, as well as the processed scientific data and clock signals are sent to the back-end aggregation electronics. Based on control commands, power is supplied to the high-voltage circuit of the through-radiation detector, and the high-voltage boost or buck is configured. Power is supplied to the various modules of the readout electronic circuit system.

9. A processing device, characterized in that, It includes computer program instructions, wherein when executed by a processing device, the computer program instructions are used to implement the steps corresponding to the cooperative operation method of the readout electronics circuit system of the through-radiation detector as described in claim 8.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer program instructions, which, when executed by a processor, are used to implement the steps corresponding to the cooperative operation method of the readout electronics circuit system of the through-radiation detector as described in claim 8.

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