Computer system, resource sharing method, device and equipment, medium and product

Abstract

The present application discloses a computer system, resource sharing method, apparatus and equipment, medium and product, relating to the field of computer technology. The system includes multiple hosts and a resource management processor. The hosts are connected to multiple accelerator cards via switches. The resource management processor is connected to multiple switches, and the multiple switches are interconnected. The switches generate first local configuration information describing the identification information and connection port information of the local accelerator cards. The hosts generate second local configuration information describing the identification information and local resource allocation information of each accelerator card. The resource management processor generates global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host. Each host accesses its own or other hosts' accelerator cards based on the global configuration information, and each host's local accelerator card accesses the accelerator cards of other hosts based on the global configuration information. The present application improves the efficiency and reliability of multi-host computing resource sharing.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a computer system, resource sharing method, device and equipment, medium and product. Background Art

[0002] Related technologies typically rely on a non-transparent bridge (NTB) solution to enable multi-host computing resource sharing through switches. This solution is complex, inefficient, and difficult to scale to multiple switches. Furthermore, communication between different accelerator cards in this solution must be forwarded via upstream ports, further reducing communication efficiency.

[0003] Therefore, how to achieve efficient sharing of computing resources among multiple hosts is a technical problem that needs to be solved by those skilled in the art. Summary of the Invention

[0004] The present application provides a computer system, resource sharing method, apparatus and equipment, medium and product, which improve the efficiency and reliability of multi-host computing resource sharing.

[0005] The present application provides a computer system including multiple hosts and a resource management processor, wherein the hosts are connected to multiple accelerator cards via switches, the resource management processor is connected to multiple switches, and the multiple switches are interconnected;

[0006] The switch generates first local configuration information; wherein the first local configuration information is used to describe identification information and connection port information of the local accelerator card;

[0007] The host generates second local configuration information; wherein the second local configuration information is used to describe identification information and local resource allocation information of each accelerator card;

[0008] The resource management processor generates global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host, and returns the global configuration information to each switch;

[0009] Each host accesses its own or other hosts' accelerator cards based on the global configuration information, or the local accelerator card of each host accesses the accelerator cards of other hosts based on the global configuration information.

[0010] The present application provides a computing resource sharing method, applied to a switch in a computer system, the method comprising:

[0011] Generate first local configuration information; wherein the first local configuration information is used to describe the identification information and connection port information of the local accelerator card;

[0012] receiving global configuration information sent by the resource management processor; wherein the resource management processor generates the global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host;

[0013] Write global configuration information into the configuration space so that the host can access its own or other hosts' accelerator cards based on the global configuration information.

[0014] The present application provides a computing resource sharing method, which is applied to a host in a global communication module of a computer system, and the method includes:

[0015] Generate second local configuration information; wherein the second local configuration information is used to describe identification information and local resource allocation information of each accelerator card;

[0016] Access the acceleration card of itself or other hosts based on global configuration information; wherein, the resource management processor generates global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host, and returns the global configuration information to each switch.

[0017] The present application provides a computing resource sharing method, which is applied to a resource management processor in a global communication module of a computer system. The method includes:

[0018] Obtaining first local configuration information generated by each switch and second local configuration information generated by each host; wherein the first local configuration information is used to describe the identification information and connection port information of the local accelerator card, and the second local configuration information is used to describe the identification information and local resource allocation information of each accelerator card;

[0019] Based on the first local configuration information generated by each switch and the second local configuration information generated by each host, global configuration information is generated, and the global configuration information is returned to each switch.

[0020] The present application also provides a computing resource sharing device, which is applied to a switch in a computer system, and includes:

[0021] A first generating module is configured to generate first local configuration information; wherein the first local configuration information is used to describe identification information and connection port information of the local accelerator card;

[0022] A receiving module, configured to receive global configuration information sent by a resource management processor; wherein the resource management processor generates global configuration information based on first local configuration information generated by each switch and second local configuration information generated by each host;

[0023] The write module is used to write global configuration information into the configuration space so that the host can access its own or other hosts' accelerator cards based on the global configuration information.

[0024] The present application also provides a computing resource sharing device, which is applied to a host in a global communication module of a computer system, and the device includes:

[0025] A second generating module is used to generate second local configuration information; wherein the second local configuration information is used to describe the identification information and local resource allocation information of each accelerator card;

[0026] An access module is used to access the acceleration card of itself or other hosts based on global configuration information; wherein, the resource management processor generates global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host, and returns the global configuration information to each switch.

[0027] The present application also provides a computing resource sharing device, which is applied to a resource management processor in a global communication module in a computer system. The device includes:

[0028] An acquisition module is configured to acquire first local configuration information generated by each switch and second local configuration information generated by each host; wherein the first local configuration information is used to describe the identification information and connection port information of the local accelerator card, and the second local configuration information is used to describe the identification information and local resource allocation information of each accelerator card;

[0029] The third generating module is configured to generate global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host, and return the global configuration information to each switch.

[0030] The present application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any of the above-mentioned computing resource sharing methods when executing the computer program.

[0031] The present application also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned computing resource sharing methods are implemented.

[0032] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above-mentioned computing resource sharing methods when executed by a processor.

[0033] The computer system provided by this application realizes the topological interconnection of multiple hosts in an in-band manner, integrates the configuration information of each switch and host through the resource management processor, and realizes efficient management and scheduling of global resources. Based on the global configuration information, each host can directly access its own or other hosts' accelerator cards, avoiding the cumbersome process of communication between different accelerator cards that requires forwarding through upstream ports, thereby significantly improving communication efficiency and realizing efficient sharing of computing resources among multiple hosts. This application also discloses a computing resource sharing method, device, electronic device, computer-readable storage medium, and computer program product, which can also achieve the above-mentioned technical effects.

[0034] It should be understood that the foregoing general description and the following detailed description are merely illustrative and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0036] Figure 1 is a structural diagram of a computer system according to an exemplary embodiment;

[0037] Figure 2 is a schematic diagram showing the relationship between hardware and software layers in a computer system according to an exemplary embodiment;

[0038] Figure 3 This is a structural diagram of a computer system with four hosts and sixteen accelerator cards according to an exemplary embodiment;

[0039] Figure 4 A flowchart of an application embodiment provided by this application;

[0040] Figure 5 is a flow chart showing a method for sharing computing resources according to an exemplary embodiment;

[0041] Figure 6 is a flow chart showing another computing resource sharing method according to an exemplary embodiment;

[0042] Figure 7 is a flowchart of another computing resource sharing method according to an exemplary embodiment;

[0043] Figure 8 is a structural diagram of a computing resource sharing device according to an exemplary embodiment;

[0044] Figure 9 is a structural diagram of another computing resource sharing device according to an exemplary embodiment;

[0045] Figure 10 is a structural diagram of another computing resource sharing device according to an exemplary embodiment;

[0046] Figure 11 The figure is a structural diagram of an electronic device according to an exemplary embodiment. DETAILED DESCRIPTION

[0047] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0048] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0049] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0050] In a PCIe (Peripheral Component Interconnect Express) interconnect system, PCIe NTB technology is often used to implement communication between multiple hosts. The details are as follows:

[0051] 1. The two hosts are connected to the PCIe Switch chip respectively. The two PCIe Switch chips are connected through a crosslink line. The connection port of the PCIe Switch chip is set to NTB mode. The two GPUs (Graphics Processing Units) are interconnected and communicated through the NTB.

[0052] 2. Integrate GPU heterogeneous communication software in the two hosts.

[0053] 3. Hosts are interconnected through PCIe NT Crosslink (PCIe non-transparent crosslink), using the NTB mechanism to achieve cross-host memory access, and then using the DMA (Direct Memory Access) inside the PCIe Switch chip to move data.

[0054] 4. By opening a window in the NTB, the remote node address space is mapped to the local address space through the NTB, thereby opening up the access path between the two GPUs.

[0055] 5. The two GPUs are the local GPU and the remote GPU, and the two hosts are the local host and the remote host. The remote GPU BAR (Base Address Register) space is windowed in the local NTB. The local GPU initiates access to the remote GPU BAR space through DMA, thereby realizing P2P (peer-to-peer) transmission.

[0056] In this technical solution, PCIe NTB technology is implemented through a virtual switch. The address domains at both ends are completely isolated, and address mapping relies on the complex logic of the NTB controller. Cross-domain address mapping and interrupt mechanisms introduce additional latency and hardware overhead. NTB technology only supports two levels of switch interconnection, which is significantly limited when interacting with more than two host nodes. The resulting multi-host node system topology also has poor scalability. In cross-host domain expansion GPU card systems using PCIe NTB technology, a management solution cannot be embedded in the control logic, resulting in a lack of global resource monitoring and management. This also leads to inflexible resource scheduling within the system, weak fault handling capabilities, and poor runtime stability.

[0057] Therefore, in this application, the resource management processor and the host use the configuration space of the northbound interface of the switch to transmit and maintain global configuration information to fully utilize hardware resources. Without the need for an additional in-band management network, the monitoring, management, and scheduling updates of interface device resources can be achieved at the software level, reducing the cost of system construction and maintenance. At the same time, combined with the fully interconnected topology of the switch, cross-host domain access to the accelerator card can be achieved, and then the redeployment of interface device resources and flexible scheduling of global computing resources can be achieved at the software level, thereby improving resource utilization. In addition, a more efficient, lower latency, flexible and scalable management and monitoring solution is provided for multi-host computer systems, thereby improving the communication efficiency and stability of the entire system.

[0058] This embodiment provides a computer system, such as Figure 1As shown, it includes multiple hosts 10 and resource management processors 20, the hosts 10 are connected to multiple accelerator cards 40 through switches 30, the resource management processors 20 are connected to multiple switches 30, and the multiple switches 30 are connected to each other;

[0059] In a specific implementation, each host 10 is directly connected to a switch 30, which in turn is connected to multiple accelerator cards 40. An accelerator card 40 connected to a host 10 via a switch 30 is called the local accelerator card of that host 10. In other words, a host 10, a switch 30, and multiple accelerator cards 40 constitute a computing node. All switches 30 are interconnected, and a resource management processor 20 is connected to each switch 30. Each switch 30 can connect to the resource management processor 20 via a UART (Universal Asynchronous Receiver / Transmitter). The switch 30 can be a PCIe switch, connecting the host 10 and the accelerator card 40 via a PCIe bus. The accelerator card can be a GPU, and the resource management processor 20 can be an mCPU (microprocessor / management unit).

[0060] The relationship between the hardware and software levels in a computer system is shown in the following diagram: Figure 2 As shown in the figure, at the firmware / software level, the compute node pool includes the operating system (OS) client in the host, the switching pool includes the switch firmware and resource management processor, and the resource pool includes the accelerator card northbound interface configuration space. The OS client connects to the resource management processor through the switch firmware, and the switch firmware connects to the accelerator card northbound interface configuration space. The OS client connects to the accelerator card northbound interface configuration space. At the hardware level, the compute node pool includes multiple hosts, the switching pool includes multiple switches and the resource management processor, and the resource pool includes multiple riser cards. Each riser card is connected to multiple accelerator cards. Switches connect to corresponding hosts via northbound interfaces. Multiple switches are connected to the resource management processor, and multiple switches are connected to each other.

[0061] A computer system with 4 hosts and 16 accelerator cards Figure 3 As shown in the figure, there are four hosts, each host is connected to the corresponding switch, each switch is connected to four accelerator cards and a network interface card (NIC), multiple switches are interconnected through ports, and resource management processors are connected to multiple switches.

[0062] The switch 30 generates first local configuration information, wherein the first local configuration information is used to describe the identification information and connection port information of the local accelerator card;

[0063] The host 10 generates second local configuration information, wherein the second local configuration information is used to describe identification information and local resource allocation information of each accelerator card;

[0064] The resource management processor 20 generates global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host, and returns the global configuration information to each switch;

[0065] Each host 10 accesses its own accelerator card 40 or another host 10 based on the global configuration information.

[0066] In this embodiment, after each switch enumerates the downstream accelerator cards, it generates first configuration information (#GPUSwitchInfo). After the host is powered on, the operating system (OS) client (Client) accesses the downstream accelerator card, generates second configuration information (#GPUHOSTInfo), and writes it into the configuration space of the switch's northbound interface, where the northbound interface is defined as the interface that receives and processes requests from upstream devices. The resource management processor assigns a switch ID to each switch and an accelerator card ID (GPU ID) to each accelerator card. After accessing all switches to obtain the first and second configuration information, it forms global configuration information covering global resources and updates the available resources in the current system. At the same time, the global configuration information can be updated to the configuration space of each switch's northbound interface. The host OS Client obtains the update by accessing the configuration space of the switch's northbound interface.

[0067] As a feasible implementation method, the resource management processor allocates a switch identifier to each switch and allocates a global bus identifier and a global access address to each accelerator card.

[0068] In practice, the resource management processor assigns a switch ID to each switch and a global bus ID (GPU Global BUS) and global access address (GPU Global Address) to each accelerator card. This allocation ensures that each component in the system can be uniquely identified, facilitating management and scheduling. This allows the resource management processor to build a global resource view and effectively manage and schedule system resources.

[0069] As a feasible implementation method, the first local configuration information includes the switch identifier, accelerator card identifier, and connection port identifier of the local acceleration card. The first local configuration information also includes any one or a combination of any several items of the in-place status, global bus identifier, and global access address; the switch identifier of the local acceleration card is the identifier of the switch to which the local acceleration card is directly connected, the connection port identifier of the local acceleration card is the identifier of the switch port to which the local acceleration card is directly connected, the in-place status of the local acceleration card is used to describe whether the local acceleration card is in place, the global bus identifier of the local acceleration card is the bus identifier assigned to the local acceleration card by the resource management processor, and the global access address of the local acceleration card is the access address assigned to the local acceleration card.

[0070] In a specific implementation, each switch generates first local configuration information that describes various states and identifiers of the local accelerator card. Specifically, the information includes: a switch identifier, which identifies the switch to which the local accelerator card is directly connected; an accelerator card identifier, which uniquely identifies the local accelerator card; a connection port identifier, which identifies the switch port to which the local accelerator card is directly connected; an in-place status, which describes whether the local accelerator card is functioning properly; a global bus identifier, which is the bus identifier assigned to the local accelerator card by the resource management processor; and a global access address, which is the access address assigned to the local accelerator card by the resource management processor.

[0071] As a feasible implementation method, the second local configuration information includes the switch identifier, accelerator card identifier, and local resource allocation information of each accelerator card. The local resource allocation information includes the local bus identifier and / or local access address. The second local configuration information also includes the in-place status of each accelerator card; the switch identifier of the accelerator card is the identifier of the switch to which the accelerator card is directly connected, the in-place status of the accelerator card is used to describe whether the accelerator card is in place, the local bus identifier is the bus identifier assigned by the host to the accelerator card, and the local access address is the access address assigned by the host to the accelerator card.

[0072] In a specific implementation, each host generates second local configuration information to describe the local status and identification of the accelerator card. This information includes: the switch identification (the identification of the switch to which the accelerator card is directly connected); the accelerator card identification (the unique identification of the accelerator card); the in-place status (describing whether the accelerator card is functioning properly); the local bus identification (the bus identification assigned by the host to the accelerator card); and the local access address (the access address assigned by the host to the accelerator card).

[0073] As a feasible implementation method, after the switch generates the first local configuration information, the first local configuration space is written into the configuration space. The process of the host generating the second local configuration information includes: the host accessing the configuration space of the local accelerator card and the configuration space of the local switch to generate the second local configuration information, and writing the second local configuration information into the configuration space of the local switch; and the resource management processor accessing the configuration space of each switch to obtain the first local configuration information generated by each switch and the second local configuration information generated by each host.

[0074] In a specific implementation, after generating the first local configuration information, the switch writes it to the northbound interface configuration space. The host generates the second local configuration information by accessing the northbound interface configuration spaces of the local accelerator card and the switch, collecting necessary information, and writing the generated second local configuration information to the northbound interface configuration space of the local switch. The resource management processor accesses the northbound interface configuration spaces of each switch to obtain the first and second local configuration information, thereby integrating them to generate global configuration information.

[0075] As a feasible implementation method, the resource management processor monitors the status of each switch according to a preset period to update the global configuration information, and returns the updated global configuration information to each switch.

[0076] In practice, the resource management processor monitors the status of each switch at a preset interval to ensure the accuracy and real-time nature of global configuration information. Upon detecting any changes, the resource management processor updates the global configuration and returns the updated information to each switch. This dynamic update mechanism ensures that the system can promptly respond to resource changes, such as the addition or removal of accelerator cards, thereby maintaining efficient system operation.

[0077] As a feasible implementation method, when the switch detects that the target local accelerator card is offline, it notifies the resource management processor; the resource management processor updates the global configuration information according to the switch identifier and accelerator card identifier of the target local accelerator card, and returns the updated global configuration information to each switch.

[0078] In practice, when a switch detects that a local accelerator card has gone offline, it notifies the resource management processor. The resource management processor then updates the global configuration based on the received switch and accelerator card identifiers and returns the updated information to each switch. This mechanism ensures that the system can quickly adapt to changes in accelerator cards and maintains accurate resource allocation.

[0079] As a feasible implementation method, multiple hosts in a computer system include a first host and a second host. The process of the first host accessing a target accelerator card in the second host includes: the first host sends an access request to a corresponding first switch; the first switch sends the access request to a second switch corresponding to the second host based on the target switch identifier of the target accelerator card in the access request; the second switch determines the connection port identifier corresponding to the target accelerator card identifier of the target accelerator card in the access request, and sends the access request to the port corresponding to the connection port identifier to access the target accelerator card.

[0080] In a specific implementation, a computer system has two hosts, referred to as a first host and a second host. The first host sends an access request to a corresponding first switch. Based on the target switch identifier of the target accelerator card in the access request, the first switch forwards the access request to a second switch corresponding to the second host. The second switch determines the connection port identifier based on the target accelerator card identifier in the access request and sends the access request to the corresponding port, thereby enabling access to the target accelerator card.

[0081] The computer system provided by the embodiments of the present application implements in-band topological interconnection of multiple hosts. A resource management processor integrates configuration information of each switch and host, enabling efficient management and scheduling of global resources. Based on this global configuration information, each host can directly access its own accelerator card or that of another host, eliminating the cumbersome process of upstream port forwarding required for communication between different accelerator cards. This significantly improves communication efficiency and enables efficient sharing of computing resources among multiple hosts.

[0082] The following describes an application example provided by this application. Figure 4 As shown, the following steps are included:

[0083] Step 1: Configure the port connecting the accelerator card (GPU) to the switch in PCIe EP (Endpoint) mode. During PCIe Switch Box startup, the Arm processor in each switch obtains the switch ID from the resource management processor (mCPU) and enumerates the downstream accelerator cards (GPUs). Based on whether enumeration is successful, the present flag is updated for each accelerator card (GPU). The first local configuration information (#GPUSwitchInfo) is generated and written to the northbound interface configuration space of the switch.

[0084] The format of the first local configuration information (# GPU Switch Info) is as follows:

[0085] # GPU Switch Info

[0086] {

[0087] GPU 00-00:{

[0088] "Switch ID" = "0x00";

[0089] "GPU ID" = "0x00";

[0090] "Switch Port" = "0x00";

[0091] Present" = "0x01";

[0092] "GPU Global BUS" = "0x01";

[0093] "GPU Global Address" = "0x1_0000_0000";

[0094] },

[0095] …

[0096] GPU 01-08:{

[0097] "Switch ID" = "0x01";

[0098] "GPU ID" = "0x08";

[0099] "Switch Port" = "0x08";

[0100] "Present" = "0x01";

[0101] "GPU Global BUS" = "0x08";

[0102] "GPU Global Address" = "0x8_0000_0000";

[0103] },

[0104] …

[0105] }

[0106] The "GPU Global BUS" is the bus identifier enumerated by the resource management processor (mCPU) for the downstream accelerator card (GPU), and the "GPU Global Address" is the access address assigned by the resource management processor (mCPU) to the downstream accelerator card (GPU).

[0107] Step 2: The resource management processor (mCPU) accesses the northbound interface configuration space of the switch (Switch) through a communication method such as UART, and obtains the first local configuration information (#GPU Switch Info). At this point, each GPU corresponds to a unique management scheduling address identifier {Switch_ID-Swich Port}.

[0108] Step 3: The host (HOST) needs to enumerate the local downstream accelerator cards (GPUs) and reserve resources for the accelerator cards (GPUs) under other switches (Switches) in the system for subsequent access. The specific process is as follows: The operating system client (OS Client) in the host (HOST) accesses the northbound interface configuration space of the accelerator card (GPU) and the northbound interface configuration space of the switch (Switch), obtains the local {Switch_ID-GPU_ID} index information and corresponding in-place information, and maps the local accelerator card (GPU) to the predefined local access address (Local Address). At the same time, based on the predefined number of accelerator cards (GPUs) in the system, PCIe resources are reserved for other accelerator cards (GPUs) in the system and mapped to the local access address (LocalAddress). The format of the second local configuration information (# GPU HOST Info) is as follows:

[0109] # GPU HOST Info

[0110] {

[0111] GPU 00-00 :{

[0112] "Switch ID" = "0x00";

[0113] "GPU ID" = "0x00";

[0114] "Present" = "0x01";

[0115] "GPU HOST BUS" = "0x50";

[0116] "GPU Local Address" = "0x1_0000_0000";

[0117] },

[0118] GPU 00-01: {

[0119] "Switch ID" = "0x00";

[0120] "GPU ID" = "0x01";

[0121] "Present" = "0x01";

[0122] "GPU HOST BUS" = "0x51";

[0123] "GPU Local Address" = "0x2_0000_0000";

[0124] },

[0125] …

[0126] GPU 01-00: {

[0127] "Switch ID" = "0x01";

[0128] "GPU ID" = "0x00";

[0129] "Present" = "0x00";

[0130] "GPU HOST BUS" = "0x58";

[0131] "GPU Local Address" = "0x8_0000_0000";

[0132] },

[0133] GPU 01-01: {

[0134] "Switch ID" = "0x01";

[0135] "GPU ID" = "0x01";

[0136] "Present" = "0x00";

[0137] "GPU HOST BUS" = "0x59";

[0138] "GPU Local Address" = "0x9_0000_0000";

[0139] },

[0140] …

[0141] }

[0142] “GPU HOST BUS” is the bus identifier enumerated by the host (HOST) for the accelerator card (GPU), and “GPU HOST Address” is the access address assigned by the host (HOST) to the accelerator card (GPU).

[0143] Step 4: The OS client writes the second local configuration information (#GPUHOSTInfo) to the northbound port configuration space of the switch through the PCIe link.

[0144] Step 5: The resource management processor (mCPU) accesses the northbound port configuration space of the switch in sequence through communication methods such as UART and collects all secondary local configuration information (# GPU HOST Info).

[0145] Step 6: At this point, the management scheduling address identifier {Switch_ID-Swich Port} of each accelerator card (GPU), that is, the physical port, has a one-to-one mapping relationship with the address identifier {Switch_ID-GPU_ID} used by the host (HOST) to access the device. Through the network interconnection of switches (Switch), each host (HOST) can access the accelerator cards (GPUs) attached to other hosts (HOST) across the host domain. Figure 3 For example, a request from host 0 to access accelerator card 0 on host 1 is first sent to switch 0, connected to host 0. Based on the address identifier {Switch_ID-GPU_ID}, it is forwarded to the target switch 1 in the switch interconnection network. Then, based on the correspondence between the accelerator card (GPU) in switch 1 and the {Switch_ID-Swich Port} field, it is forwarded to the physical port connected to accelerator card 0. The resource management processor (mCPU) integrates all the first and second local configuration information to form global configuration information (including the accelerator card routing path and presence status) and writes it back to the northbound interface configuration space of all switches.

[0146] Step 7: The OS client obtains global configuration information from the northbound port configuration space of the switch to complete configuration deployment. The user can view the current global configuration information on the OS client and manage and schedule by entering scheduling information containing the accelerator card (GPU) address identifier.

[0147] Step 8: After the initial configuration is completed, the resource management processor (mCPU) periodically accesses the switch (Switch) and updates the global configuration information based on the switch (Switch)'s presence.

[0148] Step 9: The OS client obtains the global configuration update from the configuration space of the northbound port of the switch.

[0149] An example of updating global configuration information is as follows:

[0150] Step 10: Due to the hot-removal and hot-add capabilities of the switch, upstream and downstream devices can be plugged and unplugged even after configuration is complete. This means that if a host or GPU goes offline, the switch will continue to function normally, and changes will be promptly synchronized to the resource management processor (mCPU) via UART communication. Similarly, if the resource management processor (mCPU) detects a switch offline, it can access the configuration space of other active switches and synchronize the changes. This update feedback process minimizes the impact of adjustments or failures on the normal operation of other nodes in the system.

[0151] Step 11: The resource management processor (mCPU) can update the Present status based on the offline {Switch_ID-GPU_ID} index, indicating that the switch (Switch) and the downstream accelerator card (GPU) are unavailable.

[0152] Step 12: The resource management processor (mCPU) synchronizes the update to the configuration space of all northbound interfaces of the switch.

[0153] Step 13: The operating system client (OS Client) monitors the global configuration information synchronized by the resource management processor (mCPU) in the northbound port configuration space of the switch (Switch) and detects the current global resource availability.

[0154] The embodiments of the present application provide a computing resource sharing method, and the method is described in detail in conjunction with the execution process of the computing resource sharing method.

[0155] See also Figure 5 , according to an exemplary embodiment, a flowchart of a computing resource sharing method is shown, such as Figure 5 As shown, including:

[0156] S101: Generate first local configuration information; wherein the first local configuration information is used to describe identification information and connection port information of a local accelerator card;

[0157] The execution subject of this embodiment is a switch in a computer system, wherein the local accelerator card refers to an accelerator card directly connected to the current switch.

[0158] In this step, the switch generates first local configuration information, which is used to describe the identification information and connection port information of the local accelerator card. The first local configuration information may include: a switch identifier, which is the identifier of the switch to which the local accelerator card is directly connected; an accelerator card identifier, which is the unique identifier of the local accelerator card; a connection port identifier, which is the identifier of the switch port to which the local accelerator card is directly connected; an in-position status, which describes whether the local accelerator card is functioning properly; a global bus identifier, which is the bus identifier assigned to the local accelerator card by the resource management processor; and a global access address, which is the access address assigned to the local accelerator card by the resource management processor.

[0159] S102: Receive global configuration information sent by the resource management processor; wherein the resource management processor generates global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host;

[0160] In this step, the resource management processor sequentially accesses the uplink port configuration space of each switch via a communication method such as UART, collecting all first local configuration information. Simultaneously, the resource management processor also collects second local configuration information generated by each host. The resource management processor then integrates this information into global configuration information and sends it to each switch via the northbound interface.

[0161] S103: Write the global configuration information into the configuration space so that the host can access its own accelerator card or another host's accelerator card based on the global configuration information.

[0162] In this step, after receiving the global configuration information from the resource management processor, the switch writes it to the configuration space of the northbound interface. The northbound interface is the interface that receives and processes requests from upstream devices and is used for communication between hosts and switches. The host accesses the northbound interface's configuration space to obtain the global configuration information, allowing it to access the accelerator card locally or on other hosts based on the configuration information.

[0163] It can be seen that by writing global configuration information into the configuration space of the northbound interface, the host can flexibly access the accelerator cards of other hosts in the system based on the global configuration information, realizing resource access across host domains and improving the resource utilization and flexibility of the system.

[0164] Based on the above embodiment, as a preferred implementation method, the method further includes: when detecting that the target accelerator card is offline, notifying the resource management processor so that the resource management processor updates the global configuration information according to the switch identifier and accelerator card identifier of the target accelerator card; receiving the updated global configuration information sent by the resource management processor, and writing the updated global configuration information into the configuration space.

[0165] In practice, when a switch detects that a downstream target accelerator card has gone offline, it notifies the resource management processor, which then updates the global configuration based on the target accelerator card's switch and card identifiers. For example, if an accelerator card goes offline, the resource management processor marks the corresponding "Present" status as "0x00" (indicating unavailable). The updated global configuration is then sent back to the switch and written to the northbound interface's configuration space, ensuring that hosts can access the system's accelerator cards based on the latest global configuration.

[0166] This demonstrates that the above implementation allows for a more intelligent and efficient handling of accelerator card offline situations. This mechanism not only improves system stability and reliability, but also ensures that other hosts in the system can obtain the latest resource status in a timely manner, thereby optimizing resource management and scheduling efficiency for the entire system.

[0167] The embodiments of the present application provide a computing resource sharing method, and the method is described in detail in conjunction with the execution process of the computing resource sharing method.

[0168] See also Figure 6 , according to an exemplary embodiment, a flowchart of another computing resource sharing method is shown, such as Figure 6 As shown, including:

[0169] S201: Generate second local configuration information; wherein the second local configuration information is used to describe identification information and local resource allocation information of each accelerator card;

[0170] The execution subject of this embodiment is a host in a computer system. In this step, the host generates second local configuration information, which is used to describe the local status and identification of the accelerator card. Specifically, it includes: a switch identifier, which identifies the switch to which the accelerator card is directly connected; an accelerator card identifier, which uniquely identifies the accelerator card; an in-place status, which describes whether the accelerator card is functioning properly; a local bus identifier, which is the bus identifier assigned by the host to the accelerator card; and a local access address, which is the access address assigned by the host to the accelerator card.

[0171] S202: Accessing the acceleration card of itself or other hosts based on the global configuration information; wherein the resource management processor generates global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host, and returns the global configuration information to each switch.

[0172] In this step, the host retrieves global configuration information from the northbound interface's configuration space. This global configuration information contains detailed information about all accelerator cards in the system, including their identification information, connection port information, and global resource allocation information. The host accesses the target accelerator card through the switch's interconnected network based on the address identifier and routing path in the global configuration information. For example, if a host needs to access an accelerator card in another host, it finds the correct routing path based on the global configuration information and sends an access request over the link. The switch then correctly forwards the access request to the target accelerator card based on the routing information in the global configuration information.

[0173] As can be seen, accessing accelerator cards based on global configuration information enables hosts to flexibly access any accelerator card in the system, regardless of whether the accelerator card is directly connected to the host. This greatly improves system resource utilization and flexibility, allowing the system to dynamically reallocate resources at runtime to meet varying computing needs. This mechanism also improves system scalability, as new accelerator cards can be more easily added to the system and accessed by other hosts.

[0174] The embodiments of the present application provide a computing resource sharing method, and the method is described in detail in conjunction with the execution process of the computing resource sharing method.

[0175] See also Figure 7 , according to an exemplary embodiment, a flowchart of another computing resource sharing method is shown, such as Figure 7 As shown, including:

[0176] S301: Obtain first local configuration information generated by each switch and second local configuration information generated by each host; wherein the first local configuration information is used to describe the identification information and connection port information of the local accelerator card, and the second local configuration information is used to describe the identification information and local resource allocation information of each accelerator card;

[0177] The execution entity of this embodiment is a resource management processor in a computer system. In this step, the resource management processor communicates with each switch and host via predefined communication links. It sequentially accesses each switch and host to obtain the local configuration information generated by them. For switches, the resource management processor obtains first local configuration information, which includes the identification information of each accelerator card, connection port information, and global resource allocation information. For hosts, the resource management processor obtains second local configuration information, which includes the identification information of each accelerator card and local resource allocation information.

[0178] S302: Generate global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host, and return the global configuration information to each switch.

[0179] In this step, the resource management processor integrates the first and second local configuration information it has obtained. It also summarizes the identification information, connection port information, and global resource allocation information for each accelerator card. It ensures that the mapping between the global address and local address of each accelerator card is correct. It then generates global configuration information that covers all accelerator cards in the system. The resource management processor sends the generated global configuration information to each switch via the northbound interface. The switch receives and stores this information so that the host can access the latest global configuration information via the northbound interface.

[0180] It can be seen that by integrating all local configuration information, the global configuration information provides a complete view of all accelerator cards in the system, allowing the host to access any accelerator card in the system based on the latest global configuration information.

[0181] Based on the above embodiment, as a preferred implementation, the method further includes: monitoring the in-place status of each switch according to a preset period to update the global configuration information, and returning the updated global configuration information to each switch.

[0182] In a specific implementation, the resource management processor sets a timer and sends a status query request to each switch through the communication link at a preset period. After receiving the request, the switch returns its current in-place status information, including whether it is working normally, the status of the connected accelerator card, etc. The resource management processor updates the relevant records in the global configuration information based on the in-place status information returned by the switch. For example, if a switch or its connected accelerator card goes offline, the resource management processor will mark the corresponding "Present" status as "0x00" (indicating unavailable) and update the global configuration information. The resource management processor sends the updated global configuration information to each switch through the northbound interface. The switch receives and stores this information so that the host can access the latest global configuration information through the northbound interface.

[0183] Through this implementation, the system can more intelligently and efficiently monitor switch status and promptly update global configuration information. This mechanism not only improves system stability and reliability, but also ensures that all hosts in the system have access to the latest resource status information, thereby optimizing resource management and scheduling efficiency across the entire system.

[0184] Based on the above embodiment, as a preferred implementation, it further includes: when receiving a target accelerator card offline notification, updating the global configuration information according to the switch identifier and accelerator card identifier of the target accelerator card, and returning the updated global configuration information to each switch.

[0185] In a specific implementation, when a switch detects that a target accelerator card has gone offline, it sends an offline notification to the resource management processor through a predefined communication mechanism. The notification includes the switch ID and accelerator card ID of the target accelerator card. After receiving the offline notification, the resource management processor finds the corresponding target accelerator card record in the global configuration information based on the switch ID and accelerator card ID in the notification. The status of the record is updated, for example, the "Present" status is marked as "0x00" (indicating unavailable), and the global configuration information is updated. The resource management processor sends the updated global configuration information to each switch through the northbound interface. The switch receives and stores this information so that the host can access the latest global configuration information through the northbound interface.

[0186] Through this implementation, the system can more intelligently and efficiently handle accelerator card offline situations. This mechanism not only improves system stability and reliability, but also ensures that all hosts in the system have access to the latest resource status information, thereby optimizing resource management and scheduling efficiency for the entire system.

[0187] The following introduces a computing resource sharing device provided in an embodiment of the present application. The computing resource sharing device described below and the computing resource sharing method on the controller side described above can be referenced to each other.

[0188] See also Figure 8 , according to an exemplary embodiment, a structural diagram of a computing resource sharing device is shown, such as Figure 8 As shown, including:

[0189] The first generating module 101 is configured to generate first local configuration information; wherein the first local configuration information is used to describe identification information and connection port information of the local accelerator card;

[0190] The receiving module 102 is configured to receive global configuration information sent by the resource management processor; wherein the resource management processor generates the global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host;

[0191] The writing module 103 is configured to write the global configuration information into the configuration space so that the host can access its own accelerator card or another host's accelerator card based on the global configuration information.

[0192] Based on the above embodiment, as a preferred implementation, it further includes:

[0193] The detection module is configured to notify the resource management processor when detecting that the target accelerator card is offline, so that the resource management processor updates the global configuration information according to the switch identifier and the accelerator card identifier of the target accelerator card;

[0194] The first updating module is configured to receive updated global configuration information sent by the resource management processor and write the updated global configuration information into the configuration space.

[0195] The following introduces another computing resource sharing device provided in an embodiment of the present application. The another computing resource sharing device described below and the computing resource sharing method on the resource management processor side described above can be referenced to each other.

[0196] See also Figure 9 , according to an exemplary embodiment, a structural diagram of another computing resource sharing device is shown, such as Figure 9 As shown, including:

[0197] The second generating module 201 is used to generate second local configuration information; wherein the second local configuration information is used to describe the identification information and local resource allocation information of each accelerator card;

[0198] Access module 202 is used to access its own or other host's acceleration card based on global configuration information; wherein, the resource management processor generates global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host, and returns the global configuration information to each switch.

[0199] Another computing resource sharing device provided in an embodiment of the present application is introduced below. The another computing resource sharing device described below and the computing resource sharing method on the resource management processor side described above can be referenced to each other.

[0200] See also Figure 10 , according to an exemplary embodiment, a structural diagram of another computing resource sharing device is shown, such as Figure 10 As shown, including:

[0201] An acquisition module 301 is configured to acquire first local configuration information generated by each switch and second local configuration information generated by each host; wherein the first local configuration information is used to describe the identification information and connection port information of the local accelerator card, and the second local configuration information is used to describe the identification information and local resource allocation information of each accelerator card;

[0202] The third generating module 302 is configured to integrate the first local configuration information generated by each switch and the second local configuration information generated by each host, generate global configuration information, and return the global configuration information to each switch.

[0203] Based on the above embodiment, as a preferred implementation, it further includes:

[0204] The monitoring module is used to monitor the status of each switch in a preset period to update the global configuration information and return the updated global configuration information to each switch.

[0205] Based on the above embodiment, as a preferred implementation, it further includes:

[0206] The second updating module is configured to update the global configuration information according to the switch identifier and the accelerator card identifier of the target accelerator card when receiving the offline notification of the target accelerator card, and return the updated global configuration information to each switch.

[0207] Regarding the apparatus in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0208] An embodiment of the present application further provides an electronic device, Figure 11 FIG. 1 is a structural diagram of an electronic device according to an exemplary embodiment. Figure 11 As shown, the electronic equipment includes:

[0209] Communication interface 1, capable of exchanging information with other devices such as network devices;

[0210] The processor 2 is connected to the communication interface 1 to implement information exchange with other devices and is used to execute the computing resource sharing method provided by one or more of the above technical solutions when running a computer program. The computer program is stored in the memory 3.

[0211] Of course, in actual application, the various components in the electronic device are coupled together through the bus system 4. It can be understood that the bus system 4 is used to realize the connection and communication between these components. In addition to the data bus, the bus system 4 also includes a power bus, a control bus and a status signal bus. However, for the sake of clarity, Figure 11 Various buses are labeled as bus system 4.

[0212] The memory 3 in the embodiment of the present application is used to store various types of data to support the operation of the electronic device. Examples of such data include: any computer program used to operate on the electronic device.

[0213] It is understood that the memory 3 can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic random access memory (FRAM), a flash memory, a magnetic surface memory, an optical disc, or a compact disc read-only memory (CD-ROM); the magnetic surface memory can be a magnetic disk or a magnetic tape. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), synchronous static random access memory (SSRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct rambus random access memory (DRRAM).The memory 3 described in the embodiments of the present application is intended to include but is not limited to these and any other suitable types of memories.

[0214] The method disclosed in the above-mentioned embodiment of the present application can be applied to processor 2 or implemented by processor 2. Processor 2 may be an integrated circuit chip with signal processing capabilities. During the implementation process, each step of the above-mentioned method can be completed by the integrated logic circuit of the hardware in processor 2 or instructions in the form of software. The above-mentioned processor 2 can be a general-purpose processor, DSP, or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Processor 2 can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiments of the present application. A general-purpose processor can be a microprocessor or any conventional processor, etc. The steps of the method disclosed in the embodiment of the present application can be directly embodied as being executed by a hardware decoding processor, or being executed by a combination of hardware and software modules in the decoding processor. The software module can be located in a storage medium, which is located in memory 3. Processor 2 reads the program in memory 3 and completes the steps of the above-mentioned method in combination with its hardware.

[0215] When the processor 2 executes the program, the corresponding processes in each method of the embodiment of the present application are implemented. For the sake of brevity, they are not repeated here.

[0216] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above-mentioned computing resource sharing method embodiments when run.

[0217] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0218] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by the processor 2, the steps in any one of the above-mentioned computing resource sharing method embodiments are implemented.

[0219] An embodiment of the present application also provides another computer program product, including a non-volatile computer-readable storage medium, which stores a computer program. When the computer program is executed by the processor 2, it implements the steps in any of the above-mentioned computing resource sharing method embodiments.

[0220] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the components and steps of each example according to their functions. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0221] The above describes in detail a computer system, computing resource sharing method, device and equipment, medium and product provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core ideas of the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the present application.

Claims

1. A computer system, characterized in that: The computer system comprises multiple hosts and a resource management processor, wherein the hosts are connected to multiple accelerator cards via switches, the resource management processor is connected to multiple switches, and the multiple switches are interconnected. The computer system implements topological interconnection of multiple hosts in an in-band manner; Configure the port connecting the accelerator card to the switch as endpoint mode; The switch generates first local configuration information; wherein the first local configuration information includes a switch identifier, an accelerator card identifier, a connection port identifier, a global bus identifier, and a global access address of the local accelerator card, wherein the switch identifier of the local accelerator card is the identifier of the switch to which the local accelerator card is directly connected, the connection port identifier of the local accelerator card is the identifier of the switch port to which the local accelerator card is directly connected, the global bus identifier of the local accelerator card is the bus identifier assigned to the local accelerator card by the resource management processor, and the global access address of the local accelerator card is the access address assigned to the local accelerator card; The host generates second local configuration information; wherein the second local configuration information includes a switch identifier, an accelerator card identifier, a local bus identifier, and a local access address of each accelerator card, wherein the switch identifier of the accelerator card is the identifier of the switch to which the accelerator card is directly connected, the local bus identifier is the bus identifier assigned by the host to the accelerator card, and the local access address is the access address assigned by the host to the accelerator card; The resource management processor generates global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host, and returns the global configuration information to each switch; Each host accesses the accelerator card of another host based on the global configuration information, or the local accelerator card of each host accesses the accelerator card of another host based on the global configuration information; The multiple hosts in the computer system include a first host and a second host, and the process of the first host accessing the target accelerator card in the second host includes: The first host sends the access request to the corresponding first switch; The first switch sends the access request to the second switch corresponding to the second host according to the mapping relationship between the target switch identifier and the target accelerator card identifier; wherein the target switch identifier is the switch identifier of the switch corresponding to the second host, and the target accelerator card identifier is the accelerator card identifier of the target accelerator card; The second switch determines the connection port identifier corresponding to the target accelerator card identifier according to the correspondence between the target accelerator card identifier and the connection port identifier, and sends the access request to the port corresponding to the connection port identifier to access the target accelerator card.

2. The computer system according to claim 1, wherein: The first local configuration information further includes an in-place status, where the in-place status of the local accelerator card is used to describe whether the local accelerator card is in place.

3. The computer system according to claim 2, wherein: The resource management processor allocates a switch identifier to each switch and allocates a global bus identifier and a global access address to each accelerator card.

4. The computer system according to claim 1, wherein: The second local configuration information further includes the in-place status of each accelerator card, where the in-place status of the accelerator card is used to describe whether the accelerator card is in place.

5. The computer system according to claim 1, wherein: After generating the first local configuration information, the switch writes the first local configuration information into the configuration space; The process of the host generating the second local configuration information includes: the host accessing the configuration space of the local accelerator card and the configuration space of the local switch to generate the second local configuration information, and writing the second local configuration information into the configuration space of the local switch; The resource management processor accesses the configuration space of each switch to obtain the first local configuration information generated by each switch and the second local configuration information generated by each host.

6. The computer system according to claim 1, wherein: The resource management processor monitors the in-place status of each switch according to a preset period to update the global configuration information, and returns the updated global configuration information to each switch.

7. The computer system according to claim 1, wherein: When the switch detects that the target local accelerator card is offline, it notifies the resource management processor; The resource management processor updates the global configuration information according to the switch identifier and the accelerator card identifier of the target local accelerator card, and returns the updated global configuration information to each switch.

8. A computing resource sharing method, characterized in that: A method for implementing a switch in a computer system according to any one of claims 1 to 7, wherein the computer system implements topological interconnection of multiple hosts in an in-band manner, and wherein the method comprises: Generate first local configuration information; wherein the first local configuration information includes a switch identifier, an accelerator card identifier, a connection port identifier, a global bus identifier, and a global access address of the local accelerator card, wherein the switch identifier of the local accelerator card is the identifier of the switch to which the local accelerator card is directly connected, the connection port identifier of the local accelerator card is the identifier of the switch port to which the local accelerator card is directly connected, the global bus identifier of the local accelerator card is the bus identifier assigned to the local accelerator card by the resource management processor, and the global access address of the local accelerator card is the access address assigned to the local accelerator card; Receive global configuration information sent by a resource management processor; wherein the resource management processor generates global configuration information based on first local configuration information generated by each switch and second local configuration information generated by each host, wherein the second local configuration information includes a switch identifier, an accelerator card identifier, a local bus identifier, and a local access address of each accelerator card, wherein the switch identifier of the accelerator card is the identifier of the switch to which the accelerator card is directly connected, the local bus identifier is the bus identifier assigned by the host to the accelerator card, and the local access address is the access address assigned by the host to the accelerator card; The global configuration information is written into the configuration space so that the host can access the acceleration card of itself or other hosts based on the global configuration information.

9. The computing resource sharing method according to claim 8, characterized in that: Also includes: When detecting that the target accelerator card is offline, notifying the resource management processor so that the resource management processor updates the global configuration information according to the switch identifier and the accelerator card identifier of the target accelerator card; Receive the updated global configuration information sent by the resource management processor, and write the updated global configuration information into the configuration space.

10. A computing resource sharing method, characterized in that: Applied to a host in a computer system according to any one of claims 1 to 7, wherein the computer system implements topological interconnection of multiple hosts in an in-band manner, the method comprising: Generate second local configuration information; wherein the second local configuration information includes a switch identifier, an accelerator card identifier, a local bus identifier, and a local access address of each accelerator card, wherein the switch identifier of the accelerator card is the identifier of the switch to which the accelerator card is directly connected, the local bus identifier is the bus identifier assigned by the host to the accelerator card, and the local access address is the access address assigned by the host to the accelerator card; Accessing the acceleration card of itself or other hosts based on global configuration information; wherein, the resource management processor generates global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host, and returns the global configuration information to each switch, wherein the first local configuration information includes the switch identifier, acceleration card identifier, connection port identifier, global bus identifier and global access address of the local acceleration card of each switch, the switch identifier of the local acceleration card is the identifier of the switch to which the local acceleration card is directly connected, the connection port identifier of the local acceleration card is the identifier of the switch port to which the local acceleration card is directly connected, the global bus identifier of the local acceleration card is the bus identifier assigned to the local acceleration card by the resource management processor, and the global access address of the local acceleration card is the access address assigned to the local acceleration card.

11. A computing resource sharing method, characterized in that: A resource management processor applied to a computer system according to any one of claims 1 to 7, wherein the computer system implements topological interconnection of multiple hosts in an in-band manner, the method comprising: Obtain first local configuration information generated by each switch and second local configuration information generated by each host; wherein the first local configuration information includes a switch identifier, an accelerator card identifier, a connection port identifier, a global bus identifier, and a global access address of a local accelerator card of each switch, the switch identifier of the local accelerator card being the identifier of the switch to which the local accelerator card is directly connected, the connection port identifier of the local accelerator card being the identifier of the switch port to which the local accelerator card is directly connected, the global bus identifier of the local accelerator card being the bus identifier assigned to the local accelerator card by the resource management processor, and the global access address of the local accelerator card being the access address assigned to the local accelerator card; and the second local configuration information includes a switch identifier, an accelerator card identifier, a local bus identifier, and a local access address of each accelerator card, the switch identifier of the accelerator card being the identifier of the switch to which the accelerator card is directly connected, the local bus identifier being the bus identifier assigned to the accelerator card by the host, and the local access address being the access address assigned to the accelerator card by the host; Based on the first local configuration information generated by each switch and the second local configuration information generated by each host, global configuration information is generated, and the global configuration information is returned to each switch.

12. The computing resource sharing method according to claim 11, characterized in that: Also includes: The in-place status of each switch is monitored according to a preset period to update the global configuration information, and the updated global configuration information is returned to each switch.

13. The computing resource sharing method according to claim 11, characterized in that: Also includes: When receiving a target accelerator card offline notification, the global configuration information is updated according to the switch identifier and the accelerator card identifier of the target accelerator card, and the updated global configuration information is returned to each switch.

14. A computing resource sharing device, characterized in that: A switch applied to a computer system according to any one of claims 1 to 7, wherein the computer system implements topological interconnection of multiple hosts in an in-band manner, the device comprising: a first generating module, configured to generate first local configuration information; wherein the first local configuration information includes a switch identifier, an accelerator card identifier, a connection port identifier, a global bus identifier, and a global access address of a local accelerator card; the switch identifier of the local accelerator card is the identifier of a switch to which the local accelerator card is directly connected; the connection port identifier of the local accelerator card is the identifier of a switch port to which the local accelerator card is directly connected; the global bus identifier of the local accelerator card is the bus identifier assigned to the local accelerator card by the resource management processor; and the global access address of the local accelerator card is the access address assigned to the local accelerator card; a receiving module, configured to receive global configuration information sent by a resource management processor; wherein the resource management processor generates global configuration information based on first local configuration information generated by each switch and second local configuration information generated by each host, wherein the second local configuration information includes a switch identifier, an accelerator card identifier, a local bus identifier, and a local access address of each accelerator card, wherein the switch identifier of the accelerator card is the identifier of the switch to which the accelerator card is directly connected, the local bus identifier is the bus identifier assigned by the host to the accelerator card, and the local access address is the access address assigned by the host to the accelerator card; The writing module is used to write the global configuration information into the configuration space so that the host can access its own or other hosts' accelerator cards based on the global configuration information.

15. A computing resource sharing device, characterized in that: Applicable to a host in a computer system according to any one of claims 1 to 7, wherein the computer system implements topological interconnection of multiple hosts in an in-band manner, the device comprising: a second generating module, configured to generate second local configuration information; wherein the second local configuration information includes a switch identifier, an accelerator card identifier, a local bus identifier, and a local access address of each accelerator card, wherein the switch identifier of the accelerator card is the identifier of the switch to which the accelerator card is directly connected, the local bus identifier is the bus identifier assigned by the host to the accelerator card, and the local access address is the access address assigned by the host to the accelerator card; An access module is used to access the acceleration card of itself or other hosts based on global configuration information; wherein, the resource management processor generates global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host, and returns the global configuration information to each switch, wherein the first local configuration information includes the switch identifier, acceleration card identifier, connection port identifier, global bus identifier and global access address of the local acceleration card of each switch, the switch identifier of the local acceleration card is the identifier of the switch to which the local acceleration card is directly connected, the connection port identifier of the local acceleration card is the identifier of the switch port to which the local acceleration card is directly connected, the global bus identifier of the local acceleration card is the bus identifier assigned to the local acceleration card by the resource management processor, and the global access address of the local acceleration card is the access address assigned to the local acceleration card.

16. A computing resource sharing device, characterized in that: A resource management processor applied to a computer system according to any one of claims 1 to 7, wherein the computer system implements topological interconnection of multiple hosts in an in-band manner, the device comprising: an acquisition module, configured to acquire first local configuration information generated by each switch and second local configuration information generated by each host; wherein the first local configuration information includes a switch identifier, an accelerator card identifier, a connection port identifier, a global bus identifier, and a global access address of a local accelerator card of each switch; the switch identifier of the local accelerator card is the identifier of the switch to which the local accelerator card is directly connected; the connection port identifier of the local accelerator card is the identifier of the switch port to which the local accelerator card is directly connected; the global bus identifier of the local accelerator card is the bus identifier assigned to the local accelerator card by the resource management processor; and the global access address of the local accelerator card is the access address assigned to the local accelerator card; and the second local configuration information includes a switch identifier, an accelerator card identifier, a local bus identifier, and a local access address of each accelerator card; the switch identifier of the accelerator card is the identifier of the switch to which the accelerator card is directly connected; the local bus identifier is the bus identifier assigned to the accelerator card by the host; and the local access address is the access address assigned to the accelerator card by the host; The third generating module is configured to generate global configuration information based on the first local configuration information generated by each switch and the second local configuration information generated by each host, and return the global configuration information to each switch.

17. An electronic device, characterized in that: include: memory for storing computer programs; A processor, configured to implement the steps of the computing resource sharing method according to any one of claims 8 to 13 when executing the computer program.

18. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, which, when executed, implements the steps of the computing resource sharing method according to any one of claims 8 to 13.

19. A computer program product, characterized in that The method comprises a computer program, which, when executed, implements the steps of the computing resource sharing method according to any one of claims 8 to 13.

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