S box, data processing method, computer program product, equipment and medium

Abstract

The invention discloses an S box, a data processing method, a computer program product, equipment and a medium, and relates to the technical field of cryptography, the S box comprises an input calculation module, an intermediate calculation module, an output calculation module and a first register block; the input calculation module is used for reading the input data, the first matrix and the first vector from the first register group, performing operation on the input data, the first matrix and the first vector to obtain a first operation result and storing the first operation result into the first register group; the intermediate calculation module is used for reading the first operation result from the first register block, performing inverse operation on the first operation result to obtain a second operation result and storing the second operation result into the first register block; and the output calculation module is used for reading the second operation result, the second matrix and the second vector from the first register block, performing operation on the second operation result, the second matrix and the second vector to obtain an output result and storing the output result in the first register block. And all modules can be subjected to parallel calculation, so that the calculation performance is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of cryptography, and more particularly to an S-box, a data processing method, a computer program product, a device, and a medium. Background Art

[0002] In cryptography, an S-box (Substitution-box) is the basic structure used by symmetric key algorithms to perform substitution calculations. The S-box structure can be customized. For example, it can include five sub-circuit units: an input Boolean circuit, a header module, a middle module, a tail module, and an output Boolean circuit. The input Boolean circuit performs a first mapping on the input data to obtain mapped input data. The header module performs a first inverse operation on the mapped input data to obtain first data. The middle module performs a second inverse operation on the first data to obtain second data. The tail module performs a third inverse operation on the mapped input data and the second data to obtain mapped output data. The output Boolean circuit performs a second mapping on the mapped output data to obtain target output data.

[0003] However, this type of S-box performs calculations sequentially through the cascaded input Boolean circuit, head module, middle module, tail module, and output Boolean circuit, and has low calculation performance.

[0004] In summary, how to improve the computing performance of the S-box is an urgent problem to be solved by those skilled in the art. Summary of the Invention

[0005] The present invention aims to provide an S-box that can, to a certain extent, solve the technical problem of how to improve the computing performance of the S-box. The present invention also provides a data processing method, a computer program product, an electronic device, and a computer-readable storage medium.

[0006] In order to achieve the above object, the present invention provides the following technical solutions: In a first aspect, an S-box is provided, comprising an input calculation module, an intermediate calculation module, an output calculation module, and a first register group; The input calculation module is configured to read input data, a first matrix, and a first vector from the first register group, perform an operation on the input data, the first matrix, and the first vector, obtain a first operation result, and store the result in the first register group; The intermediate calculation module is configured to read the first operation result from the first register group, perform an inverse operation on the first operation result to obtain a second operation result, and store the second operation result in the first register group; The output calculation module is used to read the second operation result, the second matrix and the second vector from the first register group, perform operations on the second operation result, the second matrix and the second vector, obtain the output result of the input data and store it in the first register group.

[0007] On the other hand, the first register group includes an input register group, a first operation register group, a second operation register group and an output register group; The input register group is used to access the input data; The first operation register group is used to access the first operation result; The second operation register group is used to access the second operation result; The output register group is used to access the output result.

[0008] On the other hand, the input calculation module, the intermediate calculation module and the output calculation module are constructed by lookup tables and / or composite domain calculations.

[0009] On the other hand, the intermediate calculation module includes a first isomorphic mapping module, a first multiplication-addition calculation module, an inversion calculation module, a second multiplication-addition calculation module and a second isomorphic mapping module; The first isomorphic mapping module is configured to map the first operation result from the first finite field to the second finite field to obtain a first mapping result; The first multiplication and addition calculation module is used to perform multiplication and addition operations on the first mapping result to obtain a first sub-operation result; The inverse calculation module is used to perform an inverse operation on the first sub-operation result to obtain a second sub-operation result; The second multiplication and addition calculation module is used to perform multiplication and addition operations on the second sub-operation result to obtain a third sub-operation result; The second isomorphic mapping module is configured to map the third sub-operation result from the second finite field back to the first finite field to obtain the second operation result.

[0010] On the other hand, the intermediate computing module includes a second register group, which is used to access the first mapping result, the first sub-operation result, the second sub-operation result and the third sub-operation result for the first isomorphic mapping module, the first multiplication-addition computing module, the inversion computing module, the second multiplication-addition computing module and the second isomorphic mapping module.

[0011] On the other hand, the second register group includes a first mapping register group, a first multiply-add register group, an inversion register group, and a second multiply-add register group; The first mapping register group is used to access the first mapping result; The first multiplication-addition register group is used to access the first sub-operation result; The inversion register group is used to access the second sub-operation result; The second multiplication-addition register group is used to access the third sub-operation result.

[0012] On the other hand, the inverse calculation module is constructed based on a lookup table; the first isomorphic mapping module, the first multiplication-addition calculation module, the second multiplication-addition calculation module and the second isomorphic mapping module are constructed based on algebraic calculation.

[0013] On the other hand, the input calculation module operates on the input data, the first matrix, and the first vector to obtain a first operation result, including: The input calculation module performs an operation on the input data, the first matrix and the first vector according to an input operation formula to obtain a first operation result; The input operation formula includes: y1=x*A1+B1; Among them, y1 represents the first operation result; x represents the input data; A1 represents the first matrix; B1 represents the first vector.

[0014] On the other hand, the intermediate calculation module performs an inverse operation on the first operation result to obtain a second operation result, including: The intermediate calculation module performs an inverse operation on the first operation result according to an inverse operation formula to obtain a second operation result; The inverse operation formula includes: y2=I(y1); Wherein, y2 represents the second operation result; I represents the inverse operation.

[0015] On the other hand, the output calculation module performs an operation on the second operation result, the second matrix, and the second vector to obtain an output result of the input data, including: The output calculation module performs an operation on the second operation result, the second matrix and the second vector according to an output operation formula to obtain an output result of the input data; The output operation formula includes: y3=y2*A2+B2; Among them, y3 represents the output result; A2 represents the second matrix; B2 represents the second vector.

[0016] A second aspect provides a data processing method, comprising: Obtain input data and store the input data into the first register group of the S-box; Calling the input calculation module of the S-box to read input data, a first matrix, and a first vector from the first register group; calling the input calculation module of the S-box to perform an operation on the input data, the first matrix, and the first vector, obtaining a first operation result and storing the result in the first register group; calling the intermediate calculation module of the S-box to read the first operation result from the first register group; calling the intermediate calculation module of the S-box to perform an inverse operation on the first operation result to obtain a second operation result and storing the second operation result in the first register group; Calling the output calculation module of the S-box to read the second operation result, the second matrix and the second vector from the first register group; The input calculation module of the S-box is called to perform an operation on the second operation result, the second matrix, and the second vector to obtain an output result of the input data and store it in the first register group.

[0017] On the other hand, it also includes: Determining the computational power consumption and computational efficiency requirements of the S-box; Determining performance resources to be allocated to the S-box; Get test data; Testing the data processing performance of the input calculation module, the intermediate calculation module, and the output calculation module based on the test data to obtain test results, wherein the data processing performance includes the performance of processing a single data and the performance of processing multiple data in parallel; According to the test results, combining the amounts of data processed by the input calculation module, the intermediate calculation module, and the output calculation module to obtain an initial combination result; In the initial combination results, determining a combination result that enables the S-box to meet the computing power consumption requirement, the computing efficiency requirement, and the performance resource requirement as a target combination result; The number of registers occupied by each of the input calculation module, the intermediate calculation module, and the output calculation module in the first register group is determined according to the target combination result.

[0018] According to a third aspect, a computer program product is provided, comprising a computer program / instruction, which implements the steps of any of the above data processing methods when executed by a processor.

[0019] In a fourth aspect, an electronic device is provided, including: memory for storing computer programs; A processor is used to implement the steps of any of the above data processing methods when executing the computer program.

[0020] In a fifth aspect, a computer-readable storage medium is provided, wherein a computer program is stored in the computer-readable storage medium, and when the computer program is executed by a processor, the steps of any of the above data processing methods are implemented.

[0021] The present invention provides an S-box, comprising an input calculation module, an intermediate calculation module, an output calculation module, and a first register group; the input calculation module is configured to read input data, a first matrix, and a first vector from the first register group, perform operations on the input data, the first matrix, and the first vector, obtain a first operation result, and store it in the first register group; the intermediate calculation module is configured to read the first operation result from the first register group, perform an inverse operation on the first operation result, obtain a second operation result, and store it in the first register group; the output calculation module is configured to read the second operation result, a second matrix, and a second vector from the first register group, perform operations on the second operation result, the second matrix, and the second vector, obtain an output result of the input data, and store it in the first register group. The present invention has the beneficial effect of providing the first register group in the S-box so that the input calculation module, the intermediate calculation module, and the output calculation module can use the first register group to access data. In this way, each module does not need to read data from other modules, so that all modules can perform calculations in parallel, shortening the time consumed by data transmission between modules and improving the computing performance of the S-box. A data processing method, computer program product, electronic device, and computer-readable storage medium provided by the present invention also solve corresponding technical problems. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0023] Figure 1 is a schematic diagram of a known S-box; Figure 2 A schematic diagram of the structure of an S-box provided in an embodiment of the present invention; Figure 3 It is a structural diagram of the intermediate computing module; Figure 4 A flowchart of a data processing method provided by an embodiment of the present invention; Figure 5 A schematic structural diagram of an electronic device provided by an embodiment of the present invention; Figure 6 This is another structural diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0024] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0025] In cryptography, the S-box is the basic structure for performing permutation calculations in symmetric key algorithms. The S-box structure can be configured as needed. For example, the S-box can include five sub-circuit units, namely the input Boolean circuit, the head module, the middle module, the tail module, and the output Boolean circuit. Figure 1 As shown. The input Boolean circuit is used to perform a first mapping on the input data to obtain mapped input data, the header module is used to perform a first inverse operation on the mapped input data to obtain first data, the middle module is used to perform a second inverse operation on the first data to obtain second data, the tail module is used to perform a third inverse operation based on the mapped input data and the second data to obtain mapped output data, and the output Boolean circuit is used to perform a second mapping on the mapped output data to obtain target output data. However, this type of S-box performs calculations sequentially through the cascaded input Boolean circuit, header module, middle module, tail module, and output Boolean circuit, resulting in low computing performance. In order to improve the computing performance of the S-box, the present invention provides an S-box and data processing solution.

[0026] See also Figure 2 , Figure 2 A schematic diagram of the structure of an S-box provided in an embodiment of the present invention.

[0027] An S-box provided by an embodiment of the present invention may include an input calculation module 101, an intermediate calculation module 102, an output calculation module 103 and a first register group 104; an input calculation module, configured to read input data, a first matrix, and a first vector from the first register group, perform operations on the input data, the first matrix, and the first vector, obtain a first operation result, and store the result in the first register group; an intermediate calculation module, configured to read a first operation result from the first register group, perform an inverse operation on the first operation result to obtain a second operation result, and store the second operation result in the first register group; The output calculation module is used to read the second operation result, the second matrix and the second vector from the first register group, perform operations on the second operation result, the second matrix and the second vector, obtain the output result of the input data and store it in the first register group.

[0028] It should be noted that the number of registers provided in the first register group can be flexibly determined based on actual needs, and a single register may be used by only one of the input calculation module, the intermediate calculation module, or the output calculation module, or may be used by all three modules, without specific limitation in the present invention. Furthermore, the output data, first matrix, first vector, second matrix, second vector, and output result can be flexibly configured based on the application scenario of the S-box.

[0029] In an exemplary embodiment, to facilitate data access by various modules, the first register group in the S-box provided by the present invention may include an input register group, a first operation register group, a second operation register group, and an output register group. The input register group is used to access input data; the first operation register group is used to access the first operation result; the second operation register group is used to access the second operation result; and the output register group is used to access the output result. The number of registers in the input register group, the first operation register group, the second operation register group, and the output register group can be flexibly determined based on actual needs, and each register group in the input register group, the first operation register group, the second operation register group, and the output register group includes at least one register.

[0030] In this way, in the S-box provided by the present invention, input data can be accessed solely through the input register group, the first operation result can be accessed solely through the first operation register group, the second operation result can be accessed solely through the second operation register group, and the output result can be accessed solely through the output register group. When the input calculation module, the intermediate calculation module or the output calculation module needs data, it only needs to access it from the corresponding register group. There is no need to define the ownership of data when sharing the register group with other modules. This is equivalent to dividing the S-box into a multi-stage pipeline to realize parallel calculation, which can improve the convenience and efficiency of the input calculation module, the intermediate calculation module or the output calculation module in accessing data, and then improve the computing efficiency of the input calculation module, the intermediate calculation module or the output calculation module.

[0031] It should be noted that the first matrix and the first vector can also be stored in the input register group, and the second matrix and the second vector can be stored in the second operation register group. Of course, the first matrix, the first vector, the second matrix and the second vector can also be stored using separate register groups.

[0032] In an exemplary embodiment, considering that the S-box lookup table implementation method has fast computation speed but occupies more computing resources and a large area, while the composite domain calculation implementation method occupies fewer resources and a smaller area, in order to improve the applicability of the S-box in the present invention, in the S-box provided by the present invention, the input calculation module, intermediate calculation module, and output calculation module are constructed using lookup tables and / or composite domain calculations, and the number of S-boxes constructed using lookup tables and / or composite domain calculations can be comprehensively determined based on the requirements for occupied resources and area. In the algebraic calculation implementation, multiple logic gates, such as AND gates, OR gates, and NOT gates can be combined to form an arithmetic logic unit to implement calculations such as addition and multiplication, wherein the algebraic calculation can include composite domain calculations; in the lookup table implementation, the input value can be used as an index to obtain the output result by accessing a storage unit, such as RAM (Random Access Memory) or ROM (Read-Only Memory).

[0033] In an exemplary embodiment, in order to improve the operation efficiency of the intermediate calculation module, in the S-box provided by the present invention, as shown in FIG. Figure 3 As shown, the intermediate calculation module may include a first isomorphic mapping module, a first multiplication-addition calculation module, an inversion calculation module, a second multiplication-addition calculation module and a second isomorphic mapping module; A first isomorphic mapping module, configured to map the first operation result from the first finite field to the second finite field to obtain a first mapping result; a first multiplication-addition calculation module, configured to perform multiplication and addition operations on the first mapping result to obtain a first sub-operation result; an inverse calculation module, configured to perform an inverse operation on the first sub-operation result to obtain a second sub-operation result; A second multiplication and addition calculation module is used to perform multiplication and addition operations on the second sub-operation result to obtain a third sub-operation result; The second isomorphic mapping module is used to map the third sub-operation result from the second finite field back to the first finite field to obtain a second operation result.

[0034] In this way, each function of the intermediate computing module can be implemented through a separate module, avoiding the integration of operations under a single multi-functional module, making each function of the intermediate computing module more flexible, controllable and applicable.

[0035] It should be noted that the first finite field and the second finite field can be flexibly set according to the application scenario of the S-box. For example, the first finite field can be GF(2 8 ) field, the second finite field can be GF(2 4 ) domain, etc.

[0036] In a specific application scenario, the intermediate calculation module may include a second register group, such as Figure 3 As shown in the figures, the second register group is used to access the first mapping result, the first sub-operation result, the second sub-operation result and the third sub-operation result for the first isomorphic mapping module, the first multiplication-addition calculation module, the inversion calculation module, the second multiplication-addition calculation module and the second isomorphic mapping module.

[0037] In a specific application scenario, the second register group may include a first mapping register group, a first multiplication-addition register group, an inversion register group, and a second multiplication-addition register group; A first mapping register group, used for accessing a first mapping result; A first multiplication-addition register group, used for accessing the first sub-operation result; an inversion register group for storing and accessing the result of the second sub-operation; The second multiplication-addition register group is used to access the third sub-operation result.

[0038] As a result, in the S-box provided by the present invention, the first mapping result can be accessed in a single manner using the first mapping register group, the first sub-operation result can be accessed in a single manner using the first multiplication-addition register group, the second sub-operation result can be accessed in a single manner using the inversion register group, and the third sub-operation result can be accessed in a single manner using the second multiplication-addition register group. When data is needed, the first isomorphic mapping module, the first multiplication-addition calculation module, the inversion calculation module, the second multiplication-addition calculation module, and the second isomorphic mapping module only need to access it from the corresponding register group. There is no need to define data ownership when sharing register groups with other modules. This is equivalent to dividing the intermediate calculation module into a multi-stage pipeline to achieve parallel calculation. This can improve the convenience and efficiency of data access by the first isomorphic mapping module, the first multiplication-addition calculation module, the inversion calculation module, the second multiplication-addition calculation module, and the second isomorphic mapping module, thereby improving the computational efficiency of the first isomorphic mapping module, the first multiplication-addition calculation module, the inversion calculation module, the second multiplication-addition calculation module, and the second isomorphic mapping module, and further improving the computational efficiency of the intermediate calculation modules. It is also convenient to accurately control the start, pause, clear and other operations of each level of the hybrid S-box pipeline through efficient pipeline control logic.

[0039] In specific application scenarios, the inverse calculation module can be constructed based on a lookup table; the first isomorphic mapping module, the first multiplication-addition calculation module, the second multiplication-addition calculation module, and the second isomorphic mapping module can be constructed based on algebraic calculations. Of course, other methods of constructing the first isomorphic mapping module, the first multiplication-addition calculation module, the inverse calculation module, the second multiplication-addition calculation module, and the second isomorphic mapping module can also be used, and they can be flexibly configured according to actual needs.

[0040] In an exemplary embodiment, the operation process of the S-box can be flexibly determined according to the application scenario. For example, the S-box can be used for the SM4 algorithm, or for the AES algorithm, etc. For ease of understanding, in the S-box provided by the present invention, it is assumed that in the composite domain calculation, the calculation formula of the S-box is: SBox(x)=I(x·A1+B1)·A2+B2; then the input calculation module operates on the input data, the first matrix and the first vector to obtain the first operation result. In the process, the input calculation module can operate on the input data, the first matrix and the first vector according to the input operation formula to obtain the first operation result; the input operation formula includes: y1=x*A1+B1; wherein y1 represents the first operation result; x represents the input data; A1 represents the first matrix; B1 represents the first vector.

[0041] Accordingly, when the intermediate calculation module performs an inverse operation on the first operation result to obtain the second operation result, the intermediate calculation module can perform an inverse operation on the first operation result according to an inverse operation formula to obtain the second operation result; the inverse operation formula includes: y2=I(y1); wherein y2 represents the second operation result; and I represents the inverse operation. Accordingly, when the output calculation module performs an operation on the second operation result, the second matrix, and the second vector to obtain the output result of the input data, the output calculation module can perform an operation on the second operation result, the second matrix, and the second vector according to an output operation formula to obtain the output result of the input data; the output operation formula includes: y3=y2*A2+B2; wherein y3 represents the output result; A2 represents the second matrix; and B2 represents the second vector.

[0042] In an exemplary embodiment, the performance requirements of the encryption and decryption algorithm can be determined based on the application scenario of the S-box, followed by the performance requirements of the S-box, and finally, the hardware implementation of the S-box. For example, when determining the performance requirements of the encryption and decryption algorithm based on the application scenario, the performance of the device in which the S-box resides can be considered. For example, embedded systems typically have limited hardware resources, requiring the encryption and decryption algorithm to not only ensure low power consumption during execution but also perform efficient encryption and decryption operations within limited storage space. Therefore, the hardware implementation of the encryption and decryption algorithm requires a streamlined architecture, prioritizing power optimization and resource conservation. For another example, in data centers, encryption and decryption algorithms are used for encryption and decryption of large amounts of data, and computing speed and throughput are key requirements. The hardware implementation of the encryption and decryption algorithm requires an efficient computing unit that supports the simultaneous execution of multiple encryption and decryption tasks, minimizing latency during the encryption and decryption process. Accordingly, the S-box is the only nonlinear calculation in the encryption and decryption algorithm, and its high complexity has a significant impact on the performance of the encryption and decryption algorithm. Therefore, for the hardware implementation of the encryption and decryption algorithm with high performance requirements, the performance requirements of the S-box hardware implementation are also high. In this way, the performance requirements of the S-box are determined based on the performance requirements of the encryption and decryption algorithm. Finally, within the performance requirements, the pipeline levels, algebraic calculations, or lookup table implementations of the hybrid S-box's input calculation module, intermediate calculation module, and output calculation module are designed. The computational speed and area of the hybrid S-box under different pipeline levels, algebraic calculations, or lookup table implementations are evaluated, and the appropriate hybrid S-box hardware implementation is comprehensively selected.

[0043] The present invention provides an S-box, comprising an input calculation module, an intermediate calculation module, an output calculation module, and a first register group; the input calculation module is configured to read input data, a first matrix, and a first vector from the first register group, perform operations on the input data, the first matrix, and the first vector, obtain a first operation result, and store it in the first register group; the intermediate calculation module is configured to read the first operation result from the first register group, perform an inverse operation on the first operation result, obtain a second operation result, and store it in the first register group; the output calculation module is configured to read the second operation result, a second matrix, and a second vector from the first register group, perform operations on the second operation result, the second matrix, and the second vector, obtain an output result of the input data, and store it in the first register group. The present invention has the beneficial effect of providing the first register group in the S-box so that the input calculation module, the intermediate calculation module, and the output calculation module can use the first register group to access data. In this way, each module does not need to read data from other modules, so that all modules can perform calculations in parallel, shortening the time consumed by data transmission between modules and improving the computing performance of the S-box.

[0044] Based on the S-box provided in the above embodiment, the present invention also provides a data processing solution. Figure 4 , Figure 4The present invention provides a flowchart of a data processing method.

[0045] An embodiment of the present invention provides a data processing method, which may include the following steps: Step S101: Obtain input data and store the input data into the first register group of the S-box.

[0046] Step S102: calling the input calculation module of the S-box to read input data, a first matrix and a first vector from the first register group.

[0047] Step S103: calling the input calculation module of the S-box to perform an operation on the input data, the first matrix and the first vector, obtaining a first operation result and storing it in the first register group.

[0048] Step S104: calling the intermediate calculation module of the S-box to read the first operation result from the first register group.

[0049] Step S105: calling the intermediate calculation module of the S-box to perform an inverse operation on the first operation result to obtain a second operation result and store it in the first register group.

[0050] Step S106: calling the output calculation module of the S-box to read the second operation result, the second matrix and the second vector from the first register group.

[0051] Step S107: calling the input calculation module of the S-box to perform operation on the second operation result, the second matrix and the second vector to obtain the output result of the input data and store it in the first register group.

[0052] For the relevant description of the data processing method provided in this embodiment, please refer to the corresponding embodiment of the above-mentioned S-box, which will not be repeated here.

[0053] In an exemplary embodiment, considering that when the number of registers in the register group is small, the module cannot fully perform operations, and when the number of registers in the register group is large, the module cannot fully utilize the registers and there is a waste of resources, how to set a reasonable number of registers is a problem that needs to be solved when setting the S-box. In order to solve this problem, the data processing method provided in the embodiment of the present invention can also determine the computing power consumption requirement and computing efficiency requirement of the S-box; determine the performance resources allocated to the S-box; obtain test data; test the data processing performance of the input computing module, the intermediate computing module and the output computing module based on the test data to obtain test results, and the data processing performance includes the performance of processing a single data and the performance of processing multiple data in parallel; since the data processing performance includes the performance of processing a single data and the performance of processing multiple data in parallel, and the power consumption and efficiency of the S-box Efficiency is determined by the number of data processed in parallel by the S-box. Therefore, based on the test results, the number of data processed by the input computing module, the intermediate computing module, and the output computing module can be combined to obtain an initial combination result. In the initial combination result, the combination result that makes the S-box meet the computing power consumption requirements, computing efficiency requirements, and performance resources is determined as the target combination result. Finally, based on the target combination result, the number of registers occupied by the input computing module, the intermediate computing module, and the output computing module in the first register group can be determined. For example, if the target combination result indicates that the input computing module processes 3 data at a time, the intermediate computing module processes 4 data at a time, and the output computing module processes 3 data at a time, then it can be determined that the input computing module occupies 3 registers, the intermediate computing module occupies 4 registers, and the output computing module occupies 3 registers. Of course, the register data occupied by each module in the intermediate computing module in the second register group can also be further set.

[0054] In this way, after determining the computing power consumption requirement and computing efficiency requirement of the S-box and determining the performance resources allocated to the S-box, the present invention obtains test data, tests the data processing performance of the input computing module, the intermediate computing module and the output computing module based on the test data, and obtains test results, so as to reflect the performance of the module in processing a single data and the performance of processing multiple data in parallel with the help of the test results. In this way, since the data processing performance includes the performance of processing a single data and the performance of processing multiple data in parallel, and the performance of the S-box is determined by the number of data processed in parallel by the S-box, the input computing module, the intermediate computing module and the output computing module can be tested according to the test results. The number of self-processed data is combined to obtain an initial combination result; then, in the initial combination result, the combination result that makes the S-box meet the computing power consumption requirements, computing efficiency requirements and performance resources is determined as the target combination result, and finally, according to the target combination result, the number of registers occupied by the input computing module, the intermediate computing module and the output computing module in the first register group can be determined, thereby realizing the testing of the data processing performance of the S-box according to the test data, and then combining the configuration that meets the computing power consumption requirements, computing efficiency requirements and performance resources according to the test results, so that the configuration process of the S-box is no longer a black box, and the configuration efficiency and rationality of the S-box are guaranteed.

[0055] The present invention provides a data processing method, which obtains input data and stores the input data in a first register group of an S-box; calls an input calculation module of the S-box to read the input data, a first matrix, and a first vector from the first register group; calls the input calculation module of the S-box to operate on the input data, the first matrix, and the first vector to obtain a first operation result and store the result in the first register group; calls an intermediate calculation module of the S-box to read the first operation result from the first register group; calls the intermediate calculation module of the S-box to perform an inverse operation on the first operation result to obtain a second operation result and store the result in the first register group; calls an output calculation module of the S-box to read a second operation result, a second matrix, and a second vector from the first register group; calls the input calculation module of the S-box to operate on the second operation result, the second matrix, and the second vector to obtain an output result of the input data and store the result in the first register group. The beneficial effects of the present invention are as follows: a first register group is set in the S-box, and the input calculation module, the intermediate calculation module and the output calculation module can be called to apply the first register group to access data. In this way, there is no need for each module to read data from other modules, so that all modules can perform calculations in parallel, shortening the time consumed for transmitting data between modules, and improving computing performance with the help of the S-box.

[0056] The present invention also provides an electronic device and a computer-readable storage medium, both of which have the corresponding effects of the data processing method provided in the embodiment of the present invention. Figure 5 , Figure 5A schematic structural diagram of an electronic device provided by an embodiment of the present invention.

[0057] An embodiment of the present invention provides an electronic device, including a memory 201 and a processor 202. The memory 201 stores a computer program, and the processor 202 implements the steps of the data processing method described in any of the above embodiments when executing the computer program.

[0058] See also Figure 6 Another electronic device provided by an embodiment of the present invention may further include: an input port 203 connected to the processor 202 for transmitting commands inputted from the outside to the processor 202; a display unit 204 connected to the processor 202 for displaying the processing results of the processor 202 to the outside world; and a communication module 205 connected to the processor 202 for enabling communication between the electronic device and the outside world. The display unit 204 may be a display panel, a laser scanning display, or the like; the communication methods used by the communication module 205 include, but are not limited to, Mobile High-Definition Link (MHL), Universal Serial Bus (USB), High-Definition Multimedia Interface (HDMI), wireless connections such as Wireless Fidelity (WiFi), Bluetooth communication technology, Bluetooth Low Energy communication technology, and communication technology based on IEEE802.11s.

[0059] An embodiment of the present invention provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of the data processing method described in any of the above embodiments are implemented.

[0060] The computer-readable storage medium involved in the present invention includes random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs (Compact Disc Read-Only Memory), or any other form of storage medium known in the technical field.

[0061] An embodiment of the present invention provides a computer program product, including a computer program / instruction, which implements the steps of the data processing method described in any of the above embodiments when executed by a processor.

[0062] For descriptions of the relevant portions of the data processing method, computer program product, electronic device, and computer-readable storage medium provided in the embodiments of the present invention, please refer to the detailed description of the corresponding portions of the S-box provided in the embodiments of the present invention, and will not be repeated here. In addition, portions of the above-mentioned technical solutions provided in the embodiments of the present invention that are consistent with the implementation principles of corresponding technical solutions in the prior art are not described in detail to avoid excessive elaboration.

[0063] It should also be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or device comprising the element.

[0064] The above description of the disclosed embodiments will enable one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein, but is to be construed in the widest manner consistent with the principles and novel features disclosed herein.

Claims

1. An S-box, characterized in that: It includes an input calculation module, an intermediate calculation module, an output calculation module and a first register group; The input calculation module is configured to read input data, a first matrix, and a first vector from the first register group, perform an operation on the input data, the first matrix, and the first vector, obtain a first operation result, and store the result in the first register group; The intermediate calculation module is configured to read the first operation result from the first register group, perform an inverse operation on the first operation result to obtain a second operation result, and store the second operation result in the first register group; The output calculation module is used to read the second operation result, the second matrix and the second vector from the first register group, perform operations on the second operation result, the second matrix and the second vector, obtain the output result of the input data and store it in the first register group.

2. The S-box according to claim 1, wherein: The first register group includes an input register group, a first operation register group, a second operation register group and an output register group; The input register group is used to access the input data; The first operation register group is used to access the first operation result; The second operation register group is used to access the second operation result; The output register group is used to access the output result.

3. The S-box according to claim 1, wherein: The input calculation module, the intermediate calculation module and the output calculation module are constructed by lookup tables and / or composite domain calculations.

4. The S-box according to claim 1, wherein: The intermediate calculation module includes a first isomorphic mapping module, a first multiplication-addition calculation module, an inversion calculation module, a second multiplication-addition calculation module and a second isomorphic mapping module; The first isomorphic mapping module is configured to map the first operation result from the first finite field to the second finite field to obtain a first mapping result; The first multiplication and addition calculation module is used to perform multiplication and addition operations on the first mapping result to obtain a first sub-operation result; The inverse calculation module is used to perform an inverse operation on the first sub-operation result to obtain a second sub-operation result; The second multiplication and addition calculation module is used to perform multiplication and addition operations on the second sub-operation result to obtain a third sub-operation result; The second isomorphic mapping module is configured to map the third sub-operation result from the second finite field back to the first finite field to obtain the second operation result.

5. The S-box according to claim 4, characterized in that The intermediate calculation module includes a second register group, and the second register group is used to access the first mapping result, the first sub-operation result, the second sub-operation result and the third sub-operation result for the first isomorphic mapping module, the first multiplication-addition calculation module, the inversion calculation module, the second multiplication-addition calculation module and the second isomorphic mapping module.

6. The S-box according to claim 5, characterized in that The second register group includes a first mapping register group, a first multiply-add register group, an inversion register group, and a second multiply-add register group; The first mapping register group is used to access the first mapping result; The first multiplication-addition register group is used to access the first sub-operation result; The inversion register group is used to access the second sub-operation result; The second multiplication-addition register group is used to access the third sub-operation result.

7. The S-box according to claim 4, characterized in that The inverse calculation module is constructed based on a lookup table; the first isomorphic mapping module, the first multiplication-addition calculation module, the second multiplication-addition calculation module and the second isomorphic mapping module are constructed based on algebraic calculation.

8. The S-box according to any one of claims 1 to 7, characterized in that The input calculation module operates on the input data, the first matrix, and the first vector to obtain a first operation result, including: The input calculation module performs an operation on the input data, the first matrix and the first vector according to an input operation formula to obtain a first operation result; The input operation formula includes: y1=x*A1+B1; Among them, y1 represents the first operation result; x represents the input data; A1 represents the first matrix; B1 represents the first vector.

9. The S-box according to claim 8, characterized in that The intermediate calculation module performs an inverse operation on the first operation result to obtain a second operation result, including: The intermediate calculation module performs an inverse operation on the first operation result according to an inverse operation formula to obtain a second operation result; The inverse operation formula includes: y2=I(y1); Wherein, y2 represents the second operation result; I represents the inverse operation.

10. The S-box according to claim 9, characterized in that The output calculation module performs an operation on the second operation result, the second matrix, and the second vector to obtain an output result of the input data, including: The output calculation module performs an operation on the second operation result, the second matrix and the second vector according to an output operation formula to obtain an output result of the input data; The output operation formula includes: y3=y2*A2+B2; Among them, y3 represents the output result; A2 represents the second matrix; B2 represents the second vector.

11. A data processing method, characterized in that: include: Obtain input data and store the input data into the first register group of the S-box; Calling the input calculation module of the S-box to read input data, a first matrix, and a first vector from the first register group; calling the input calculation module of the S-box to perform an operation on the input data, the first matrix, and the first vector, obtaining a first operation result and storing the result in the first register group; calling the intermediate calculation module of the S-box to read the first operation result from the first register group; calling the intermediate calculation module of the S-box to perform an inverse operation on the first operation result to obtain a second operation result and storing the second operation result in the first register group; Calling the output calculation module of the S-box to read the second operation result, the second matrix and the second vector from the first register group; The input calculation module of the S-box is called to perform an operation on the second operation result, the second matrix, and the second vector to obtain an output result of the input data and store it in the first register group.

12. The data processing method according to claim 11, characterized in that: Also includes: Determining the computational power consumption and computational efficiency requirements of the S-box; Determining performance resources to be allocated to the S-box; Get test data; Testing the data processing performance of the input calculation module, the intermediate calculation module, and the output calculation module based on the test data to obtain test results, wherein the data processing performance includes the performance of processing a single data and the performance of processing multiple data in parallel; According to the test results, combining the amounts of data processed by the input calculation module, the intermediate calculation module, and the output calculation module to obtain an initial combination result; In the initial combination results, determining a combination result that enables the S-box to meet the computing power consumption requirement, the computing efficiency requirement, and the performance resource requirement as a target combination result; The number of registers occupied by each of the input calculation module, the intermediate calculation module, and the output calculation module in the first register group is determined according to the target combination result.

13. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the steps of the data processing method according to claim 11 or 12 are implemented.

14. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the data processing method according to claim 11 or 12 when executing the computer program.

15. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the data processing method according to claim 11 or 12 are implemented.

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