Adaptive interface circuit of communication interface and regulation and control method

Abstract

The invention relates to the technical field of communication data acquisition, in particular to a self-adaptive interface circuit of a communication interface and a regulation and control method, and the self-adaptive interface circuit comprises three communication interface transmitting ends, three communication interface receiving ends, an RS232 bus judgment circuit and a TTL (Transistor-Transistor Logic) level-RS485 bus judgment circuit, according to the method, the highest priority judgment is carried out based on a logic sequence, and if the RS232 bus judgment circuit judges that the bus is an RS232 bus, RS232 communication is carried out; if it is judged that the bus is not the RS232 bus, the RS232 communication is forbidden, and second priority judgment is carried out; second priority judgment is carried out through a TTL level-RS485 bus judgment circuit, and if a TTL level is judged, TTL level communication is carried out and RS485 communication is forbidden; and if the TTL level is judged to be non-TTL level, the bus is an RS485 bus. Automatic compatibility of three communication interfaces (RS485, RS232 and TTL levels) is realized, manual participation is not needed, the types of the communication interfaces do not need to be concerned about for a control side, and the universality and interchangeability of the photovoltaic inverter are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of communication data acquisition, in particular to an adaptive interface circuit and a control method of a communication interface. Background Art

[0002] Since photovoltaic power generation relies on natural lighting conditions, its power generation is highly periodic and collective, which has a strong impact on traditional power grids and seriously affects the safe operation of the power grid. Therefore, photovoltaic inverters are needed for communication and intelligent regulation of photovoltaic power generation.

[0003] However, in existing photovoltaic inverter systems, photovoltaic inverters from different manufacturers or different models may use different communication interface standards, such as RS485 bus, RS232 bus, and TTL level. Therefore, corresponding adapters or controllers need to be prepared for each interface. In addition, in order to cope with communication data collection from multiple communication interfaces, the power grid system needs to adjust the current circuit for communication through software or hardware settings when the communication interface is known. Summary of the Invention

[0004] To solve the above problems, the present invention provides an adaptive interface circuit of a communication interface, comprising three communication interface transmitting ends, three communication interface receiving ends, an RS232 bus judgment circuit and a TTL level-RS485 bus judgment circuit;

[0005] The RS232 bus judgment circuit includes a transceiver controller U1, a comparator U2, resistors R4-R7, a transistor Q1 and a capacitor C5; the negative input end of the comparator U2 is connected to the three-port interface receiving end; one end of the resistor R4 is grounded, and the other end is connected to one end of the resistor R5 and the positive input end of U2; the comparison output end of the comparator U2 is connected to one end of the resistor R6 and the base of the transistor Q1; the collector of the transistor Q1 is connected to one end of the resistor R7, one end of the capacitor C5 and the signal RS232 node; the transceiver controller U1 is electrically connected to the signal RS232 node, the three communication interface receiving end and the three-port interface sending end respectively;

[0006] The TTL level-RS485 bus judgment circuit includes a transceiver controller U3, a comparator U4, an analog switch U5-U6, resistors R12-R16, a resistor R30, diodes D1-D3 and capacitors C6-C7; the positive input end of the comparator U4 is connected to the three-communication interface receiving end, one end of the resistor R12 is connected to the reference ground, and the other end is connected to one end of R13 and the negative input end of U4; the comparison output end of the comparator U4 is connected to one end of the resistor R30, the other end of R30 is connected to one end of the resistor R14, one end of R15, one end of the capacitor C6 and the signal TTL node, the other end of the resistor R15 is connected to the base of the transistor Q2, and the collector of the third-stage Q2 is connected to one end of the resistor R16, one end of the capacitor C7 and the signal TTL node; the transceiver controller U3 is electrically connected to the signal RS232 node and the signal TTL node through diodes D1 and D2 respectively, and the transceiver controller U3 is electrically connected to the three-communication interface receiving end and the three-port interface sending end respectively;

[0007] The analog switch U5 is electrically connected to the signal TTL node and the three communication interface receiving ends respectively; the analog switch U6 is electrically connected to the signal TTL node and the three communication interface sending ends respectively; the signal TTL node is electrically connected to the signal RS232 via the diode D3.

[0008] The adaptive interface circuit of the communication interface also includes a signal isolation circuit including optical couplers O1-O4 and resistors R21-R28;

[0009] The forward end of the light emitting diode of the optical coupler O1 is connected to one end of the resistor R21, and the other end of R21 is connected to the power supply; the collector of the optical coupler O1 is connected to one end of the resistor R22, and the other end of the resistor R22 is connected to the power supply;

[0010] The forward end of the light emitting diode of the optocoupler O2 is connected to the resistor R24, and the other end of R24 is connected to the power supply; the collector of the optocoupler O2 is connected to one end of the resistor R23, and one end of the resistor R23 is connected to the power supply;

[0011] The positive terminal of the light-emitting diode of the optocoupler O3 is connected to one end of the resistor R25, and the other end of R25 is connected to the power supply; the negative terminal of the light-emitting diode of the optocoupler O3 is connected to the signal RS232 node; the collector of the optocoupler O3 is connected to one end of the resistor R26, and the other end of the resistor R26 is connected to the power supply;

[0012] The positive end of the light-emitting diode of the optocoupler O4 is connected to one end of the resistor R27, the other end of R27 is connected to the power supply, and the negative end of the light-emitting diode of the optocoupler O4 is connected to the signal TTL node; the collector of the optocoupler O4 is connected to one end of the resistor R28, and the other end of the resistor R28 is connected to the power supply.

[0013] The three-communication interface transmitting end is composed of an RS232 communication port transmitting end, a TTL level communication port transmitting end and an A end of the RS485 communication port, which are electrically connected.

[0014] The three communication interface receiving ends are composed of an RS232 communication port receiving end, a TTL level communication port receiving end and a B end of the RS485 communication port electrically connected.

[0015] In a specific implementation, the comparators U2 and U3 are both open-drain output comparators.

[0016] The three communication interface transmitting ends and the three communication interface receiving ends are electrically connected to the system circuit via a signal isolation circuit.

[0017] The present invention also provides an adaptive interface control method for a communication interface, which is applied to the adaptive interface circuit of the communication interface as described above, comprising:

[0018] The highest priority judgment is performed based on the logical order. If the RS232 bus judgment circuit judges that it is an RS232 bus, RS232 communication is performed and RS485 and TTL level communication are disabled. If it is judged that it is not an RS232 bus, RS232 communication is disabled and the second priority judgment is performed.

[0019] The second priority judgment is performed through the TTL level-RS485 bus judgment circuit. If it is judged to be TTL level, TTL level communication is performed and RS485 communication is disabled; if it is judged to be non-TTL level, it is RS485 bus, TTL level communication is disabled and RS485 communication is performed.

[0020] The specific method for judging the highest priority is: determine the level signal of the signal RS232 enable node at the comparison output end of the comparator U2. If the level signal of the signal RS232 enable node is low, it is an RS232 bus; if the signal RS232 enable node is high, it is not an RS232 bus.

[0021] The second priority judgment is performed by the TTL level-RS485 bus judgment circuit, specifically: determining the level signal of the signal TTL enable node at the comparison output end of the comparator U4; if the level signal of the signal TTL enable node is high, the transceiver controller U3 stops working, and TTL communication is performed by the analog switches U5 and U6; if the level signal of the signal TTL enable node is low, the transceiver controller U3 works and determines that the communication interface is the RS485 bus.

[0022] The adaptive interface control method of the communication interface also includes, before performing the highest priority judgment, initializing and configuring the power supply VCC, negative power supply VDD and resistance parameters of the RS232 bus judgment circuit and the TTL level-RS485 bus judgment circuit; and determining the logical order of the communication interface type judgment, setting the RS232 bus judgment as the highest priority, the TTL level judgment as the second priority, and the RS485 bus judgment as the third priority.

[0023] Beneficial effects: The present invention provides an adaptive interface circuit and control method for a communication interface, which realizes automatic compatibility of three communication interfaces (RS485, RS232, and TTL level) without manual intervention. The control side does not need to care about the type of communication interface, thereby improving the versatility and interchangeability of photovoltaic inverters and reducing the workload and difficulty of on-site construction and maintenance. The communication interface type is identified by judging the enable level signal of the receiving end of the RS232 bus, the receiving end of the TTL level, and the B end of the RS485 bus. And because the RS232 bus uses negative logic to transmit data, the highest level gives priority to judging the RS232 bus, ensuring the safety and reliability of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] By reading the detailed description of the preferred embodiment below, the solutions and advantages of the present application will become clear to those skilled in the art. The accompanying drawings are only for illustrating the preferred embodiment and are not to be considered as limiting the present invention.

[0025] In the attached figure:

[0026] Figure 1 This is the RS232 bus judgment circuit diagram;

[0027] Figure 2 This is the TTL level-RS485 bus judgment circuit diagram;

[0028] Figure 3 This is the signal isolation circuit diagram. DETAILED DESCRIPTION

[0029] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings.

[0030] Example 1

[0031] See also Figure 1-Figure 2 This embodiment provides an adaptive interface circuit for a communication interface, which is provided with an RS232 communication port, an RS485 communication port and a TTL level communication port. The adaptive interface circuit can automatically identify the type of the connected communication bus and perform communication interface settings.

[0032] Described adaptive interface circuit specifically comprises three communication interface transmitting ends, three communication interface receiving ends, RS232 bus judging circuit and TTL level-RS485 bus judging circuit.Described three communication interface transmitting ends (RS232T / RS485A / TTLT) are electrically connected by the transmitting end of RS232 communication port, the transmitting end of TTL level communication port and the A end of RS485 communication port, and three communication interface receiving ends (RS232R / RS485B / TTLR) are electrically connected by the receiving end of RS232 communication port, the receiving end of TTL level communication port and the B end of RS485 communication port.Described three communication interface transmitting ends, three communication interface receiving ends are electrically connected RS232 bus judging circuit and TTL level-RS485 bus judging circuit respectively.

[0033] In order to identify the RS232 communication connection and control the RS232 communication transmission and reception, the RS232 bus judgment circuit includes a transceiver controller U1, a comparator U2, resistors R1-R7, capacitors C1-C5, and a transistor Q1. U2 is an open-drain output comparator. Among them, the 1Pin pin of U1 is connected to the RS232 enable node. Pins 2 and 4 of U1 are connected to the two ends of capacitor C1 respectively, Pin 3 of U1 is connected to one end of capacitor C4, and the other end of capacitor C4 is grounded. Pins 5 and 6 of U1 are connected to the two ends of capacitor C2 respectively, Pin 7 of U1 is connected to one end of C3, and the other end of C3 is connected to the reference ground; the signal input end of Pin 8 of U1 is connected to the receiving end of the three-port interface; Pin 9 of U1 is connected to one end of resistor R3, and the other end of it is connected to RX (receive data); Pin 11 of U1 is connected to one end of resistor R2, and the other end of it is connected to TX (send data); Pins 12, 15, and 16 of U1 are all connected to the power supply VCC, the signal output end of Pin 13 of U1 is connected to one end of resistor R1, and the other end of R1 is connected to the sending end of the three-port interface; Pin 14 of U1 is grounded.

[0034] The 5-pin pin of comparator U2 is connected to the power supply VCC, and the 2-pin pin is connected to the negative power supply VDD; the 3-pin negative input terminal of U2 is connected to the receiving end of the three-port interface; one end of resistor R4 is grounded, and its other end is connected to one end of resistor R5 and the 1-pin positive input terminal of U2, and the other end of resistor R5 is connected to the negative power supply VDD; the 4-pin comparison output terminal of U2 is connected to one end of resistor R6 and the base of transistor Q1; the collector of transistor Q1 is connected to one end of resistor R7, one end of capacitor C5, and the signal RS232 enable node; the other end of resistor R6 and the other end of R7 are connected in parallel to the power supply VCC, and the emitter of transistor Q1 and the other end of capacitor C5 are grounded.

[0035] At the same time, in order to be able to identify the connection of TTL level or RS485 communication and perform interface communication, the TTL level-RS485 bus judgment circuit includes a transceiver controller U3, a comparator U4, analog switches U5 and U6, resistors R8-R19, resistor R30, diodes D1-D3 and capacitors C6 and C7, and U3 is an open-drain output comparator; wherein, the 1Pin pin of the transceiver controller U3 is connected to one end of the resistor R8, and the other end of R8 is connected to RX; the 2Pin pin of U3 is connected to the power supply VCC, so that the chip is in an automatic transceiver state; the 3Pin pin of U3 is connected to the positive pole of the diode D1 and the positive pole of the diode D2, and the negative pole of the diode D1 is connected to the signal TTL enable node The cathode of diode D2 is connected to the RS232 enable node The 4Pin pin of U3 is connected to one end of the resistor R9, and the other end of R9 is connected to TX; the 6Pin pin signal sending end of U3 is connected to one end of the resistor R11 and the sending end of the three communication interfaces, the 7Pin pin signal receiving end of U3 is connected to one end of the resistor R10 and the receiving end of the three communication interfaces, the other end of the resistor R11 and the 8Pin of U3 are connected to the power supply VCC; the other end of the resistor R10 and the 5Pin of U3 are connected to the reference ground.

[0036] The 5Pin of comparator U4 is connected to the power supply VCC, and the 2Pin of U4 is connected to the negative power supply VDD; the 1Pin positive input end of U2 is connected to the three-communication interface receiving end, one end of resistor R12 is connected to the reference ground, and the other end is connected to one end of R13 and the 3Pin negative input end of U4, the other end of R13 is connected to the power supply VCC, the 4Pin comparison output end of U4 is connected to one end of resistor R30, the other end of R30 is connected to one end of resistor R14, one end of R15, one end of capacitor C6, and the signal TTL node (TTL_EN), the other end of resistor R15 is connected to the base of transistor Q2, the collector of transistor Q2 is connected to one end of resistor R16, one end of capacitor C7, and the signal TTL enable node, the other end of resistor R14 and the other end of resistor R16 are connected to the power supply VCC, the emitter of transistor Q2, the other end of capacitor C6, and the other end of capacitor C7 are connected to the reference ground.

[0037] The 1Pin pin of the analog switch U5 is connected to one end of R17, the other end of R17 is connected to RX, the 3Pin of U5 is connected to the reference ground, the 4Pin of U5 is connected to the power supply VCC, the 7Pin of U5 is connected to the negative voltage VDD, the 6Pin of U5 is connected to the signal TTL node (TTL_EN), and the 8Pin of U5 is connected to the receiving end of the three communication interfaces.

[0038] The 1Pin pin of the analog switch U6 is connected to one end of R19, the other end of R19 is connected to TX, the 3Pin of U6 is connected to the reference ground, the 4Pin of U6 is connected to the power supply VCC, the 7Pin of U6 is connected to the negative voltage VDD, the 6Pin switch selection end of U6 is connected to the signal TTL node (TTL_EN), and the 8Pin input end of U6 is connected to the sending end of the three communication interfaces.

[0039] The adaptive interface circuit also includes a signal isolation circuit. The three communication interface transmitting ends and the three communication interface receiving ends are electrically connected to the system circuit via the signal isolation circuit, which can isolate the communication interface side from the system side, making the system operation safer and more reliable, and the system side does not need to care about the type of external communication interface.

[0040] like Figure 3 As shown, the signal isolation circuit includes optocouplers O1-O4 and resistors R21-R28; the positive end of the light-emitting diode of the optocoupler O1 is connected to one end of the resistor R21, and the other end of R21 is connected to the power supply VCC; the negative end of the light-emitting diode of the optocoupler O1 is connected to RX, and the collector of the optocoupler O1 is connected to the system node signal RX and one end of the resistor R22, and the other end of the resistor R22 is connected to the power supply S_VCC.

[0041] The positive end of the light-emitting diode of the optocoupler O2 is connected to the resistor R24, the other end of R24 is connected to the power supply S_VCC, the negative end of the light-emitting diode of the optocoupler O2 is connected to the system node signal RX, the collector of the optocoupler O2 is connected to TX and one end of the resistor R23, one end of the resistor R23 is connected to the power supply VCC, and the emitter of the optocoupler O2 is connected to the reference ground.

[0042] The positive end of the light-emitting diode of the optocoupler O3 is connected to one end of the resistor R25, the other end of R25 is connected to the power supply VCC, the negative end of the light-emitting diode of the optocoupler O3 is connected to the signal RS232 node, the collector of the optocoupler O3 is connected to one end of the resistor R26, the other end of the resistor R26 is connected to the power supply S_VCC, and the emitter of the optocoupler O3 is grounded.

[0043] The positive end of the light-emitting diode of the optocoupler O4 is connected to one end of the resistor R27, the other end of R27 is connected to the power supply VCC, the negative end of the light-emitting diode of the optocoupler O4 is connected to the signal TTL node, the collector of the optocoupler O4 is connected to the signal RS485 node and one end of the resistor R28, the other end of the resistor R28 is connected to the power supply S_VCC, and the emitter of the optocoupler O4 is grounded.

[0044] Example 2

[0045] This embodiment provides an adaptive interface control method for a communication interface, which is applied to the adaptive interface circuit of the communication interface described in Example 1. The method includes the following steps:

[0046] The highest priority judgment is performed based on the logical order. If the RS232 bus judgment circuit judges that it is an RS232 bus, RS232 communication is performed and RS485 and TTL level communication are disabled. If it is judged that it is not an RS232 bus, RS232 communication is disabled and the second priority judgment is performed.

[0047] The second priority judgment is performed through the TTL level-RS485 bus judgment circuit. If it is judged to be TTL level, TTL level communication is performed and RS485 communication is disabled; if it is judged to be non-TTL level, it is RS485 bus, TTL level communication is disabled and RS485 communication is performed.

[0048] Before performing the highest priority judgment, the method also includes initializing and configuring the power supply VCC, negative power supply VDD and resistance parameters of the RS232 bus judgment circuit and the TTL level-RS485 bus judgment circuit respectively; and determining the logical order of communication interface type judgment, setting the RS232 bus judgment as the highest priority, the TTL level judgment as the second priority, and the RS485 bus judgment as the third priority.

[0049] The specific method for determining the highest priority is:

[0050] Determine the level signal of the RS232 enable node at the comparison output of the comparator U2. If the level signal of the RS232 enable node is low, it is an RS232 bus; if the level signal of the RS232 enable node is high, it is not an RS232 bus.

[0051] By configuring VDD, R4, and R5, the voltage at U2's positive input can be set to -1V. When connected to the RS232 bus, since the static voltage level at the receiving pin of the RS232 communication port is negative and less than -3V, U2 outputs an open-drain high-impedance state, Q1 is turned on, and U1's 1Pin pin is low, judging that the bus is an RS232 bus. At this time, chip U1 operates normally. When communicating on the RS232 bus, although the dynamic voltage level at the receiving pin of the RS232 communication port may be greater than 3V, causing U2 to output a logic low level, due to the capacitor delay characteristics of C3, U1's 1Pin pin is logic low, and it is still judged to be an RS232 bus.

[0052] When connected to the RS485 bus or TTL level, regardless of whether the communication interface is in communication or non-communication state, its level is greater than 0, so the comparator U2 outputs a logic low level, the signal RS232 enable node is a logic high level, then the 1Pin pin of U1 is a high level, and the bus is judged to be a non-RS232 bus.

[0053] The second priority judgment is performed by the TTL level-RS485 bus judgment circuit, specifically:

[0054] Determine the level signal of the signal TTL enable node at the comparison output end of the comparator U4. If the level signal of the signal TTL enable node is high, the transceiver controller U3 stops working, and the analog switches U5 and U6 perform TTL communication; if the level signal of the signal TTL enable node is low, the transceiver controller U3 works, determines that the communication interface is the RS485 bus, and performs RS485 communication.

[0055] By configuring VCC, R12, and R13, the voltage at U4's negative input can be set to 1V. When connected to a TTL level, since it's not an RS232 bus, the RS232 enable node is logic high, the static voltage at the receiving end of the TTL communication port is 3.3V, comparator U4 outputs an open-drain high-impedance signal, transistor Q2 conducts, the TTL node is logic low, and the TTL enable node is logic high, disabling transceiver controller U3. The switch select terminals of analog switches U5 and U6 are both logic high. At this time, the three communication interface transmitters are connected to U6's 1Pin, and the three communication interface receivers are connected to U5's 1Pin, enabling TTL communication.

[0056] During TTL communication, although the dynamic level of the receiving pin of the TTL communication port may be lower than 1V, causing U4 to output a logic low level, due to the capacitor delay characteristics of C6 and C7, the signal TTL enable node is still a logic high level, the signal TTL node is still a logic low level, the transceiver controller U3 is still disabled, and the TTL level remains normal.

[0057] When connected to the RS485 bus, since it is not an RS232 bus, the signal RS232 enable node is at a logic high level, the RS485B static level is approximately 0V, the comparator U4 outputs a logic low level, the transistor Q2 is cut off, the signal TTL node is at a logic high level, and the signal TTL enable node is at a logic low level. At this time, the transceiver controller U3 works normally, and the switch selection ends of the analog switches U5 and U6 are both at a logic low level. At this time, Pin 1 of U6 and Pin 1 of U5 are both in a floating state, so RS485 communication can be performed.

[0058] During RS485 communication, although the dynamic level of the RS485 receiving pin may be higher than 1V, causing U4 to output open-drain high impedance, due to the capacitor delay characteristics of C6 and C7, the signal TTL enable node is still at a logic low level, and the signal TTL node is still at a logic high level. At this time, Pin 1 of U6 and Pin 1 of U5 are still in a floating state, and the transceiver controller U3 is still working normally, and RS485 communication is still being carried out.

Claims

1. An adaptive interface circuit for a communication interface, characterized in that: It includes three communication interface sending ends, three communication interface receiving ends, RS232 bus judgment circuit and TTL level-RS485 bus judgment circuit; The RS232 bus judgment circuit includes a transceiver controller U1, a comparator U2, resistors R4-R7, a transistor Q1 and a capacitor C5; the negative input end of the comparator U2 is connected to the three-port interface receiving end; one end of the resistor R4 is grounded, and the other end is connected to one end of the resistor R5 and the positive input end of U2; the comparison output end of the comparator U2 is connected to one end of the resistor R6 and the base of the transistor Q1; the collector of the transistor Q1 is connected to one end of the resistor R7, one end of the capacitor C5 and the signal RS232 node; the transceiver controller U1 is electrically connected to the signal RS232 node, the three communication interface receiving end and the three-port interface sending end respectively; The TTL level-RS485 bus judgment circuit includes a transceiver controller U3, a comparator U4, an analog switch U5-U6, resistors R12-R16, a resistor R30, diodes D1-D3 and capacitors C6-C7; the positive input end of the comparator U4 is connected to the three-communication interface receiving end, one end of the resistor R12 is connected to the reference ground, and the other end is connected to one end of R13 and the negative input end of U4; the comparison output end of the comparator U4 is connected to one end of the resistor R30, the other end of R30 is connected to one end of the resistor R14, one end of R15, one end of the capacitor C6 and the signal TTL node, the other end of the resistor R15 is connected to the base of the transistor Q2, and the collector of the third-stage Q2 is connected to one end of the resistor R16, one end of the capacitor C7 and the signal TTL node; the transceiver controller U3 is electrically connected to the signal RS232 node and the signal TTL node through diodes D1 and D2 respectively, and the transceiver controller U3 is electrically connected to the three-communication interface receiving end and the three-port interface sending end respectively; The analog switch U5 is electrically connected to the signal TTL node and the three communication interface receiving ends respectively; the analog switch U6 is electrically connected to the signal TTL node and the three communication interface sending ends respectively; the signal TTL node is electrically connected to the signal RS232 via the diode D3.

2. The adaptive interface circuit of the communication interface according to claim 1, characterized in that: It also includes a signal isolation circuit including optocouplers O1-O4 and resistors R21-R28; The forward end of the light emitting diode of the optical coupler O1 is connected to one end of the resistor R21, and the other end of R21 is connected to the power supply; the collector of the optical coupler O1 is connected to one end of the resistor R22, and the other end of the resistor R22 is connected to the power supply; The forward end of the light emitting diode of the optocoupler O2 is connected to the resistor R24, and the other end of R24 is connected to the power supply; the collector of the optocoupler O2 is connected to one end of the resistor R23, and one end of the resistor R23 is connected to the power supply; The positive terminal of the light-emitting diode of the optocoupler O3 is connected to one end of the resistor R25, and the other end of R25 is connected to the power supply; the negative terminal of the light-emitting diode of the optocoupler O3 is connected to the signal RS232 node; the collector of the optocoupler O3 is connected to one end of the resistor R26, and the other end of the resistor R26 is connected to the power supply; The positive end of the light-emitting diode of the optocoupler O4 is connected to one end of the resistor R27, the other end of R27 is connected to the power supply, and the negative end of the light-emitting diode of the optocoupler O4 is connected to the signal TTL node; the collector of the optocoupler O4 is connected to one end of the resistor R28, and the other end of the resistor R28 is connected to the power supply.

3. The adaptive interface circuit of the communication interface according to claim 1, characterized in that: The three-communication interface transmitting end is composed of an RS232 communication port transmitting end, a TTL level communication port transmitting end and an A end of the RS485 communication port, which are electrically connected.

4. The adaptive interface circuit of the communication interface according to claim 1, characterized in that: The three communication interface receiving ends are composed of an RS232 communication port receiving end, a TTL level communication port receiving end and a B end of the RS485 communication port electrically connected.

5. The adaptive interface circuit of the communication interface according to claim 1, characterized in that: The comparators U2 and U3 are both open-drain output comparators.

6. The adaptive interface circuit of the communication interface according to claim 2, characterized in that: The three communication interface transmitting ends and the three communication interface receiving ends are electrically connected to the system circuit via a signal isolation circuit.

7. A method for controlling an adaptive interface of a communication interface, applied to the adaptive interface circuit of the communication interface according to any one of claims 1 to 6, characterized in that: include: The highest priority judgment is performed based on the logical order. If the RS232 bus judgment circuit judges that it is an RS232 bus, RS232 communication is performed and RS485 and TTL level communication are disabled. If it is judged that it is not an RS232 bus, RS232 communication is disabled and the second priority judgment is performed. The second priority judgment is performed through the TTL level-RS485 bus judgment circuit. If it is judged to be TTL level, TTL level communication is performed and RS485 communication is disabled; If it is judged to be non-TTL level, it is RS485 bus, and TTL level communication is disabled for RS485 communication.

8. The adaptive interface control method of the communication interface according to claim 7, characterized in that: The specific method for determining the highest priority is: Determine the level signal of the RS232 enable node at the comparison output of the comparator U2. If the level signal of the RS232 enable node is low, it is an RS232 bus; if the level signal of the RS232 enable node is high, it is not an RS232 bus.

9. The adaptive interface control method of the communication interface according to claim 7, characterized in that: The second priority judgment is performed by the TTL level-RS485 bus judgment circuit, specifically: Determine the level signal of the signal TTL enable node at the comparison output end of the comparator U4. If the level signal of the signal TTL enable node is high, the transceiver controller U3 stops working, and the analog switches U5 and U6 perform TTL communication; if the level signal of the signal TTL enable node is low, the transceiver controller U3 works and determines that the communication interface is the RS485 bus.

10. The adaptive interface control method of the communication interface according to claim 7, characterized in that: Before performing the highest priority judgment, the method also includes initializing and configuring the power supply VCC, negative power supply VDD, and resistance parameters of the RS232 bus judgment circuit and the TTL level-RS485 bus judgment circuit; and determining the logical order of communication interface type judgment, setting the RS232 bus judgment as the highest priority, the TTL level judgment as the second priority, and the RS485 bus judgment as the third priority.

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