Dynamic on-resistance test system and method

Abstract

The invention relates to the technical field of semiconductor device testing, and discloses a dynamic on-resistance testing system and method, and the system comprises a current source module, a voltage source module, an acquisition module, a drive control module, and a main control module. The current source module is used for outputting a driving current to a tested device, the voltage source module is used for applying a bias voltage, the driving control module controls the on-off of the tested device, and the main control module coordinates the operation process of each module through a preset operation time sequence, so that the staged measurement of the dynamic on-resistance is realized. According to the system, through time sequence synchronous control and modular design, the problems of inaccurate sampling points caused by time sequence deviation, test errors caused by lead interference and insufficient power supply precision in the prior art are solved, and measurement results of initial on resistance, leakage current and steady-state on resistance of tested equipment can be accurately obtained; and reliable data support is provided for device performance evaluation.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor device testing, and in particular to a dynamic on-resistance testing system and method. Background Art

[0002] In semiconductor device testing, accurate measurement of dynamic on-resistance is crucial for evaluating the switching performance and reliability of power devices. Existing test solutions often rely on host computer software to coordinate multiple independent instruments, controlling the operating timing of current sources, drive signals, and sampling devices through software instructions. However, this approach has significant flaws. Communication delays between the host computer and hardware devices lead to timing synchronization errors, making it difficult to accurately capture transient changes in dynamic on-resistance. Parasitic resistance and electromagnetic interference introduced by long leads exacerbate measurement deviations of micro-ohm resistance. In addition, the insufficient output stability of traditional power supplies limits the test accuracy of leakage current and steady-state resistance, making it unable to meet the high-precision testing requirements of advanced power devices (such as GaN and SiC).

[0003] Therefore, there is an urgent need for a dynamic on-resistance test system that can effectively solve the problems of inaccurate timing synchronization, test deviation caused by lead interference, and insufficient power supply stability, and realize high-precision measurement of dynamic on-resistance throughout the entire process, providing reliable data support for device performance analysis and manufacturing process optimization. Summary of the Invention

[0004] In view of this, the present application provides a dynamic on-resistance testing system and method to solve the problems of inaccurate timing synchronization and test deviation caused by lead interference in existing test systems.

[0005] In a first aspect, the present application provides a dynamic on-resistance testing system, which includes a current source module, a voltage source module, an acquisition module, a drive control module, and a main control module.

[0006] Current source module, used to output driving current to the device under test;

[0007] An acquisition module, used to obtain the on-resistance of the device under test;

[0008] A voltage source module, used to apply a bias voltage to the device under test;

[0009] Drive control module, used to control the on and off of the device under test;

[0010] The main control module is used to control the operation process of the current source control module, the drive control module and the voltage sampling module according to the preset operation timing to obtain the measurement results of the initial on-resistance, leakage current and steady-state on-resistance of the device under test.

[0011] The dynamic on-resistance test system provided in the present application controls the coordinated operation of the current source module, voltage source module, drive control module and acquisition module according to a preset operation sequence through the main control module, thereby achieving strict synchronization of drive current application, device on / off and voltage sampling, thereby eliminating the communication delay controlled by the upper computer software and accurately capturing the transient changes of the dynamic on-resistance; through the independent design of the current source module and the voltage source module, high-precision drive current and bias voltage are output respectively, avoiding power supply coupling interference in traditional solutions, and improving the measurement accuracy of leakage current monitoring and steady-state resistance; on-resistance data is directly obtained through the acquisition module, reducing the parasitic resistance and electromagnetic interference introduced by long leads, and reducing the measurement error of micro-ohm dynamic resistance; combined with the phased dynamic test process (initial on-resistance → leakage current → steady-state on-resistance), the transient response and steady-state characteristics of the device are fully covered, solving the performance evaluation limitations caused by incomplete test process in the prior art, and ultimately achieving high-precision measurement of dynamic on-resistance.

[0012] In an optional implementation manner, the main control module is specifically configured to:

[0013] The drive control module controls the device under test to turn on, and the current source module applies a drive current to the device under test, and the acquisition module obtains the initial on-resistance of the device under test;

[0014] After obtaining the initial on-resistance, the device under test is turned off by the drive control module and a bias voltage is applied to the device under test by the voltage source module, and the leakage current of the device under test is obtained by the acquisition module;

[0015] After the leakage current is obtained, the device under test is controlled to be turned on through the drive control module and a drive current is applied to the device under test through the current source module, and the steady-state on-resistance of the device under test is obtained through the acquisition module.

[0016] This application provides a dynamic on-resistance test system in which the main control module controls the on and off of the device under test in stages, sequentially obtaining the initial on-resistance, leakage current, and steady-state on-resistance. Through a phased dynamic test process, the device's transient response (initial on-resistance), insulation performance (leakage current), and steady-state characteristics (steady-state on-resistance) are fully covered, resolving the existing problem of a single-stage test failing to fully evaluate dynamic performance and ensuring the systematic and complete nature of the test results.

[0017] In an optional embodiment, a sampling resistor is connected in series between the output end of the voltage source module and the device under test; the acquisition module is connected to both ends of the sampling resistor, collects the voltage signal of the sampling resistor, and calculates the leakage current based on the voltage signal.

[0018] The dynamic on-resistance test system provided in this application uses a current-voltage conversion design and high-precision voltage sampling to indirectly obtain the leakage current value, avoiding the measurement error introduced by traditional ammeters and improving the accuracy of leakage current monitoring. It is particularly suitable for high-precision detection of microampere-level leakage current.

[0019] In an optional embodiment, the acquisition module includes a voltage sampling unit and a calculation unit deployed at a preset position of the device under test;

[0020] a voltage sampling unit connected to the drain and source of the device under test and used to measure the voltage of the device under test;

[0021] The calculation unit is used to obtain the on-resistance of the device under test according to the voltage of the device under test and the current driving current.

[0022] The dynamic on-resistance test system provided in this application reduces lead resistance and electromagnetic interference through proximal voltage sampling, combines real-time drive current data, directly calculates the on-resistance, and significantly reduces the measurement error of micro-ohm level dynamic resistance.

[0023] In an optional embodiment, the output end of the drive control module is connected to the device under test through a drive unit;

[0024] The driving unit is used to convert the driving signal generated by the driving control module into a level signal adapted to the driving of the device under test, and is used to control the on and off timing of the device under test.

[0025] The dynamic on-resistance test system provided in the present application adapts to the driving requirements of different devices through level conversion, ensures the compatibility and timing accuracy of the driving signal, and solves the test failure problem caused by driving signal mismatch in the prior art.

[0026] In an optional implementation, the driving signal generated by the driving control module includes a rising time, a falling time, and a sampling point position of the driving pulse.

[0027] The dynamic on-resistance test system provided in this application adapts to devices with different switching speeds by flexibly configuring the drive pulse edge time and sampling point position, ensuring that the sampling moment is accurately aligned with the switching action, thereby improving the capture accuracy of transient resistance.

[0028] In an optional embodiment, the voltage source module includes a current limiting resistor and an isolating diode; one end of the current limiting resistor is connected to the output end of the voltage source module, and the other end is connected to the anode of the isolating diode; the cathode of the isolating diode is connected to the device under test, for limiting current and blocking reverse current.

[0029] The dynamic on-resistance test system provided in this application uses a current-limiting resistor to suppress overcurrent risks and protect the device under test; the isolating diode blocks the reverse current path to prevent damage to the high-voltage source module, thereby improving system safety and test stability.

[0030] In an optional embodiment, the main control module configures the location of the sampling point and the corresponding sampling time window through preset sampling parameters; the location of the sampling point is used to determine the collection time of the collection module; the sampling time window is used to determine the duration or collection interval of each collection.

[0031] The dynamic on-resistance test system provided in this application can flexibly adapt to different test scenarios (such as high-frequency switching or long-term steady-state testing) through sampling parameter settings, ensure data acquisition accuracy at key time points, and avoid the timing deviation problem of traditional fixed sampling strategies.

[0032] In an optional embodiment, the main control module communicates with the current source module, the drive control module and the acquisition module through an optical fiber interface to perform synchronous timing control; the current source module is a constant current source; and the voltage source module is a high voltage source, which is used to apply a bias voltage to the device under test for leakage current monitoring.

[0033] The dynamic on-resistance test system provided in this application uses optical fiber communication to achieve nanosecond timing synchronization, eliminating control errors caused by communication delays; the constant current source and high-voltage source provide high-precision and stable output, ensuring the reliability of the drive current and bias voltage, and meeting the high-voltage testing requirements of third-generation semiconductor devices.

[0034] In summary, the dynamic on-resistance test system provided in this application achieves strict synchronization of drive current application, device switching and voltage sampling through the timing control and phased process design of the main control module, accurately captures transient resistance changes and covers the full performance dimensions of the device; the current limiting and isolation design of the voltage source module combined with the current-voltage conversion of the sampling resistor ensures system safety while achieving high-precision monitoring of microampere leakage current; the proximal deployment and real-time calculation of the acquisition module effectively reduce lead interference and improve the measurement accuracy of micro-ohm dynamic resistance; the level adaptation and programmable parameter configuration of the drive unit are compatible with multiple device types and flexibly adapt to high-frequency testing requirements; the collaborative design of constant current source, high-voltage source and optical fiber synchronization provides a high-precision and stable test environment, which solves the core problems of timing deviation, lead interference, insufficient power supply stability and fragmentation of test processes in the existing technology.

[0035] In a second aspect, the present application provides a method for testing dynamic on-resistance, which is applied to the on-resistance testing system of the first aspect or any corresponding embodiment thereof, and is executed by a main control module. The method includes:

[0036] The drive control module controls the device under test to turn on, and the current source module applies a drive current to the device under test, and the acquisition module obtains the initial on-resistance of the device under test;

[0037] After obtaining the initial on-resistance, the device under test is turned off by the drive control module and a bias voltage is applied to the device under test by the voltage source module, and the leakage current of the device under test is obtained by the acquisition module;

[0038] After the leakage current is obtained, the device under test is controlled to be turned on through the drive control module and a drive current is applied to the device under test through the current source module, and the steady-state on-resistance of the device under test is obtained through the acquisition module.

[0039] In a third aspect, the present application provides a computer device comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, computer instructions being stored in the memory, and the processor executing the dynamic on-resistance testing method of the above-mentioned second aspect or any corresponding embodiment thereof by executing the computer instructions.

[0040] In a fourth aspect, the present application provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the dynamic on-resistance testing method of the second aspect or any corresponding embodiment thereof.

[0041] In a fifth aspect, the present application provides a computer program product, comprising computer instructions, which are used to enable a computer to execute the dynamic on-resistance testing method of the above-mentioned second aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the following is a brief introduction to the drawings required for use in the specific implementation methods or the description of the prior art. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0043] Figure 1 1 is a flow chart of a method for testing dynamic on-resistance according to an embodiment of the present application;

[0044] Figure 2 1 is a schematic structural diagram of a test circuit for ultra-low dynamic on-resistance according to an embodiment of the present application;

[0045] Figure 3 is a timing waveform diagram of a test circuit according to an embodiment of the present application;

[0046] Figure 4It is a schematic diagram of the hardware structure of the computer device of an embodiment of the present application. DETAILED DESCRIPTION

[0047] To make the purpose, technical solutions, and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the scope of protection of this application.

[0048] In semiconductor device testing, the measurement of dynamic on-resistance is a key metric for evaluating the performance of power devices (such as MOSFETs, IGBTs, and GaN devices). It directly reflects the device's transient response and steady-state operating characteristics during the switching process. Traditional testing solutions typically rely on host computer software to control multiple independent instruments (such as current sources, voltage sources, sampling devices, etc.), coordinating the operating timing of each device through software instructions. However, this method has significant drawbacks: communication delays between the host computer and hardware devices make it difficult to strictly synchronize the timing of current output, drive signal generation, and voltage sampling, resulting in the sampling points being unable to accurately align with the device's switching action. Especially when measuring fast-switching devices (such as GaN), timing deviations can significantly affect the accuracy of capturing transient resistance. In addition, parasitic resistance and electromagnetic interference introduced by long leads amplify measurement errors of micro-ohm dynamic resistance. The insufficient output stability of traditional current sources and high-voltage sources further limits the reliability of leakage current and steady-state resistance testing.

[0049] Existing technologies typically limit the dynamic on-resistance test process to a single stage (e.g., measuring only steady-state resistance), lacking a systematic assessment of the device's transient response and insulation performance. For example, in leakage current monitoring, traditional solutions lack the integration of high-precision bias voltage control and proximal sampling, resulting in insufficient leakage current measurement accuracy. In terms of drive signal control, fixed timing parameters struggle to adapt to the varying switching speeds of different devices, leading to significant deviations between test results and actual operating conditions.

[0050] Therefore, there is an urgent need for a dynamic on-resistance test system that can eliminate communication delays through hardware-level timing synchronization control, integrate high-precision power supply and modular design to reduce lead interference, and realize the automated execution of phased dynamic test processes, so as to accurately obtain the measurement results of initial on-resistance, leakage current and steady-state on-resistance, and provide reliable data support for device performance evaluation and manufacturing process optimization.

[0051] An embodiment of the present application provides a dynamic on-resistance testing system, which includes a current source module, a voltage source module, an acquisition module, a drive control module, and a main control module.

[0052] Among them, the current source module is used to output driving current to the device under test;

[0053] An acquisition module, used to obtain the on-resistance of the device under test;

[0054] A voltage source module, used to apply a bias voltage to the device under test;

[0055] Drive control module, used to control the on and off of the device under test;

[0056] The main control module is used to control the operation process of the current source control module, the drive control module and the voltage sampling module according to the preset operation timing to obtain the measurement results of the initial on-resistance, leakage current and steady-state on-resistance of the device under test.

[0057] Among the modules mentioned above, the current source module outputs a drive current to the device under test (DUT), providing a constant current stimulus for on-resistance testing. Drive current refers to the constant current applied to the DUT during testing to simulate the device's on-state in actual operation. The DUT is the semiconductor power device being tested, such as a MOSFET or GaN device.

[0058] The voltage source module applies a bias voltage (VD) to the device under test (DUT) to monitor leakage current when the device is off. Bias voltage refers to the high voltage applied when the device is off, simulating high-voltage operating conditions and detecting leakage current. The acquisition module acquires real-time on-resistance data from the DUT. On-resistance refers to the resistance between the drain and source when the device is on. The drive control module controls the DUT's on (on) and off (off) states, achieving device switching through drive signals (such as gate voltage VG).

[0059] The function of the main control module is to coordinate the operation process of the current source module, drive control module and voltage source module according to the preset operation sequence. The specific operation process is as follows:

[0060] The device under test is controlled to be turned on through the drive control module, and a drive current is applied to the device under test through the current source module, and the initial on-resistance of the device under test is obtained through the acquisition module; after obtaining the initial on-resistance, the device under test is controlled to be turned off through the drive control module, and a bias voltage is applied to the device under test through the voltage source module, and the leakage current of the device under test is obtained through the acquisition module; after obtaining the leakage current, the device under test is controlled to be turned on through the drive control module, and a drive current is applied to the device under test through the current source module, and the steady-state on-resistance of the device under test is obtained through the acquisition module.

[0061] The above operation process is divided into three stages, including an initial on-resistance measurement stage, a leakage current monitoring stage, and a steady-state on-resistance measurement stage.

[0062] During the initial on-resistance measurement phase, the main control module controls the driver control module to turn on the device under test (DUT). Simultaneously, the current source module outputs the drive current (ID). The acquisition module measures the DUT's drain-source voltage (V_DS) in real time and calculates the initial on-resistance. Initial on-resistance refers to the transient resistance value of the device at the initial stage of turn-on, reflecting the transient characteristics of the switch.

[0063] During the leakage current monitoring phase, the main control module controls the driver control module to shut down the device under test (DUT). The voltage source module applies a bias voltage (VD), and the acquisition module measures the leakage current. Leakage current is the tiny current flowing from the drain to the source under a high-voltage bias when the device is off, reflecting the insulation performance.

[0064] During the steady-state on-resistance measurement phase, the main control module turns the device back on and applies a drive current. The acquisition module then measures the steady-state on-resistance in thermal equilibrium. Steady-state on-resistance refers to the resistance value when the device reaches thermal equilibrium after being turned on, reflecting its long-term performance.

[0065] Through a phased process, the transient response, insulation performance and steady-state characteristics of the device are covered, overcoming the limitations of a single test phase.

[0066] Optionally, a sampling resistor is connected in series between the output end of the voltage source module and the device under test; the acquisition module is connected to both ends of the sampling resistor, collects the voltage signal of the sampling resistor, and calculates the leakage current based on the voltage signal. The series design of the sampling resistor is to connect a precision resistor (R_sense) in series between the output end of the voltage source module and the drain of the DUT. The acquisition module measures the voltage (V_sense) across R_sense and calculates the leakage current (I_leakage=V_sense / R_sense) using Ohm's law. The sampling resistor (R_sense) is a high-precision resistor used to convert current signals into voltage signals. Through the current-voltage conversion design, the error of directly measuring the microampere leakage current is avoided, and the detection accuracy is improved.

[0067] Optionally, the acquisition module includes a voltage sampling unit and a calculation unit deployed at a preset position of the device under test; the voltage sampling unit is connected to the drain and source of the device under test and is used to measure the voltage of the device under test; the calculation unit is used to obtain the on-resistance of the device under test based on the voltage of the device under test and the current driving current. The voltage sampling unit is directly connected to the drain and source of the DUT to measure the drain-source voltage (V_DS). The calculation unit receives V_DS and the driving current (ID) and calculates the on-resistance (R_DS(on)=V_DS / ID) in real time. The voltage sampling unit is a hardware module for accurately measuring voltage signals. The calculation unit is a logic module (such as an embedded processor) that performs data processing. Through proximal voltage sampling and real-time calculation, lead interference is reduced and the measurement accuracy of micro-ohm resistance is improved.

[0068] Optionally, the output end of the drive control module is connected to the device under test through a drive unit; the drive unit is used to convert the drive signal generated by the drive control module into a level signal suitable for the drive of the device under test, which is used to control the on and off timing of the device under test. The drive control module outputs a low-level logic signal (such as 0-5V), and the drive unit converts it into a high-level signal suitable for the DUT gate drive (such as +15V on / -5V off). The drive unit is a hardware module (such as a gate driver) that includes a level conversion circuit. The level signal is the voltage amplitude required to drive the device switch (such as GaN devices require negative voltage to shut down). The drive requirements of different devices are adapted through level conversion to ensure compatibility and timing accuracy.

[0069] Optionally, the drive signal generated by the drive control module includes the rise time, fall time, and sampling point location of the drive pulse. The rise time (VGTime) is the time required for the drive pulse to rise from a low level to a high level. The fall time (VDTime) is the time required for the drive pulse to fall from a high level to a low level. The sampling point location (S1, S2) defines the specific time of voltage sampling within the drive pulse cycle. The drive pulse is a periodic voltage signal that controls the on and off of the DUT. By flexibly configuring the drive signal parameters and adapting to the switching speed of different devices, the sampling point is ensured to be strictly aligned with the switching action.

[0070] Optionally, the voltage source module includes a current-limiting resistor and a blocking diode; wherein one end of the current-limiting resistor is connected to the output end of the voltage source module, and the other end is connected to the anode of the blocking diode; the cathode of the blocking diode is connected to the device under test, and is used to limit the current and block the reverse current. The current-limiting resistor (R_limit) limits the current applied to the DUT to prevent overcurrent from damaging the device. The unidirectional conduction characteristic of the blocking diode (D_block) prevents reverse current from flowing back from the DUT to the voltage source module. The current-limiting resistor is a protective resistor connected in series in the high-voltage path. The blocking diode is a semiconductor component that prevents reverse current. Through current limiting and blocking design, system safety is improved and damage to devices and power modules is avoided.

[0071] Optionally, the main control module configures the location of the sampling point and the corresponding sampling time window through preset sampling parameters; the location of the sampling point is used to determine the acquisition moment of the acquisition module; the sampling time window is used to determine the duration of each acquisition or the acquisition interval. The sampling point location defines the moment when the acquisition module starts sampling within the drive pulse cycle (such as S1 10ns after the rising edge). The sampling time window is the duration of a single sampling (such as 100ns) or the interval time of continuous sampling (such as 50ns). The sampling time window is the time range or frequency setting for data acquisition. By flexibly configuring the sampling parameters, it is possible to adapt to high-frequency or long-term test requirements and ensure data accuracy at critical time points.

[0072] Optionally, the main control module communicates with the current source module, the drive control module and the acquisition module through an optical fiber interface to perform synchronous timing control; the current source module is a constant current source; the voltage source module is a high voltage source, which is used to apply a bias voltage to the device under test for leakage current monitoring. The optical fiber interface is used to transmit instructions between the main control module and each module through optical fiber to achieve nanosecond synchronous control. The constant current source is used to output high current accuracy (such as ±0.05%) to ensure the stability of the drive current. The high voltage source is used to output bias voltages in the hundreds of volts to thousands of volts to meet the testing requirements of high-voltage devices. The constant current source is a power supply whose output current is not affected by load changes. The high voltage source is a power supply module that provides high voltage output. Optical fiber communication eliminates communication delays, and the constant current source and high voltage source provide high-precision excitation to ensure the reliability and consistency of the full system test.

[0073] The embodiment of the present application also provides a method for testing dynamic on-resistance, which is applied to the on-resistance testing system of the above embodiment. The method is executed by the main control module. The process of the method is as follows: Figure 1 As shown, the method includes the following steps:

[0074] S101 , controlling the device under test to turn on through a drive control module, applying a drive current to the device under test through a current source module, and obtaining an initial on-resistance of the device under test through an acquisition module.

[0075] S102 , after obtaining the initial on-resistance, controlling the device under test to be turned off through the driving control module, applying a bias voltage to the device under test through the voltage source module, and obtaining the leakage current of the device under test through the acquisition module.

[0076] S103 . After obtaining the leakage current, the device under test is controlled to be turned on through the driving control module, a driving current is applied to the device under test through the current source module, and the steady-state on-resistance of the device under test is obtained through the acquisition module.

[0077] In summary, the dynamic on-resistance test system provided in the embodiment of the present application realizes strict synchronization of driving current application, device switching and voltage sampling through the timing control and phased process design of the main control module, accurately captures transient resistance changes and covers the full performance dimension of the device; the current limiting and isolation design of the voltage source module is combined with the current-voltage conversion of the sampling resistor to achieve high-precision monitoring of microampere leakage current while ensuring system safety; the proximal deployment and real-time calculation of the acquisition module effectively reduce lead interference and improve the measurement accuracy of micro-ohm dynamic resistance; the level adaptation and programmable parameter configuration of the drive unit are compatible with multiple device types and flexibly adapt to high-frequency testing requirements; the collaborative design of constant current source, high voltage source and optical fiber synchronization provides a high-precision and stable test environment, which solves the core problems of timing deviation, lead interference, insufficient power supply stability and fragmentation of test process in the prior art.

[0078] For example, a specific example will be used below to describe in detail the dynamic on-resistance testing system of the above embodiment.

[0079] In ATE (automatic test equipment), GaN devices offer lower on-resistance and reduced switching losses. Their dynamic on-resistance reflects not only the device's performance under static conditions but also its performance in actual operation. Changes in on-resistance are directly related to the amount of heat generated by the device. High on-resistance causes the device to generate more heat, which affects its thermal stability and lifespan. By testing dynamic on-resistance, the device's thermal performance and long-term reliability can also be assessed. During the manufacturing process, dynamic on-resistance testing is also an important quality control measure. Any detected anomalies may indicate manufacturing defects or material issues, requiring necessary adjustments before mass production.

[0080] Existing similar products all use different functional boards, with a host computer system controlling the output resources of each board to synthesize and test on-resistance. Others use a host computer to control the output resources of different instruments to integrate and test on-resistance. Still others control a high-voltage source to output current through a resistor to the DUT for testing.

[0081] The main problem with these similar products is that they are all controlled by a host computer, which lacks precise timing synchronization. This results in the test sampling start point not being very close to the switching point. Furthermore, for remote devices under test, ultra-low on-resistance measurements can easily exhibit large deviations due to long leads. For fast-switching devices like GaN, the test does not fully adhere to the principles of dynamic on-resistance testing. Furthermore, when testing with a high-voltage source through a resistor, current accuracy is limited.

[0082] To address the above-mentioned issues, this embodiment, based on the above-mentioned dynamic on-resistance test system, constructs an ultra-low dynamic on-resistance test circuit. This circuit solves the problem of high-speed synchronous control between the FPGA and the FPGA of each resource, and places the sampling board close to the DUT device under test to solve the problem of excessive deviation in ultra-low on-resistance testing. The basic function of this circuit is to test the ultra-low dynamic on-resistance of the device, so that feedback can be provided after the test to correct manufacturing parameters, thereby producing better semiconductor devices. Therefore, its function is to test the on-resistance of actual applications and test whether the device has defects.

[0083] Compared to other test methods, the test circuit of this embodiment differs primarily in its precise synchronization control between FPGA hardware and its proximity to the DUT, enabling accurate and stable testing. This test circuit incorporates both a high-precision high-voltage source and a constant-current source, ensuring accurate testing.

[0084] The circuit structure of the ultra-low dynamic on-resistance test circuit of this embodiment is as follows: Figure 2 As shown, Q1 is the device under test (DUT).

[0085] In this circuit, the host computer software inputs parameters such as Q1's maximum voltage and current. These parameters are then transmitted to the main control board Main_FPGA via a PCIe card. The main control board Main_FPGA communicates with the current source Curr_FPGA and the acquisition board Samp_FPGA via optical fiber to obtain sampled current and voltage. The main control board Main_FPGA also controls the HV output high-voltage bias signal source and the drive signal to the device under test (DUT). The current source Curr_FPGA controls the output current based on the input parameters and the actual sampled output current, transmitting this data back to the main control board Main_FPGA. The acquisition board Samp_FPGA samples the voltage of DUT Q1 through a sampling circuit, monitors the leakage current when bias is applied, and transmits this data back to the main control board Main_FPGA. Direct synchronization between the FPGAs via optical fiber ensures synchronized voltage and current sampling at every point. Furthermore, voltage sampling close to the DUT enables precise measurement of even small resistances.

[0086] The main principle is as follows Figure 2 As shown, the power section primarily consists of a current source and a voltage source. HV applies voltage to the DUT through optional resistor R1 for current limiting and blocking diode D1, with current monitoring in the loop. The current source applies current to the DUT through blocking diode D2 and samples the current through a precision resistor. The voltage across the DUT is sampled by the acquisition board.

[0087] The timing waveform obtained by the test is as follows Figure 3 As shown in the figure, the driving edges are VG1, VG2, VG3, and VG4, respectively. The driving pulse is set by these four parameters, VGTime and VDTime. VDon and VDoff are used to set the start and end time of applying the VDS voltage. S1 and S2 are used to set the starting point of the two sampling positions. The number of samples and time are fixed by the underlying code.

[0088] The specific working process is as follows: the constant current source is applied first, followed by the first pulse drive. After a certain period of time, the VD voltage is applied, and the first resistance sampling is performed. The Front RDSon value at this time is measured. After sampling, the DUT is turned off and the bias voltage VD is applied to the DUT while monitoring the DUT leakage current. After the VD Stress time is reached, VG is turned on, causing the DUT to conduct again. The current ID rises to the set value again, and the Back RDSon value at this time is measured. The VD voltage is then turned off, shutting down the current. The VG drive is turned off, and the VDS power supply is turned off to complete the test.

[0089] In this test circuit, the master control FPGA communicates in real time with the current source FPGA and sampling board FPGA via optical fiber, achieving nanosecond-level synchronization of data acquisition and control. The timing of each module (high-voltage source, constant-current source, and drive signal) is directly controlled by the FPGA, eliminating timing delays in the host computer. Placing the voltage sampling circuit directly near the DUT reduces lead resistance and electromagnetic interference, improving the accuracy of low-resistance measurements. Independently designed high-precision high-voltage (HV) and constant-current (Curr) sources, combined with precision resistors and blocking diodes, ensure output current and voltage stability.

[0090] The phased test process is as follows: A constant current source outputs current to the DUT, the first drive pulse (VG1) is applied, and the initial on-resistance (Front RDSon) is measured. The DUT is then turned off, a bias voltage (VD) is applied, and leakage current is monitored to assess thermal stability. The DUT is then turned back on and the steady-state on-resistance (Back RDSon) is measured. Test repeatability is ensured by fixing the sampling positions (S1, S2) and timing parameters (VGTime, VDTime).

[0091] The present application also provides a computer device. Figure 4 , Figure 4This is a schematic diagram of the structure of a computer device provided by an optional embodiment of the present application. Figure 4 As shown, the computer device includes: one or more processors 10, memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components utilize different buses to communicate with each other and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in the memory or on the memory to display the graphical information of the GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Equally, multiple computer devices can be connected, and each device provides part of the necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 4 A processor 10 is taken as an example.

[0092] The processor 10 may be a central processing unit, a network processor, or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic, or any combination thereof.

[0093] The memory 20 stores instructions that can be executed by at least one processor 10, so that the at least one processor 10 executes the method shown in the above embodiment.

[0094] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and application programs required for at least one function; the data storage area may store data created based on the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely located relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0095] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid-state drive; the memory 20 may also include a combination of the above types of memory.

[0096] The computer device further includes a communication interface 30 for the computer device to communicate with other devices or a communication network.

[0097] The embodiments of the present application also provide a computer-readable storage medium. The above-mentioned method according to the embodiment of the present application can be implemented in hardware, firmware, or implemented as a computer code that can be recorded in a storage medium, or implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and downloaded through a network and will be stored in a local storage medium, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state drive, etc.; further, the storage medium can also include a combination of the above-mentioned types of memory. It can be understood that a computer, a processor, a microprocessor controller or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor or hardware, the method shown in the above embodiment is implemented.

[0098] Part of the present application may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present application through the operation of the computer. Those skilled in the art should understand that the form in which the computer program instruction exists in a computer-readable medium includes but is not limited to a source file, an executable file, an installation package file, etc. Accordingly, the way in which the computer program instruction is executed by the computer includes but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium can be any available computer-readable storage medium or communication medium that can be accessed by the computer.

[0099] Although the embodiments of the present application have been described with reference to the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present application, and such modifications and variations shall fall within the scope defined by the appended claims.

Claims

1. A dynamic on-resistance test system, characterized in that: The system includes a current source module, a voltage source module, an acquisition module, a drive control module and a main control module; wherein, The current source module is used to output a driving current to the device under test; The acquisition module is used to obtain the on-resistance of the device under test; The voltage source module is used to apply a bias voltage to the device under test; The drive control module is used to control the on and off of the device under test; The main control module is used to control the operation process of the current source control module, the drive control module and the voltage sampling module according to the preset operation timing to obtain the measurement results of the initial on-resistance, leakage current and steady-state on-resistance of the device under test.

2. The system according to claim 1, wherein: The main control module is specifically used to: The drive control module controls the device under test to turn on, and the current source module applies a drive current to the device under test, and the acquisition module obtains the initial on-resistance of the device under test; After obtaining the initial on-resistance, the device under test is turned off by the drive control module and a bias voltage is applied to the device under test by the voltage source module, and the leakage current of the device under test is obtained by the acquisition module; After the leakage current is obtained, the device under test is controlled to be turned on through the drive control module and a drive current is applied to the device under test through the current source module, and the steady-state on-resistance of the device under test is obtained through the acquisition module.

3. The system according to claim 2, characterized in that A sampling resistor is connected in series between the output end of the voltage source module and the device under test; the acquisition module is connected to both ends of the sampling resistor, acquires the voltage signal of the sampling resistor, and calculates the leakage current according to the voltage signal.

4. The system according to claim 2, wherein: The acquisition module includes a voltage sampling unit and a calculation unit deployed at a preset position of the device under test; The voltage sampling unit is connected to the drain and source of the device under test and is used to measure the voltage of the device under test; The calculation unit is used to obtain the on-resistance of the device under test according to the voltage of the device under test and the current driving current.

5. The system according to claim 4, characterized in that The output end of the drive control module is connected to the device under test through a drive unit; The driving unit is used to convert the driving signal generated by the driving control module into a level signal adapted to drive the device under test, so as to control the on and off timing of the device under test.

6. The system according to claim 5, characterized in that The driving signal generated by the driving control module includes the rising time, falling time and sampling point position of the driving pulse.

7. The system according to claim 6, characterized in that The voltage source module includes a current limiting resistor and an isolating diode; wherein, One end of the current limiting resistor is connected to the output end of the voltage source module, and the other end is connected to the anode of the blocking diode; The cathode of the blocking diode is connected to the device under test and is used to limit current and block reverse current.

8. The system according to claim 7, characterized in that The main control module configures the location of the sampling point and the corresponding sampling time window through preset sampling parameters; the location of the sampling point is used to determine the collection moment of the collection module; the sampling time window is used to determine the duration or collection interval of each collection.

9. The system according to any one of claims 1 to 8, characterized in that: The main control module communicates with the current source module, drive control module and acquisition module through an optical fiber interface to perform synchronous timing control; the current source module is a constant current source; the voltage source module is a high voltage source, which is used to apply a bias voltage to the device under test for leakage current monitoring.

10. A method for testing dynamic on-resistance, characterized in that: The method is applied to the on-resistance test system according to any one of claims 1 to 9, and the method is executed by a main control module, and the method includes: The drive control module controls the device under test to turn on, and the current source module applies a drive current to the device under test, and the acquisition module obtains the initial on-resistance of the device under test; After obtaining the initial on-resistance, the device under test is turned off by the drive control module and a bias voltage is applied to the device under test by the voltage source module, and the leakage current of the device under test is obtained by the acquisition module; After the leakage current is obtained, the device under test is controlled to be turned on through the drive control module and a drive current is applied to the device under test through the current source module, and the steady-state on-resistance of the device under test is obtained through the acquisition module.

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