Partially thinned printed circuit board with flexible connector
Through the design of layered local thinning PCB and flexible connectors, the problem of height increase in semiconductor packages when increasing capacity is solved, achieving high capacity and flexible packaging compatible with standard connectors.
Patent Information
- Application Number
- CN202411605875.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-02-22
- Filing Date
- 2024-11-12
- Publication Date
- 2025-08-22
AI Technical Summary
The increase in height of existing semiconductor packages when increasing capacity leads to inability to adapt to thin electronic devices or violates industry standards, and the existing connectors do not have sufficient flexibility and adaptability.
Layered or partially thinned printed circuit boards (PCBs) are employed, where the first part has a standard connector thickness, the second part has a reduced thickness and is mechanically and electrically connected by a flexible connector, allowing more semiconductor dies to be stacked on the thin portion, and the package length and shape are adjusted using the flexible connector.
Achieves increased capacity and capability without increasing package height while remaining compatible with standard connectors, providing flexibility in packaging and placement options.
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Figure CN120529485A_ABST
Abstract
Description
Background Art
[0001] Semiconductor packages such as non-volatile memory devices are widely used in various electronic devices, such as cellular phones, digital cameras, personal digital assistants, medical electronic devices, mobile computing devices, and non-mobile computing devices. In examples where the semiconductor package is a non-volatile memory device, the semiconductor package includes a stack of memory dies (such as NAND memory dies). The capacity of the non-volatile memory device can be increased by adding additional memory dies to the stack. However, as additional memory dies are added to the stack, the height of the semiconductor package increases.
[0002] Increasing the height of a semiconductor package may not be feasible for a variety of reasons. For example, electronic devices continue to become thinner, and a semiconductor package with an increased height may not fit within the housing of the electronic device. In another example, the overall height of the semiconductor package may be dictated by one or more industry standards and / or constraints.
[0003] Therefore, it would be beneficial to have a semiconductor package with increased capacity and / or capability without increasing the height of the semiconductor package. Summary of the Invention
[0004] This application describes a semiconductor package having a layered or partially thinned printed circuit board (PCB). The layered or partially thinned PCB includes a first portion having a first thickness or height and a second portion having a second thickness or height less than the first thickness or height. In one example, the PCB is a single, integral structure. In another example, the first portion and the second portion are separate PCBs connected by a flexible connector (e.g., a rigid-flex connector).
[0005] In an example, various semiconductor dies and / or passive components are mounted or otherwise coupled to a thinner portion of the PCB. Consequently, more semiconductor dies can be placed on the second portion compared to a solution where different portions of the PCB do not have different heights. For example, the increased height of the memory die stack can be offset by the reduced thickness of the PCB.
[0006] The first portion of the PCB, or the thicker portion of the PCB, includes contacts (e.g., gold finger contacts or other types of contacts) for a connector. The connector is used to communicatively couple the semiconductor package to an associated connector socket of a host device. In one example, the connector is an M.2 connector. In another example, the connector is an Enterprise and Data Center Standard Form Factor (EDSFF) connector.
[0007] Therefore, the present application describes a semiconductor package comprising a PCB portion having a first thickness and a second PCB portion having a second thickness less than the first thickness. A flexible connector is disposed between the first and second PCB portions. In an example, the flexible connector mechanically and electrically connects the first and second PCB portions. A plurality of contacts are disposed on the first PCB portion for electrically coupling the semiconductor package to a connector socket of a host device. Additionally, a plurality of semiconductor dies are disposed on the second PCB portion.
[0008] Other examples describe a semiconductor package including a plurality of contacts disposed on a first PCB portion. In some examples, the first PCB portion also includes a first number of layers and has a first thickness. A plurality of semiconductor dies are disposed on a second PCB portion. In some examples, the second PCB portion is separate from the first PCB portion and has a second number of layers less than the first number of layers. The second PCB portion also has a second thickness less than the first thickness. In some examples, a flexible connector couples the first and second PCB portions.
[0009] The present application also describes a semiconductor package comprising a first PCB portion having a first thickness and a second PCB portion having a second thickness less than the first thickness. A flexible connection device is disposed between the first PCB portion and the second PCB portion. In an example, the flexible connection device mechanically and electrically couples the first PCB portion and the second PCB portion. The semiconductor package further comprises a plurality of signal-carrying devices disposed on a surface of the first PCB portion. In addition, a plurality of semiconductor dies are disposed on the second PCB portion.
[0010] This summary is provided to introduce some concepts in a simplified form that are further described in the detailed description below. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] Non-limiting and non-exhaustive examples are described with reference to the following figures.
[0012] Figure 1 A partially thinned printed circuit board (PCB) is shown according to an example.
[0013] Figure 2A A partially thinned PCB having a first PCB portion and a second PCB portion connected by a flexible connector according to an example is shown.
[0014] Figure 2B A partially thinned PCB having a first PCB portion and a second PCB portion connected by a flexible connector according to another example is shown.
[0015] Figure 3A A semiconductor package with a partially thinned PCB according to an example is shown.
[0016] Figure 3B Shown according to the example Figure 3A A top view of a semiconductor package.
[0017] Figure 4A A semiconductor package according to an example is shown in which one of the PCB portions is encapsulated.
[0018] Figure 4B A semiconductor package is shown according to an example in which a PCB portion is encapsulated and includes heat dissipation features.
[0019] Figure 4C A semiconductor package is shown according to an example in which a PCB portion is encapsulated and includes a plurality of heat dissipation features. DETAILED DESCRIPTION
[0020] In the following detailed description, reference is made to the accompanying drawings which form a part of the detailed description, and in the drawings, specific embodiments or examples are shown by way of illustration. These aspects may be combined, other aspects may be utilized, and the structure may be changed without departing from the present disclosure. Therefore, the following detailed description should not be construed as having a limiting meaning, and the scope of the present disclosure is defined by the appended claims and their equivalents.
[0021] The demand for semiconductor packages, such as non-volatile memory devices, is increasing. However, as demand increases, so does the need for higher capacity and better performance. In examples where the semiconductor package is a non-volatile memory device, such as a NAND memory device, the non-volatile memory device includes multiple NAND memory dies stacked on top of each other. To increase capacity, additional memory dies are added to the stack.
[0022] As additional memory dies are added to the stack, the height of the semiconductor package increases. However, increasing the height of the semiconductor package may not be feasible. For example, as electronic devices continue to become thinner, thicker / taller semiconductor packages may not fit within the housing of the electronic device. In another example, the height or thickness of the semiconductor package may need to conform to industry standards or constraints.
[0023] To address the aforementioned issues, the present application describes a semiconductor package having a layered or partially thinned printed circuit board (PCB). In one example, the partially thinned PCB includes a first portion having a first thickness or height and a second portion having a second thickness or height. In one example, the second thickness or height is less than the first thickness or height.
[0024] The partially thinned PCB of the present disclosure has a variety of different configurations. In one configuration, the partially thinned PCB is a single, integral structure. In another configuration, the first and second portions are separate PCBs. However, in this configuration, the first and second PCB portions are electrically and mechanically coupled using a flexible connector (such as, for example, a rigid-flex connector).
[0025] The first or thicker portion of the PCB includes contacts (e.g., gold finger contacts or other types of contacts) for a connector. The connector is used to communicatively couple the semiconductor package to an associated connector socket of a host device. In one example, the connector is an M.2 connector. In another example, the connector is an Enterprise and Data Center Standard Form Factor (EDSFF) connector.
[0026] In some examples, the first portion has a thickness or height that matches the thickness or height of a standard connector. For example, if the height of a standard M.2 connector is 0.8 millimeters (mm), the thickness or height of the first portion is 0.8 mm.
[0027] In an example, various semiconductor dies and / or passive components are mounted (e.g., surface mounted) on or otherwise coupled to the second / thinner portion of the PCB. Thus, more semiconductor dies can be placed on the second portion compared to current solutions. For example, the increased height of the memory die stack due to the increased number of semiconductor dies is offset by the reduced thickness of the second portion.
[0028] Thus, many technical benefits can be achieved, including but not limited to increasing the capacity and / or capability of a semiconductor package without increasing the height or thickness of the semiconductor package; enabling the semiconductor package to utilize standard connectors without requiring the host device to have a new type of connector; and allowing flexibility in placement and / or packaging options due to the use of flexible connectors.
[0029] will be relative to Figures 1 to 4C These benefits and other examples are shown and described in more detail.
[0030] Figure 1A partially thinned printed circuit board (PCB) 100 is shown according to an example. Although specific reference is made to a PCB, the examples described herein are applicable to a substrate or any other material on which electronic components are placed and / or mounted.
[0031] In an example, the partially thinned PCB 100 is a single, integral piece. For example, the partially thinned PCB 100 includes a first portion 110 having a first thickness or height (indicated by "H") and a second portion 120 having a second thickness or height (indicated by "h"). In an example, the first portion 110 of the partially thinned PCB 100 has a first thickness to enable the first portion 110 to function as a connector. By way of example, and as will be described in greater detail below, the first portion 110 includes a plurality of contacts that enable the first portion 110 to be received in a standard connector socket of a host device.
[0032] In one example, the height H (or thickness) of the first portion 110 of the partially thinned PCB is 0.8 millimeters (mm). In this example, the first portion 110, together with the various contacts provided on the first portion, functions as an M.2 connector. In another example, the height H of the first portion 110 of the partially thinned PCB 100 is 1.57 mm. In this example, the first portion 110, together with the various contacts provided on the first portion 110, functions as an EDSFF connector. While specific reference is made to an M.2 connector and an EDSFF connector, the height and / or thickness of the first portion 110 may be any height or thickness depending on the desired type of connector.
[0033] In some examples, the thickness or height h of second portion 120 can also vary. For example, when the partially thinned PCB 100 is used as part of a non-volatile memory device, the height h of second portion 120 may depend on the desired capacity of the non-volatile memory device and / or the number of memory dies in the stack. In another example, the height h of second portion 120 may depend on the type of cap that will be placed on or above the various semiconductor dies and / or passive components placed on / in second portion 120.
[0034] In yet another example, the height h of the second portion 120 depends on the type of semiconductor package and / or the size of the first portion 110. For example, if the first portion 110 of the partially thinned PCB 100 has a height H of 1.57 mm, the second portion 120 has a height h of 0.95 mm. In another example, if the first portion 110 of the partially thinned PCB 100 has a height H of 0.8 mm, the second portion 120 has a height h of 0.2 mm. Although specific dimensions are given, these dimensions are for illustrative purposes only.
[0035] In the example shown, the locally thinned PCB 100 is manufactured such that the second portion 120 extends from a lower or bottom portion of the first portion 110. For example, the bottom surface of the second portion 120 is coplanar with the bottom surface of the first portion 110. However, in other examples, the second portion 120 extends from any portion (e.g., a top portion, a middle portion) of the first portion 110. In an example, during manufacturing, one or more layers of the second portion 120 are removed, resulting in the second portion 120 having a height h.
[0036] First portion 110 and second portion 120 can have any length. In one example, the length of first portion 110 depends on the number and / or type of contacts used to form the connector. In another example, the length of first portion 110 depends on the arrangement of traces or other communication lines used to connect the contacts on first portion 110 to the semiconductor die on second portion 120. In another example, the length of second portion 120 depends on the number or type of semiconductor die and / or the number or type of passive components to be placed on second portion 120.
[0037] Figure 2A A partially thinned PCB 200 is shown having a first PCB portion 210 and a second PCB portion 220 connected by a flexible connector 230, according to an example. In the example, the flexible connector 230 is a rigid-flex member. Although specific reference is made to a rigid-flex member, the first portion 210 and the second portion 220 can be connected by any flexible and / or rigid material that provides electrical and mechanical connections between the respective portions and / or between various components on the respective portions.
[0038] In the example, the first portion 210 has a first thickness or height (indicated by "H"). Similarly, the second portion 220 has a second thickness or height (indicated by "h"). Similar to Figure 1 In the example shown in , the first thickness of the first portion 210 enables the first portion 210 to function as a connector.
[0039] Additionally, in some examples, the height H (or thickness) of the first portion 210 of the partially thinned PCB 200 is 0.8 millimeters (mm). In another example, the height H of the first portion 210 of the partially thinned PCB 200 is 1.57 mm. While specific thicknesses or heights are mentioned, the height and / or thickness of the first portion 210 can be any height or thickness depending on the type of connector desired.
[0040] In some examples, the thickness or height h of second portion 220 also varies. For example, when the partially thinned PCB 200 is used as part of a non-volatile memory device, the height h of second portion 220 depends on the desired capacity of the non-volatile memory device and / or the number of memory dies in the stack. In another example, the height h of second portion 220 depends on the type of cap that will be placed on or above the various semiconductor dies and / or passive components placed on / in second portion 220.
[0041] In an example, the flexible connector 230 mechanically and / or electrically couples the first portion 210 of the partially thinned PCB 200 to the second portion 220 of the partially thinned PCB 200. In an example, the flexible connector 230 enables the first portion 210 and / or the second portion 220 to move or pivot relative to each other (e.g., in the direction of arrow 240). In another example, the flexible connector enables the first portion 210 and / or the second portion 220 to move laterally relative to each other (e.g., in the direction of arrow 245). As a result, the overall length of the partially thinned PCB 200 can be adjusted (e.g., shortened).
[0042] The flexible connector 230 is mechanically and / or electrically coupled to the portion by any suitable means. For example, the proximal end of the flexible connector 230 (indicated by the dashed line) is coupled to and / or sandwiched between one or more layers of the first portion 210 of the partially thinned PCB 200. Similarly, the distal end of the flexible connector 230 is coupled to and / or sandwiched between one or more layers of the second portion 220 of the partially thinned PCB 200. In an example, the flexible connector 230 includes traces, signal lines, or other communication paths that electrically and / or communicatively couple the semiconductor die and / or passive components on the second portion 220 to corresponding contacts on the first portion 210.
[0043] In an example, a protective and / or flexible coating or cover 235 is applied to the flexible connector 230. The flexible cover 235 can be made of any material and is used to protect and / or insulate traces, signal lines, or other communication pathways that extend through the flexible connector 230 and communicatively couple the first portion 210 to the second portion 220.
[0044] In an example, the flexible connector 230 is coupled to a bottom portion of the first portion 210 and a bottom portion of the second portion 220. For example, the flexible connector 230 is coupled to each portion such that the bottom surface of the second portion 220 is coplanar with the bottom surface of the first portion 210. However, in other examples, the flexible connector 230 is coupled to any portion of the first portion 210 and / or the second portion 220.
[0045] For example and reference Figure 2B , Figure 2B A partially thinned PCB 250 is shown having a first PCB portion 260 and a second PCB portion 270 connected by a flexible connector 280 according to another example. In the example, the partially thinned PCB 250 is similar to that described with respect to FIG. Figure 2A The partially thinned PCB 200 is shown and described. However, in this example, the flexible connector 280 extends from or is otherwise coupled to the middle portion of the first portion 260 and to the middle portion of the second portion 270.
[0046] exist Figure 2A and Figure 2B In the example shown in , each portion can have any length. For example, the length of first portion 210 of partially thinned PCB 200 depends on the number and / or type of contacts used to form the connector. In another example, the length of first portion 210 depends on the arrangement of traces or other communication lines used to connect the contacts to the semiconductor die on second portion 220 of partially thinned PCB 200. In an example, the length of second portion 220 depends on the number or type of semiconductor die and / or the number or type of passive components to be placed on second portion 220.
[0047] Figure 3A A semiconductor package 300 with a partially thinned PCB is shown according to an example. Figure 3A In the example shown, local thinning of the PCB is similar to that described in Figure 2A The partially thinned PCB 200 is shown and described. However, the semiconductor package 300 may have any of the various partially thinned PCBs shown and described herein.
[0048] In this example, the partially thinned PCB includes a first portion 310 and a second portion 320. The second portion 320 is separate and spaced apart from the first portion 310. In the example, the first portion 310 includes a first number of layers 380 and the second portion 320 includes a second number of layers 385.
[0049] In the example, although the first portion 310 and the second portion 320 are separate and spaced apart from each other, the flexible connector 330 electrically and / or mechanically couples the first portion 310 and the second portion 320. In the example, the flexible connector 330 is a rigid-flex member, but any connector may be used to communicatively couple the first portion 310 to the second portion 320.
[0050] In an example, first portion 310 includes a plurality of contacts 340 (e.g., gold finger contacts) that comprise a connector. In an example, the connector is an M.2 connector. In another example, the connector is an EDSFF connector. Although a specific connector is described, contacts 340 can be part of any desired connector type. Similarly, the height or thickness of first portion 310 can be based at least in part on the desired connector type.
[0051] For example, if the connector is an M.2 connector, the height or thickness of the first portion 310 is 0.8 mm. However, if the connector is an EDSFF connector, the height or thickness of the first portion 310 is 1.57 mm. Although a specific height is described, the first portion 310 can have any height based on the desired connector type and / or based on the size of the connector socket of the host device to which the semiconductor package 300 will be communicatively coupled.
[0052] Also like Figure 3A As shown in FIG, the second portion 320 includes a plurality of semiconductor dies and / or passive components. In an example, the semiconductor dies and / or passive components are surface mounted or otherwise electrically coupled to the second portion 320. For example, the semiconductor package 300 includes a plurality of memory dies 350 arranged in a stacked configuration. In this example, each of the memory dies 350 in the stack is communicatively coupled to the second portion 320 using one or more bond wires 355.
[0053] In the example, an application specific integrated circuit (ASIC) 360 is also mounted on or otherwise associated with the second portion 320. In the example, the ASIC 360 is a controller or processor. Although a single ASIC 360 is shown, multiple ASICs 360 can be provided on or associated with the second portion 320.
[0054] In addition to the semiconductor die, semiconductor package 300 also includes passive components 370. In the example, passive components 370 are also mounted to the second portion 320 of the partially thinned PCB. Although specific components and semiconductor dies are mentioned, semiconductor package 300 can include any number of different electronic components, semiconductor devices, and / or dies.
[0055] Figure 3B Shown according to the example Figure 3A A top view of a semiconductor package 300 is shown. Figure 3B As shown, semiconductor package 300 includes a first portion 310 and a second portion 320. Flexible connector 330 mechanically and electrically couples first portion 310 and second portion 320, such as previously described.
[0056] In an example, the first portion 310 includes a plurality of contacts 340 disposed on an upper surface. However, in an example, additional contacts are provided on a bottom surface of the first portion 310.
[0057] In an example, signal lines 390 electrically and / or communicatively couple contacts 340 to respective semiconductor dies on second portion 320. By way of example, one or more signal lines 390 extend through first portion 310, through flexible connector 330, and to respective bond pads 365 associated with the stack of semiconductor dies 350. In another example, one or more signal lines 390 extend through first portion 310, through flexible connector 330, and to ASIC 360. Additional signal lines 390 may also electrically couple passive components 370 to one or more of the various semiconductor dies and / or contacts 340.
[0058] Figure 4A A semiconductor package 400 is shown according to an example in which one of the PCB portions is encapsulated. In the example, the semiconductor package 400 is similar to the example described with respect to FIG. Figure 3A and Figure 3B The semiconductor package 300 shown and described herein. For example, the semiconductor package 400 includes a plurality of different semiconductor dies and passive components. In addition, the semiconductor package 400 includes a partially thinned PCB having a first portion 410, a second portion 420 separated from the first portion 410, and a flexible connector 430. However, the semiconductor package 400 can have any of the various partially thinned PCBs shown and described herein.
[0059] In this example, second portion 420 includes a cover 440. In one example, cover 440 is a mechanical cover. In another example, cover 440 is a molding compound. In yet another example, cover 440 is a mechanical cover that surrounds or otherwise encapsulates the molding compound. However, in this example, cover 440 only encapsulates second portion 420 (or at least some of the passive components and / or semiconductor die on second portion 420), but not flexible connector 430 or first portion 410.
[0060] Figure 4B A semiconductor package 400 is shown according to an example in which a PCB portion is encapsulated and includes heat dissipation features 450. Figure 4A In the illustrated and described example, the semiconductor package includes a partially thinned PCB having a first portion 410 , a second portion 420 separated from the first portion 410 , and a flexible connector 430 .
[0061] In this example, the second portion 420 includes a heat dissipation feature 450. In an example, the heat dissipation feature 450 is a cover (eg, cover 440 ( Figure 4A )) or part of, or otherwise included with, the cover or other material. In an example, heat dissipation feature 450 is a silicon layer. Although heat dissipation feature 450 is specifically mentioned, an electromagnetic interference (EMI) layer may be included in place of or in combination with heat dissipation feature 450.
[0062] In an example, the header dissipation feature 450 contacts the top surface of the semiconductor die stack and / or ASIC. In some examples, the heat dissipation feature 450 extends the entire length of the lid and / or second portion 420. In another example, the heat dissipation feature 450 is broken into different sections or portions. In such an example, a first portion of the heat dissipation feature 450 contacts the top surface of the semiconductor die stack, while a second portion of the heat dissipation feature 450 contacts the top surface of the ASIC. The heat dissipation feature 450 conducts heat away from the ASIC and / or semiconductor die stack and into the lid or other material surrounding or encapsulating the second portion 420.
[0063] Figure 4C A semiconductor package 400 is shown according to an example in which a PCB portion is encapsulated and includes a plurality of heat dissipation features. Figure 4A and Figure 4B In the example shown in , a semiconductor package 400 includes a partially thinned PCB having a first portion 410 , a second portion 420 separated from the first portion 410 , and a flexible connector 430 .
[0064] In this example, the second portion 420 includes a plurality of heat dissipation features. For example, the second portion 420 includes Figure 4B The heat dissipation feature 450 is shown and described. In addition, the second portion 420 includes a slot or groove 460 that dissipates heat from within the second portion 420 of the semiconductor package 400 to the heat dissipation feature 450. In an example, the groove 460 is filled with a thermally conductive material, such as silver, although other materials may be used. In addition, although a single groove 460 is shown, multiple grooves 460 may be provided in the second portion 420 of the semiconductor package 400.
[0065] Based on the foregoing, examples of the present disclosure describe a semiconductor package, comprising: a first printed circuit board (PCB) portion having a first thickness; a second PCB portion having a second thickness less than the first thickness; a flexible connector disposed between the first and second PCB portions, the flexible connector mechanically and electrically connecting the first and second PCB portions; a plurality of contacts disposed on the first PCB portion for electrically coupling the semiconductor package to a connector of a host device; and a plurality of semiconductor dies disposed on the second PCB portion. In an example, the semiconductor package further comprises one or more passive components mounted on the second PCB portion. In an example, at least one of the plurality of semiconductor dies is a NAND memory die. In an example, at least one of the plurality of semiconductor dies is an application-specific integrated circuit (ASIC). In an example, the semiconductor package further comprises a molding compound at least partially covering the second PCB portion. In an example, the plurality of contacts are part of an M.2 connector. In an example, the plurality of contacts are part of an Enterprise and Data Center Standard Form Factor (EDSFF) connector. In an example, the flexible connector extends from a top portion of the first PCB portion. In an example, the flexible connector extends from a middle portion of the first PCB portion. In an example, the flexible connector extends from a top portion of the second PCB portion. In an example, the flexible connector extends from a middle portion of the second PCB portion.
[0066] The example also describes a semiconductor package comprising: a plurality of contacts disposed on a first printed circuit board (PCB) portion, the first PCB portion having a first number of layers and a first thickness; a plurality of semiconductor dies disposed on a second PCB portion, the second PCB portion being separate from the first PCB portion and having a second number of layers less than the first number of layers and a second thickness less than the first thickness; and a flexible connector coupling the first PCB portion and the second PCB portion. In the example, the semiconductor package further comprises a cover that at least partially encapsulates the second PCB portion. In the example, the plurality of contacts form an M.2 connector. In the example, the plurality of contacts form an Enterprise and Data Center Standard Form Factor (EDSFF) connector. In the example, the flexible connector extends from a top portion of the first PCB portion. In the example, the flexible connector extends from a middle portion of the second PCB portion.
[0067] Another example describes a semiconductor package that includes: a first printed circuit board (PCB) portion having a first thickness; a second PCB portion having a second thickness less than the first thickness; a flexible connection device disposed between the first PCB portion and the second PCB portion, the flexible connection device mechanically and electrically coupling the first PCB portion and the second PCB portion; a plurality of signal-carrying devices disposed on a surface of the first PCB portion; and a plurality of semiconductor dies disposed on the second PCB portion. In the example, the semiconductor package further includes a cover device disposed on the second PCB portion. In the example, the semiconductor die are NAND memory dies.
[0068] The description and illustration of one or more aspects provided in this disclosure are not intended to limit or restrict the scope of this disclosure in any way. The various aspects, examples, and details provided in this disclosure are considered to be sufficient to convey the best mode of ownership and enable others to make and use the disclosed content protected by the claims.
[0069] The disclosure protected by the claims should not be construed as limited to any aspect, example or detail provided in the disclosure. Regardless of whether the various features are shown and described in combination or individually, it is intended that the various features may be selectively rearranged, included or omitted to produce various embodiments having a particular set of features. Having provided the description and illustrations of the present application, those skilled in the art may envision changes, modifications and substitutions that fall within the spirit of the broader aspects of the general inventive concept embodied herein and that do not depart from the broader scope of the disclosure protected by the claims.
[0070] The use of designations such as "first" and "second" herein to refer to elements does not generally limit the quantity or order of those elements. Rather, these designations can serve as a method of distinguishing two or more elements or instances of an element. Thus, reference to a first element and a second element does not mean that only two elements may be used, nor does it mean that the first element must precede the second element. Additionally, unless otherwise specified, a group of elements may include one or more elements.
[0071] Terms of the form “at least one of A, B, or C” or “A, B, C, or any combination thereof” used in the specification or the claims mean “A or B or C, or any combination of these elements.” For example, this term may include A, or B, or C, or A and B, or A and C, or A and B and C, or 2A, or 2B, or 2C, or 2A and B, etc. As an additional example, “at least one of A, B, or C” is intended to encompass A, B, C, AB, AC, BC, and ABC, and multiples of the same. Similarly, “at least one of A, B, and C” is intended to encompass A, B, C, AB, AC, BC, and ABC, and multiples of the same.
[0072] Similarly, as used herein, a phrase referring to a list of items linked with "and / or" refers to any combination of the items. As an example, "A and / or B" is intended to encompass A alone, B alone, or A and B together. As another example, "A, B, and / or C" is intended to encompass A alone, B alone, C alone, A and B together, A and C together, B and C together, or A, B, and C together.
Claims
1. A semiconductor package, comprising: a first printed circuit board (PCB) portion having a first thickness; a second PCB portion having a second thickness less than the first thickness; a flexible connector disposed between the first PCB portion and the second PCB portion, the flexible connector mechanically and electrically connecting the first PCB portion and the second PCB portion; a plurality of contacts disposed on the first PCB portion for electrically coupling the semiconductor package to a connector of a host device; and A plurality of semiconductor dies are disposed on the second PCB portion. 2 . The semiconductor package of claim 1 , further comprising one or more passive components mounted on the second PCB portion. 3 . The semiconductor package of claim 1 , wherein at least one semiconductor die of the plurality of semiconductor dies is a NAND memory die. 4 . The semiconductor package of claim 1 , wherein at least one semiconductor die of the plurality of semiconductor dies is an application specific integrated circuit (ASIC). 5 . The semiconductor package of claim 1 , further comprising a molding compound at least partially covering the second PCB portion. The semiconductor package of claim 1 , wherein the plurality of contacts are part of an M.2 connector. 7 . The semiconductor package of claim 1 , wherein the plurality of contacts are part of an Enterprise and Data Center Standard Form Factor (EDSFF) connector. 8 . The semiconductor package of claim 1 , wherein the flexible connector extends from a top portion of the first PCB portion. 9 . The semiconductor package of claim 1 , wherein the flexible connector extends from a middle portion of the first PCB portion. 10 . The semiconductor package of claim 1 , wherein the flexible connector extends from a top portion of the second PCB portion. 11 . The semiconductor package of claim 1 , wherein the flexible connector extends from a middle portion of the second PCB portion.
12. A semiconductor package, comprising: a plurality of contacts disposed on a first printed circuit board (PCB) portion having a first number of layers and a first thickness; a plurality of semiconductor dies disposed on a second PCB portion separate from the first PCB portion and having a second number of layers less than the first number of layers and a second thickness less than the first thickness; as well as A flexible connector couples the first PCB portion and the second PCB portion. 13 . The semiconductor package of claim 12 , further comprising a lid at least partially encapsulating the second PCB portion. The semiconductor package of claim 12 , wherein the plurality of contacts form an M.2 connector.
15. The semiconductor package of claim 12, wherein the plurality of contacts form an Enterprise and Data Center Standard Form Factor (EDSFF) connector. 16 . The semiconductor package of claim 12 , wherein the flexible connector extends from a top portion of the first PCB portion. 17 . The semiconductor package of claim 12 , wherein the flexible connector extends from a middle portion of the second PCB portion.
18. A semiconductor package, comprising: a first printed circuit board (PCB) portion having a first thickness; a second PCB portion having a second thickness less than the first thickness; a flexible connection device disposed between the first PCB portion and the second PCB portion, the flexible connection device mechanically and electrically coupling the first PCB portion and the second PCB portion; a plurality of signal carrying devices disposed on a surface of the first PCB portion; and A plurality of semiconductor dies are disposed on the second PCB portion. 19 . The semiconductor package of claim 18 , further comprising a cover disposed on the second PCB portion.
20. The semiconductor package of claim 18, wherein the semiconductor die is a NAND memory die.