Light detection device

Abstract

A light detection device according to an embodiment of the present disclosure includes: a first substrate having a pixel array unit; a light-receiving element provided inside the first substrate for each pixel, the light-receiving element having a light-receiving unit that generates a carrier corresponding to an amount of received light, and a multiplier that performs avalanche multiplication on the carrier generated in the light-receiving unit; a first contact layer disposed on the first surface of the first substrate, the first contact layer being electrically connected to the light receiving unit; a second contact layer disposed on the first surface of the first substrate, the second contact layer electrically connected to the multiplier; a second substrate stacked on the first surface side of the first substrate, the second substrate having a semiconductor layer provided with a transistor; a first through wiring passing through the semiconductor layer in the stacking direction, the first through wiring being electrically connected to the first contact layer; a second through wiring penetrating the semiconductor in the stacking direction, the second through wiring being electrically connected to the second contact layer; and a first shield electrode provided in a portion between the adjacent transistor and the first and second through wirings, to which a fixed potential is applied.

Description

Technical Field

[0001] The present disclosure relates to a light detection device including, for example, an avalanche photodiode. Background Art

[0002] For example, PTL 1 discloses a light detection device in which one or more control transistors are provided for each single photon avalanche diode (SPAD) on a surface of a wafer opposite to a light collection surface of a SPAD pixel array.

[0003] Reference List

[0004] Patent Literature

[0005] PTL 1: Japanese Unexamined Patent Application Publication No. 2022-54459 Summary of the Invention

[0006] Incidentally, regarding the light detecting device, there is a need to improve the characteristics of the transistor.

[0007] It is desirable to provide a light detection device that makes it possible to improve the characteristics of a transistor.

[0008] According to an embodiment of the present disclosure, a light detecting device includes a first substrate, a light receiving element, a first contact layer, a second contact layer, a second substrate, a first through-wiring, a second through-wiring, and one or more first shielding electrodes. The first substrate has a first surface and a second surface opposite to each other and includes a pixel array portion, in which a plurality of pixels are arranged in an array in an in-plane direction. The light receiving element includes a light receiving portion and a multiplication portion. The light receiving portion is arranged inside the first substrate for each pixel and generates carriers corresponding to the amount of light received through photoelectric conversion. The multiplication portion performs avalanche multiplication on the carriers generated in the light receiving portion. The first contact layer is arranged on the first surface of the first substrate and is electrically coupled to the light receiving portion. The second contact layer is arranged on the first surface of the first substrate and is electrically coupled to the multiplication portion. The second substrate is stacked on the first surface side of the first substrate and includes a semiconductor layer provided with one or more transistors. The first through-wiring is arranged to penetrate the semiconductor layer in the stacking direction and is electrically coupled to the first contact layer. The second through-wiring is arranged to penetrate the semiconductor layer in the stacking direction and is electrically coupled to the second contact layer. One or more first shield electrodes are provided in at least a portion of a region between one or more transistors and the first through-wiring and the second through-wiring. A fixed potential is applied to the one or more first shield electrodes. The first through-wiring and the second through-wiring are adjacent to the one or more transistors.

[0009] In a light detecting device according to an embodiment of the present disclosure, one or more first shielding electrodes to which a fixed potential is applied are provided in at least a portion of an area between one or more transistors and a first through-wiring and a second through-wiring. The first through-wiring and the second through-wiring are adjacent to the one or more transistors. The one or more transistors are provided on the first surface side of the first substrate. The first through-wiring is provided through a semiconductor layer in which the one or more transistors are provided, and is electrically coupled to a first contact layer provided on the first surface of the first substrate, the first substrate being provided with a light receiving element. The second through-wiring is provided through the semiconductor layer, and is electrically coupled to a second contact layer provided on the first surface of the first substrate, the first substrate being provided with a light receiving element. This blocks the influence of a high voltage applied to the light receiving element. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] [ Figure 1 ] Figure 1 is a schematic cross-sectional view illustrating an example of a light detecting device according to an embodiment of the present disclosure.

[0011] [ Figure 2 ] Figure 2 is with Figure 1 The schematic plan view of the light detection device corresponding to area A and area B is shown.

[0012] [ Figure 3 ] Figure 3 It shows Figure 1 FIG. 1 is a block diagram showing an example of a schematic configuration of a light detection device.

[0013] [ Figure 4 ] Figure 4 yes Figure 1 An example of an equivalent circuit diagram of a unit pixel of a light detection device is shown.

[0014] [ Figure 5A ] Figure 5A It shows Figure 1 Schematic cross-sectional view of an example of a method for manufacturing a light detecting device shown.

[0015] [ Figure 5B ] Figure 5B It shows the following Figure 5A Schematic cross-sectional view of the process following the process in .

[0016] [ Figure 5C ] Figure 5C It shows the following Figure 5B Schematic cross-sectional view of the process following the process in .

[0017] [ Figure 5D ] Figure 5D It shows the following Figure 5CSchematic cross-sectional view of the process following the process in .

[0018] [ Figure 5E ] Figure 5E It shows the following Figure 5D Schematic cross-sectional view of the process following the process in .

[0019] [ Figure 5F ] Figure 5F It shows the following Figure 5E Schematic cross-sectional view of the process following the process in .

[0020] [ Figure 6 ] Figure 6 : is a schematic cross-sectional view showing an example of a light detection device according to Modification 1 of the present disclosure.

[0021] [ Figure 7 ] Figure 7 : is a schematic plan view showing an example of a light detection device according to Modification 2 of the present disclosure.

[0022] [ Figure 8 ] Figure 8 : is a schematic plan view showing another example of the light detection device according to Modification 2 of the present disclosure.

[0023] [ Figure 9 ] Figure 9 : is a schematic plan view showing another example of the light detection device according to Modification 2 of the present disclosure.

[0024] [ Figure 10 ] Figure 10 : is a schematic plan view showing another example of the light detection device according to Modification 2 of the present disclosure.

[0025] [ Figure 11 ] Figure 11 : is a schematic plan view showing another example of the light detection device according to Modification 2 of the present disclosure.

[0026] [ Figure 12 ] Figure 12 : is a schematic plan view showing another example of the light detection device according to Modification 2 of the present disclosure.

[0027] [ Figure 13 ] Figure 13 : is a schematic plan view showing another example of the light detection device according to Modification 2 of the present disclosure.

[0028] [ Figure 14 ] Figure 14 : is a schematic plan view showing an example of a light detection device according to Modification 3 of the present disclosure.

[0029] [ Figure 15 ] Figure 15 : is a schematic plan view showing another example of the light detection device according to Modification 3 of the present disclosure.

[0030] [ Figure 16 ] Figure 16 : is a schematic plan view showing another example of the light detection device according to Modification 3 of the present disclosure.

[0031] [ Figure 17 ] Figure 17 : is a schematic cross-sectional view showing an example of a light detection device according to Modification 4 of the present disclosure.

[0032] [ Figure 18 ] Figure 18 is with Figure 17 The schematic plan view of the light detection device corresponding to area B shown is shown.

[0033] [ Figure 19 ] Figure 19 : is a schematic cross-sectional view showing another example of the light detection device according to Modification 4 of the present disclosure.

[0034] [ Figure 20 ] Figure 20 is with Figure 19 The schematic plan view of the light detection device corresponding to area B shown is shown.

[0035] [ Figure 21 ] Figure 21 : is a schematic cross-sectional view showing an example of a light detection device according to Modification 5 of the present disclosure.

[0036] [ Figure 22 ] Figure 22 : is a schematic cross-sectional view showing another example of the light detection device according to Modification 5 of the present disclosure.

[0037] [ Figure 23 ] Figure 23 : is a schematic cross-sectional view showing an example of a light detection device according to Modification 6 of the present disclosure.

[0038] [ Figure 24 ] Figure 24 is with Figure 23 The schematic plan view of the light detection device corresponding to area B shown is shown.

[0039] [ Figure 25 ] Figure 25 : is a schematic cross-sectional view showing an example of a light detection device according to Modification 7 of the present disclosure.

[0040] [ Figure 26 ] Figure 26 is shown with Figure 25 The plane configuration of the region B shown is a schematic diagram of an example of a plane configuration corresponding to FIG.

[0041] [ Figure 27 ] Figure 27 is shown with Figure 25 The plane configuration of the region B shown is a schematic diagram of another example of a plane configuration.

[0042] [ Figure 28 ] Figure 28 : is a schematic cross-sectional view showing an example of a light detection device according to Modification 8 of the present disclosure.

[0043] [ Figure 29 ] Figure 29 : is a schematic cross-sectional view showing another example of the light detection device according to Modification 8 of the present disclosure.

[0044] [ Figure 30 ] Figure 30 : is a schematic cross-sectional view showing an example of a light detection device according to Modification 9 of the present disclosure.

[0045] [ Figure 31 ] Figure 31 is with Figure 30 The schematic plan view of the light detection device corresponding to area B shown is shown.

[0046] [ Figure 32 ] Figure 32 It shows that Figure 1 Functional block diagram of an example of an electronic device of a light detection device shown in FIG.

[0047] [ Figure 33 ] Figure 33 is a diagram depicting an example of a schematic configuration of an endoscopic surgery system.

[0048] [ Figure 34 ] Figure 34 This is a block diagram illustrating an example of the functional configuration of a camera head and a camera control unit (CCU).

[0049] [ Figure 35 ] Figure 35 is a block diagram depicting an example of a schematic configuration of a vehicle control system.

[0050] [ Figure 36 ] Figure 36 1 and 2 are diagrams for assisting in explaining an example of the installation positions of the vehicle exterior information detection portion and the imaging portion. DETAILED DESCRIPTION

[0051] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. The following describes specific examples of the present disclosure, and the present disclosure is not limited to the following aspects. Furthermore, the present disclosure is not limited to the arrangement, size, and aspect ratio of each component shown in each drawing. Note that the description is given in the following order.

[0052] 1. Embodiment (Photodetection Device Including a Shield Electrode Between Adjacent Transistors and Vias)

[0053] 1-1. Configuration of Photodetection Device

[0054] 1-2. Method for Manufacturing Photodetection Device

[0055] 1-3. Actions and Effects

[0056] 2. Modification

[0057] 2-1. Modification 1 (Another Example of Photodetection Device)

[0058] 2-2. Modification 2 (Another Example of Photodetection Device)

[0059] 2-3. Modification 3 (Another Example of Photodetection Device)

[0060] 2-4. Modification 4 (Another Example of Photodetection Device)

[0061] 2-5. Modification 5 (Another Example of Photodetection Device)

[0062] 2-6. Modification 6 (Another Example of Photodetection Device)

[0063] 2-7. Modification 7 (Another Example of Photodetection Device)

[0064] 2-8. Modification 8 (Another Example of Photodetection Device)

[0065] 2-9. Modification 9 (Another Example of Photodetection Device)

[0066] 3. Application Examples

[0067] 4. Practical Application Examples

[0068] <1. First embodiment>

[0069] Figure 1 An example of a cross-sectional configuration of a light detecting device (light detecting device 1 ) according to an embodiment of the present disclosure is schematically shown. Figure 2 Part (A) schematically shows the Figure 1 The planar configuration of the region A of the photodetection device 1 shown corresponds to the planar configuration of FIG. Figure 2 Part (B) schematically shows the Figure 1The planar configuration of region B of the light detection device shown corresponds to the planar configuration of FIG. Figure 1 Shown with Figure 2 The line II indicated in FIG corresponds to the cross section. Figure 3 It shows Figure 1 FIG. 2 is a block diagram showing a schematic configuration of the light detection device 1 . Figure 4 Shown Figure 1 The light detecting device 1 is applied to a distance image sensor (a distance image device 1000 to be described later; see the distance image sensor 1000) that performs distance measurement by a ToF (Time of Flight) method, for example. Figure 32 ), image sensors, etc.

[0070] (1-1. Configuration of Photodetection Device)

[0071] The light detection device 1 includes, for example, a pixel array section 100A in which a plurality of unit pixels P are arranged in an array in the row direction and the column direction. Figure 3 As shown, the light detection device 1 includes a bias voltage application section 110 and a pixel array section 100A. The bias voltage application section 110 applies a bias voltage to each unit pixel P in the pixel array section 100A. In this embodiment, a case where electrons are read out as signal charges will be described.

[0072] like Figure 3 As shown, the unit pixel P includes a light receiving element 12, a quenching resistor element 120, and an inverter 130. The quenching resistor element 120 includes, for example, a p-type MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The inverter 130 includes, for example, a complementary MOSFET.

[0073] The light receiving element 12 converts the incident light into an electrical signal by photoelectric conversion, and outputs the electrical signal. Incidentally, the light receiving element 12 converts the incident light (photon) into an electrical signal by photoelectric conversion, and outputs a pulse corresponding to the incidence of the photon. The light receiving element 12 is, for example, a SPAD (single photon avalanche diode) element. The SPAD element has, for example, the following characteristics: an avalanche multiplication region 12X (depletion layer) is formed by applying a large negative voltage to the cathode, electrons generated in response to the incidence of one photon cause avalanche multiplication, and a large current flows. The light receiving element 12 has, for example, an anode coupled to the bias voltage applying section 110 and a cathode coupled to the source terminal of the quenching resistance element 120. The device voltage V B A bias voltage is applied from the bias voltage applying section 110 to the anode of the light receiving element 12 .

[0074] The quenching resistance element 120 is coupled in series to the light receiving element 12 and has a source terminal coupled to the cathode of the light receiving element 12 and a drain terminal coupled to a power supply not shown. E A voltage is applied from a power source to the drain terminal of the quenching resistance element 120. When the voltage of the electrons that have been avalanche multiplied by the light receiving element 12 reaches a negative voltage V BD When , the quenching resistance element 120 performs quenching in which electrons multiplied by the light receiving element 12 are emitted to return the voltage to the initial voltage.

[0075] The inverter 130 has an input terminal coupled to the cathode of the light receiving element 12 and coupled to the source terminal of the quenching resistor element 120, and an output terminal coupled to a subsequent operation processing unit not shown. The inverter 130 outputs a light receiving signal based on the carriers (signal charges) multiplied by the light receiving element 12. More specifically, the inverter 130 shapes the voltage generated by the electrons multiplied by the light receiving element 12. Then, the inverter 130 generates, for example, Figure 4 The light-receiving signal (APD output) with the pulse waveform shown is output to the arithmetic processing unit. For example, the arithmetic processing unit performs arithmetic processing to determine the distance to the object based on the timing of generating a pulse indicating the arrival time of a single character in each light-receiving signal. The distance is determined for each unit pixel P. A distance image is then generated based on the distances, in which the distances to the object detected by the multiple unit pixels P are arranged in a planar manner.

[0076] The light detection device 1 is, for example, a so-called backlight detection device, in which the logic substrate 20 is stacked on the front surface side of the sensor substrate 10 (for example, the front surface (first surface 11S1) side of the semiconductor substrate 11 included in the sensor substrate 10), and receives light from the rear surface side of the sensor substrate 10 (for example, the rear surface (second surface 11S2) side of the semiconductor substrate 11 included in the sensor substrate 10).

[0077] The light detecting device 1 includes a light receiving element 12 for each unit pixel P. The light receiving element 12 includes a light receiving portion 13 and a multiplication portion 14. In the light detecting device 1, as described above, the sensor substrate 10 and the logic substrate 20 are stacked on each other. The sensor substrate 10 includes a semiconductor substrate 11, for example, a silicon substrate, and the light receiving portion 13 and the multiplication portion 14 are embedded in the semiconductor substrate 11, for example. The first surface 11S1 of the semiconductor substrate 11 is provided with a contact layer 15 (anode) electrically coupled to the light receiving portion 13 and a contact layer 16 (cathode) electrically coupled to the multiplication portion 14. The semiconductor substrate 11 is further provided with a pixel separation portion 17 that electrically separates adjacent unit pixels P from each other. The pixel separation portion 17 is provided between a plurality of unit pixels P adjacent to each other in the row direction and the column direction to extend from the first surface 11S1 to the second surface 11S2 of the semiconductor substrate 11. The pixel separation portion 17 is provided in the pixel array portion 100A as a whole in a lattice pattern in a plan view. The logic substrate 20 includes, for example, a semiconductor layer 21 embedded in an interlayer insulating layer 221. Disposed in the semiconductor layer 21 are, for example, a plurality of transistors (for example, two p-MOS transistors 211 and three n-MOS transistors 212), which form, for example, a readout circuit that outputs a pixel signal based on carriers output from a unit pixel P (light receiving element 12). The logic substrate 20 further has through holes V1a and V1b, which are provided through the semiconductor layer 21 in the stacking direction (Z-axis direction) and are electrically coupled to the contact layers 15 and 16, respectively. In the present embodiment, a shielding electrode 213 to which a fixed potential is applied is provided between the through hole V1a in the logic substrate 20 and the p-MOS transistor 211 and the n-MOS transistor 212. The through hole V1a is adjacent to the p-MOS transistor 211 and the n-MOS transistor 212.

[0078] The sensor substrate 10 described above corresponds to a specific example of a "first substrate" in the embodiments of the present disclosure, and the logic substrate 20 corresponds to a specific example of a "second substrate" in the embodiments of the present disclosure. The contact layer 15 corresponds to a specific example of a "first contact layer" in the embodiments of the present disclosure, and the contact layer 16 corresponds to a specific example of a "second contact layer" in the embodiments of the present disclosure. The through-hole 1Va corresponds to a specific example of a "first through-wiring" in the embodiments of the present disclosure, and the through-hole 1Vb corresponds to a specific example of a "second through-wiring" in the embodiments of the present disclosure. The shield electrode 213 corresponds to a specific example of a "first shield electrode" in the embodiments of the present disclosure.

[0079] Note that the symbols "p" and "n" in the diagram represent a p-type semiconductor region and an n-type semiconductor region, respectively. Furthermore, the "+" and "-" at the end of "p" each represent the impurity concentration of the p-type semiconductor region. Similarly, the "+" and "-" at the end of "n" each represent the impurity concentration of the n-type semiconductor region. Here, a larger number of "+"s indicates a higher impurity concentration, and a larger number of "-"s indicates a lower impurity concentration. This applies similarly to the figures described below.

[0080] The semiconductor substrate 11 has a first surface 11S1 and a second surface 11S2 facing each other. The semiconductor substrate 11 includes a p-well (p) shared by a plurality of unit pixels P. For each unit pixel P, the semiconductor substrate 11 is provided with an n-type semiconductor region (n) 111 constituting a light receiving portion 13. The n-type semiconductor region (n) 111 has an impurity concentration controlled to be, for example, n-type. The semiconductor substrate 11 is further provided with a p-type semiconductor region (p) constituting a multiplication portion 14 on the side of the first surface 11S1. + )14X and n-type semiconductor region (n + ) 14Y. This allows the light receiving element 12 to be formed for each unit pixel P. A pixel separator 17 is provided around each unit pixel P. The pixel separator 17 electrically separates adjacent unit pixels P from each other. A p-type semiconductor region (p) 112 having a higher impurity concentration than the p-well is provided between the light receiving element 12 and the pixel separator 17.

[0081] The light receiving element 12 has a multiplication region (avalanche multiplication region 12X) that avalanche multiplies carriers by a high electric field region. As described above, the light receiving element 12 is a SPAD element that can form the avalanche multiplication region 12X by applying a large negative voltage to the cathode (contact layer 16) and can avalanche multiply electrons generated by the incidence of a single photon.

[0082] The light receiving element 12 includes a light receiving section 13 and a multiplying section 14 .

[0083] The light receiving section 13 corresponds to a specific example of the "light receiving section" of the present disclosure. The light receiving section 13 has a photoelectric conversion function that absorbs light incident from the second surface 11S2 side of the semiconductor substrate 11 and generates carriers corresponding to the amount of light received. As described above, the light receiving section 13 includes an n-type semiconductor region (n) 111 having an n-type impurity concentration controlled to be n-type, and the carriers (electrons) generated by the light receiving section 13 are transferred to the multiplication section 14 via a potential gradient.

[0084] The multiplication section 14 corresponds to a specific example of the "multiplication section" of the present disclosure. The multiplication section 14 performs avalanche multiplication of carriers (here, electrons) generated by the light receiving section 13. The multiplication section 14 includes, for example, a p-type semiconductor region (p-type semiconductor region) having a higher impurity concentration than a p-well (p-type semiconductor region). + )14X, and an n-type semiconductor region (n) having an impurity concentration higher than that of the n-type semiconductor region (n)111. + )14Y. P-type semiconductor region (p + )14X and n-type semiconductor region (n + ) 14Y is provided on the first surface 11S1 side. The n-type semiconductor region (n + )14Y and p-type semiconductor region (p + ) 14X are formed to be stacked in this order from the first surface 11S1 side. The p-type semiconductor region (p + )14X is larger than the n-type semiconductor region (n + ) 14Y, and is provided on the entire surface of the unit pixel P separated by the pixel separation portion 17, for example. However, this is not restrictive. For example, as shown in FIG. 5 , a P-type semiconductor region (p + )14X can be formed, for example, inside the P-type semiconductor region (p) 112.

[0085] In the light receiving element 12, the avalanche multiplication region 12X is provided in the p-type semiconductor region (p + )14X and n-type semiconductor region (n + ) 14Y. The avalanche multiplication region 12X is a high electric field region (depletion layer) formed in the p-type semiconductor region (p + )14X and n-type semiconductor region (n + In the avalanche multiplication region 12X, electrons (e) generated by one photon incident on the light receiving element 12 are generated. - ) is multiplied.

[0086] The first surface 11S1 of the semiconductor substrate 11 is further provided with a contact layer 15 and a contact layer 16. The contact layer 15 includes a P-type semiconductor region (p ++ ), the P-type semiconductor region (p ++ ) is electrically coupled to the n-type semiconductor region (n) 111 constituting the light receiving portion 13. The contact layer 16 includes the n-type semiconductor region (n ++ ), the n-type semiconductor region (n ++ ) is electrically coupled to the n-type semiconductor region (n + )14Y. For example, Figure 2As shown in part (A), the contact layer 15 is provided along the pixel separation portion 17 to surround the light receiving portion 13 and is coupled to the bias voltage applying portion 110 as the anode of the light receiving element 12. The contact layer 16 is coupled to the source terminal of the quenching resistor element 120 as the cathode.

[0087] The pixel separator 17 electrically separates adjacent unit pixels P from one another. For example, in a plan view, the pixel separator 17 is arranged in a lattice pattern in the pixel array section 100A to separate the plurality of unit pixels P from one another. The pixel separator 17 extends between the first surface 11S1 and the second surface 11S2 of the semiconductor substrate 11 and, for example, is provided through the semiconductor substrate 11. The pixel separator 17 includes, for example, an insulating film 17A and a light-blocking film 17B embedded in the insulating film 17A. The pixel separator 17 can be provided from the first surface 11S1 side of the semiconductor substrate 11, or can be formed from the second surface 11S2 side of the semiconductor substrate 11.

[0088] The insulating film 17A includes, for example, silicon oxide (SiO x ) and the like. The light-blocking film 17B includes, for example, a metal material having a light-blocking property (such as tungsten (W), aluminum (Al), copper (Cu), cobalt (Co), nickel (Ni), or titanium (Ti)) or a silicon compound thereof. In addition, the light-blocking film 17B may include polycrystalline silicon (Poly-Si). In order to suppress the incidence of oblique incident light between adjacent unit pixels P, the light-blocking film 17B may be provided with an increased width portion 17X that is provided to extend on the second surface 11S2 of the semiconductor substrate 11.

[0089] The side and bottom surfaces of the pixel separation unit 17 and the second surface 11S2 of the semiconductor substrate 11 may be provided with, for example, a layer having fixed charge (fixed charge film 18). The fixed charge film 18 may be a film having positive fixed charge or a film having negative fixed charge.

[0090] It is preferable to use a semiconductor material or a conductive material having a wider band gap than the semiconductor substrate 11 as a constituent material of the fixed charge film 18 for formation. This makes it possible to suppress the generation of dark current at the interface with the semiconductor substrate 11. Examples of constituent materials of the fixed charge film 18 include hafnium oxide (HfO x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), tantalum oxide (TaO x ), titanium oxide (TiO x ), lanthanum oxide (LaO x ), praseodymium oxide (PrO x ), cerium oxide (CeO x ), neodymium oxide (NdO x ), promethium oxide (PmOx ), samarium oxide (SmO x ), europium oxide (EuO x ), gadolinium oxide (GdO x ), terbium oxide (TbO x ), dysprosium oxide (DyO x ), holmium oxide (HoO x ), thulium oxide (TmO x ), Ytterbium oxide (YbO x ), Lutetium oxide (LuO x ), yttrium oxide (YO x ), Hafnium Nitride (HfN x ), aluminum nitride (AlN x ), Hafnium Oxynitride (HfO x N y ) and aluminum oxynitride (AlO x N y ).

[0091] For example, the logic substrate 20 includes a semiconductor layer 21 including a silicon substrate and an interlayer insulating layer 221 embedded therein. Disposed on the logic substrate 20 are, for example, a bias voltage application unit 110 and a logic circuit. The logic circuit includes a readout circuit that outputs pixel signals based on carriers output from unit pixels P in the pixel array unit 100A, a vertical drive circuit, a column signal processing circuit, a horizontal drive circuit, an output circuit, and the like.

[0092] The semiconductor layer 21 is separated into, for example, a plurality of islands, and a plurality of transistors constituting the above-mentioned circuit are provided in each island into which the semiconductor layer 21 is separated. Specifically, for example, two p-MOS transistors 211 and three n-MOS transistors 212 are provided, and these transistors constitute a readout circuit that outputs a pixel signal based on carriers output from the light receiving element 12, for example. The p-MOS transistor 211 has, for example, a planar configuration and includes a gate electrode 211G, a source region 211S, and a drain region 211D. The source region 211S and the drain region 211D each include a p-type semiconductor region (p + ). The n-MOS transistor 212 has, for example, a planar configuration, and has a gate electrode 212G, a source region 212S, and a drain region 212D. The source region 212S and the drain region 212D each include an n-type semiconductor region (n + Each semiconductor layer 21 provided with the p-MOS transistor 211 and the n-MOS transistor 212 is provided with a well contact electrode not shown. The well contact electrode includes an n-type semiconductor region (n + ) or p-type semiconductor region (p + ) is used to apply a predetermined potential to the semiconductor layer 21.

[0093] Furthermore, a shielding electrode 213 is formed in a portion of the plurality of semiconductor layers 21 separated into islands in each unit pixel P. The shielding electrode 213 is provided to block potential interference between the through-holes V1a and the p-MOS transistor 211 and the n-MOS transistor 212, which are provided adjacent to each other in the logic substrate 20 and receive respective potentials different from each other. The shielding electrode 213 receives, for example, a predetermined fixed potential (for example, 0V). As shown in Figure 2 As shown in part (B) of FIG. 1 , in a plan view, the semiconductor layer 21 serving as the shield electrode 213 has, for example, a frame shape that is continuous along the inner edge of the unit pixel P and surrounds the two p-MOS transistors 211 and the three n-MOS transistors 212 provided in the unit pixel P. The semiconductor layer 21 serving as the shield electrode 213 is provided with, for example, an n-well. The surface of the semiconductor layer 21 is provided with an n-type semiconductor region (n + ) contact layer 213C for applying a fixed potential.

[0094] Disposed in the interlayer insulating layer 221 are one or more wiring layers (e.g., wiring layer 222), through-holes V1a and V1b, and holes V2 and V3. Through-holes V1a and V1b are provided through the semiconductor layer 21 in the Z-axis direction. One or more wiring layers (e.g., wiring layer 222) are provided to supply voltages to be applied to the semiconductor substrate 11, the light receiving element 12, etc. and to extract carriers generated in the light receiving element 12. Specifically, for example, part of the wiring in the wiring layer 222 is electrically coupled to the contact layer 15 via the through-hole V1a. Part of the wiring in the wiring layer 222 is electrically coupled to the contact layer 16 via the through-hole V1b. In addition, one or more wiring layers (e.g., wiring layer 222) are provided to supply voltages to be applied to the semiconductor layer 21 or the two p-MOS transistors 211, the three n-MOS transistors 212, and the shielding electrode 213 provided in the semiconductor layer 21. Specifically, for example, a portion of the wiring in the wiring layer 222 is electrically coupled to: the gate electrode 211G, source region 211S, and drain region 211D of each of the two p-MOS transistors 211; the gate electrode 212G, source region 212S, and drain region 212D of each of the three n-MOS transistors 212; and a well contact electrode (not shown) via a via V2. A portion of the wiring in the wiring layer 222 is electrically coupled to the shield electrode 213 via a via V3.

[0095] The interlayer insulating layer 221 includes, for example, silicon oxide (SiO x ), TEOS, silicon nitride (SiN x ), silicon oxynitride (SiO x N y ) etc., or a stacked film comprising two or more of them.

[0096] The gate electrodes 211G and 212G and the wiring layer 222 each include, for example, aluminum (Al), copper (Cu), tungsten (W), or the like.

[0097] The holes V1a, V1b, V2 and V3 each include, for example, a metal material having a light-blocking property such as tungsten (W), aluminum (Al), copper (Cu), cobalt (Co), nickel (Ni) or titanium (Ti), or a silicon compound thereof.

[0098] On the light receiving surface (second surface 11S2 ) side of the semiconductor substrate 11 , for example, a microlens 33 is provided for each unit pixel P with, for example, a protective layer 31 and a color filter 32 interposed therebetween.

[0099] The microlens 33 collects light incident from above the microlens 33 to the light receiving element 12. The microlens 33 includes, for example, silicon oxide (SiO x )wait.

[0100] (1-2. Method for Manufacturing Photodetection Device)

[0101] The light detection device 1 of the present embodiment can be manufactured, for example, in the following manner.

[0102] Figures 5A to 5F The manufacturing method of the light detection device 1 according to the processing sequence is shown. First, Figure 5A As shown in FIG. 1 , the sensor substrate 10 is formed. Figure 5B As shown, the interlayer insulating layer 221 is formed on the first surface 11S1 of the semiconductor substrate 11 , and then the semiconductor layer 21 is bonded to the interlayer insulating layer 221 .

[0103] Afterwards, if Figure 5C As shown in FIG, STI (shallow trench isolation) is formed by processing the surface of the semiconductor layer 21. Figure 5D As shown, a FTI (full trench isolation) structure is formed by processing the semiconductor layer 21, and the semiconductor layer 21 is separated into a plurality of islands.

[0104] Afterwards, if Figure 5E As shown in FIG. 1 , an interlayer insulating layer 221 is formed to embed the semiconductor layer 21 separated into a plurality of islands. Figure 5F As shown, the interlayer insulating layer 221 is polished by a CMP (Chemical Mechanical Polishing) method to planarize the surface of the interlayer insulating layer 221 and expose the surface of the semiconductor layer 21 .

[0105] Thereafter, the gate electrodes 211G and 212G, each including a p-type semiconductor region (p + ) of the source region 211S and the drain region 211D, each including an n-type semiconductor region (n +) of the source region 212S and the drain region 212D, including an n-type semiconductor region (n + ) contact layer 213C, and an n-type semiconductor region (n + ) or p-type semiconductor region (p + ) is formed on the surface of the semiconductor layer 21 by a typical CMOS manufacturing technology. Thereafter, an interlayer insulating layer 221, through holes V1a and V1b, holes V2 and V3, a wiring layer 222, etc. are formed. Thus, the Figure 1 The light detection device 1 is shown.

[0106] (1-3. Actions and Effects)

[0107] The light detecting device 1 of this embodiment includes a shield electrode 213 to which a predetermined fixed potential is applied between a plurality of adjacent transistors (e.g., two p-MOS transistors 211 and three n-MOS transistors 212) and the through-hole V1a. The through-hole V1a is electrically coupled to the contact layer 15 provided on the first surface 11S1 of the semiconductor substrate 11 to apply a predetermined potential to the light receiving section 13. This prevents the influence of a high voltage applied to the through-hole V1a. This is described below.

[0108] Recently, SPAD elements have been developed that improve the functionality of SPAD elements by combining a separate substrate with transistors mounted on the SPAD pixel. However, because SPAD elements use high voltages, routing high-voltage wiring on the side surfaces of transistors mounted on the separate substrate could affect channel formation, leading to concerns about deteriorating transistor characteristics.

[0109] To solve this problem, in this embodiment, a shield electrode 213 to which a predetermined fixed potential is applied is provided between a plurality of transistors (e.g., two p-MOS transistors 211 and three n-MOS transistors 212) and the via V1a, which is electrically coupled to the light receiving section 13 via the contact layer 15 and to which a high voltage is applied. This prevents the high voltage applied to the via V1a from affecting the two p-MOS transistors 211 and the three n-MOS transistors 212.

[0110] Therefore, the light detecting device 1 of the present embodiment makes it possible to improve the degradation of the characteristics of multiple transistors (e.g., two p-MOS transistors 211 and three n-MOS transistors 212) caused by the influence of a high voltage to be applied to the through wiring (e.g., the through hole V1a) electrically coupled to the light receiving element 12.

[0111] Furthermore, in the light detection device 1 of this embodiment, the shielding electrode 213 is provided between a plurality of adjacent transistors (e.g., two p-MOS transistors 211 and three n-MOS transistors 212) and the through-hole V1a. This makes it possible to reduce the arrangement distance between the through-hole V1a and the plurality of transistors (e.g., two p-MOS transistors 211 and three n-MOS transistors 212). Consequently, the area efficiency of the transistors in the logic substrate 20 can be improved. Furthermore, the number of transistors mounted on the logic substrate 20 and the semiconductor layer 21 can be increased. As a result, a more highly functional light detection device can be provided.

[0112] Next, descriptions are given of Modifications 1 to 9, Application Examples, and Practical Application Examples of the present disclosure. Hereinafter, components similar to those of the above-described embodiment are denoted by the same reference numerals, and descriptions thereof are appropriately omitted.

[0113] <2. Modifications>

[0114] (2-1. Modification 1)

[0115] Figure 6 An example of a cross-sectional configuration of a light detection device (light detection device 1A) according to Modification 1 of the present disclosure is schematically shown. As in the aforementioned embodiment, the light detection device 1A is applicable to, for example, a distance image sensor (distance image device 1000) or an image sensor that performs distance measurement using the ToF method.

[0116] In the above embodiment, a transistor having a planar configuration is described as an example of each of the plurality of transistors (e.g., two p-MOS transistors 211 and three n-MOS transistors 212) provided on the first surface 11S1 side of the sensor substrate 10; however, this is not limiting. For example, some or all of the plurality of transistors (e.g., two p-MOS transistors 211 and three n-MOS transistors 212) provided on the first surface 11S1 side of the sensor substrate 10 may each have a three-dimensional structure. Specifically, as Figure 6 As shown, the two p-MOS transistors 211 and the three n-MOS transistors 212 may each have a fin FET structure.

[0117] As described above, in the light detection device 1A of this modified example, multiple transistors, each having a three-dimensional structure such as a fin FET structure, are arranged on the first surface 11S1 side of the sensor substrate 10. In addition to the effects of the above-described embodiment, this makes it possible to increase the channel width (W) and channel length (L) within the same layout area compared to the case of arranging transistors each having a planar configuration. Alternatively, this makes it possible to increase the number of transistors mounted on the logic substrate 20 and semiconductor layer 21. This allows for the provision of a more highly functional light detection device.

[0118] (2-2. Modification 2)

[0119] Figures 7 to 13 Each schematically shows an example of a planar configuration of a light detection device (light detection device 1B) according to Modification 2 of the present disclosure. As with the aforementioned embodiment, the light detection device 1B is applicable to, for example, a distance image sensor (distance image device 1000) or an image sensor that performs distance measurement using the ToF method.

[0120] In the above embodiment, an example has been described in which a shield electrode 213 is provided. The shield electrode 213 has a frame shape that continuously surrounds the two p-MOS transistors 211 and the three n-MOS transistors 212 provided in the unit pixel P. However, this is not limiting. For example, the shield electrode 213 can be selectively provided only in the channel length direction of the two p-MOS transistors 211 and the three n-MOS transistors 212 provided in the unit pixel P. This achieves a certain degree of blocking effect.

[0121] Specifically, if Figure 7 As shown, the shielding electrode 213 can be provided only in the channel length direction (Y-axis direction) of the two p-MOS transistors 211 and the three n-MOS transistors 212 provided in the unit pixel P. This makes it possible to further improve the area efficiency of the transistors in the logic substrate 20 compared to the light detection device 1 of the above embodiment.

[0122] Alternatively, the shield electrodes 213 disposed along the respective channel lengths of the two p-MOS transistors 211 and the three n-MOS transistors 212 may each form a well and a contact layer 213C, each having the same polarity as the adjacent transistors. Figure 8 As shown, the shield electrode 213A adjacent to the p-MOS transistor 211 includes a contact layer 213CA including an n-well and an n-type semiconductor region (n + The shield electrode 213B adjacent to the n-MOS transistor 212 includes a contact layer 213CB including a p-well and a p-type semiconductor region (p +). This makes it possible to apply a fixed potential to each of the shield electrodes 213A and 213B according to the corresponding one of the p-MOS transistor 211 and the n-MOS transistor 212 and its adjacent one. Thus, the blocking effect of the shield electrodes 213A and 213B can be improved.

[0123] It should be noted that Figure 9 As shown, the respective channel lengths of the two p-MOS transistors 211 and the three n-MOS transistors 212 provided in the unit pixel P may extend in directions different from each other (e.g., the X-axis direction, the Y-axis direction, etc.). In this case, the shielding electrodes 213A and 213B are each provided along the channel length of a corresponding one of the p-MOS transistor 211 and the n-MOS transistor 212 and the adjacent one thereof.

[0124] Furthermore, in the above embodiment, an example has been described in which the through hole V1a is provided along the inner edge of the unit pixel P in a plan view so as to surround the two p-MOS transistors 211 and the three n-MOS transistors 212 provided in the unit pixel P; however, this is not limitative. Figure 10 As shown, it is sufficient to provide a through hole V1a at a predetermined position in the unit pixel P. In this case, as shown in FIG. Figure 10 As shown, each of the shield electrodes 213A and 213B is selectively provided only between the through-hole V1a provided at a predetermined position and a corresponding one of the p-MOS transistor 211 and the n-MOS transistor 212 provided adjacent to the through-hole V1a. This makes it possible to further improve the area efficiency of the transistors in the logic substrate 20 compared to the light detection device 1 of the above embodiment.

[0125] Furthermore, in the above embodiment, an example has been described in which the shield electrode 231 is provided only between the via V1a and the two p-MOS transistors 211 and the three n-MOS transistors 212; however, this is not limitative. Figure 11 As shown, a shield electrode 213 may be further provided along the channel length between the channel of the p-MOS transistor 211 and the adjacent via V1b. This further improves the area efficiency of the transistors in the logic substrate 20 and also improves degradation of the transistor characteristics caused by the influence of a high voltage applied to the via V1b electrically coupled to the multiplication section 14.

[0126] It should be noted that Figure 12 As shown, the shielding electrode 213 disposed between the p-MOS transistor 211 and the adjacent via V1b may be continuous with the shielding electrode 213 disposed between the via V1a and the two p-MOS transistors 211 and the three n-MOS transistors 212 disposed in the unit pixel P.

[0127] Furthermore, in the above-described embodiments and the like, an example has been described in which the p-MOS transistor 211 and the n-MOS transistor 212 each have a channel extending in one direction (for example, the X-axis direction or the Y-axis direction); however, this is not restrictive. Figure 13 As shown, the channel of each of the p-MOS transistor 211 and the n-MOS transistor 212 may have, for example, an L-shape. This makes it possible to improve the characteristics of each of the p-MOS transistor 211 and the n-MOS transistor 212.

[0128] (2-3. Modification 3)

[0129] Figures 14 to 16 Each diagram schematically illustrates an example of a planar configuration of a light detection device (light detection device 1C) according to Modification 3 of the present disclosure. As with the above-described embodiments, the light detection device 1C is applicable to, for example, a distance image sensor (distance image device 1000) or an image sensor that performs distance measurement using the ToF method.

[0130] In the above-mentioned embodiment, for example, the n-type semiconductor region (n + ) is provided on the entire surface of the semiconductor layer 21 forming the shield electrode 213; however, this is not limitative.

[0131] For example, Figure 14 As shown, the contact layer 213C may be provided on a portion of the surface of the semiconductor layer 21 where the shield electrode 213 is formed. Figure 15 As shown, the contact layer 213C provided on the portion in the surface of the semiconductor layer 21 can be provided at each of two or more positions on the surface of the semiconductor layer 21 serving as one island. In addition, the position of the contact layer 213C provided on the portion in the surface of the semiconductor layer 21 is not particularly limited, as shown in FIG. Figure 16 Note that providing the contact layer 213C over the entire surface of the semiconductor layer 21 as in the above embodiment makes it possible to reduce potential fluctuations of the shield electrode 213.

[0132] (2-4. Modification 4)

[0133] Figure 17 An example of a cross-sectional configuration of a light detecting device (light detecting device 1D) according to Modification 4 of the present disclosure is schematically shown. Figure 18 Schematically shows the Figure 17The planar configuration of region B of the light detecting device 1D shown corresponds to the planar configuration. Like the above embodiment, the light detecting device 1D is applicable to, for example, a distance image sensor (distance image device 1000 ) or an image sensor that performs distance measurement using the ToF method.

[0134] In the above embodiment, an example has been described in which a plurality of transistors (e.g., two p-MOS transistors 211 and three n-MOS transistors 212) provided in the unit pixel P and the shielding electrode 213 are provided in the semiconductor layer 21 independent of each other; however, this is not limitative.

[0135] In the light detection device 1D of this modification, a portion of the plurality of transistors provided in the unit pixel P (for example, three n-MOS transistors 212) and the shield electrode 213 are provided in a continuous semiconductor layer 21. In this modification, an n-type semiconductor region (n + ) can serve as a well contact electrode for the semiconductor layer 21 provided with the three n-MOS transistors 212. This allows for further improvement in the area efficiency of the transistors in the logic substrate 20 compared to the light detection device 1 of the above embodiment. Furthermore, the light detection device 1D of this modified example allows for further improvement in the functions and characteristics of the readout circuit.

[0136] Figure 19 Another example of the cross-sectional configuration of the light detecting device (light detecting device 1D) according to Modification 4 of the present disclosure is schematically shown. Figure 20 Schematically shows the Figure 19 The planar configuration of region B of the photodetection device 1D shown corresponds to the planar configuration.

[0137] Furthermore, in the light detecting device 1D in which a portion of the plurality of transistors provided in the unit pixel P (for example, three n-MOS transistors 212) and the shielding electrode 213 are provided in a continuous semiconductor layer 21, an n-type semiconductor region (n + ) or p-type semiconductor region (p +) can be omitted. In this case, by using a well contact electrode 21W provided in the semiconductor layer 21 provided with a corresponding one of the two p-MOS transistors 211 and the three n-MOS transistors 212 as a corresponding one of the contact layers 213CA and 213CB, a fixed potential can be applied to each of the shielding electrodes 213A and 213B via the well. Such a configuration also makes it possible to further improve the area efficiency of the transistors in the logic substrate 20. In addition, the functions and characteristics of the readout circuit can be further improved. In addition, the wiring density in the logic substrate 20 can be reduced, and the pixel response characteristics can be improved thereby.

[0138] (2-5. Modification 5)

[0139] Figure 21 The figure schematically shows an example of a cross-sectional configuration of a light detection device (light detection device 1E) according to Modification 5 of the present disclosure. As in the above-described embodiment, the light detection device 1E is applicable to, for example, a distance image sensor (distance image device 1000) or an image sensor that performs distance measurement using the ToF method.

[0140] In the above embodiment, an example has been described in which the shield electrode 213 is formed using the semiconductor layer 21. Meanwhile, in this modification, a polysilicon (Poly-Si) film serving as the shield electrode 214 is embedded in the interlayer insulating layer 221. + A contact layer 214C is provided on the surface of the poly-Si film, and a fixed potential is applied to the shield electrode 214 via the contact layer 214C. Alternatively, the shield electrode 214 may be formed using epitaxial silicon containing p-type impurities or n-type impurities. This makes it possible to adjust the shielding effect in the depth direction (Y-axis direction) as needed, which makes it possible to maximize the shielding effect, for example.

[0141] like Figure 22 As shown, as in the above-described fourth modification, by bringing the semiconductor layer 21 provided with a plurality of transistors (for example, three n-MOS transistors 212) provided in the unit pixel P into contact with the poly-Si film, and applying a fixed potential to the shielding electrode 214 via the well of the semiconductor layer 21, a fixed potential can be applied to the shielding electrode 214. This makes it possible to reduce the wiring density in the logic substrate 20 and thereby improve pixel response characteristics.

[0142] (2-6. Modification 6)

[0143] Figure 23 An example of a cross-sectional configuration of a light detecting device (light detecting device 1F) according to Modification 6 of the present disclosure is schematically shown. Figure 24 Schematically shows the Figure 23The planar configuration of region B of the light detecting device 1F shown corresponds to the planar configuration. Like the above embodiment, the light detecting device 1F is applicable to, for example, a distance image sensor (distance image device 1000 ) or an image sensor that performs distance measurement using the ToF method.

[0144] In the light detecting device 1F of this modification, a shielding electrode 215 is further provided on the rear surface side of the semiconductor layer 21. The shielding electrode 215 is provided to block the influence of the electric field flowing from the rear surface side of the semiconductor layer 21, and corresponds to a specific example of the "second shielding electrode" in the modification 6 of the present disclosure. The shielding electrode 215 includes, for example, a Poly-Si film and receives a predetermined fixed potential. Specifically, as Figure 24 As shown, the shield electrode 215 includes, for example, a contact portion 215C that contacts the semiconductor layer 21 in which a plurality of transistors (two p-MOS transistors 211 and three n-MOS transistors 212 ) are formed. This allows a fixed potential to be applied via the well of the semiconductor layer 21 .

[0145] In the photodetection device 1F of this modification, degradation of characteristics of multiple transistors (for example, two p-MOS transistors 211 and three n-MOS transistors 212 ) can be further improved compared to the photodetection device 1 of the above embodiment.

[0146] (2-7. Modification 7)

[0147] Figure 25 An example of a cross-sectional configuration of a light detecting device (light detecting device 1G) according to Modification 7 of the present disclosure is schematically shown. Figure 26 Schematically shows the Figure 25 The planar configuration of the region B of the photodetection device 1G shown corresponds to an example of a planar configuration. Figure 27 Schematically shows the Figure 25 The planar configuration of region B of the light detecting device 1G shown corresponds to another example of a planar configuration. Like the above embodiment, the light detecting device 1F is applicable to, for example, a distance image sensor (distance image device 1000) or an image sensor that performs distance measurement using the ToF method.

[0148] In the above embodiment, an example has been described in which the shield electrode 213 is formed using the semiconductor layer 21. Meanwhile, in this modification, the metal film serving as the shield electrode 216 is embedded in the interlayer insulating layer 221. In this case, the hole V3 can extend to a predetermined depth and can serve as the shield electrode 216. This makes it possible to adjust the shielding effect in the depth direction (Y-axis direction) as needed, which makes it possible to maximize the shielding effect, for example.

[0149] Alternatively, in order to adjust the depth of the shield electrode 216, for example, a silicon nitride film (SiN) may be formed at a predetermined depth in the interlayer insulating layer 221. x ) barrier film 217.

[0150] Further, for example, Figure 26 As shown, the shielding electrode 216 may have a frame shape that is continuous along the inner edge of the unit pixel P, for example, to surround the two p-MOS transistors 211 and the three n-MOS transistors 212 provided in the unit pixel P. Alternatively, as shown Figure 27 As shown, the shielding electrode 216 may be formed discontinuously as dots.

[0151] (2-8. Modification 8)

[0152] Figure 28 An example of a cross-sectional configuration of a light detecting device (light detecting device 1H) according to Modification 8 of the present disclosure is schematically shown. Figure 29 Another example of a cross-sectional configuration of a light detection device (light detection device 1H) according to Modification 8 of the present disclosure is schematically shown. As with the above-described embodiment, the light detection device 1H is applicable to, for example, a distance image sensor (distance image device 1000) or an image sensor that performs distance measurement using a ToF method.

[0153] In the above embodiment, an example has been described in which two substrates (i.e., the sensor substrate 10 and the logic substrate 20) are stacked on top of each other; however, this is not restrictive. For example, in the above embodiment, the bias voltage application section 110 and the logic substrate 20, which includes a readout circuit that outputs pixel signals based on carriers output from the unit pixels P of the pixel array section 100A, a vertical drive circuit, a column signal processing circuit, a horizontal drive circuit, an output circuit, and the like, are stacked on the first surface 11S1 side of the sensor substrate 10. However, for example, the readout circuit and other logic circuits may be provided on different substrates, and they may be stacked in sequence on the first surface 11S1 side of the sensor substrate 10.

[0154] Specifically, in the light detection device 1H of this eighth variation, a readout circuit substrate 20A, which includes multiple transistors constituting the readout circuit, is stacked on the first surface 11S1 side of the sensor substrate 10. Furthermore, a logic substrate 20B, which includes, for example, a bias voltage application unit 110, a vertical drive circuit, a column signal processing circuit, a horizontal drive circuit, an output circuit, and the like, is further stacked on the first surface 11S1 side of the sensor substrate 10, with the readout circuit substrate 20A interposed between the first surface and the logic substrate. In this variation, the readout circuit substrate 20A corresponds to a specific example of the "second substrate" in the eighth variation of the present disclosure, and the logic substrate 20B corresponds to a specific example of the "third substrate" in the eighth variation of the present disclosure.

[0155] Furthermore, as in the above-described embodiment, a plurality of transistors (for example, two p-MOS transistors 211 and three n-MOS transistors 212) constituting the readout circuit may be provided on the opposite side with respect to the surface facing the sensor substrate 10. Alternatively, as Figure 29 As shown in FIG. 1 , such a plurality of transistors may be provided on the side facing the surface of the sensor substrate 10. That is, the sensor substrate 10 and the readout circuit substrate 20A may be provided as shown in FIG. Figure 28 as shown, or can be stacked face to face with each other as shown. Figure 29 Shown stacked on top of each other in a face-to-back manner.

[0156] The light detection device 1H employing face-to-face stacking includes a readout circuit substrate 20A, in which a wiring layer including one or more wirings (e.g., wiring layers 222, 223, and 224) is formed in an interlayer insulating layer 221 on the front surface side of a semiconductor layer 21, and in which a plurality of pad portions 225 are embedded in the surface of the interlayer insulating layer 191 opposite to the logic substrate 20B. The logic substrate 20B includes a semiconductor substrate 23 and an interlayer insulating layer 241. The semiconductor substrate 23 includes a pair of opposing surfaces (a front surface 23S1 and a rear surface 23S2). The interlayer insulating layer 241 is formed on the front surface 23S1 of the semiconductor substrate 23. Formed in the interlayer insulating layer 241 are gates 242 of a plurality of transistors or one or more wiring layers provided on the front surface 23S1 of the semiconductor substrate 23. A plurality of pad portions 243 are embedded in the surface of the interlayer insulating layer 241 opposite to the readout circuit substrate 20A. In the light detecting device 1H, hybrid bonding (eg, Cu-Cu bonding) is performed between the pad portion 225 and the pad portion 243. This allows the readout circuit substrate 20A and the logic substrate 20B to be electrically coupled to each other.

[0157] In the photodetection device 1H employing a face-to-back stacking configuration, a multilayer wiring layer 19 is provided on the first surface 11S1 side of the semiconductor substrate 11. Within the multilayer wiring layer 19, a wiring layer 192 is formed within the interlayer insulating layer 191. Wiring layer 192 includes one or more wirings. Multiple pads 193 are embedded in the surface of the interlayer insulating layer 191 opposite the semiconductor substrate 11 side. In the readout circuit substrate 20A, a multilayer wiring layer 22-1 is provided on the front surface side of the semiconductor layer 21, where multiple transistors are formed, and a multilayer wiring layer 22-2 is formed on the rear surface side. Multiple pads 226 are embedded in the surface of the interlayer insulating layer 221 opposite the sensor substrate 10, on the side of the multilayer wiring layer 22-1. Multiple pads 225 are embedded in the surface of the interlayer insulating layer 221 opposite the logic substrate 20B, on the side of the multilayer wiring layer 22-2. The logic substrate 20B includes a semiconductor substrate 23 and an interlayer insulating layer 241. The semiconductor substrate 23 includes a pair of opposing surfaces (a front surface 23S1 and a rear surface 23S2). An interlayer insulating layer 241 is formed on the front surface 23S1 of the semiconductor substrate 23. Formed in the interlayer insulating layer 241 are gate electrodes 242 of a plurality of transistors or one or more wiring layers provided on the front surface 23S1 of the semiconductor substrate 23. A plurality of pad portions 243 are embedded in the surface of the interlayer insulating layer 241 opposite to the readout circuit substrate 20A. In the light detection device 1H, hybrid bonding (e.g., Cu-Cu bonding) is performed between the pad portion 193 and the pad portion 226, and between the pad portion 225 and the pad portion 243. This allows the sensor substrate 10 and the readout circuit substrate 20A to be electrically coupled to each other, and allows the readout circuit substrate 20A and the logic substrate 20B to be electrically coupled to each other.

[0158] As described above, in the light detection device 1H of this modified example, two or more substrates (e.g., the readout circuit substrate 20A and the logic substrate 20B) are stacked on the sensor substrate 10. This increases the number of circuits that can be mounted on the light detection device 1H. This allows for a more highly functional light detection device to be provided.

[0159] (2-9. Modification 9)

[0160] Figure 30 An example of a cross-sectional configuration of a light detecting device (light detecting device 1I) according to Modification 9 of the present disclosure is schematically shown. Figure 31 Schematically shows the Figure 30 The planar configuration of region B of the light detecting device 1I shown corresponds to an example of a planar configuration. As in the above embodiment, the light detecting device 1I is applicable to, for example, a distance image sensor (distance image device 1000) or an image sensor that performs distance measurement using a ToF method.

[0161] In the above embodiment, an example has been described in which one readout circuit is provided in one unit pixel P; however, this is not restrictive. Figure 30 and Figure 31 As shown, two unit pixels P adjacent to each other in the row direction or column direction can share a readout circuit. In addition, for example, four unit pixels P adjacent to each other in two rows and two columns, or six unit pixels P adjacent to each other in two rows and three columns, can share a readout circuit. That is, the arrangement cycle of the plurality of unit pixels P arranged in the array on the sensor substrate 10 and the arrangement cycle of the plurality of readout circuits provided on the logic substrate 20 can be different from each other.

[0162] (Other Modifications)

[0163] In the above-described embodiment and Modifications 1 to 9, an example has been described in which a shielding electrode (e.g., shielding electrode 213) shields the plurality of transistors (e.g., two p-MOS transistors 211 and three n-MOS transistors 212) constituting the readout circuit from the adjacent vias V1a and V1b. However, this is not restrictive. The present technology makes it possible to achieve a similar effect in a light detection device in which, for example, circuits or devices other than the pixel readout circuit (e.g., transistors that perform circuit drive control or pixel selection) are arranged in region B in addition to the readout circuit.

[0164] <3. Application Examples>

[0165] Figure 32 An example of a schematic configuration of a distance imaging device 1000 is shown as an electronic device including the light detection device (eg, light detection device 1) according to the above-described embodiment and modifications 1 to 9. The distance imaging device 1000 corresponds to a specific example of the “distance measuring device” of the present disclosure.

[0166] The distance image apparatus 1000 includes, for example, a light source device 1100 , an optical system 1200 , a light detection device 1 , an image processing circuit 1300 , a monitor 1400 , and a memory 1500 .

[0167] The distance image apparatus 1000 receives light (modulated light or pulsed light) projected from the light source device 1100 toward the illumination target 2000 and reflected by the surface of the illumination target 2000 , thereby acquiring a distance image corresponding to the distance to the illumination target 2000 .

[0168] The optical system 1200 includes one or more lenses, and guides image light (incident light) from the illumination target 2000 to the light detection device 1 to form an image on a light receiving surface (sensor unit) of the light detection device 1 .

[0169] The image processing circuit 1300 performs image processing for constructing a distance image based on the distance signal supplied from the light detection device 1 , and the distance image (image data) obtained by the image processing is supplied to the monitor 1400 and displayed, or supplied to the memory 1500 and stored (recorded).

[0170] In the distance imaging device 1000 configured as described above, the application of the aforementioned light detection device (e.g., light detection device 1) makes it possible to calculate the distance to the illumination target 2000 based solely on the light reception signal from the highly stable unit pixel P, and to generate a highly accurate distance image. In other words, the distance imaging device 1000 can acquire a more accurate distance image.

[0171] <4. Practical Application Examples>

[0172] (Example of actual application of endoscopic surgery system)

[0173] The technology according to the present disclosure (the present technology) is applicable to various products. For example, the technology according to the present disclosure can be applied to an endoscopic surgery system.

[0174] Figure 33 is a diagram depicting an example of a schematic configuration of an endoscopic surgery system to which the technology according to an embodiment of the present disclosure (the present technology) can be applied.

[0175] exist Figure 33 , a state is shown in which a surgeon (medical doctor) 11131 is using an endoscopic surgery system 11000 to perform surgery on a patient 11132 on a bed 11133. As depicted, the endoscopic surgery system 11000 includes an endoscope 11100, other surgical tools 11110 (such as a pneumoperitoneum tube 11111 and an energy therapy tool 11112), a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are installed.

[0176] Endoscope 11100 includes a lens barrel 11101 having a predetermined length at its distal end inserted into a body cavity of a patient 11132, and a camera 11102 connected to the proximal end of lens barrel 11101. In the depicted example, endoscope 11100 is depicted as including a rigid scope having a rigid lens barrel 11101. However, endoscope 11100 may also include a flexible scope having a flexible lens barrel 11101.

[0177] The lens barrel 11101 has an opening at its distal end for mounting an objective lens. A light source device 11203 is connected to the endoscope 11100 so that light generated by the light source device 11203 is introduced into the distal end of the lens barrel 11101 through a light guide extending within the lens barrel 11101 and illuminates the observation target in the body cavity of the patient 11132 through the objective lens. Note that the endoscope 11100 may be a straight-view endoscope, an oblique-view endoscope, or a side-view endoscope.

[0178] The camera head 11102 is equipped with an optical system and an imaging element. Light reflected from the observation target (observation light) is focused onto the imaging element through the optical system. The observation light is photoelectrically converted by the imaging element to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. This image signal is transmitted as RAW data to the CCU 11201.

[0179] The CCU 11201 includes a central processing unit (CPU), a graphics processing unit (GPU), and the like, and integrally controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera 11102 and performs various image processing, such as development processing (demosaicing processing), on the image signal for displaying an image based on the image signal.

[0180] The display device 11202 displays thereon an image based on an image signal on which image processing has been performed by the CCU 11201 under the control of the CCU 11201 .

[0181] The light source device 11203 includes a light source, such as a light emitting diode (LED), and supplies illumination light when imaging the surgical area onto the endoscope 11100.

[0182] The input device 11204 is an input interface for the endoscopic surgery system 11000. The user can input various information or instructions into the endoscopic surgery system 11000 through the input device 11204. For example, the user can input an instruction to change the imaging conditions (such as the type of irradiation light, magnification, and focal length) of the endoscope 11100.

[0183] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for burning or cutting tissue, sealing blood vessels, and the like. The pneumoperitoneum device 11206 feeds gas into the body cavity of the patient 11132 via the pneumoperitoneum tube 11111, thereby inflating the cavity to ensure the field of view of the endoscope 11100 and the surgeon's working space. The recorder 11207 is a device capable of recording various surgical information. The printer 11208 is a device capable of printing surgical information in various formats, such as text, images, or charts.

[0184] Note that the light source device 11203 that supplies irradiation light when imaging the surgical area onto the endoscope 11100 may include a white light source (including, for example, an LED, a laser source, or a combination thereof). When the white light source includes a combination of red, green, and blue (RGB) laser sources, since the output intensity and output time of each color (each wavelength) can be controlled with high accuracy, the white balance of the captured image can be adjusted by the light source device 11203. Further, in this case, if the laser beams of the respective RGB laser sources are irradiated onto the observation target in a time-differentiated manner, and the driving of the imaging element of the camera 11102 is controlled in synchronization with the irradiation time, images corresponding to the R, G, and B colors individually can be captured in a time-differentiated manner. According to this method, a color image can be obtained even if a color filter is not provided to the imaging element.

[0185] Furthermore, the light source device 11203 can be controlled so that the output light intensity changes at each predetermined time. By controlling the driving of the imaging element of the camera 11102 in synchronization with the timing of the light intensity change to acquire images separated by time, and synthesizing the images, a high dynamic range image without underexposed, thick shadows or overexposed highlights can be generated.

[0186] Furthermore, the light source device 11203 can be configured to supply light of a predetermined wavelength band, in preparation for special light observation. In special light observation, for example, by utilizing the wavelength dependence of the absorption of light by body tissue, a narrow band of illumination light is used compared to the illumination light (i.e., white light) during ordinary observation, and imaging of predetermined tissues (such as blood vessels on the surface of the mucosa) with high contrast is performed, which is narrow-band observation (narrow-band imaging). Alternatively, in special light observation, fluorescence observation can be performed to obtain an image from fluorescence generated by irradiating excitation light. In fluorescence observation, fluorescence observation (autofluorescence observation) of body tissue can be performed by irradiating excitation light on the body tissue, or a fluorescence image can be obtained by locally injecting an agent (such as indocyanine green (ICG)) into the body tissue and irradiating excitation light of a fluorescence wavelength corresponding to the agent onto the body tissue. The light source device 11203 can be configured to supply such narrow-band light and / or excitation light suitable for the above-mentioned special light observation.

[0187] Figure 34 It depicts Figure 33 A block diagram of an example of a functional configuration of the camera 11102 and CCU 11201 is depicted in FIG.

[0188] The camera 11102 includes a lens unit 11401, an imaging unit 11402, a driving unit 11403, a communication unit 11404, and a camera control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera 11102 and the CCU 11201 are connected via a transmission cable 11400 for communication with each other.

[0189] The lens unit 11401 is an optical system provided at a connection position with the lens barrel 11101. Observation light collected by the distal end of the lens barrel 11101 is guided to the camera 11102 and introduced into the lens unit 11401. The lens unit 11401 includes a combination of multiple lenses (including a zoom lens and a focus lens).

[0190] The number of imaging elements included in the imaging unit 11402 can be one (single-board type) or multiple (multi-board type). When the imaging unit 11402 is configured as a multi-board type, for example, image signals corresponding to each R, G, and B are generated by the imaging element, and the image signals can be synthesized to obtain a color image. The imaging unit 11402 can also be configured to have a pair of imaging elements for acquiring corresponding image signals for the right eye and the left eye to prepare for three-dimensional (3D) display. If 3D display is performed, the surgeon 11131 can more accurately understand the depth of living tissue in the surgical area. Note that when the imaging unit 11402 is configured as a multi-board type, the lens unit 11401 also provides a plurality of systems corresponding to the respective imaging elements.

[0191] Furthermore, the imaging unit 11402 may not necessarily be provided on the camera head 11102. For example, the imaging unit 11402 may be provided immediately after the objective lens in the lens barrel 11101.

[0192] The drive unit 11403 includes an actuator and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera control unit 11405. As a result, the magnification and focus of the image captured by the imaging unit 11402 can be appropriately adjusted.

[0193] The communication unit 11404 includes a communication device for transmitting and receiving various information to and from the CCU 11201. The communication unit 11404 transmits the image signal acquired by the imaging unit 11402 to the CCU 11201 as RAW data via the transmission cable 11400.

[0194] In addition, the communication unit 11404 receives a control signal for controlling the driving of the camera 11102 from the CCU 11201 and supplies the control signal to the camera control unit 11405. The control signal includes information related to imaging conditions, such as information specifying a frame rate for capturing an image, information specifying an exposure value when capturing an image, and / or information specifying a magnification and a focus for capturing an image.

[0195] Note that imaging conditions (such as frame rate, exposure value, magnification, or focus) may be appropriately specified by the user or automatically set based on the acquired image signal by the control unit 11413 of the CCU 11201. In the latter case, the endoscope 11100 is equipped with an automatic exposure (AE) function, an automatic focus (AF) function, and an automatic white balance (AWB) function.

[0196] The camera control unit 11405 controls the driving of the camera 11102 based on a control signal received from the CCU 11201 through the communication unit 11404 .

[0197] The communication unit 11411 includes a communication device for transmitting and receiving various information to and from the camera 11102. The communication unit 11411 receives an image signal transmitted thereto from the camera 11102 through the transmission cable 11400.

[0198] Furthermore, the communication unit 11411 transmits a control signal for controlling the driving of the camera 11102 to the camera 11102. The image signal and the control signal may be transmitted through electrical communication, optical communication, or the like.

[0199] The image processing unit 11412 performs various image processing on the image signal in the form of RAW data transmitted thereto from the camera 11102 .

[0200] The control unit 11413 performs various controls related to imaging of the operation area, etc. through the endoscope 11100 and displaying images obtained by imaging the operation area, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102 .

[0201] Furthermore, the control unit 11413 controls the display device 11202 to display a captured image based on the image signal processed by the image processing unit 11412, in which the surgical area, etc., is imaged. In this case, the control unit 11413 can use various image recognition technologies to identify various objects in the captured image. For example, the control unit 11413 can detect the shape and color of the edges of objects included in the captured image to identify surgical tools (such as forceps), specific living areas, bleeding, and mist when using the energy treatment tool 11112. When the control unit controls the display device 11202 to display the captured image, the control unit 11413 can use the recognition results to display various surgical support information in an overlapping manner with the image of the surgical area. When the surgical support information is displayed and presented to the surgeon 11131 in an overlapping manner, the burden on the surgeon 11131 can be reduced, and the surgeon 11131 can continue the operation with confidence.

[0202] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 to each other is an electric signal cable for communication of electric signals, an optical fiber for optical communication, or a composite cable for both electric and optical communication.

[0203] Here, although wired communication is performed by using the transmission cable 11400 in the depicted example, communication between the camera 11102 and the CCU 11201 may also be wireless communication.

[0204] An example of an endoscopic surgery system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging unit 11402 in the above configuration. Applying the technology according to the present disclosure to the imaging unit 11402 improves detection accuracy.

[0205] Note that, although an endoscopic surgical system is described here as an example, the technology according to the present disclosure can be applied to, for example, a microsurgery system or the like other than the above.

[0206] (Actual application example of mobile object)

[0207] The technology according to the present disclosure is applicable to various products. For example, the technology according to the present disclosure can be implemented as a device installed on any type of mobile object (such as a vehicle, electric vehicle, hybrid electric vehicle, motorcycle, bicycle, personal mobility tool, aircraft, drone, ship, robot, construction machine, or agricultural machine (tractor)).

[0208] Figure 35 : is a block diagram depicting an example of a schematic configuration of a vehicle control system as an example of a mobile body control system to which the technology according to the embodiment of the present disclosure can be applied.

[0209] The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. Figure 35 In the illustrated example, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an exterior information detection unit 12030, an interior information detection unit 12040, and an integrated control unit 12050. Furthermore, a microcomputer 12051, a sound / image output unit 12052, and an in-vehicle network interface (I / F) 12053 are shown as functional configurations of the integrated control unit 12050.

[0210] The drive system control unit 12010 controls the operation of devices related to the vehicle's drive system according to various programs. For example, the drive system control unit 12010 functions as a control device to control: a drive force generating device (such as an internal combustion engine, a drive motor, etc.) for generating the vehicle's drive force; a drive force transmission mechanism for transmitting the drive force to the wheels; a steering mechanism for adjusting the vehicle's steering angle; and a braking device for generating the vehicle's braking force.

[0211] The body system control unit 12020 controls the operation of various types of devices installed on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device to control the following: the keyless entry system, the smart key system, the power windows, or various lights such as the headlights, backup lights, brake lights, turn signals, and fog lights. In this case, the body system control unit 12020 can receive radio waves transmitted from a mobile device that replaces the key, or signals from various switches as input. The body system control unit 12020 receives these input radio waves or signals to control the vehicle's door locks, power windows, lights, and other devices.

[0212] The vehicle exterior information detection unit 12030 detects information outside the vehicle including the vehicle control system 12000. For example, the vehicle exterior information detection unit 12030 is connected to the imaging unit 12031. The vehicle exterior information detection unit 12030 causes the imaging unit 12031 to image the exterior of the vehicle and receives the imaged image. Based on the received image, the vehicle exterior information detection unit 12030 can detect an object (such as a person, vehicle, obstacle, sign, symbol, etc. on the road) or detect the distance to the object.

[0213] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as information about the measured distance. The light received by the imaging unit 12031 can be visible light or invisible light such as infrared light.

[0214] The in-vehicle information detection unit 12040 detects information about the vehicle interior. A driver status detection unit 12041 may be connected to the in-vehicle information detection unit 12040 to detect the driver's condition. Driver status detection unit 12041 may include, for example, a camera that captures the driver's image. Based on the detection information input from driver status detection unit 12041, in-vehicle information detection unit 12040 can calculate the driver's level of fatigue or concentration, or determine whether the driver is dozing off.

[0215] The microcomputer 12051 can calculate control target values ​​for the driving force generation device, the steering mechanism, or the braking device based on information about the interior or exterior of the vehicle obtained by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control to implement functions of an advanced driver assistance system (ADAS), including collision avoidance or impact cushioning for the vehicle, following driving based on vehicle-to-vehicle distance, speed maintenance driving, vehicle collision warnings, vehicle lane departure warnings, and the like.

[0216] In addition, the microcomputer 12051 can control the driving force generation device, steering mechanism, braking device based on information about the outside or inside of the vehicle obtained by the outside information detection unit 12030 or the inside information detection unit 12040, thereby performing collaborative control intended for automatic driving, etc. that does not depend on the driver's operation.

[0217] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on information about the exterior of the vehicle obtained by the exterior information detection unit 12030. For example, the microcomputer 12051 can control the headlights to change from high beam to low beam based on the position of a preceding vehicle or an oncoming vehicle detected by the exterior information detection unit 12030, thereby performing cooperative control aimed at preventing glare by controlling the headlights.

[0218] The sound / image output unit 12052 transmits an output signal of at least one of sound and image to an output device, which can notify information to the passengers of the vehicle or the outside of the vehicle in a visual or auditory manner. Figure 35In the example of FIG, an audio speaker 12061, a display portion 12062, and an instrument panel 12063 are shown as output devices. The display portion 12062 may include, for example, at least one of an in-vehicle display and a head-up display.

[0219] Figure 36 is a diagram illustrating an example of the installation position of the imaging unit 12031.

[0220] exist Figure 36 , the imaging unit 12031 includes imaging units 12101 , 12102 , 12103 , 12104 and 12105 .

[0221] Imaging units 12101, 12102, 12103, 12104, and 12105 can be positioned on the front nose, sideview mirrors, rear bumper, rear door, and upper portion of the windshield inside the vehicle 12100. Imaging unit 12101 located on the front nose and imaging unit 12105 located on the upper portion of the windshield inside the vehicle primarily capture images of the front of the vehicle 12100. Imaging units 12102 and 12103 located on the sideview mirrors primarily capture images of the sides of the vehicle 12100. Imaging unit 12104 located on the rear bumper or rear door primarily captures images of the rear of the vehicle 12100. Imaging unit 12105 located on the upper portion of the windshield inside the vehicle primarily detects vehicles ahead, pedestrians, obstacles, signals, traffic signs, lanes, and the like.

[0222] By the way, Figure 36 The following diagram illustrates examples of the imaging ranges of imaging units 12101 through 12104. Imaging range 12111 represents the imaging range of imaging unit 12101, located at the front nose. Imaging ranges 12112 and 12113 represent the imaging ranges of imaging units 12102 and 12103, respectively, located at the side mirrors. Imaging range 12114 represents the imaging range of imaging unit 12104, located at the rear bumper or rear door. For example, by superimposing image data captured by imaging units 12101 through 12104, a bird's-eye view image of vehicle 12100 can be obtained from above.

[0223] At least one of the imaging units 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0224] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can determine the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the temporal change in that distance (relative speed to the vehicle 12100), thereby extracting the closest three-dimensional object as the leading vehicle, specifically one that is located on the travel path of the vehicle 12100 and is traveling at a predetermined speed (e.g., equal to or greater than 0 km / h) in substantially the same direction as the vehicle 12100. Furthermore, the microcomputer 12051 can pre-set a following distance to be maintained from the leading vehicle and execute automatic braking control (including following parking control), automatic acceleration control (including following starting control), and the like. This makes it possible to execute cooperative control for autonomous driving, etc., independent of the driver's operation.

[0225] For example, based on the distance information obtained from imaging units 12101 to 12104, microcomputer 12051 can classify three-dimensional object data regarding three-dimensional objects into three-dimensional object data for two-wheeled vehicles, standard-sized vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic obstacle avoidance. For example, microcomputer 12051 identifies whether obstacles around vehicle 12100 are visually recognizable by the driver of vehicle 12100 or obstacles that are difficult for the driver to visually recognize. Microcomputer 12051 then determines a collision risk, indicating the risk of collision with each obstacle. If the collision risk is equal to or greater than a set value, indicating the possibility of a collision, microcomputer 12051 outputs a warning to the driver via audio speaker 12061 or display unit 12062, and executes forced deceleration or evasive steering via drive system control unit 12010. Thus, microcomputer 12051 can assist driving to avoid collisions.

[0226] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can identify pedestrians by determining whether a pedestrian exists in the images captured by the imaging units 12101 to 12104. This pedestrian recognition is performed, for example, by a program that extracts feature points from the images captured by the imaging units 12101 to 12104, which are infrared cameras, and a program that determines whether a pedestrian exists by performing pattern matching on a series of feature points representing the object's outline. When the microcomputer 12051 determines that a pedestrian exists in the images captured by the imaging units 12101 to 12104 and identifies the pedestrian, the audio / video output unit 12052 controls the display unit 12062 to display a square outline superimposed on the recognized pedestrian to emphasize the recognized pedestrian. The audio / video output unit 12052 may also control the display unit 12062 to display an icon representing the pedestrian at a desired location.

[0227] An example of a mobile body control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging portion 12031 in the above-described configuration. Specifically, the light detection device according to any of the above-described embodiments and Modifications 1 to 9 (e.g., the light detection device 1) can be applied to the imaging portion 12031. Applying the technology according to the present disclosure to the imaging portion 12031 makes it possible to obtain a high-resolution captured image with less noise, thereby making it possible to perform highly accurate control using the captured image in the mobile body control system.

[0228] While the above description has been made with reference to the embodiments, Modifications 1 to 9, Application Examples, and Practical Application Examples, the present disclosure is not limited to the aforementioned embodiments. The present disclosure can be modified in various ways. For example, the light detection device of the present disclosure need not include all of the components described in the aforementioned embodiments and may include other layers. For example, if the light detection device 1 detects light other than visible light (e.g., near-infrared light (IR)), the color filter 32 may be omitted.

[0229] In addition, the polarity of the semiconductor region constituting the light detecting device according to the present disclosure can be reversed. Further, in the light detecting device according to the present disclosure, holes can be used as signal charges.

[0230] Furthermore, as long as the photodetection device according to the present disclosure is in a state where avalanche multiplication occurs by applying a reverse bias between the anode and the cathode, the corresponding potential is not limited.

[0231] Furthermore, the above-described embodiments and the like exemplify the semiconductor substrate 11 including silicon; however, the semiconductor substrate 11 may include, for example, germanium (Ge), or a compound semiconductor of silicon (Si) and germanium (Ge) (eg, silicon germanium (SiGe)).

[0232] Furthermore, the shape of the unit pixel P is not limited to a rectangular shape. For example, the unit pixel P may have an octagonal shape, and a plurality of unit pixels P constituting the pixel array section 100A may be arranged in a honeycomb shape.

[0233] Note that the effects described in connection with the above-mentioned embodiments and the like are examples, and any other effects may be achieved and may be included in addition.

[0234] Note that the present disclosure may have any of the following configurations. According to the present technology having any of the following configurations, one or more shielding electrodes to which a fixed potential is applied are provided in at least a portion of the region between one or more transistors and the first through wiring and the second through wiring. The first through wiring and the second through wiring are adjacent to the one or more transistors. The one or more transistors are provided on the first surface side of the first substrate. The first through wiring is provided through the semiconductor layer in which the one or more transistors are provided, and is electrically coupled to a first contact layer provided on the first surface of the first substrate, the first substrate being provided with a light receiving element. The second through wiring is provided through the semiconductor layer and is electrically coupled to a second contact layer provided on the first surface of the first substrate, the first substrate being provided with a light receiving element. This makes it possible to block the influence of the high voltage applied to the light receiving element and improve the characteristics of the one or more transistors. (1)

[0236] A light detection device, comprising:

[0237] a first substrate having a first surface and a second surface opposing each other and including a pixel array portion in which a plurality of pixels are arranged in an array in an in-plane direction;

[0238] a light receiving element including a light receiving portion provided inside the first substrate for each pixel and generating carriers corresponding to the amount of received light by photoelectric conversion, and a multiplying portion performing avalanche multiplication on the carriers generated in the light receiving portion;

[0239] a first contact layer disposed on the first surface of the first substrate and electrically coupled to the light receiving portion;

[0240] a second contact layer disposed on the first surface of the first substrate and electrically coupled to the multiplication portion;

[0241] a second substrate stacked on the first surface side of the first substrate and including a semiconductor layer provided with one or more transistors;

[0242] a first through wiring, provided through the semiconductor layer in a stacking direction and electrically coupled to the first contact layer;

[0243] a second through wiring provided through the semiconductor layer in the stacking direction and electrically coupled to the second contact layer; and

[0244] One or more first shield electrodes are provided in at least a portion of a region between the one or more transistors and first and second through-wirings adjacent to the one or more transistors, and a fixed potential is applied thereto. (2)

[0246] The light detection device according to (1) above, wherein

[0247] One or more transistors are provided for each pixel, and

[0248] The one or more first shielding electrodes are continuously disposed along an inner edge of a corresponding one of the pixels to surround the one or more transistors. (3)

[0250] The light detection device according to (1) or (2) above, wherein the one or more first shielding electrodes are provided along a channel length direction of the one or more transistors. (4)

[0252] The light detection device according to any one of (1) to (3) above, wherein:

[0253] the one or more transistors include a p-MOS transistor and an n-MOS transistor,

[0254] A p-type contact layer is provided in one or more first shielding electrodes provided along a channel length direction of the p-MOS transistor; and

[0255] The n-type contact layer is provided in one or more first shield electrodes provided along a channel length direction of the n-MOS transistor. (5)

[0257] The light detection device according to any one of (1) to (4) above, wherein:

[0258] One or more first shield electrodes are formed of a semiconductor layer, and

[0259] The p-type contact layer or the n-type contact layer is provided on the surface of the semiconductor layer. (6)

[0261] The light detecting device according to the above (5), wherein the p-type contact layer or the n-type contact layer is provided on the entire surface of the semiconductor layer. (7)

[0263] The light detection device according to any one of (1) to (6) above, wherein the one or more first shielding electrodes are continuous with a semiconductor layer in which the one or more transistors are provided. (8)

[0265] The light detecting device according to (7) above, wherein each of the one or more first shield electrodes also functions as a well contact electrode for applying a fixed potential to the semiconductor layer. (9)

[0267] The light detection device according to (7) or (8) above, wherein the fixed potential is supplied to the one or more first shield electrodes via a semiconductor layer provided with the one or more transistors. (10)

[0269] The light detection device according to any one of (1) to (7) above, wherein the one or more first shielding electrodes include polysilicon or epitaxial silicon including p-type impurities or n-type impurities. (11)

[0271] The light detecting device according to the above (10), wherein the one or more first shielding electrodes are in contact with the semiconductor layer. (12)

[0273] The light detecting device according to any one of (1) to (7) above, wherein the one or more first shielding electrodes include a metal material. (13)

[0275] The light detecting device according to any one of (1) to (12) above further includes a second shielding electrode provided between the first substrate and the semiconductor layer and to which a fixed potential is applied. (14)

[0277] The light detecting device according to the above (13), wherein the second shielding electrode is electrically coupled to the semiconductor layer. (15)

[0279] The light detecting device according to any one of (1) to (14) above further includes a third semiconductor substrate stacked on a surface of the second substrate opposite to a surface on which the first substrate is stacked. (16)

[0281] The light detecting device according to the above (15), wherein the second substrate and the third semiconductor substrate are electrically coupled to each other by hybrid bonding. (17)

[0283] The light detection device according to any one of (1) to (16) above, wherein the one or more transistors form a readout circuit that outputs a pixel signal based on carriers output from the light receiving element. (18)

[0285] The light detection device according to the above (17), wherein the readout circuit is provided for each pixel or for every two or more pixels adjacent to each other. (19)

[0287] The light detection device according to any one of (1) to (18) above, further comprising:

[0288] A pixel separator is provided between a plurality of adjacent pixels to extend between the first surface and the second surface of the first substrate, the pixel separator electrically separates the plurality of adjacent pixels from each other, wherein:

[0289] The first contact layer is provided along the pixel separating portion and around each of the plurality of pixels. (20)

[0291] The light detection device according to (19) above, wherein

[0292] The first through wiring is continuously or discontinuously provided around each of the plurality of pixels, and

[0293] One or more first shield electrodes are continuously provided between the one or more transistors and the first through-wiring.

[0294] This application claims the benefit of Japanese Priority Patent Application JP 2023-004149 filed with the Japan Patent Office on January 13, 2023, the entire contents of which are incorporated herein by reference.

[0295] It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.

Claims

1. A light detection device, comprising: a first substrate having a first surface and a second surface opposing each other and including a pixel array section in which a plurality of pixels are arranged in an array in an in-plane direction; a light receiving element including a light receiving portion provided inside the first substrate for each pixel and generating carriers corresponding to the amount of received light by photoelectric conversion, and a multiplying portion performing avalanche multiplication on the carriers generated in the light receiving portion; a first contact layer disposed on the first surface of the first substrate and electrically coupled to the light receiving portion; a second contact layer disposed on the first surface of the first substrate and electrically coupled to the multiplication portion; a second substrate stacked on the first surface side of the first substrate and including a semiconductor layer provided with one or more transistors; a first through wiring, arranged to penetrate the semiconductor layer in a stacking direction and electrically coupled to the first contact layer; a second through wiring, disposed through the semiconductor layer in a stacking direction and electrically coupled to the second contact layer; as well as One or more first shield electrodes are provided in at least a portion of a region between the one or more transistors and the first and second through-wirings adjacent to the one or more transistors and are applied with a fixed potential.

2. The light detection device according to claim 1, wherein The one or more transistors are provided for each of the pixels, and The one or more first shielding electrodes are continuously disposed along an inner edge of a corresponding one of the pixels to surround the one or more transistors.

3. The light detection device according to claim 1, wherein The one or more first shielding electrodes are arranged along a channel length direction of the one or more transistors.

4. The light detection device according to claim 1, wherein The one or more transistors include a p-MOS transistor and an n-MOS transistor, A p-type contact layer is provided in the one or more first shielding electrodes provided along the channel length direction of the p-MOS transistor; and An n-type contact layer is provided in the one or more first shield electrodes provided along a channel length direction of the n-MOS transistor.

5. The light detection device according to claim 1, wherein The one or more first shield electrodes are formed of the semiconductor layer, and a p-type contact layer or an n-type contact layer is provided on a surface of the semiconductor layer. The light detection device according to claim 5 , wherein: The p-type contact layer or the n-type contact layer is provided on the entire surface of the semiconductor layer.

7. The light detection device according to claim 1, wherein The one or more first shield electrodes are continuous with the semiconductor layer where the one or more transistors are disposed.

8. The light detection device according to claim 7, wherein The one or more first shield electrodes each also serve as a well contact electrode for applying a fixed potential to the semiconductor layer.

9. The light detection device according to claim 7, wherein The fixed potential is supplied to the one or more first shield electrodes via the semiconductor layer in which the one or more transistors are provided.

10. The light detection device according to claim 1, wherein The one or more first shield electrodes include polysilicon or epitaxial silicon including p-type impurities or n-type impurities. The light detection device according to claim 10 , wherein: The one or more first shield electrodes are in contact with the semiconductor layer.

12. The light detection device according to claim 1, wherein The one or more first shield electrodes include a metal material. 13 . The light detecting device according to claim 1 , further comprising a second shielding electrode provided between the first substrate and the semiconductor layer and to which a fixed potential is applied.

14. The light detection device according to claim 13, wherein The second shielding electrode is electrically coupled to the semiconductor layer. 15 . The light detecting device according to claim 1 , further comprising a third semiconductor substrate stacked on a surface of the second substrate opposite to a surface on which the first substrate is stacked.

16. The light detection device according to claim 15, wherein The second substrate and the third semiconductor substrate are electrically coupled to each other through hybrid bonding.

17. The light detection device according to claim 1, wherein The one or more transistors form a readout circuit that outputs a pixel signal based on the carriers output from the light receiving element.

18. The light detection device according to claim 17, wherein The readout circuit is provided for each of the pixels or for every two or more pixels adjacent to each other.

19. The light detection device according to claim 1, further comprising: a pixel separator provided between the plurality of pixels adjacent to each other to extend between the first surface and the second surface of the first substrate, the pixel separator electrically separating the plurality of pixels adjacent to each other, wherein The first contact layer is provided along the pixel separation portion and around each of the plurality of pixels.

20. The light detection device according to claim 19, wherein The first through wiring is continuously or discontinuously provided around each of the plurality of pixels, and The one or more first shield electrodes are continuously provided between the one or more transistors and the first through-wiring.

Images