Analog-to-digital converter, electric quantity detection circuit and battery management system

Abstract

The embodiment of the invention provides an analog-to-digital converter, an electric quantity detection circuit and a battery management system. The analog-to-digital converter comprises a modulator, a digital filtering module, a signal detector and a selection circuit, the modulator is used for quantizing an input signal to output a quantized signal; the digital filtering module is connected to the modulator and is used for filtering the quantized signal; wherein the digital filtering module comprises at least two digital filters; the signal detector is used for detecting a signal parameter of the input signal, and the signal parameter comprises a frequency fluctuation degree and / or amplitude of the input signal; and the selection circuit is connected to the digital filtering module and the signal detector, and is used for adjusting the order of the digital filtering module according to the signal parameters. According to the analog-to-digital converter provided by the embodiment of the invention, different types of input signals can be adapted, so that optimal configuration of the different types of input signals is realized, and rapid and high-precision measurement is achieved.

Description

Technical Field

[0001] The present application relates to the technical field of analog-to-digital conversion, and in particular to an analog-to-digital converter, a power detection circuit, and a battery management system. Background Art

[0002] In recent years, with the improvement of the manufacturing level of ultra-large-scale integrated circuits, Σ-Δ ADC (Sigma-Delta Analog-to-Digital Converter) is being increasingly widely used due to its high resolution, good linearity and low cost.

[0003] Typically, a Σ-Δ ADC processes an input signal through a digital filter. However, different digital filters have different processing characteristics for different input signals, thereby affecting the detection accuracy of the Σ-Δ ADC. Summary of the Invention

[0004] In view of the above problems, the embodiments of the present application provide an analog-to-digital converter, a power detection circuit, and a battery management system to solve the above technical problems.

[0005] The embodiments of the present application are implemented using the following technical solutions:

[0006] An analog-to-digital converter comprises a modulator, a digital filtering module, a signal detector, and a selection circuit; the modulator is used to quantize an input signal to output a quantized signal; the digital filtering module is connected to the modulator and is used to filter the quantized signal; the digital filtering module includes at least two digital filters; the signal detector is used to detect signal parameters of the input signal, the signal parameters including the frequency fluctuation degree and / or amplitude of the input signal; and the selection circuit is connected to the digital filtering module and the signal detector, the selection circuit is used to adjust the order of the digital filtering module according to the signal parameters.

[0007] In some embodiments, the signal parameters include the frequency fluctuation degree of the input signal; when the frequency fluctuation degree of the input signal is less than the fluctuation threshold, the selection circuit configures the digital filtering module as a high-order digital integral filter; when the frequency fluctuation degree of the input signal is greater than or equal to the fluctuation threshold, the selection circuit configures the digital filtering module as a low-order digital integral filter.

[0008] In some embodiments, the signal parameter includes the amplitude of the input signal; when the amplitude of the input signal is greater than or equal to a set threshold, the selection circuit configures the digital filtering module as a low-order digital integration filter; when the amplitude of the input signal is less than the set threshold, the selection circuit configures the digital filtering module as a high-order digital integration filter.

[0009] In some embodiments, the signal parameters include the frequency fluctuation degree of the input signal; when the frequency fluctuation degree of the input signal is less than the fluctuation threshold, the selection circuit configures the digital filtering module as a high-order digital integration filter; when the frequency fluctuation degree of the input signal is greater than or equal to the fluctuation threshold, the selection circuit configures the digital filtering module as a low-order digital integration filter or a high-order digital integration filter.

[0010] In some embodiments, the signal parameters also include amplitude; when the frequency fluctuation degree of the input signal is greater than or equal to the fluctuation threshold, and the amplitude of the input signal is greater than or equal to the set threshold, the selection circuit configures the digital filtering module as a low-order digital integral filter; when the frequency fluctuation degree of the input signal is greater than or equal to the fluctuation threshold, and the amplitude of the input signal is less than the set threshold, the selection circuit configures the digital filtering module as a low-order digital integral filter.

[0011] In some embodiments, the signal parameter includes frequency, the signal detector includes a frequency detection module, the frequency detection module is used to receive the input signal and detect the frequency fluctuation degree of the input signal, and the selection circuit is also used to adjust the order of the digital filter module according to the frequency fluctuation degree.

[0012] In some embodiments, the frequency detection module includes a threshold circuit, a window comparison circuit, a clock circuit, and a pulse width detector; the threshold circuit is used to receive an input signal and provide a threshold window signal based on the input signal; the window comparison circuit is connected to the threshold circuit and is used to compare the input signal with the threshold window signal and output a comparison result; the clock circuit is connected to the window comparison circuit and is used to output a pulse signal based on the comparison result; the pulse width detector is connected to the clock circuit and is used to detect the pulse width of the pulse signal and obtain the frequency fluctuation degree of the input signal based on the pulse width.

[0013] In some embodiments, the threshold circuit includes a first window output terminal and a second window output terminal; the window comparison circuit includes a first comparator and a second comparator: the first comparator includes a first non-inverting input terminal and a first inverting input terminal, the first non-inverting input terminal is connected to the first window output terminal, the first inverting input terminal is used to receive an input signal, and the output terminal is connected to the clock circuit; the second comparator includes a second non-inverting input terminal and a second inverting input terminal, the second non-inverting input terminal is used to receive an input signal, the second inverting input terminal is connected to the second window output terminal, and the output terminal is connected to the clock circuit.

[0014] In some embodiments, the clock circuit includes an OR gate circuit, an AND gate circuit, and a reset / set trigger; the input end of the OR gate circuit is respectively connected to the output end of the first comparator and the output end of the second comparator; the input end of the AND gate circuit is respectively connected to the output end of the first comparator and the output end of the second comparator; the set end of the reset / set trigger is connected to the output end of the OR gate circuit, the reset end is connected to the output end of the AND gate circuit, and the output end is connected to the pulse width detector.

[0015] In some embodiments, the signal parameters also include amplitude, and the signal detector also includes an amplitude detection module connected to the modulator to detect the amplitude of the input signal based on the quantized signal. The selection circuit is also used to adjust the order of the digital filtering module according to the degree of frequency fluctuation and the amplitude.

[0016] In some embodiments, the amplitude detection module includes a level detection circuit, a counter, and a threshold judgment circuit; the level detection circuit is connected to the modulator, and is used to quantize the level of the signal in each zero-crossing period, where the level includes a high level and / or a low level; the counter is connected to the level detection circuit, and is used to count the number of levels; the threshold judgment circuit is connected to the counter, and is used to calculate at least one of the average value and variance of the number of levels in the entire measurement period, and obtain the amplitude of the input signal based on at least one of the average value and variance.

[0017] In some embodiments, the signal parameter includes amplitude, the signal detector includes an amplitude detection module connected to the modulator, for detecting the amplitude of the input signal based on the quantized signal, and the selection circuit is further used to adjust the order of the digital filtering module based on the amplitude.

[0018] In some embodiments, at least two digital filters are connected in sequence, and the selection circuit includes a multiplexer and a selection control circuit; the multiplexer includes an output end and at least two input ends, wherein each input end is connected one-to-one with the output end of each digital filter; the selection control circuit is connected to the signal detector and the multiplexer, and is used to connect the output end of the multiplexer to one of the input ends of the multiplexer according to the signal parameters.

[0019] In some embodiments, the analog-to-digital converter further includes a reset circuit, which is configured to reset the analog-to-digital converter after the modulator quantizes the input signal each time to eliminate information of this quantization.

[0020] An embodiment of the present application also provides a power detection circuit, including the above-mentioned analog-to-digital converter, and the power detection circuit also includes a sampling circuit; one end of the sampling circuit is used to sample the input voltage, and the other end is connected to the analog-to-digital converter.

[0021] An embodiment of the present application also provides a battery management system, including the above-mentioned power detection circuit.

[0022] The embodiment of the present application provides an analog-to-digital converter, a power detection circuit, and a battery management system, wherein the analog-to-digital converter includes a modulator, a digital filter module, a signal detector, and a selection circuit; the modulator is used to quantize the input signal to output a quantized signal; the digital filter module is connected to the modulator and is used to filter the quantized signal; wherein the digital filter module includes at least two digital filters; the signal detector is used to detect the signal parameters of the input signal; and the selection circuit is connected to the digital filter module and the signal detector, and the selection circuit is used to adjust the order of the digital filter module according to the signal parameters. This embodiment detects the signal parameters of the input signal through the signal detector, thereby being able to distinguish the type of the input signal, and then adjusts the order of the digital filter module according to the signal parameters through the selection circuit, and then the digital integral filter module adapts to different types of input signals, thereby achieving the optimal configuration of different types of input signals and achieving fast and high-precision measurement.

[0023] These and other aspects of the present application will become more readily apparent from the description of the following embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0025] Figure 1 A module block diagram of an analog-to-digital converter provided in an embodiment of the present application is shown.

[0026] Figure 2 An example diagram of an implementation of an analog-to-digital converter provided in an embodiment of the present application is shown.

[0027] Figure 3 Shown Figure 2 Block diagram of the intermediate frequency detection module.

[0028] Figure 4 Shown Figure 2 Schematic diagram of the circuit structure of the medium frequency detection module.

[0029] Figure 5 Another exemplary embodiment of the analog-to-digital converter provided in an embodiment of the present application is shown.

[0030] Figure 6 Shown Figure 5 Block diagram of the medium amplitude detection module.

[0031] Figure 7A diagram illustrating another embodiment of the analog-to-digital converter provided in an embodiment of the present application is shown.

[0032] Figure 8 The module block diagram of the digital filtering module and the selection circuit provided in the embodiment of the present application is shown.

[0033] Figure 9 A module block diagram of another analog-to-digital converter provided in an embodiment of the present application is shown.

[0034] Figure 10 A schematic diagram shows the simulation results of the analog-to-digital conversion provided in an embodiment of the present application for measuring an input signal.

[0035] Figure 11 A circuit structure diagram of a power detection circuit provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0036] The embodiments of the present application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and are not to be construed as limiting the present application.

[0037] In order to enable those skilled in the art to better understand the solutions of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0038] With the increasing popularity of fast charging and 5G (fifth-generation mobile networks), there is a need for accurate mobile phone battery charge monitoring. Battery charge monitoring is achieved through a fuel gauge, which measures and displays the battery charge level, typically including remaining capacity, fully charged capacity, percentage capacity, voltage, current, and temperature. Some fuel gauges also include discharge and full charge times, maximum chemical capacity, and an impedance meter. The fuel gauge obtains charge information (current x time) by high-precision sampling of the battery current within a specified time window. It then measures the open-circuit voltage and combines this information to dynamically update key parameters such as the battery charge and impedance meter.

[0039] Traditional Σ-Δ ADCs (Sigma-Delta Analog-to-Digital Converters) lack precise automatic gain control, offset cancellation, and use complex digital decimation filters, making them unsuitable for ADCs used in instrumentation and sensor measurement. While dual-slope ADCs offer excellent low offset and precise gain, they require 2N+1 quantization cycles to achieve N-bit quantization accuracy and require good analog circuit matching. Due to the limitations of the quantization cycle number and analog component matching, dual-slope ADCs cannot meet the requirements of high-precision ADCs. Incremental Σ-Δ ADCs can effectively meet the application requirements of instrumentation and sensor measurement. Therefore, incremental Σ-Δ ADCs are widely used in battery capacity monitoring systems because they can accurately acquire battery voltage and current signals.

[0040] The incremental Σ-Δ ADC can be considered as a traditional Σ-Δ ADC operating in transient mode. After each quantization, the modulator and digital filter need to be reset to eliminate the information of the previous quantization state and ensure that the initial state of each quantization is the same. Compared with the traditional Σ-Δ ADC, the incremental Σ-Δ ADC has the following advantages:

[0041] 1. Highly accurate gain. In traditional Σ-Δ ADCs, the baseband quantization noise power is constant, and the signal-to-noise ratio decreases as the input signal amplitude decreases. Incremental Σ-Δ ADCs, on the other hand, quantize the input signal amplitude, maintaining constant quantization accuracy within each input amplitude range.

[0042] 2. High linearity. In an incremental Σ-Δ ADC, a reset is performed before each quantization to eliminate the information of the previous quantization state. Therefore, signals within the input signal amplitude range can be quantized with the same accuracy, and the linearity is high.

[0043] 3. Compared to a dual-slope ADC, a first-order incremental Σ-Δ ADC requires 2N quantization cycles to achieve N bits of quantization accuracy. However, an incremental Σ-Δ ADC shares the advantages of a traditional Σ-Δ ADC, namely, the ability to perform high-order expansion. Therefore, an incremental Σ-Δ ADC can achieve high accuracy with a very low quantization time.

[0044] For low-power applications, maintaining the modulator order and implementing high-order processing of the residual error quantization through high-order expansion of the digital filter can reduce quantization error and improve accuracy. However, different digital filters have different processing characteristics for different input signals, which affects the detection accuracy of the Σ-Δ ADC.

[0045] After long-term research and testing by the inventor, the embodiment of the present application provides an analog-to-digital converter, a power detection circuit and a battery management system, wherein the analog-to-digital converter includes a modulator, a digital filter module, a signal detector and a selection circuit; the modulator is used to quantize the input signal to output a quantized signal; the digital filter module is connected to the modulator and is used to filter the quantized signal; wherein the digital filter module includes at least two digital filters connected in sequence; the signal detector is used to detect the signal parameters of the input signal; and the selection circuit is connected to the digital filter module and the signal detector, and the selection circuit is used to adjust the order of the digital filter module according to the signal parameters. This embodiment detects the signal parameters of the input signal through the signal detector, thereby being able to distinguish the type of the input signal, and then adjusts the order of the digital filter module according to the signal parameters through the selection circuit, and then the digital filter module adapts to different types of input signals, thereby achieving the optimal configuration of different types of input signals and achieving fast and high-precision measurement.

[0046] like Figure 1 As shown, an embodiment of the present application provides an analog-to-digital converter 100. The analog-to-digital converter 100 includes a modulator 110, a digital filter module 120, a signal detector 130, and a selection circuit 140. The modulator 110 is used to quantize an input signal to output a quantized signal; the digital filter module 120 is connected to the modulator 110 and is used to filter the quantized signal; the digital filter module 120 includes at least two digital filters; the signal detector 130 is used to detect signal parameters of the input signal; and the selection circuit 140 is connected to the digital filter module 120 and the signal detector 130 and is used to adjust the order of the digital filter module 120 according to the signal parameters.

[0047] Modulator 110 is a Σ-Δ modulator. Analog-to-digital converter 100 samples an input signal using a sampling clock and transmits the input signal to modulator 110. Modulator 110 receives the input signal and quantizes it, thereby outputting a quantized signal. In this embodiment, the input signal can be, but is not limited to, an AC signal or a DC signal.

[0048] The digital filtering module 120 can perform digital integral filtering on the quantized signal output by the modulator 110 to complete the processing of the quantized signal. In this embodiment, the digital filtering module 120 may include at least two digital filters. The digital filter may be a digital integral filter. The digital filtering module 120 can be configured as a low-order digital integral filter and a high-order digital integral filter. It is worth noting that the low-order digital integral filter and the high-order digital integral filter have different characteristics for processing different input signals. For example, the low-order digital integral filter incremental Σ-Δ ADC has high measurement accuracy and fast dynamic response for AC signals; the high-order digital integral filter incremental Σ-Δ ADC has high measurement accuracy for DC signals and slow dynamic response for AC signals.

[0049] The signal detector 130 can detect the signal parameters of the input signal. In the embodiment of the present application, the signal parameters may include, but are not limited to, the frequency of the input signal, the amplitude of the input signal, and the signal-to-noise ratio of the input signal. Furthermore, by detecting the signal parameters of the input signal, the type of the input signal can be determined to a certain extent. For example, by detecting the frequency fluctuation of the input signal, it is possible to determine whether the input signal is an AC signal or a DC signal; by detecting the amplitude of the input signal, it is possible to determine whether the input signal is a large signal or a small signal.

[0050] The selection circuit 140 can adaptively adjust the order of the digital filter module 120 based on the signal parameters of the input signal detected by the signal detector 130. In other words, the digital filter module 120 can be configured as a low-order digital integration filter or a high-order digital integration filter. It is worth noting that the low-order digital integration filter does not specifically refer to a digital integration filter of a certain order, but can represent digital integration filters of a certain order range; similarly, the high-order digital integration filter does not specifically refer to a digital integration filter of a certain order, but can also represent digital integration filters of a certain order range.

[0051] In this embodiment, the analog-to-digital converter 100 detects the signal parameters of the input signal through the signal detector 130, and then adjusts the order of the digital filter module 120 according to the detected signal parameters of the input signal through the selection circuit 140, configuring the digital filter module 120 as a digital integration filter of different orders. This allows the analog-to-digital converter 100 to measure the input signal using the digital integration filter of the order that best matches the input signal, thereby ensuring the measurement accuracy of the input signal. Therefore, when faced with different types of input signals, the optimal digital integration filter configuration can be given to each type of input signal, thereby achieving fast and high-precision measurement of different types of input signals.

[0052] As an implementation method, the analog-to-digital converter 100 can configure optimal integral digital filtering for the DC input signal and the AC input signal, thereby achieving fast and high-precision measurement of the DC input signal and the AC input signal.

[0053] Specifically, the signal detector 130 can detect the frequency fluctuation degree of the input signal and distinguish the type of the input signal as a DC input signal or an AC input signal according to the frequency fluctuation degree, so that the selection circuit 140 can configure the digital filter module with the optimal order for the input signal.

[0054] like Figure 2As shown, in this embodiment, the signal detector 130 includes a frequency detection module 131, which is used to receive an input signal and detect the frequency fluctuation degree of the input signal. The selection circuit 140 is also used to adjust the order of the digital filter module 120 according to the frequency fluctuation degree.

[0055] like Figure 3 As shown, the frequency detection module 131 includes a threshold circuit 1311, a window comparison circuit 1312, a clock circuit 1313, and a pulse width detector 1314. The threshold circuit 1311 is used to receive an input signal and provide a threshold window signal based on the input signal; the window comparison circuit 1312 is connected to the threshold circuit 1311 and is used to compare the input signal with the threshold window signal and output a comparison result; the clock circuit 1313 is connected to the window comparison circuit 1312 and is used to output a pulse signal based on the comparison result; and the pulse width detector 1314 is connected to the clock circuit 1313 and is used to detect the pulse width of the pulse signal and obtain the frequency fluctuation degree of the input signal based on the pulse width.

[0056] In this embodiment, when the input signal is greater than the threshold window signal, the pulse signal output by the clock circuit 1313 according to the comparison result of the window comparison circuit 1312 is a high level, and the pulse width detector 1314 detects the high level duration of the pulse signal, thereby obtaining the frequency fluctuation degree of the input signal.

[0057] Specifically, if Figure 4 As shown, the frequency detection module 131 further includes a low-pass filter 1315. The low-pass filter 1315 receives an input signal Vin and performs filtering thereon to output a signal Vdc.

[0058] Threshold circuit 1311 is a zero-crossing threshold circuit and includes a first window output terminal and a second window output terminal. After receiving the output signal Vdc from low-pass filter 1315, threshold circuit 1311 outputs a first threshold window signal (Vdc+Vth) at the first window output terminal and a second threshold window signal (Vdc-Vth) at the second window output terminal.

[0059] The window comparator circuit 1312 includes a first comparator A1 and a second comparator A2. The first comparator A1 includes a first non-inverting input terminal and a first inverting input terminal. The first non-inverting input terminal is connected to the first window output terminal of the threshold circuit 1311 to receive the first threshold window signal (Vdc+Vth). The first inverting input terminal receives the input signal Vin. The output terminal is connected to the clock circuit 1313. The second comparator A2 includes a second non-inverting input terminal and a second inverting input terminal. The second non-inverting input terminal receives the input signal Vin. The second inverting input terminal is connected to the second window output terminal of the threshold circuit 1311 to receive the second threshold window signal (Vdc-Vth). The output terminal is connected to the clock circuit 1313.

[0060] Clock circuit 1313 includes an OR gate, an AND gate, and an RS (reset / set) flip-flop. The two inputs of the OR gate are connected to the output of the first comparator and the output of the second comparator, respectively. The output of the OR gate is connected to the set terminal of the RS flip-flop. The two inputs of the AND gate are also connected to the input of the first comparator and the output of the second comparator, respectively. The output of the AND gate is connected to the reset terminal of the RS flip-flop. The output of the RS flip-flop is connected to the input of pulse width detector 1314.

[0061] Furthermore, the selection circuit 140 can configure the order of the digital filter module 120 based on the frequency fluctuation level of the input signal. Specifically, a fluctuation threshold is pre-set, and the type of the input signal is determined based on the comparison result between the frequency fluctuation level of the input signal and the fluctuation threshold. When the frequency fluctuation level of the input signal is greater than or equal to the fluctuation threshold, the input signal can be considered an AC signal; when the frequency fluctuation level of the input signal is less than the fluctuation threshold, the input signal can be considered a DC signal. Therefore, when the frequency fluctuation level of the input signal is greater than or equal to the fluctuation threshold, the selection circuit 140 can configure the digital filter module 120 as a low-order digital integration filter; when the frequency fluctuation level of the input signal is less than the fluctuation threshold, the selection circuit 140 can configure the digital filter module 120 as a high-order digital integration filter. This enables the analog-to-digital converter 100 to achieve fast and high-precision measurement of different input signals.

[0062] As another embodiment, the analog-to-digital converter 100 may configure optimal integral digital filtering for large input signals and small input signals, thereby achieving fast and high-precision measurement of large input signals and small input signals.

[0063] Specifically, the signal detector 130 can detect the amplitude of the input signal and determine whether the input signal is a large signal or a small signal according to the amplitude, so as to configure a digital filter module with an optimal order for the input signal.

[0064] like Figure 5 As shown, in this embodiment, the signal detector 130 includes an amplitude detection module 132 connected to the modulator 110 for detecting the amplitude of the input signal according to the quantized signal. The selection circuit 140 is also used to adjust the order of the digital filter module 120 according to the amplitude.

[0065] In this embodiment, the amplitude detection module 132 may be a PDM (Pulse Density Modulation) amplitude detection quantizer. The amplitude of the input signal may be obtained by PDM technology. Specifically, Figure 6 As shown, the amplitude detection module 132 includes a level detection module 1321, a counter 1322, and a threshold judgment circuit 1323. The level detection circuit is connected to the modulator 110 and is used to detect the level of the quantized signal in each zero-crossing cycle, wherein the level includes a high level and / or a low level. The counter 1322 is connected to the level detection circuit and is used to count the number of levels. Specifically, the counter 1322 can count the number of high levels and the number of low levels within the entire measurement cycle of the analog-to-digital converter 100 for the input signal. The threshold judgment circuit 1323 is connected to the counter 1322 and is used to calculate at least one of the average value and the variance of the number of levels within the entire measurement cycle, and obtain the amplitude of the input signal based on at least one of the average value and the variance.

[0066] Specifically, the threshold judgment circuit 1323 can calculate at least one of the average value and variance of the number of high levels during the entire measurement period. When either the average value of the number of high levels is greater than or equal to the average value threshold or the variance of the number of high levels is greater than the variance threshold, the input signal can be considered a large signal; when the average value of the number of high levels is less than the average value threshold and the variance of the number of high levels is less than the variance threshold, the input signal can be considered a small signal. In some embodiments, when the average value of the number of high levels is greater than or equal to the average value threshold and the variance of the number of high levels is greater than the variance threshold, the input signal can be considered a large signal; when either the average value of the number of high levels is greater than or equal to the average value threshold or the variance of the number of high levels is greater than the variance threshold is not met, the input signal can be considered a small signal. Further, when either the average value of the number of low levels is greater than or equal to the average value threshold or the variance of the number of low levels is greater than the variance threshold, the input signal can be considered a large signal; when the average value of the number of low levels is less than the average value threshold and the variance of the number of low levels is less than the variance threshold, the input signal can be considered a small signal. In some embodiments, when the average value of the number of low levels is greater than or equal to the average value threshold and the variance of the number of low levels is greater than the variance threshold, the input signal can be considered as a large signal; when either the average value of the number of low levels is greater than or equal to the average value threshold and the variance of the number of low levels is greater than the variance threshold is not satisfied, the input signal can be considered as a small signal.

[0067] Furthermore, the selection circuit 140 can configure the order of the digital filter module 120 according to the amplitude of the input signal, so that when the input signal is a large signal, the analog-to-digital converter 100 measures the input signal with a digital integral filter whose order is most suitable for the large signal; when the input signal is a small signal, the analog-to-digital converter 100 measures the input signal with a digital integral filter whose order is most suitable for the small signal, thereby achieving fast and high-precision measurement of different input signals.

[0068] As another embodiment, the analog-to-digital converter 100 can configure digital filtering modules with optimal orders for DC input signals, large AC input signals, and small AC input signals, respectively, thereby achieving fast and high-precision measurement of DC input signals, large AC input signals, and small AC input signals.

[0069] Specifically, the signal detector 130 can simultaneously detect the frequency fluctuation degree and the amplitude of the input signal. The frequency fluctuation degree can be used to distinguish whether the input signal is a DC signal or an AC signal, and the amplitude can be used to distinguish whether the AC signal is a large AC signal or a small AC signal, thereby enabling the selection circuit 140 to configure a digital filtering module with the optimal order for the input signal.

[0070] like Figure 7 As shown, in this embodiment, the signal detector 130 may include a frequency detection module 131 and an amplitude detection module 132. The frequency detection module 131 is used to receive an input signal and detect the frequency fluctuation of the input signal; the amplitude detection module 132 is connected to the modulator 110 and is used to detect the amplitude of the input signal based on the quantized signal. The selection circuit 140 is also used to configure the order of the digital filter module 120 based on the frequency fluctuation and amplitude. In this embodiment, the structure and principles of the frequency detection module 131 and the amplitude detection module 132 are the same as those in the previous embodiment and will not be repeated here.

[0071] Furthermore, when the input signal is considered to be a DC signal based on the frequency fluctuation degree of the input signal, the selection circuit 140 can configure the digital filtering module 120 as a high-order digital integral filter; when the input signal is considered to be an AC signal based on the frequency fluctuation degree of the input signal, and the input signal is considered to be a large signal based on the amplitude of the input signal, then the input signal is considered to be a large AC signal, and the selection circuit 140 can configure the digital filtering module 120 as a low-order digital integral filter; when the input signal is considered to be an AC signal based on the frequency fluctuation degree of the input signal, and the input signal is considered to be a small signal based on the amplitude of the input signal, then the input signal is considered to be a small AC signal, and the selection circuit 140 can configure the digital filtering module 120 as a high-order digital integral filter, thereby achieving fast and high-precision measurement of different input signals.

[0072] Further, if Figure 8 As shown, the digital filtering module 120 includes at least two digital filters connected in sequence, and the selection circuit 140 includes a multiplexer 141 and a selection control circuit 142. The multiplexer 141 includes an output terminal and at least two input terminals, and each input terminal is connected to the output terminal of each digital filter in a one-to-one correspondence. The selection control circuit 142 is connected to the signal detector 130 and the multiplexer 141, and is used to connect the output terminal of the multiplexer 141 to one of the input terminals of the multiplexer 141 according to the signal parameters.

[0073] In this embodiment, the selection control circuit 142 can control the multiplexer 141 to configure the digital filter module 120 as a digital integrating filter of different orders based on the frequency fluctuation degree and amplitude of the input signal detected by the signal detector 130. Specifically, because at least two digital filters in the digital filter module 120 are connected in sequence, and each input terminal of the multiplexer 141 is connected to the output terminal of each digital filter in a one-to-one correspondence, each input terminal of the multiplexer 141 is connected to a digital integrating filter of a certain order. For example, if the first input terminal of the multiplexer 141 is connected to a digital filter, the digital filter is a first-order digital integrating filter; if the second input terminal of the multiplexer 141 is connected to two digital filters connected in sequence, the two digital filters connected in sequence are second-order digital integrating filters. That is, in this embodiment, the order includes the number of digital filters connected in sequence to any input terminal of the multiplexer 141. Therefore, the selection control circuit 142 can configure the digital filtering module 120 into digital integrating filters of different orders by connecting the output terminal of the multiplexer 141 to one of the input terminals of the multiplexer 141 .

[0074] The analog-to-digital converter provided in this embodiment includes a modulator, a digital filter module, a signal detector, and a selection circuit; the modulator is used to quantize the input signal to output a quantized signal; the digital filter module is connected to the modulator and is used to filter the quantized signal; wherein the digital filter module includes at least two digital filters connected in sequence; the signal detector is used to detect the signal parameters of the input signal; and the selection circuit is connected to the digital filter module and the signal detector, and the selection circuit is used to adjust the order of the digital filter module according to the signal parameters. This embodiment detects the signal parameters of the input signal through the signal detector, thereby being able to distinguish the type of the input signal, and then adjusts the order of the digital filter module according to the signal parameters through the selection circuit, and then the digital integral filter module adapts to different types of input signals, thereby achieving optimal configuration for different types of input signals and achieving fast and high-precision measurement.

[0075] like Figure 9 As shown, this embodiment further provides an analog-to-digital converter 200. The analog-to-digital converter 200 also includes a modulator 210, a digital filter module 220, a signal detector 230, and a selection circuit 240. In this embodiment, the functions of the modulator 210, the digital filter module 220, the signal detector 230, and the selection circuit 240 are the same as those in the previous embodiment and are not further described.

[0076] Furthermore, the modulator 210 includes an integrator 211, a main quantizer 212, and a digital-to-analog converter 213. The integrator 211 is an incremental Σ-Δ modulator integrator, configured to integrate the input signal and output an integrated signal. The main quantizer 212 is connected to the integrator 211 and configured to quantize the integrated signal and output a quantized signal. The digital-to-analog converter 213 is connected between the output of the main quantizer 212 and the input of the integrator 211 to form a feedback path. Furthermore, the modulator 210 includes a first gain module 214, a second gain module 215, and a third gain module 216. The input end of the first gain module 214 is used to receive an input signal, and the output end is connected to the input end of the integrator 211; the second gain module 215 is arranged between the integrator 211 and the main quantizer 212, and the input end of the second gain module 215 is connected to the output end of the integrator 211, and the output end is connected to the input end of the main quantizer 212; the third gain module 216 is arranged in the feedback path, and the input end of the third gain module 216 is connected to the output end of the digital-to-analog converter 213, and the output end is connected to the input end of the integrator 211.

[0077] Furthermore, the digital filtering module 220 includes a first digital filter 221 and a second digital filter 222 . The input of the first digital filter 221 is connected to the output of the main quantizer 212 ; the input of the second digital filter 222 is connected to the output of the first digital filter 221 .

[0078] Furthermore, the signal detector 230 includes a frequency detection module 231 and an amplitude detection module 232. The frequency detection module 231 receives an input signal and detects the frequency fluctuation of the input signal. The amplitude detection module 232 is connected to the output of the main quantizer 212 and detects the amplitude of the input signal based on the quantized signal. The structures and principles of the frequency detection module 231 and the amplitude detection module 232 in this embodiment are the same as those in the previous embodiment and are not further described.

[0079] Furthermore, the selection circuit 240 includes a multiplexer 241 and a selection control circuit 242. The multiplexer 241 includes a first input terminal and a second input terminal. The first input terminal is connected to the output terminal of the first digital filter 221, and the second input terminal is connected to the output terminal of the second digital filter 222. The input terminal of the selection control circuit 242 is connected to the output terminals of the frequency detection module 231 and the amplitude detection module 232, and the output terminal is connected to the control terminal of the multiplexer 241. In this embodiment, the signal detector 230 can simultaneously detect the frequency fluctuation degree and the amplitude of the input signal, so that the selection control circuit 242 can control the multiplexer 241 to configure the digital filter module 220 as a digital integration filter of different orders based on the frequency fluctuation degree and the amplitude of the input signal, thereby adapting to different input signal types.

[0080] When the selection control circuit 242 controls the first input terminal of the multiplexer 241 to be connected to the output terminal, the digital filtering module 220 is configured as a first-order digital integration filter; when the selection control circuit 242 controls the second input terminal of the multiplexer 241 to be connected to the output terminal, the digital filtering module 220 is configured as a second-order digital integration filter.

[0081] Therefore, the analog-to-digital converter 200 in this embodiment can configure the digital filtering module 220 as a first-order digital integral filter or a second-order digital integral filter according to the type of input signal to adapt to different input signals and achieve the optimal configuration for different types of input signals to achieve fast and high-precision measurement.

[0082] Furthermore, the ADC 200 includes a reset circuit (not shown) configured to reset the ADC 200 after the modulator 210 quantizes the input signal, thereby erasing the information from the current quantization. Specifically, after each quantization cycle, the ADC 200 can reset the modulator 210 and the digital filter module 220 via the reset circuit, erasing the information from the current quantization cycle and ensuring that the initial state of each quantization cycle is the same.

[0083] It should be noted that each quantization of the analog-to-digital converter 200 may include multiple conversion cycles.

[0084] When the analog-to-digital converter 200 quantizes the input signal, in the reset phase: V1[0]=0(1)

[0085] ; Wherein V1[0] is the input signal of the main quantizer 212 in the reset phase.

[0086] In the first conversion cycle: V1[1]=(V1[0]+a1*Vin[0]-b1*Vref*D[0])*a2 (2)

[0087] From formula (2), we can get: V1[1]=(a1*Vin[0]-b1*Vref*D[0])*a2 (3)

[0088] Among them, V1[1] is the input signal of the main quantizer 212 in the first conversion cycle; a1 is the gain of the first gain module 214; Vin[0] is the input signal in the reset phase; b1 is the gain of the third gain module 116; Vref is the reference signal of the digital-to-analog converter 213; D[0] is the code value output by the main quantizer 212 in the reset phase.

[0089] In the second conversion cycle: V1[2]=(V1[1]+a1*Vin[1]-b1*Vref*D[1])*a2 (4)

[0090] From formula (4), we can get: V1[2]=[a1*(Vin[1]+Vin[0])-b1*Vref*(D[1]+D[0])]*a2 (5)

[0091] Wherein, V1[2] is the input signal of the main quantizer 212 in the second conversion cycle; Vin[1] is the input signal of the first conversion cycle; and D[1] is the code value output by the main quantizer 212 in the first conversion cycle.

[0092] From this we can deduce that in the nth conversion cycle:

[0093] Wherein, V1[n] is the input signal of the main quantizer 212 in the nth conversion cycle; Vin[k] is the input signal; and D[k] is the digital integration filter.

[0094] From formula (6), when the digital filter module 220 is configured as a first-order digital integrating filter, the input signal Vin satisfies the following formula:

[0095] Wherein, PGA is the gain of the analog-to-digital converter 200, PGA=a1b1; D[k] is a first-order digital integration filter.

[0096] When the digital filtering module 220 is configured as a second-order digital integrating filter, the input signal Vin satisfies the following equation:

[0097]

[0098] Where D'[k] is a second-order integral digital filter.

[0099] In this embodiment, the analog-to-digital converter 200 can configure the digital filtering module 220 as a first-order digital integral filter or a second-order digital integral filter for different types of input signals by detecting the signal parameters of the input signal, and then adaptively select the first-order digital integral filter or the second-order digital integral filter for different input signals.

[0100] For example, Figure 10 As shown, Figure 10 This diagram shows the simulation results of the analog-to-digital conversion of this embodiment for an input signal. The input signal is a mixture of DC and AC signals. The DC signal is 10 μV with a duration of 6.5 seconds, and the AC signal is 100 μV with a duration of 6.5 seconds.

[0101] When measuring the DC signal, it can be seen from the figure that the measurement result of the first-order digital integral filter is 12.2uV, and the measurement result of the second-order digital integral filter is 9.88uV.

[0102] Thus, for DC signals, the output characteristics of the second-order digital integration filter are better than those of the first-order digital integration filter. Therefore, when the input signal is detected as a DC signal through the signal parameters of the input signal, the digital filtering module 220 can be configured as a second-order digital integration filter to improve the measurement accuracy of the DC signal.

[0103] When measuring the AC signal, it can be seen from the figure that the measurement result of the first-order digital integral filter is 99.18uV, and the measurement result of the second-order digital integral filter is 130.5uV.

[0104] Thus, for AC signals, the output characteristics of the first-order digital integration filter are better than those of the second-order digital integration filter. Therefore, when the input signal is detected as an AC signal through the signal parameters of the input signal, the digital filtering module 220 can be configured as a first-order digital integration filter to improve the measurement accuracy of the AC signal.

[0105] In summary, the analog-to-digital converter 200 in this embodiment detects the frequency and amplitude characteristics of the input signal, thereby being able to configure a digital integration filter with the optimal order for different input signals, thereby achieving fast and high-precision measurement of different input signals.

[0106] The analog-to-digital converter provided in this embodiment includes a modulator, a digital filter module, a signal detector, and a selection circuit; the modulator is used to quantize the input signal to output a quantized signal; the digital filter module is connected to the modulator and is used to filter the quantized signal; wherein the digital filter module includes at least two digital filters connected in sequence; the signal detector is used to detect the signal parameters of the input signal; and the selection circuit is connected to the digital filter module and the signal detector, and the selection circuit is used to adjust the order of the digital filter module according to the signal parameters. This embodiment detects the signal parameters of the input signal through the signal detector, thereby being able to distinguish the type of the input signal, and then adjusts the order of the digital filter module according to the signal parameters through the selection circuit, and then the digital integral filter module adapts to different types of input signals, thereby achieving optimal configuration for different types of input signals and achieving fast and high-precision measurement.

[0107] like Figure 11 As shown, the embodiment of the present application further provides a power detection circuit 300. The power detection circuit 300 includes a sampling circuit 310 and the above-mentioned analog-to-digital converter. Among them, one end of the sampling circuit 310 is used to sample the input signal, and the other end is connected to the analog-to-digital converter.

[0108] The sampling circuit 310 includes a first resistor R1, a second resistor R2, a third resistor R3, and a capacitor C1. The first end of the first resistor R1 is connected to the first end of the second resistor R2, and the second end is connected to the first end of the third resistor R3. The first resistor R1 is also connected to the battery BAT. The first end of the capacitor C1 is connected to the second end of the second resistor R2, and the second end is connected to the second end of the third resistor R3. The second end of the second resistor R2 and the second end of the third resistor R3 are connected to the analog-to-digital converter.

[0109] The sampling circuit can sample the voltage of the battery BAT and convert the sampling signal into a differential signal which is input to the analog-to-digital converter for high-precision measurement.

[0110] The power detection circuit provided in this embodiment includes a modulator, a digital filter module, a signal detector and a selection circuit; the modulator is used to quantize the input signal to output a quantized signal; the digital filter module is connected to the modulator and is used to filter the quantized signal; wherein the digital filter module includes at least two digital filters connected in sequence; the signal detector is used to detect the signal parameters of the input signal; and the selection circuit is connected to the digital filter module and the signal detector, and the selection circuit is used to adjust the order of the digital filter module according to the signal parameters. This embodiment detects the signal parameters of the input signal through the signal detector, thereby being able to distinguish the type of the input signal, and then adjusts the order of the digital filter module according to the signal parameters through the selection circuit, and then the digital integral filter module adapts to different types of input signals, thereby achieving optimal configuration for different types of input signals and achieving fast and high-precision measurement.

[0111] An embodiment of the present application further provides a battery management system, which includes the above-mentioned power detection circuit.

[0112] The above is only a preferred embodiment of the present application and does not constitute any form of limitation to the present application. Although the present application has been disclosed as above with preferred embodiments, it is not intended to limit the present application. Any person skilled in the art can make some changes or modifications to equivalent embodiments using the technical contents disclosed above without departing from the scope of the technical solution of the present application. However, any brief modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. An analog-to-digital converter, characterized in that include: A modulator, configured to quantize an input signal to output a quantized signal; a digital filtering module, connected to the modulator and configured to filter the quantized signal; wherein the digital filtering module comprises at least two digital filters; a signal detector, configured to detect signal parameters of the input signal, wherein the signal parameters include a frequency fluctuation degree and / or amplitude of the input signal; as well as The selection circuit is connected to the digital filter module and the signal detector, and is used to adjust the order of the digital filter module according to the signal parameter.

2. The analog-to-digital converter according to claim 1, wherein The signal parameters include the frequency fluctuation degree of the input signal; When the frequency fluctuation degree of the input signal is less than a fluctuation threshold, the selection circuit configures the digital filtering module as a high-order digital integration filter; When the frequency fluctuation degree of the input signal is greater than or equal to a fluctuation threshold, the selection circuit configures the digital filtering module as a low-order digital integration filter.

3. The analog-to-digital converter according to claim 1, wherein The signal parameter includes the amplitude of the input signal; When the amplitude of the input signal is greater than or equal to a set threshold, the selection circuit configures the digital filtering module as a low-order digital integration filter; When the amplitude of the input signal is less than a set threshold, the selection circuit configures the digital filtering module as a high-order digital integration filter.

4. The analog-to-digital converter according to claim 1, wherein The signal parameters include the frequency fluctuation degree of the input signal; When the frequency fluctuation degree of the input signal is less than a fluctuation threshold, the selection circuit configures the digital filtering module as a high-order digital integration filter; When the frequency fluctuation degree of the input signal is greater than or equal to a fluctuation threshold, the selection circuit configures the digital filtering module as a low-order digital integration filter or a high-order digital integration filter.

5. The analog-to-digital converter according to claim 4, wherein: The signal parameters also include amplitude; When the frequency fluctuation degree of the input signal is greater than or equal to the fluctuation threshold, and the amplitude of the input signal is greater than or equal to the set threshold, the selection circuit configures the digital filtering module as a low-order digital integration filter; When the frequency fluctuation degree of the input signal is greater than or equal to a fluctuation threshold, and the amplitude of the input signal is less than a set threshold, the selection circuit configures the digital filtering module as a low-order digital integration filter.

6. The analog-to-digital converter according to claim 1, wherein: The signal detector includes a frequency detection module, which is used to receive the input signal and detect the frequency fluctuation degree of the input signal. The selection circuit is also used to adjust the order of the digital filter module according to the frequency fluctuation degree.

7. The analog-to-digital converter according to claim 6, wherein: The frequency detection module includes: a threshold circuit, configured to receive the input signal and provide a threshold window signal according to the input signal; a window comparison circuit, connected to the threshold circuit, and configured to compare the input signal with the threshold window signal and output a comparison result; a clock circuit connected to the window comparison circuit and configured to output a pulse signal according to the comparison result; and A pulse width detector is connected to the clock circuit and is used to detect the pulse width of the pulse signal and obtain the frequency fluctuation degree of the input signal according to the pulse width.

8. The analog-to-digital converter according to claim 7, wherein: The threshold circuit includes a first window output terminal and a second window output terminal; the window comparison circuit includes: A first comparator includes a first non-inverting input terminal and a first inverting input terminal, wherein the first non-inverting input terminal is connected to the first window output terminal, the first inverting input terminal is used to receive the input signal, and the output terminal is connected to the clock circuit; and The second comparator includes a second non-inverting input terminal and a second inverting input terminal, wherein the second non-inverting input terminal is used to receive the input signal, the second inverting input terminal is connected to the second window output terminal, and the output terminal is connected to the clock circuit.

9. The analog-to-digital converter according to claim 8, wherein: The clock circuit comprises: An OR gate circuit, whose input ends are respectively connected to the output end of the first comparator and the output end of the second comparator: an AND gate circuit, whose input terminals are respectively connected to the output terminal of the first comparator and the output terminal of the second comparator; and A reset / set trigger has a set end connected to the output end of the OR gate circuit, a reset end connected to the output end of the AND gate circuit, and an output end connected to the pulse width detector.

10. The analog-to-digital converter according to claim 6, wherein: The signal detector further includes an amplitude detection module connected to the modulator for detecting the amplitude of the input signal according to the quantized signal. The selection circuit is further configured to adjust the order of the digital filter module according to the frequency fluctuation degree and the amplitude.

11. The analog-to-digital converter according to claim 10, wherein: The amplitude detection module includes: a level detection circuit, connected to the modulator, for detecting a level of the quantized signal in each zero-crossing period, wherein the level includes a high level and / or a low level; a counter connected to the level detection circuit, and configured to count the number of the levels; and The threshold judgment circuit is connected to the counter and is used to calculate at least one of an average value and a variance of the number of levels in the entire measurement period, and obtain the amplitude of the input signal according to at least one of the average value and the variance.

12. The analog-to-digital converter according to claim 1, wherein The signal detector includes an amplitude detection module connected to the modulator, for detecting the amplitude of the input signal according to the quantized signal, and the selection circuit is further used to adjust the order of the digital filtering module according to the amplitude.

13. The analog-to-digital converter according to any one of claims 1 to 12, wherein: The at least two digital filters are connected in sequence, and the selection circuit includes: a multiplexer comprising an output terminal and at least two input terminals, wherein each of the input terminals is connected to an output terminal of each of the digital filters in a one-to-one correspondence; and The selection control circuit is connected to the signal detector and the multiplexer, and is used to connect the output end of the multiplexer to one of the input ends of the multiplexer according to the signal parameter.

14. The analog-to-digital converter according to any one of claims 1 to 12, wherein: The analog-to-digital converter further includes a reset circuit, which is used to reset the analog-to-digital converter after the modulator quantizes the input signal each time to eliminate the information of this quantization.

15. A power detection circuit, characterized in that: The analog-to-digital converter comprises the analog-to-digital converter according to any one of claims 1 to 14, wherein the power detection circuit further comprises a sampling circuit; one end of the sampling circuit is used to sample the input voltage, and the other end is connected to the analog-to-digital converter.

16. A battery management system, characterized in that: The device comprises the electric quantity detection circuit as claimed in claim 15.

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