Uncooled infrared focal plane readout circuit and correction method
By introducing a pixel voltage bias circuit into the infrared focal plane array readout circuit, the pixel current and bias current are adjusted to compensate for the responsivity drift, thus solving the problem of the uncooled infrared focal plane array responsivity changing with ambient temperature and improving temperature measurement accuracy.
Patent Information
- Application Number
- CN202510999132.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-21
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2045-07-21
AI Technical Summary
The uncooled infrared focal plane responsivity drifts with changes in ambient temperature, leading to a decrease in temperature measurement accuracy.
By introducing a pixel voltage bias circuit into the infrared focal plane array readout circuit, a first voltage that varies with ambient temperature and a second voltage that does not vary with ambient temperature are generated. These voltages are then added together as the pixel bias voltage, and the pixel current and bias current are adjusted to compensate for responsivity drift.
This improved the temperature stability of the uncooled infrared focal plane array response rate, thereby enhancing temperature measurement accuracy.
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Figure CN120576885B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of infrared detectors, and more particularly to an infrared focal plane array readout circuit and calibration method. Background Technology
[0002] An uncooled infrared focal plane array uses a pixel array made of thermosensitive material to absorb the infrared radiation energy of a target object and convert it into heat energy, causing the pixel temperature to rise. The temperature change causes the physical properties of the sensitive material to change. The readout circuit of the focal plane array converts this change in physical properties into a voltage or grayscale signal output. The target object can be detected through the voltage or grayscale signal.
[0003] Uncooled infrared focal plane array technology has developed rapidly over the past two decades. On the one hand, the scale of uncooled focal plane pixel arrays has evolved from the initial small and medium sizes to large-scale 1k×2k arrays, and even 2k×4k arrays. On the other hand, pixel sizes have gradually shrunk from 35μm, 25μm, and 17μm to 12μm and 8μm. Due to their advantages of small size, low cost, and high reliability, uncooled focal plane detectors have been widely used in many key fields such as industry, power, medicine, and fire protection.
[0004] Uncooled infrared focal plane arrays are becoming increasingly mature in the field of thermal imaging, and have also made great progress in temperature measurement in areas such as human body and industry.
[0005] Figure 1 Please refer to the schematic diagram of an existing infrared focal plane array readout circuit. Figure 1 The infrared focal plane array readout circuit includes a pixel circuit 10, a dead element circuit 11, and a signal processing circuit 12. The pixel circuit 10 includes a thermistor R11 and a switching device M1. The thermistor R11 is used to receive infrared radiation signals. The dead element circuit 11 includes a dead element resistor R12 and a switching device M2. The resistance value of the dead element resistor R12 does not respond to infrared radiation. The dead element current I1 of the dead element circuit 11 is approximately equal to the pixel current I2 of the pixel circuit 10 under background radiation. The dead element current I1 of the dead element circuit 11 does not change with the intensity of infrared radiation. When the ambient temperature is fixed, the dead element current I1 of the dead element circuit 11 remains constant. The design of the dead element current I1 is mainly to subtract the DC component of the pixel current I2 of the pixel circuit 10. The signal processing circuit 12 integrates the difference current I3 (I3=I1-I2) between the blind current I1 of the blind current circuit 11 and the pixel current I2 of the pixel circuit 10 through the operational amplifier OPA, and converts the integrated signal into a voltage signal.
[0006] When the uncooled infrared focal plane is in operation, when the temperature of the target object increases by ΔT, its radiant energy increases, causing the temperature of the thermistor R11 to rise by KnΔT. The responsivity of the uncooled infrared focal plane is as shown in formula (1):
[0007] (1)
[0008] Where Rv is the voltage response, t is the integration time, Kn is the mapping relationship between the temperature difference of the target object and the temperature difference of the thermistor resistor, c is the integrating capacitance, TCR is the temperature coefficient of the thermistor resistor R11, and I2 is the pixel current of the pixel circuit 10.
[0009] Because the responsivity of uncooled infrared focal plane arrays drifts with changes in ambient temperature, it poses a significant challenge to temperature measurement accuracy. Therefore, controlling the responsivity of uncooled infrared focal plane arrays, compensating for its drift with ambient temperature, improving its temperature stability, and ultimately enhancing temperature measurement accuracy have become key research areas. Summary of the Invention
[0010] The technical problem to be solved by the present invention is to provide an infrared focal plane array readout circuit and correction method that can compensate for the drift of the uncooled infrared focal plane array responsivity with ambient temperature, improve the temperature stability of the responsivity, and thus improve the temperature measurement accuracy.
[0011] To address the aforementioned problems, this invention provides an uncooled infrared focal plane readout circuit, comprising: a pixel circuit for receiving infrared radiation signals and converting them into pixel currents; a bias current circuit for generating bias currents; a pixel voltage bias circuit for generating a first voltage that varies with ambient temperature and a second voltage that does not vary with ambient temperature, and adding the first voltage and the second voltage as the pixel bias voltage output by the pixel voltage bias circuit, wherein the pixel bias voltage serves as the input voltage of the pixel circuit and the bias current circuit; and a signal processing circuit for receiving the pixel currents and the bias currents, integrating the current difference between the pixel currents and the bias currents, and converting the integration result into a voltage signal as the output signal of the uncooled infrared focal plane readout circuit.
[0012] In one specific embodiment, the pixel circuit includes: a thermistor for receiving infrared radiation signals, one end of the thermistor being grounded; a first NMOS device, the first end of which is connected to the other end of the thermistor, the second end of which is connected to the input terminal of the signal processing circuit, and the control terminal of the first NMOS device being connected to the output terminal of the pixel voltage bias circuit.
[0013] In one specific embodiment, the bias current circuit includes: a first resistor, one end of which is grounded; a second NMOS device, one end of which is connected to the other end of the first resistor, and its control terminal is connected to the output terminal of the pixel voltage bias circuit; a first PMOS device, the second end of which is connected to the second end of the second NMOS device and to the control terminal of the first PMOS device, and the control terminal of the first PMOS device is connected to the output terminal of the pixel voltage bias circuit; a second resistor, one end of which is connected to the first end of the first PMOS device; a third resistor, one end of which is connected to the other end of the second resistor; a second PMOS device, the first end of which is connected to the other end of the third resistor, and its second end is connected to the input terminal of the signal processing circuit, and its control terminal is connected to the control terminal of the first PMOS device.
[0014] In one specific embodiment, the first resistor and the thermistor have the same temperature coefficient of resistance and resistance value, and the first NMOS device and the second NMOS device have the same size.
[0015] In one specific embodiment, the second resistor and the third resistor have the same temperature coefficient of resistance and resistance value, and the first PMOS device and the second PMOS device have the same size.
[0016] In one specific embodiment, the pixel voltage bias circuit includes: a temperature detection unit for generating a first voltage that varies with ambient temperature; a digital-to-analog conversion unit for generating a second voltage that does not vary with ambient temperature; and an adder for adding the first voltage and the second voltage and outputting the result as the pixel bias voltage output by the pixel voltage bias circuit.
[0017] In one specific embodiment, the adder includes: a first operational amplifier, the output of which serves as the output terminal of the adder, and its positive input terminal connected to a reference voltage; a fourth resistor, one end of which is connected to the output terminal of the operational amplifier, and the other end of which is connected to the negative input terminal of the operational amplifier; a fifth resistor, one end of which is connected to the negative input terminal of the operational amplifier, and the other end of which is connected to the output terminal of the digital-to-analog converter; and a sixth resistor, which is a variable resistor, one end of which is connected to the negative input terminal of the operational amplifier, and the other end of which is connected to the output terminal of the temperature detection unit.
[0018] In one specific embodiment, the fourth resistor has the same resistance value as the fifth resistor.
[0019] The present invention also provides a calibration method for the aforementioned uncooled infrared focal plane readout circuit, comprising: obtaining the responsivity of the uncooled infrared focal plane at room temperature, wherein the responsivity is used as the required responsivity; changing the ambient temperature to traverse the operating temperature of the uncooled infrared focal plane, and adjusting the pixel bias voltage through a pixel voltage bias circuit so that the responsivity corresponding to each operating temperature of the uncooled infrared focal plane is equal to the required responsivity, thereby forming a pixel bias voltage-ambient temperature curve; when the uncooled infrared focal plane is used at an ambient temperature, adjusting the pixel bias voltage through parameter settings of the pixel voltage bias circuit so that its relationship with the current ambient temperature satisfies the pixel bias voltage-ambient temperature curve.
[0020] In one specific embodiment, the pixel bias voltage-ambient temperature curve is a non-linear curve. The correspondence between the ambient temperature and the parameters of the pixel voltage bias circuit is obtained by fitting the curve using a multi-temperature segment partitioning method. This correspondence is then used as a correction parameter when using the uncooled infrared focal plane. The multi-temperature segment partitioning fitting method includes: dividing the pixel bias voltage-ambient temperature curve within the operating ambient temperature range of the uncooled infrared focal plane into multiple ambient temperature segments, where the pixel bias voltage-ambient temperature curve is approximately linear within each segment; using the uncooled infrared focal plane at an ambient temperature within one of these segments; adjusting the pixel bias voltage by setting the parameters of the pixel voltage bias circuit so that its relationship with the current ambient temperature satisfies the pixel bias voltage-ambient temperature curve of the corresponding ambient temperature segment; recording the parameters of the pixel voltage bias circuit and the current ambient temperature; and repeating the aforementioned operation by changing the ambient temperature.
[0021] In the infrared focal plane array readout circuit provided by this invention, the pixel voltage bias circuit generates a pixel bias voltage based on the ambient temperature when the uncooled infrared focal plane is working. This pixel bias voltage serves as the control voltage for the pixel circuit and the bias current circuit, and can adjust the pixel current of the pixel circuit and the bias current of the bias current circuit. This enables the pixel current of the pixel circuit to be adaptively adjusted with the ambient temperature, thereby achieving control of the responsivity of the uncooled infrared focal plane and effectively reducing the temperature drift of the responsivity.
[0022] The correction method for the infrared focal plane array readout circuit provided by this invention first adjusts the pixel bias voltage through a pixel voltage bias circuit to make the responsivity corresponding to each operating temperature of the uncooled infrared focal plane equal to the required responsivity, and forms a pixel bias voltage-ambient temperature curve. Then, when the uncooled infrared focal plane is used at an ambient temperature, the pixel bias voltage is adjusted by setting the parameters of the pixel voltage bias circuit so that its relationship with the current ambient temperature satisfies the pixel bias voltage-ambient temperature curve, thereby compensating for the drift of the uncooled focal plane responsivity with ambient temperature and improving the temperature stability of the responsivity. Attached Figure Description
[0023] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0024] Figure 1 A schematic diagram of an existing infrared focal plane array readout circuit;
[0025] Figure 2 This is a schematic diagram of a specific embodiment of the infrared focal plane array readout circuit provided by the present invention;
[0026] Figure 3 This is a schematic diagram of the structure of the sixth resistor in a specific embodiment of the infrared focal plane array readout circuit provided by the present invention;
[0027] Figure 4 This is a schematic diagram illustrating the steps of a specific embodiment of the correction method for the infrared focal plane array readout circuit provided by the present invention. Detailed Implementation
[0028] The specific implementation of the infrared focal plane array readout circuit and correction method provided by the present invention will be described in detail below with reference to the accompanying drawings.
[0029] Figure 2 This is a schematic diagram of a specific embodiment of the infrared focal plane array readout circuit provided by the present invention. Please refer to [the diagram]. Figure 2The uncooled infrared focal plane readout circuit includes: a pixel circuit 20 for receiving infrared radiation signals and converting them into pixel current I2; a bias current circuit 21 for generating bias current I4; a pixel voltage bias circuit 22 for generating a first voltage that varies with ambient temperature and a second voltage that does not vary with ambient temperature, and adding the first voltage and the second voltage as the pixel bias voltage Vpb output by the pixel voltage bias circuit 22, wherein the pixel bias voltage Vpb serves as the input voltage of the pixel circuit 20 and the bias current circuit 21; and a signal processing circuit 23 for receiving the pixel current I2 and the bias current I4, integrating the current difference between the pixel current I2 and the bias current I4, and converting the integration result into a voltage signal as the output signal Vout of the uncooled infrared focal plane readout circuit.
[0030] As shown in formula (1), the uncooled infrared focal plane responsivity is positively correlated with the pixel current I2 of the pixel circuit 20. The temperature drift of the uncooled infrared focal plane responsivity is the change in responsivity with varying ambient temperature, i.e., the derivative of Rv with respect to ambient temperature. If it is a quantity independent of temperature, then according to formula (1), the derivative of the response rate with respect to ambient temperature is as shown in formula (2):
[0031] (2)
[0032] As can be seen from formula (2), the change of response rate with temperature depends on the change of the TCR of the thermistor resistor with ambient temperature and the change of the pixel current with ambient temperature. The change of the TCR of the thermistor resistor with ambient temperature is determined by the thermistor material, which is fixed and cannot be changed. Therefore, the change of response rate with temperature can be compensated by changing the change of the pixel current I2 with temperature.
[0033] In the uncooled infrared focal plane readout circuit provided by the present invention, the pixel voltage bias circuit 22 generates a pixel bias voltage Vpb according to the ambient temperature when the uncooled infrared focal plane is working. This pixel bias voltage Vpb serves as the control voltage for the pixel circuit 20 and the bias current circuit 21, and can adjust the pixel current I2 of the pixel circuit 20 and the bias current I4 of the bias current circuit 21. This enables the pixel current I2 of the pixel circuit 20 to be adaptively adjusted with the ambient temperature, thereby achieving control of the uncooled infrared focal plane responsivity and effectively reducing the temperature drift of the responsivity.
[0034] The pixel circuit 20 is used to receive infrared radiation signals and convert them into pixel current I2. In one specific embodiment, the pixel circuit 20 includes a thermistor R7 and a first NMOS device M1.
[0035] One end of the thermistor R7 is grounded, and the other end is connected to the first terminal of the first NMOS device M1. The thermistor R7 is made of a thermistor material and is used to receive infrared radiation signals. The resistance value of the thermistor R7 changes with the intensity of infrared radiation from the sensed target object. The thermistor R7 adopts a vacuum, suspended, thermally adiabatic microbridge structure, which has good thermal isolation from the substrate to maximize the conversion of absorbed infrared radiation into temperature changes of the thermistor R7, thereby enhancing the Kn value in formula (1). When the thermistor R7 is affected by a change in the intensity of infrared radiation, the pixel circuit 20 converts the change signal of the thermistor R7 into a change signal of pixel current I2.
[0036] The first terminal of the first NMOS device M1 is connected to the other terminal of the thermistor R7, the second terminal of the first NMOS device M1 is connected to the input terminal of the signal processing circuit 23, and the control terminal of the first NMOS device M1 is connected to the output terminal of the pixel voltage bias circuit 22. The voltage at the control terminal of the first NMOS device M1 determines the voltage applied to the thermistor R7, and thus determines the pixel current I2 of the pixel circuit 20. Therefore, the pixel current I2 of the pixel circuit 20 can be adjusted by changing the voltage at the control terminal of the first NMOS device M1. The pixel voltage bias circuit 22 generates a pixel bias voltage based on the ambient temperature when the uncooled infrared focal plane is working. This pixel bias voltage serves as the voltage at the control terminal of the first NMOS device M1, and can adjust the pixel current I2 of the pixel circuit 20, thereby achieving adaptive adjustment of the pixel current I2 of the pixel circuit 20 according to the ambient temperature. In a specific embodiment, the first terminal of the first NMOS device M1 is the source terminal, and the second terminal of the first NMOS device M1 is the drain terminal.
[0037] The bias current circuit 21 generates a bias current I4, which cancels the DC component in the pixel current I2, ensuring that the current entering the signal processing circuit 23 is only the component of the pixel current I2 affected by changes in infrared radiation intensity in the pixel circuit 20. The pixel voltage bias circuit 22 generates a pixel bias voltage based on the ambient temperature during operation of the uncooled infrared focal plane array. This pixel bias voltage serves as the control voltage for the bias current circuit 21, adjusting the bias current I4 to achieve adaptive adjustment of the bias current I4 with ambient temperature, thus canceling the DC component in the pixel current I2, which also adjusts with ambient temperature.
[0038] In one specific embodiment, the bias current circuit 21 includes a first resistor R1, a second NMOS device M2, a first PMOS device M3, a second resistor R2, a third resistor R3, and a second PMOS device M4.
[0039] One end of the first resistor R1 is grounded, and the other end is connected to the first terminal of the second NMOS device M2. The first terminal of the second NMOS device M2 is connected to the other end of the first resistor R1, and the control terminal of the second NMOS device M2 is connected to the output terminal of the pixel voltage bias circuit 22. The voltage at the control terminal of the second NMOS device M2 determines the voltage applied to the first resistor R1, and thus determines the current in the circuit containing the first resistor R1. The pixel voltage bias circuit 22 generates a pixel bias voltage based on the ambient temperature when the uncooled infrared focal plane is operating. This pixel bias voltage serves as the voltage at the control terminal of the second NMOS device M2, and can regulate the current in the circuit containing the second NMOS device M2. In one specific embodiment, the first terminal of the second NMOS device M2 is the source terminal, and the second terminal of the second NMOS device M2 is the drain terminal.
[0040] The first resistor R1, the second NMOS device M2, the thermistor R7, and the first NMOS device M1 constitute a current mirror to suppress noise.
[0041] In one specific embodiment, the first resistor R1 and the thermistor R7 have the same temperature coefficient of resistance (TCR) and resistance value. The first NMOS device M1 and the second NMOS device M2 are of the same size, such that the current at the second terminal of the second MOS device is the same as the pixel current I2, thereby suppressing noise. In some specific embodiments, the first resistor R1 and the thermistor R7 are made of the same material and have the same size. The first resistor R1 adopts a non-insulated microbridge design, and its resistance temperature and resistance value do not respond to infrared radiation signals. The first resistor R1 and the thermistor R7 having the same resistance value means that the resistance value of the first resistor R1 is the same as the resistance value of the thermistor R7 under background radiation.
[0042] The second terminal of the first PMOS device M3 is connected to the second terminal of the second NMOS device M2 and to the control terminal of the first PMOS device M3. The control terminal of the first PMOS device M3 is connected to the output terminal of the pixel voltage bias circuit 22. The first terminal of the first PMOS device M3 is connected to one end of the second resistor R2, and the other end of the second resistor R2 is connected to the bias voltage Vsk. One end of the third resistor R3 is connected to the other end of the second resistor R2 and to the bias voltage Vsk. The first terminal of the second PMOS device M4 is connected to the other end of the third resistor R3. The second terminal of the second PMOS device M4 is connected to the input terminal of the signal processing circuit 23, and the control terminal of the second PMOS device M4 is connected to the control terminal of the first PMOS device M3. In one specific embodiment, the first terminal of the first PMOS device M3 is the source terminal, the second terminal of the first PMOS device M3 is the drain terminal, the first terminal of the second PMOS device M4 is the source terminal, and the second terminal of the second PMOS device M4 is the drain terminal.
[0043] The control terminal of the second PMOS device M4 is connected to the control terminal of the first PMOS device M3, and is also connected to the output terminal of the pixel voltage bias circuit 22. That is, the pixel bias voltage output by the pixel voltage bias circuit 22 serves as the control voltage for both the first PMOS device M3 and the second PMOS device M4. The second PMOS device M4 and the third resistor R3 form a blind element circuit to generate a constant current unaffected by infrared radiation signals. This constant current can cancel the DC component in the pixel current I2.
[0044] The first PMOS device M3, the second resistor R2, the second PMOS device M4, and the third resistor R3 form a current mirror to suppress noise.
[0045] In one specific embodiment, the second resistor R2 and the third resistor R3 have the same temperature coefficient of resistance and resistance value, and the first PMOS device M3 and the second PMOS device M4 have the same dimensions. The current at the second terminal of the second PMOS device M4 is approximately equal to the current at the second terminal of the first PMOS device M3, and the current at the second terminal of the first PMOS device M3 is equal to the current at the second terminal of the second NMOS device M2. Therefore, the current at the second terminal of the second PMOS device M4 is equal to the current at the second terminal of the second NMOS device M2. Furthermore, as mentioned above, the current at the second terminal of the second MOS device is the same as the pixel current I2. Therefore, the current at the second terminal of the second PMOS device M4 is equal to the current of the pixel circuit 20.
[0046] Since the first resistor R1, the second resistor R2, and the third resistor R3 do not respond to infrared radiation signals, that is, they do not change with the change of infrared radiation intensity, the relationship that the current at the second terminal of the second MOS device is equal to the DC component of the pixel current I2 does not change with the change of ambient temperature, effectively reducing the change of the output signal of the signal processing circuit 23 with the change of ambient temperature.
[0047] The pixel voltage bias circuit 22 generates a first voltage that varies with ambient temperature and a second voltage that does not vary with ambient temperature. The first voltage and the second voltage are added together to obtain the pixel bias voltage Vpb output by the pixel voltage bias circuit 22. This pixel bias voltage Vpb serves as the input voltage for the pixel circuit 20 and the bias current circuit 21. In this invention, the pixel voltage bias circuit 22 can generate a pixel bias voltage Vpb that varies with the ambient temperature of the uncooled infrared focal plane array. The pixel bias voltage Vpb adaptively controls the magnitude of the pixel current I2 to compensate for the drift of the uncooled infrared focal plane array responsivity with ambient temperature, thereby improving the stability of the responsivity with temperature variations.
[0048] In one specific embodiment, the pixel voltage bias circuit 22 includes a temperature detection unit 221, a digital-to-analog converter 222, and an adder 223, in order to generate a pixel bias voltage Vpb that varies with the ambient temperature of the uncooled infrared focal plane.
[0049] The temperature detection unit 221 is used to generate a first voltage that changes with the ambient temperature. In one specific embodiment, the temperature detection unit 221 is a temperature sensor, specifically an on-chip temperature sensor, which can detect the ambient temperature at which the uncooled infrared focal plane is operating and convert the ambient temperature into a voltage signal. In one specific embodiment, the voltage of the temperature sensor increases as the ambient temperature increases.
[0050] The digital-to-analog converter unit 222 (i.e., DAC unit) is used to generate a second voltage that does not change with ambient temperature.
[0051] The adder 223 is used to add the first voltage and the second voltage and output the output voltage as the output terminal of the pixel voltage bias circuit 22. The output voltage is the pixel bias voltage Vpb, which is applied to the pixel circuit 20 and the bias current circuit 21.
[0052] In one specific embodiment, the adder 223 includes a first operational amplifier OPA1, a fourth resistor R4, a fifth resistor R5, and a sixth resistor R6. The output terminal of the first operational amplifier OPA1 serves as the output terminal of the adder 223, and its positive input terminal is connected to a reference voltage Vref. One end of the fourth resistor R4 is connected to the output terminal of the first operational amplifier OPA1, and the other end is connected to the negative input terminal of the first operational amplifier OPA1. One end of the fifth resistor R5 is connected to the negative input terminal of the first operational amplifier OPA1, and the other end is connected to the output terminal of the digital-to-analog converter unit 222. The sixth resistor R6 is a variable resistor, with one end connected to the negative input terminal of the first operational amplifier OPA1 and the other end connected to the output terminal of the temperature detection unit 221.
[0053] The voltage output by the adder 223 is the pixel bias voltage Vpb, as shown in formula (3):
[0054] (3)
[0055] Wherein, Vpb is the pixel bias voltage, Vref is the reference voltage applied to the positive input terminal of the first operational amplifier OPA1, Vdac is the second voltage, VT is the first voltage, R4 is the fourth resistor, R5 is the fifth resistor, and R6 is the sixth resistor.
[0056] As can be seen from formula (3), the pixel bias voltage Vpb is related to the first voltage VT output by the temperature detection unit 221, the second voltage Vdac output by the digital-to-analog converter 222, the reference voltage Vref applied to the positive input terminal of the first operational amplifier OPA1, the fourth resistor R4, the fifth resistor R5, and the sixth resistor R6. Among them, the reference voltage Vref applied to the positive input terminal of the first operational amplifier OPA1, the fourth resistor R4, and the fifth resistor R5 are constant values. The first voltage VT output by the temperature detection unit 221 is related to the ambient temperature. Therefore, the relationship between the pixel bias voltage Vpb and the first voltage VT output by the temperature detection unit 221 can be adjusted by setting the second voltage Vdac output by the digital-to-analog converter 222 and the sixth resistor R6, so that the relationship between the two is close to the set relationship, thereby keeping the uncooled infrared focal plane responsivity at a constant value, realizing the compensation of the temperature drift of the uncooled infrared focal plane responsivity, improving the temperature stability of the responsivity, and thus improving the temperature measurement accuracy.
[0057] The second voltage VT output by the temperature detection unit 221 is a function of the ambient temperature T, and can be expressed as follows: The simplification process of formula (3) is as follows:
[0058]
[0059]
[0060]
[0061] make , ,
[0062] The pixel bias voltage Vpb can then be simplified to a function containing the temperature variable T, as shown in formula (4):
[0063] (4)
[0064] Where V0 is a number independent of temperature, by setting the value of the sixth resistor R6, the slope of the pixel bias voltage Vpb changing with temperature T can be changed, and the relationship curve between the desired pixel bias voltage Vpb and temperature T can be constructed. This relationship curve is a fitting curve that is close to the ideal curve.
[0065] In one specific embodiment, the sixth resistor R6 is a variable resistor whose resistance value can be adjusted. Figure 3 This is a schematic diagram of the structure of the sixth resistor R6 in a specific embodiment of the infrared focal plane array readout circuit provided by the present invention. The sixth resistor R6 includes multiple sub-resistors R61, R62...R6n and selection switches K61, K62...K6n connected in parallel with the sub-resistors. By setting whether the selection switches K61, K62...K6n are on or off, the total resistance value between port A and port B is adjusted, thereby realizing the adjustment of the resistance value of the sixth resistor R6.
[0066] In one specific embodiment, the fourth resistor R4 and the fifth resistor R5 have the same resistance value.
[0067] The signal processing circuit 23 receives the pixel current I2 and the bias current I4, integrates the current difference between the pixel current I2 and the bias current I4, and converts the integration result into a voltage signal as the output signal Vout of the uncooled infrared focal plane readout circuit. In one specific embodiment, the signal processing circuit 23 includes a second operational amplifier OPA2, an integrating capacitor C, and a reset switch K. The negative input terminal of the second operational amplifier OPA2 is connected to the output terminal of the pixel circuit 20 and the output terminal of the bias current circuit 21. The output terminal of the second operational amplifier OPA2 serves as the output terminal of the signal processing circuit 23, and the positive input terminal of the second operational amplifier OPA2 is connected to the reference voltage Vref. The integrating capacitor C is connected across the output terminal and the negative input terminal of the second operational amplifier OPA2, and the reset switch K is connected in parallel with the integrating capacitor C. The signal processing circuit 23 only integrates and amplifies the signal current, effectively improving the current input dynamic range of the processing circuit.
[0068] The present invention also provides a correction method for the aforementioned uncooled infrared focal plane readout circuit, which is used to compensate for the drift of the focal plane responsivity with ambient temperature and improve the temperature stability of the responsivity.
[0069] Figure 4 This is a schematic diagram illustrating the steps of a specific embodiment of the correction method for the infrared focal plane array readout circuit provided by the present invention, as shown below. Figure 4 As shown, and refer to Figure 2 The correction method includes:
[0070] Step S40: Obtain the responsivity of the uncooled infrared focal plane at room temperature, which is used as the required responsivity. Step S41: Change the ambient temperature to iterate through the operating temperatures of the uncooled infrared focal plane, and adjust the pixel bias voltage through the pixel voltage bias circuit so that the responsivity corresponding to each operating temperature of the uncooled infrared focal plane is equal to the required responsivity, and form a pixel bias voltage-ambient temperature curve. Step S42: When using the uncooled infrared focal plane at an ambient temperature, adjust the pixel bias voltage through the parameter settings of the pixel voltage bias circuit so that its relationship with the current ambient temperature satisfies the pixel bias voltage-ambient temperature curve.
[0071] The calibration method of the uncooled infrared focal plane readout circuit of the present invention first adjusts the pixel bias voltage through the pixel voltage bias circuit so that the responsivity corresponding to each operating temperature of the uncooled infrared focal plane is equal to the required responsivity, and forms a pixel bias voltage-ambient temperature curve; then, when the uncooled infrared focal plane is used at an ambient temperature, the pixel bias voltage is adjusted by setting the parameters of the pixel voltage bias circuit so that its relationship with the current ambient temperature satisfies the pixel bias voltage-ambient temperature curve, thereby compensating for the drift of the uncooled focal plane responsivity with ambient temperature and improving the temperature stability of the responsivity.
[0072] The following section details the steps of the calibration method for an uncooled infrared focal plane readout circuit.
[0073] Step S40: Obtain the response rate of the uncooled infrared focal plane at room temperature, and use this response rate as the demand response rate.
[0074] According to formulas (1) and (2), the responsivity and temperature drift of the uncooled infrared focal plane are related to the pixel current. Therefore, in step S40, the pixel bias voltage is adjusted by setting the parameters of the pixel voltage bias circuit at room temperature, thereby adjusting the pixel current. Substituting the adjusted pixel current into formula (1), the resulting responsivity Rv of the uncooled infrared focal plane should meet the application requirements of the uncooled infrared focal plane. This responsivity is then used as the required responsivity. In one specific embodiment, the room temperature is typically 25°C. In another specific embodiment, the pixel bias voltage can be adjusted by setting the output voltage (i.e., the second voltage) of the digital-to-analog converter unit.
[0075] Step S41: Change the ambient temperature to traverse the operating temperature of the uncooled infrared focal plane, and adjust the pixel bias voltage through the pixel voltage bias circuit so that the response rate corresponding to each operating temperature of the uncooled infrared focal plane is equal to the required response rate, and form a pixel bias voltage-ambient temperature curve.
[0076] Specifically, this step, by changing the ambient temperature, enables the testing of the responsivity of the uncooled infrared focal plane array across its entire operating temperature range. Under different ambient temperatures, the output voltage (i.e., the first voltage) of the temperature detection unit of the pixel voltage bias circuit varies, causing a change in the pixel bias voltage output from the pixel voltage bias circuit. This change in the pixel bias voltage leads to a change in the pixel current of the pixel circuit, and consequently, a change in the responsivity of the uncooled infrared focal plane array. This step adjusts the pixel bias voltage by adjusting the output voltage (i.e., the second voltage) of the digital-to-analog converter unit of the pixel voltage bias circuit, thereby adjusting the pixel current to ensure that the responsivity of the uncooled infrared focal plane array at the given ambient temperature is equal to the required responsivity.
[0077] In this step, during the test, the ambient temperature and pixel bias voltage corresponding to the point where the uncooled infrared focal plane responsivity equals the required responsivity are recorded. Based on this data, a pixel bias voltage-ambient temperature curve is plotted, showing that the responsivity is always equal to the required responsivity. This pixel bias voltage-ambient temperature curve represents the ideal relationship between pixel bias voltage and ambient temperature. As long as the relationship between pixel bias voltage and temperature conforms to this curve, the responsivity of the uncooled infrared focal plane will not drift with changes in ambient temperature.
[0078] Step S42: When using the uncooled infrared focal plane at an ambient temperature, adjust the pixel bias voltage by setting the parameters of the pixel voltage bias circuit so that its relationship with the current ambient temperature satisfies the pixel bias voltage-ambient temperature curve.
[0079] Specifically, when the uncooled infrared focal plane is used at an ambient temperature, the pixel bias voltage is adjusted by setting the output voltage (i.e., the second voltage) of the digital-to-analog converter unit of the pixel voltage bias circuit and setting the resistance value of the sixth resistor so that its relationship with the current ambient temperature satisfies the pixel bias voltage-ambient temperature curve. This makes the response rate of the uncooled infrared focal plane the required response rate, realizes the compensation for the drift of the uncooled focal plane response rate with ambient temperature, and improves the temperature stability of the response rate.
[0080] Theoretically, the pixel bias voltage can be adjusted by setting the output voltage (i.e., the second voltage) of the digital-to-analog converter unit in the pixel voltage bias circuit. However, since the required pixel bias voltage varies with temperature, the detector needs a corresponding bias voltage setting at each temperature point, which increases the complexity of adjustment. Furthermore, the output voltage (i.e., the second voltage) of the digital-to-analog converter unit cannot change smoothly with temperature, making it impossible to obtain a smooth curve. This invention utilizes the setting of the resistance value of the sixth resistor to fit an ideal curve. It only requires setting the output voltage (i.e., the second voltage) of the digital-to-analog converter unit at one or a few temperature points, making it convenient to operate and able to obtain a smooth curve, which is easy to compare with the pixel bias voltage-ambient temperature curve.
[0081] Specifically, in some implementations, the pixel bias voltage-ambient temperature curve is linear. Therefore, within the full operating temperature range of the uncooled infrared focal plane, only one set of parameters needs to be set for the output voltage of the digital-to-analog converter and the resistance value of the sixth resistor to achieve compensation for the temperature drift of the response rate.
[0082] In other specific embodiments, the pixel bias voltage-ambient temperature curve is a non-linear curve. The correspondence between the ambient temperature and the parameters of the pixel voltage bias circuit is obtained by fitting the curve using a multi-temperature segment partitioning method. This correspondence is then used as a correction parameter when using the uncooled infrared focal plane array. The multi-temperature segment partitioning fitting method includes:
[0083] The pixel bias voltage-ambient temperature curve is divided into multiple ambient temperature segments within the operating ambient temperature range of the uncooled infrared focal plane. Within each ambient temperature segment, the pixel bias voltage-ambient temperature curve is approximately linear.
[0084] The uncooled infrared focal plane is used at an ambient temperature within one of the aforementioned ambient temperature ranges. The pixel bias voltage is adjusted by setting the parameters of the pixel voltage bias circuit so that its relationship with the current ambient temperature satisfies the pixel bias voltage-ambient temperature curve for the corresponding ambient temperature range. The parameters of the pixel voltage bias circuit and the current ambient temperature are recorded. Specifically, the uncooled infrared focal plane is used at an ambient temperature within one of the aforementioned ambient temperature ranges. The pixel bias voltage is adjusted by adjusting the output voltage of the digital-to-analog converter unit of the pixel voltage bias circuit and the resistance value of the sixth resistor so that its relationship with the current ambient temperature satisfies the pixel bias voltage-ambient temperature curve for the corresponding ambient temperature range. The output voltage of the digital-to-analog converter unit, the resistance value of the sixth resistor, and the current ambient temperature are recorded.
[0085] Change the ambient temperature and repeat the above steps.
[0086] The above method sets independent output voltages for the digital-to-analog converter (DAC) and resistance values for the sixth resistor for all ambient temperature ranges, and stores the settings for all ambient temperature ranges on the uncooled focal plane. When the uncooled infrared focal plane is operating, the ambient temperature is sensed by the temperature detection unit. Based on the ambient temperature, the output voltage of the DAC and the resistance value of the sixth resistor stored on the uncooled focal plane are retrieved to achieve responsivity temperature drift compensation under that ambient temperature. When the ambient temperature changes and exceeds the range of that temperature range, the uncooled focal plane will automatically retrieve the corresponding ambient temperature range settings based on the temperature information sensed by the temperature detection unit to achieve responsivity temperature drift compensation across the entire operating ambient temperature range.
[0087] It should be noted that the terms "comprising" and "having," and their variations, used in this invention document are intended to cover non-exclusive inclusion. The terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence, unless explicitly indicated by the context; it should be understood that such use of data can be interchanged where appropriate. The term "one or more" depends at least in part on the context and can be used to describe features, structures, or characteristics in a singular sense, or in a plural sense to describe combinations of features, structures, or characteristics. The term "based on" can be understood as not necessarily intended to express an exclusive set of factors, but can instead, also at least in part on the context, allow for the presence of other factors that are not necessarily explicitly described. Furthermore, embodiments and features in embodiments of this invention can be combined with each other without conflict. In addition, descriptions of well-known components and technologies have been omitted in the above description to avoid unnecessarily obscuring the concepts of this invention. In the various embodiments described above, each embodiment focuses on its differences from other embodiments; similar / identical parts between embodiments can be referred to mutually.
[0088] The above description is only a preferred embodiment of the present invention. It should be noted that those skilled in the art can make several improvements and modifications without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A uncooled infrared focal plane readout circuit, characterized by, The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit.
2. The uncooled infrared focal plane readout circuit of claim 1, wherein, The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit.
3. The uncooled infrared focal plane readout circuit of claim 2, wherein, The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit.
4. The uncooled infrared focal plane readout circuit of claim 3, wherein, The application relates to a non-cooled infrared focal plane readout circuit.
5. The uncooled infrared focal plane readout circuit of claim 3, wherein, The application relates to a non-cooled infrared focal plane readout circuit.
6. The uncooled infrared focal plane readout circuit of claim 1, wherein, The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit.
7. The uncooled infrared focal plane readout circuit of claim 6, wherein, The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. 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The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled infrared focal plane readout circuit. The application relates to a non-cooled A sixth resistor, which is a variable resistor, has one end connected to the negative input terminal of the operational amplifier and the other end connected to the output terminal of the temperature detection unit.
8. The uncooled infrared focal plane readout circuit of claim 7, wherein, The fourth resistor has the same resistance as the fifth resistor.
9. A method of calibrating the uncooled infrared focal plane readout circuit of claim 1, wherein, The method comprises the following steps: obtaining the response rate of the uncooled infrared focal plane at normal temperature, which is taken as a required response rate; changing the ambient temperature to traverse the working temperature of the uncooled infrared focal plane, and adjusting the pixel bias voltage through the pixel voltage bias circuit so that the response rate corresponding to each working temperature of the uncooled infrared focal plane is equal to the required response rate, and a pixel bias voltage-ambient temperature curve is formed; when the uncooled infrared focal plane is used at an ambient temperature, the pixel bias voltage is adjusted through the parameter setting of the pixel voltage bias circuit so that the relationship between the pixel bias voltage and the current ambient temperature meets the pixel bias voltage-ambient temperature curve.
10. The correction method of claim 9, wherein, The pixel bias voltage-ambient temperature curve is a nonlinear curve, and the corresponding relationship between the ambient temperature and the parameters of the pixel voltage bias circuit is obtained by fitting in a multi-temperature segment partition manner, and the corresponding relationship is taken as a correction parameter when the uncooled infrared focal plane is used, wherein the fitting in the multi-temperature segment partition manner comprises: dividing the pixel bias voltage-ambient temperature curve into multiple ambient temperature segments within the working ambient temperature range of the uncooled infrared focal plane, and the pixel bias voltage-ambient temperature curve in each ambient temperature segment is close to a linear curve; when the uncooled infrared focal plane is used at an ambient temperature, the ambient temperature is located in one of the ambient temperature segments, and the pixel bias voltage is adjusted through the parameter setting of the pixel voltage bias circuit so that the relationship between the pixel bias voltage and the current ambient temperature meets the pixel bias voltage-ambient temperature curve of the corresponding ambient temperature segment, and the parameters of the pixel voltage bias circuit and the current ambient temperature are recorded; changing the ambient temperature and repeating the foregoing operation.
Citation Information
Patent Citations
Uncooled infrared focal plane array reading circuit and detector
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Methods and circuitry for correcting temperature-induced errors in microbolometer focal plane array
US6028309A