Photonic crystal surface emitting laser and manufacturing method thereof

Abstract

The invention provides a photonic crystal surface emitting laser and a manufacturing method thereof, the photonic crystal surface emitting laser comprises a gain assembly and a photonic crystal assembly, and the gain assembly comprises a semiconductor substrate, a carrier transport layer and an active layer which are stacked in sequence; the photonic crystal assembly comprises a silicon-on-insulator structure and a photonic crystal structure formed on the silicon-on-insulator structure; the active layer and the photonic crystal structure are combined in a bonding mode so that light feedback and surface emission can be achieved through the photonic crystal structure when the active layer emits light. According to the photonic crystal surface emitting laser and the manufacturing method thereof, the key components of the photonic crystal surface emitting laser are separately manufactured and integrated through bonding, so that the manufacturing process is simplified, the manufacturing cost is reduced, the yield is improved, the process of each module can be independently optimized, and the risk of failure of the whole process is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor lasers, and in particular to a photonic crystal surface emitting laser and a manufacturing method thereof. Background Art

[0002] Photonic Crystal Surface Emitting Laser (PCSEL) has broad application prospects in optical communications, lidar, industrial processing and other fields due to its advantages such as high beam quality, high power, narrow linewidth and the ability to realize large-area two-dimensional arrays. Traditional PCSELs are usually prepared on III-V compound semiconductor substrates through multiple epitaxial growth and complex micro-nanofabrication processes. Among them, the precise preparation of the photonic crystal layer and its alignment and coupling with the active region are key links. Multiple epitaxial growth not only increases the process complexity and cost, but also easily introduces defects, affecting the performance and reliability of the device. In addition, integrating PCSELs with mature silicon photonic platforms to realize more complex photonic integrated circuits (PICs) is also a hot topic and difficulty in current research.

[0003] Therefore, how to simplify the manufacturing process of PCSEL, reduce costs, improve device performance and reliability, and promote its integration with the silicon photonics platform is a technical problem that needs to be solved urgently in this field. Summary of the Invention

[0004] Based on this, it is necessary to provide a photonic crystal surface emitting laser and a manufacturing method thereof to solve at least one of the above technical problems.

[0005] In a first aspect, the present application provides a photonic crystal surface emitting laser, comprising:

[0006] A gain component, the gain component comprising a semiconductor substrate, a carrier transport layer, and an active layer stacked in sequence;

[0007] A photonic crystal component, the photonic crystal component comprising a silicon-on-insulator structure and a photonic crystal structure formed on the silicon-on-insulator structure;

[0008] The active layer and the photonic crystal structure are combined by bonding, so that light feedback and surface emission can be achieved through the photonic crystal structure when the active layer emits light.

[0009] The above-mentioned photonic crystal surface emitting laser has the following beneficial effects by manufacturing the key components of the photonic crystal surface emitting laser separately and integrating them through bonding:

[0010] 1. Simplified manufacturing process: Avoids the difficulty of multiple complex heteroepitaxial growth and direct fine photonic crystal etching on III-V materials.

[0011] 2. Reduced manufacturing costs and improved yield: Each module can independently optimize the process, reducing the risk of overall process failure.

[0012] 3. Improved device design flexibility: gain materials and photonic crystal structures can be optimized and designed independently.

[0013] 4. Easy to achieve large-scale, low-cost integration with silicon photonics platforms: It provides an effective way to combine high-performance on-chip light sources with complex silicon photonic circuits.

[0014] In a possible implementation manner of the first aspect, the photonic crystal structure is a periodic structure.

[0015] By limiting the photonic crystal structure to a periodic structure, the Bragg diffraction effect and photonic bandgap characteristics can be utilized to significantly enhance the light feedback efficiency and optimize the surface emission directionality, thereby achieving higher laser output quality and more stable resonant modes, further improving device performance and design controllability.

[0016] In a possible implementation manner of the first aspect, the periodic structure includes periodically arranged air holes or silicon pillars.

[0017] The use of silicon-on-insulator technology to prepare periodically arranged air hole / silicon pillar photonic crystal structures can not only avoid the difficulty of directly etching fine structures on III-V materials, but also flexibly adjust the photonic band gap and diffraction characteristics to adapt to different wavelength requirements, while significantly improving the simplicity, controllability and repeatability of the preparation process.

[0018] In a possible implementation manner of the first aspect, the photonic crystal component further includes a silicon optical device formed below the photonic crystal structure.

[0019] By integrating silicon photonic devices underneath the photonic crystal structure, it is possible to achieve functional synergy between photonic crystal components and silicon-based optical elements, such as light path guidance or signal coupling, thereby enhancing the integration and versatility of the device and promoting the construction of complex silicon photonic systems.

[0020] In a possible implementation of the first aspect, the silicon optical device is selected from at least one of a grating coupler, a silicon waveguide, and a silicon nitride waveguide.

[0021] By limiting silicon photonic devices to at least one of grating couplers, silicon waveguides, or silicon nitride waveguides, functional modules can be flexibly selected according to specific application requirements, optimizing optical signal transmission paths and coupling efficiency, and further improving the adaptability of devices in optical communications or photonic integrated circuits.

[0022] In a possible implementation of the first aspect, the bonding method is wafer bonding or chip-level bonding.

[0023] By adopting wafer bonding or chip-level bonding methods, it is possible to flexibly select integration solutions based on the production scale, reduce alignment accuracy requirements and process complexity, and take into account the efficiency of large-scale manufacturing and small-batch customization needs.

[0024] In a possible implementation manner of the first aspect, the bonding method is direct bonding.

[0025] The combination of gain components and photonic crystal components through direct bonding technology can reduce the loss of light transmission caused by the interface dielectric layer, improve the light coupling efficiency, and enhance the mechanical stability and long-term reliability of the bonding interface.

[0026] In a possible implementation of the first aspect, the carrier transport layer includes a carrier transport layer of a first conductivity type, and the active layer is located between the carrier transport layer of the first conductivity type and the photonic crystal component.

[0027] By limiting the active layer to be located between the first conductive type carrier transport layer and the photonic crystal component, the carrier injection path and recombination efficiency can be optimized, leakage current and heat loss can be reduced, thereby improving the photoelectric conversion efficiency and operating stability of the device.

[0028] In a possible implementation of the first aspect, the carrier transport layer further includes a carrier transport layer of a second conductivity type, and the active layer is located between the carrier transport layer of the first conductivity type and the carrier transport layer of the second conductivity type.

[0029] By introducing a second conductive type carrier transport layer to form a dual carrier injection structure, more efficient carrier recombination and optical gain can be achieved, the threshold current can be reduced, and the operating voltage range and output power upper limit of the device can be expanded.

[0030] In a second aspect, the present application provides a method for manufacturing a photonic crystal surface emitting laser, which is applied to the photonic crystal surface emitting laser in the first aspect or any possible implementation of the first aspect, and the method comprises:

[0031] Providing a gain component, the gain component comprising a semiconductor substrate, a carrier transport layer, and an active layer stacked in sequence;

[0032] Providing a photonic crystal component, the photonic crystal component comprising a silicon-on-insulator structure and a photonic crystal structure formed on the silicon-on-insulator structure;

[0033] The active layer is combined with the photonic crystal structure by bonding, so that light feedback and surface emission can be achieved through the photonic crystal structure when the active layer emits light.

[0034] The above-mentioned method for manufacturing a photonic crystal surface emitting laser has the following beneficial effects by separating and manufacturing the key components of the photonic crystal surface emitting laser and integrating them through bonding:

[0035] 1. Simplified manufacturing process: Avoids the difficulty of multiple complex heteroepitaxial growth and direct fine photonic crystal etching on III-V materials.

[0036] 2. Reduced manufacturing costs and improved yield: Each module can independently optimize the process, reducing the risk of overall process failure.

[0037] 3. Improved device design flexibility: gain materials and photonic crystal structures can be optimized and designed independently.

[0038] 4. Easy to achieve large-scale, low-cost integration with silicon photonics platforms: It provides an effective way to combine high-performance on-chip light sources with complex silicon photonic circuits. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The accompanying drawings are for illustrative purposes only and are not to be construed as limiting the present invention; identical reference numerals are used for components having identical structures and functions.

[0040] Figure 1 A schematic structural diagram of a photonic crystal surface emitting laser provided in one embodiment of the present application;

[0041] Figure 2 A schematic structural diagram of a photonic crystal surface emitting laser provided in another embodiment of the present application;

[0042] Figure 3 A schematic structural diagram of a photonic crystal surface emitting laser provided in another embodiment of the present application;

[0043] Figure 4 A schematic structural diagram of a photonic crystal surface emitting laser provided in another embodiment of the present application;

[0044] Figure 5 A schematic structural diagram of a photonic crystal surface emitting laser provided in another embodiment of the present application;

[0045] Figure 6 A schematic flow chart of a method for manufacturing a photonic crystal surface emitting laser according to one embodiment of the present application;

[0046] Description of reference numerals:

[0047] Photonic crystal surface emitting laser-100; gain element-2; photonic crystal component-3; semiconductor substrate-4; carrier transport layer-5; carrier transport layer of first conductivity type-51; carrier transport layer of second conductivity type-52; active layer-6; silicon-on-insulator structure-7; photonic crystal structure-8; air hole-9; silicon pillar-10; silicon optical device-11; grating coupler-12; silicon waveguide-13; silicon nitride waveguide-14; distributed Bragg reflector-15. DETAILED DESCRIPTION

[0048] The technical solutions in the embodiments of the present application will be described below in conjunction with the accompanying drawings in the embodiments of the present application. In the description of the embodiments of the present application, unless otherwise specified, " / " means or, for example, A / B can mean A or B; "and / or" in this article is merely a description of the association relationship of associated objects, indicating that three relationships can exist, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, in the description of the embodiments of the present application, "multiple" means two or more than two.

[0049] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the quantity of the technical features indicated. Therefore, a feature specified as "first" or "second" may explicitly or implicitly include one or more of the features.

[0050] In the description of this embodiment, unless otherwise specified, “a plurality of” means two or more.

[0051] The present invention provides a photonic crystal surface-emitting laser (PCSEL) and its manufacturing method, aiming to address the complex manufacturing process, high cost, and low yield of conventional photonic crystal surface-emitting lasers (PCSELs). Specifically, the method simplifies the fabrication of the photonic crystal layer and facilitates the integration of PCSELs with silicon photonic platforms. This laser achieves efficient and stable surface-emitting laser output by separating the gain generation portion from the photonic crystal resonator / light-emitting portion and integrating them through bonding technology.

[0052] like Figure 1As shown, the present application provides an exemplary embodiment of a photonic crystal surface emitting laser 100. In this embodiment, the photonic crystal surface emitting laser 100 mainly includes a gain component 2 and a photonic crystal component 3, which are used to generate coherent laser light of a specific wavelength and emit vertically from the surface of the device. The gain component 2 provides optical gain, and the photonic crystal component 3 provides optical resonance and surface emission functions. The gain component 2 includes a semiconductor substrate 4, a carrier transport layer 5, and an active layer 6. The photonic crystal component 3 includes a silicon-on-insulator (SOI) structure 7 and a photonic crystal structure 8 formed on the silicon-on-insulator structure 7. The active layer 6 of the gain component 2 is tightly bonded to the photonic crystal structure 8 of the photonic crystal component 3 through a bonding interface. When a forward bias is applied, carriers are injected into the active layer 6 of the gain component 2 to generate composite radiation and generate photons. These photons enter the photonic crystal structure 8 of the photonic crystal component 3. The photonic crystal structure 8 acts as a two-dimensional diffraction grating. On the one hand, it couples light of a specific wavelength to a direction perpendicular to the device surface and emits it, forming surface emission. On the other hand, the photonic crystal structure 8 provides distributed feedback for laser oscillation, amplifying the light in the resonant cavity and ultimately forming laser output. The bonding interface ensures that the light generated from the active layer 6 can be efficiently coupled into the photonic crystal structure 8. Due to the separate manufacturing of the gain component 2 and the photonic crystal component 3, the complex photonic crystal structure 8 can be completed on the silicon-on-insulator structure 7 with mature technology and low cost, while the high-quality III-V gain medium can be epitaxially grown on its native or matching substrate. This separation and reintegration strategy avoids the need for multiple complex and defect-prone epitaxial growths in the III-V material system to produce photonic crystals, and also avoids the challenges of high-precision micro-nano processing on non-silicon-based materials.

[0053] In this embodiment, the gain component 2 is used to generate photons under electrical injection and provide initial gain for laser oscillation. The gain component 2 includes a semiconductor substrate 4, a carrier transport layer 51 of the first conductivity type, and an active layer 6. The semiconductor substrate 4 serves as the basis and mechanical support for epitaxial growth. The carrier transport layer 51 of the first conductivity type and the active layer 6 are stacked in sequence on the semiconductor substrate 4. The active layer 6 is located between the carrier transport layer 51 of the first conductivity type and the photonic crystal component 3 and is used for carrier injection and recombination luminescence. When a forward voltage is applied to both ends of the gain component 2, the carrier transport layer 51 of the first conductivity type is injected with carriers corresponding to the first conductivity type (such as electrons or holes). These carriers migrate to the active layer 6 under the action of the electric field and recombine in the active layer 6, converting energy into photons by radiative recombination. The material and structure of the active layer 6 (such as quantum wells, quantum dots) determine the wavelength and efficiency of the emitted photons.

[0054] In some embodiments, as Figure 2As shown, the carrier transport layer 5 includes a first conductivity type carrier transport layer 51 and a second conductivity type carrier transport layer 52, and the gain component 2 includes a semiconductor substrate 4, a first conductivity type carrier transport layer 51, an active layer 6 and a second conductivity type carrier transport layer 52; the semiconductor substrate 4 serves as the basis and mechanical support for epitaxial growth, the first conductivity type carrier transport layer 51, the active layer 6, and the second conductivity type carrier transport layer 52 are stacked in sequence on the semiconductor substrate 4, and the active layer 6 is located between the first conductivity type carrier transport layer 51 and the second conductivity type carrier transport layer. A PIN or PN junction structure is formed between the active layer 6 and the transport layer 52 for carrier injection and recombination luminescence; when a forward voltage is applied to both ends of the gain component, the carrier transport layer 51 of the first conductivity type is injected with carriers of the corresponding type (e.g., holes), and the carrier transport layer 52 of the second conductivity type is injected with carriers of another corresponding type (e.g., electrons). These carriers migrate to the active layer 6 under the action of the electric field and recombine within the active layer 6, converting energy into photons through radiative recombination. The material and structure of the active layer 6 (e.g., quantum wells, quantum dots) determine the wavelength and efficiency of the emitted photons. It is understandable that in some embodiments, in addition to the conductive function, the carrier transport layer 5 may also include a confinement layer for confining carriers and light within the active region to improve recombination efficiency and optical gain.

[0055] In this embodiment, the semiconductor substrate 4 is made of a III-V semiconductor material, such as an indium phosphide (InP) or gallium arsenide (GaAs) substrate, to match the crystal lattice of the subsequent epitaxial layer.

[0056] In this embodiment, the active layer 6 employs a multi-quantum well structure to improve gain and efficiency. It is understood that in some embodiments, the active layer 6 of the gain element 2 may also employ a quantum dot or quantum wire structure to optimize luminous efficiency and wavelength characteristics. It is understood that in some embodiments, a multi-layer active region structure, such as a multiple quantum well (MQW), may be designed to improve gain and efficiency.

[0057] In this embodiment, the first conductivity type carrier transport layer 51 can be, for example, an N-type doped InP layer or an AlGaAs layer, whose doping concentration and thickness are optimized; under forward bias, the first conductivity type carrier transport layer 51 effectively transports electrons (or holes, depending on the conductivity type and device design) from the semiconductor substrate 4 or the bottom electrode to the active layer 6. It will be appreciated that in some embodiments, the first conductivity type carrier transport layer 51 can include multiple sublayers with different doping or compositions to form a graded doping or band gradient structure to improve carrier injection efficiency.

[0058] In this embodiment, the photonic crystal component 3 is used to receive photons from the gain component 2, and realize diffraction coupling (surface emission) and distributed feedback (resonance) of light through the photonic crystal structure 8. The photonic crystal component 3 includes a silicon-on-insulator structure 7 and a photonic crystal structure 8 formed on the top silicon (Top silicon / Device Layer) of the silicon-on-insulator structure 7. The silicon-on-insulator structure 7 includes a silicon substrate layer (Handle Wafer / Bulk Silicon Substrate), a silicon dioxide insulating layer (Buried Oxide, BOX) and a top silicon (Top silicon / Device Layer); the silicon-on-insulator structure 7 serves as a supporting platform, and the photonic crystal structure 8 is fabricated on the top silicon of the silicon-on-insulator structure 7, with the top silicon directly in contact with the silicon dioxide insulating layer, and the silicon dioxide insulating layer is located between the top silicon and the silicon substrate layer.

[0059] In some embodiments, the photonic crystal structure 8 is specifically a refractive index modulation unit periodically arranged on the top silicon layer. Figure 3 As shown, the photonic crystal structure 8 is specifically an air hole array 9. In some embodiments, as Figure 4 As shown, the photonic crystal structure 8 is specifically a silicon pillar array 10 .

[0060] It is understandable that although silicon materials are widely used due to their mature processing technology and low loss characteristics in the communication band (usually greater than 1.1μm), in short-wavelength applications (such as visible light or ultraviolet bands), silicon materials will produce significant optical losses due to inter-band absorption. Therefore, for such short-wavelength applications, the periodic structure (such as "silicon pillars") in the photonic crystal structure 8 can be replaced by a columnar structure or periodic features composed of other dielectric materials that are transparent to the target wavelength. For example, silicon nitride (SiN) can be used as a photonic crystal material to form a silicon nitride pillar array, or an air hole array can be etched in the silicon nitride layer. Silicon nitride has good transparency and a high refractive index in the visible and near-infrared bands, and is suitable for constructing photonic crystals. Another solution is to use silicon oxide (SiO2) or other low-refractive-index dielectric materials as the main body, and form a periodic structure by filling a high-refractive-index material (such as TiO2, Ta2O5, etc.), or to etch air holes in a thicker silicon oxide layer. More broadly, any material system capable of periodic refractive index modulation and exhibiting low absorption at the operating wavelength can be used to construct photonic crystal structures8, such as polymers or other III-V semiconductor materials (if compatible with the gain layer material and process-permitted). The air hole array itself is a refractive index modulation method, and the selection of its substrate material also needs to consider its absorption characteristics at the operating wavelength.

[0061] Therefore, the design of the photonic crystal structure 8 is highly flexible. In addition to the diversity of material selection, its period, duty cycle, hole / column shape (such as circular, square, elliptical, rectangular or other complex shapes), lattice type (such as square lattice, triangular lattice, honeycomb lattice, etc.), and unit structure symmetry and other parameters can all be precisely designed and optimized according to the required operating wavelength, output beam characteristics (such as directionality, polarization state, beam shape), mode selection and coupling efficiency. For example, by adjusting the lattice constant and filling factor, the position and width of the photonic band gap can be precisely controlled, thereby achieving effective feedback and selective emission of light of a specific wavelength. By introducing specific defect structures (such as point defects, line defects) or phase shift regions, a high-quality factor resonant cavity can be formed in the photonic crystal, further enhancing the interaction between light and matter, or achieving fine control of the resonant mode, such as achieving single-mode operation or specific beam shaping. When light enters the photonic crystal structure 8 from the gain component 2, due to the periodic change in refractive index, the light will undergo Bragg diffraction, and the diffraction waves in a specific direction will be emitted perpendicular to the device surface, forming surface emission. At the same time, under specific conditions, the photonic crystal structure 8 will form a photonic bandgap or bandedge state, providing strong distributed feedback for light of a specific wavelength, forming an optical resonant cavity, and promoting laser oscillation. The silicon dioxide insulating layer in the silicon-on-insulator structure 7 has a low refractive index, which helps to confine the light in the photonic crystal structure 8 and reduce leakage to the substrate.

[0062] In some embodiments, the photonic crystal structure 8 may not be fabricated on SOI, but may use other insulating substrates with good optical properties and processing performance, such as quartz (Fused Silica), sapphire (Sapphire), silicon nitride (SiN) substrates, etc. It is then bonded to the III-V gain structure. In this embodiment, the top silicon is used to fabricate a high-precision photonic crystal structure, and its high refractive index and mature processing technology are key. The BOX layer is used to optically isolate the top silicon from the silicon substrate to form a strong light confinement similar to a waveguide, and the silicon substrate is used to provide mechanical support. It is understood that in some embodiments, the top silicon of the silicon-on-insulator structure 7 can be strained silicon to adjust its optical properties or lattice matching with the III-V material. It is understood that in some embodiments, the silicon substrate can use high-resistance silicon to reduce high-frequency losses. It is understood that in some embodiments, the BOX layer can use other insulating materials, such as a stack of silicon nitride (Si3N4) and silicon dioxide.

[0063] In this embodiment, the period, duty cycle, hole shape and other parameters of the photonic crystal structure 8 are designed according to the required operating wavelength and output beam characteristics. Figure 3 The air holes 9 shown or Figure 4The silicon pillar 10 shown, the photonic crystal structure 8 can also adopt other periodic patterns, such as elliptical holes, rectangular holes or other complex unit cell designs to achieve specific polarization control or beam shaping functions. It is understandable that in some embodiments, the photonic crystal structure 8 can be designed to have different symmetries (such as square lattices, hexagonal lattices) to achieve different light-emitting characteristics. It is understandable that in some embodiments, the photonic crystal structure 8 can adopt other complex photonic crystal unit shapes, such as a combination of L-shaped cavities, H-shaped cavities, etc., to optimize the shape and polarization characteristics of the output light beam. It is understandable that in some embodiments, defects or phase shift regions can be introduced into the photonic crystal structure 8 to adjust the resonant mode.

[0064] In this embodiment, a high-reflectivity distributed Bragg reflector (DBR) 15 is formed on the side of the photonic crystal structure 8 facing away from the active layer, that is, on the photonic crystal structure 8 of the photonic crystal component 3 by depositing a dielectric film (such as SiO2 / TiO2 multilayer film) to further enhance optical feedback, reduce the threshold current, improve the output power and beam quality, and enhance the quality factor and light extraction efficiency of the resonant cavity. It is understandable that in some embodiments, a microlens array can also be integrated on the top silicon of the photonic crystal component 3 to further improve the light beam quality.

[0065] In this embodiment, the photonic crystal structure 8 is directly formed in the top silicon of the silicon-on-insulator structure 7 through an etching process; the active layer 6, the carrier transport layer 5 and the III-V epitaxial wafer of the distributed Bragg reflector 15 can be integrated with the silicon-on-insulator structure 7 through a bonding process.

[0066] In some embodiments, as Figure 5As shown, other silicon optical devices 11 are integrated on one side of the top silicon or buried oxide layer of the silicon-on-insulator structure 7, such as a silicon waveguide 13, a silicon nitride waveguide 14, or a grating coupler 12. The silicon waveguide 13 is used to guide the optical signal emitted by the photonic crystal surface emitting laser 100 to other functional units on the chip; the silicon nitride waveguide 14 is a supplementary transmission medium for the silicon waveguide 13; the grating coupler 12 is a periodic structure based on the silicon waveguide 13, used to couple on-chip light to an external optical fiber or from an external optical fiber into the chip; and the modulator is used to modulate the laser at high speed. It is understood that in some embodiments, in addition to the photonic crystal structure 8, other passive or active silicon optical devices can be fabricated on the top silicon of the silicon-on-insulator structure 7. For example, a grating coupler 12 is formed by photolithography and etching processes to couple light emitted by the photonic crystal surface emitting laser 100 to an on-chip or off-chip optical fiber. It can be understood that in some embodiments, while fabricating the photonic crystal structure 8 on the silicon-on-insulator structure 7 (or other insulating platform), a transparent conductive electrode on the top or a distributed Bragg reflector 15 on the bottom (if light is emitted from the side of the silicon-on-insulator structure 7) is also fabricated.

[0067] In this embodiment, the active layer 6 of the gain element 2 is tightly bonded to the top silicon layer of the photonic crystal component 3 (i.e., the layer where the photonic crystal structure 8 is located) through bonding technology. The bonding interface is smooth and has good optical transmittance. It is understood that in some embodiments, the epitaxial layer can be first grown on the original III-V substrate, then temporarily bonded to a temporary carrier, the original substrate removed, and the exposed III-V epitaxial layer permanently bonded to the photonic crystal component 3 on the SOI. This method allows for more flexible processing of the III-V epitaxial layer.

[0068] like Figure 6 As shown, the present application provides an exemplary embodiment of a method for manufacturing a photonic crystal surface emitting laser (PCSEL). In this embodiment, the manufacturing method includes the following steps:

[0069] S1: providing a gain element 2, wherein the gain element 2 comprises a semiconductor substrate 4, a carrier transport layer 5 and an active layer 6 stacked in sequence.

[0070] In this embodiment, step S1 includes:

[0071] S101: Select a suitable III-V semiconductor substrate (such as InP);

[0072] S102: A carrier transport layer 5 and an active layer 6 are grown sequentially on the substrate by using epitaxial growth techniques such as metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE).

[0073] S103 : performing surface treatment on the carrier transport layer 5 so that the carrier transport layer 5 has a surface quality suitable for bonding.

[0074] S2: providing a photonic crystal component 3 , wherein the photonic crystal component 3 comprises a silicon-on-insulator structure 7 and a photonic crystal structure 8 formed on the silicon-on-insulator structure 7 .

[0075] In this embodiment, step S2 includes:

[0076] S201: Select an SOI wafer, the thickness of the top silicon layer and the thickness of the insulating layer can be determined according to design requirements.

[0077] S202: On the top silicon layer of the SOI wafer, a photonic crystal pattern is defined by electron beam lithography (EBL) or deep ultraviolet (DUV) lithography.

[0078] S203: The pattern is transferred to the top silicon layer by dry etching (such as inductively coupled plasma RIE, ICP-RIE) to form air holes or other photonic crystal structures. The etching depth needs to be precisely controlled.

[0079] In some embodiments, step S2 further includes step S204: if other silicon photonic devices need to be integrated, these devices can be manufactured on the same SOI wafer by similar photolithography and etching processes before or after manufacturing the photonic crystal pattern.

[0080] S3: combining the active layer 6 and the photonic crystal structure 8 by bonding, so as to realize light feedback and surface emission through the photonic crystal structure 8 when the active layer 6 emits light.

[0081] In this embodiment, step S3 includes:

[0082] S301: Perform precise chemical mechanical polishing (CMP) on the bonding surface of the gain component 2 (such as the carrier transport layer surface) and the bonding surface of the photonic crystal component 3 (the top silicon surface with the photonic crystal structure 8) to obtain extremely low surface roughness, and perform strict cleaning.

[0083] In some embodiments, before step S301, step S3 also includes step S303: pre-fabricating a metal contact pad or a dielectric layer at the bonding interface, achieving electrical connection and mechanical fixation through metal-metal bonding or dielectric bonding (such as oxide bonding), and at the same time may reduce the extremely high requirements for surface flatness.

[0084] S302: Align the bonding surfaces of the two components in a clean environment, and apply pressure and / or perform heat treatment to achieve direct bonding (such as annealing after hydrophilic bonding, or plasma activated bonding).

[0085] It can be understood that bonding methods are divided into wafer bonding and chip-level bonding according to the operation scale, and direct bonding can be used to achieve wafer bonding or chip-level bonding.

[0086] In some embodiments, a dielectric-assisted bonding process can be used. First, a thin layer of dielectric material (such as SiO2, Si3N4, BCB, SU-8, or other polymers) is deposited on one or both surfaces to be bonded. Bonding is then achieved using a process similar to direct bonding (such as annealing) or by leveraging the polymer's curing properties. This approach can relax the requirements for the original wafer's surface flatness, and the dielectric layer can act as a stress buffer or refractive index match.

[0087] In some embodiments, a metal-assisted bonding / hybrid bonding process may be used. First, corresponding metal pads (such as Cu-Cu, Au-Sn, In-Au) are pre-fabricated on the surface to be bonded, and then bonding is performed by hot pressing, ultrasonic welding, or at the metal eutectic temperature. Hybrid bonding generally refers to the embedding of metal pads in a dielectric (such as SiO2) to achieve direct metal-metal connection and surrounding dielectric-dielectric bonding. In this way, good mechanical connection and electrical interconnection can be achieved at the same time. The tolerance to surface flatness is relatively high.

[0088] In some embodiments, a surface activated bonding (SAB) process may be used. First, in an ultra-high vacuum environment, the surface to be bonded is bombarded with an ion beam or a neutral atom beam to remove the surface oxide layer and contaminants, exposing a pure atomic surface, and then directly contacting to form a strong metallic bond or covalent bond without heating.

[0089] In some embodiments, selective area bonding may be used to perform bonding only in key areas of the device, while other areas may be left empty or filled with other materials to achieve specific functions or reduce stress.

[0090] In some embodiments, most or all of the substrate on the III-V gain epitaxial wafer may be removed first to form a thin film gain structure, which is then bonded to the SOI platform on which the photonic crystal is fabricated.

[0091] In some embodiments, flip-chip bonding can be used to first fabricate the gain element (including electrodes) and then flip-chip bond it onto an SOI chip that already has the photonic crystal and corresponding electrodes / pads fabricated. The bonding interface is primarily a metal pad.

[0092] In some embodiments, PCSELs can be integrated with planar silicon photonic circuits, and PCSELs can be three-dimensionally stacked vertically with other functional layers (such as CMOS control circuits, MEMS scanning mirrors, etc.) through multi-layer bonding technology.

[0093] In some embodiments, the photonic crystal is fabricated on the top silicon layer, and the substrate silicon (handlewafer) of the silicon-on-insulator structure 7 is also processed into other passive optical elements (such as lenses, gratings), or serves as a platform for further integration.

[0094] In some embodiments, surface activated bonding, epitaxial lift-off (ELO) followed by bonding, laser-assisted bonding, selective area epitaxy (SAE), template-assisted growth, or integration of nanostructures such as quantum dots / nanowires may be employed.

[0095] It is understandable that wafer bonding can use a variety of bonding mechanisms, including direct bonding (such as hydrophilic bonding, plasma activated bonding), adhesive bonding (using an intermediate layer such as a polymer), metal bonding (such as eutectic bonding, thermocompression bonding, usually used to form electrical connections or interfaces with specific functions) or hybrid bonding (simultaneous bonding of metals and dielectrics), surface activated bonding.

[0096] Understandably, chip-level bonding can use a variety of bonding mechanisms, including direct bonding (if the chip surface is sufficiently flat and clean), adhesive bonding (very common), metal bonding (such as solder bumps in flip-chip bonding, alternative forms of gold wire bonding - thermal compression bonding or ultrasonic bonding), and advanced pick-and-place bonding technologies such as micro-transfer printing.

[0097] As will be understood, bonding methods include direct bonding, adhesive bonding, metal bonding, hybrid bonding, and advanced pick-and-place bonding techniques such as micro-transfer printing, performed at the wafer or chip scale. The specific integration method or bonding method chosen depends on one or more factors, including device design, performance requirements, cost, yield, and available manufacturing capacity. The specific method or bonding method can be determined based on actual needs or experiments and is not limited here.

[0098] The above-mentioned photonic crystal surface emitting laser and its manufacturing method, by separating and manufacturing the key components of the photonic crystal surface emitting laser 100 and integrating them through bonding, have the following beneficial effects:

[0099] 1. Simplified manufacturing process: Avoids the difficulty of multiple complex heteroepitaxial growth and direct fine photonic crystal etching on III-V materials.

[0100] 2. Reduced manufacturing costs and improved yield: Each module can independently optimize the process, reducing the risk of overall process failure.

[0101] 3. Improved device design flexibility: gain materials and photonic crystal structures can be optimized and designed independently.

[0102] 4. Easy to achieve large-scale, low-cost integration with silicon photonics platforms: It provides an effective way to combine high-performance on-chip light sources with complex silicon photonic circuits.

[0103] The photonic crystal surface emitting laser 100 and its manufacturing method can be applied in at least the following application scenarios:

[0104] 1. Optical communication and optical interconnection: As the light source in high-speed, large-capacity optical communication systems, it is used for optical interconnection within data centers and between servers, as well as for future higher-speed optical transceiver modules.

[0105] 2. LiDAR: LiDAR systems are used in autonomous vehicles, robots, drones, and other fields to achieve high-precision three-dimensional environmental perception. The beam controllability and surface emission properties of the photonic crystal surface emitting laser 100 give it advantages.

[0106] 3. Sensing applications: Used in gas sensing, biosensing, structural health monitoring and other fields, its narrow linewidth and high stability laser output can be utilized.

[0107] 4. Industrial processing and display: At specific power and wavelength, it can be used in industrial fields such as laser marking and micromachining, or as a light source in projection display, augmented reality (AR) / virtual reality (VR) equipment.

[0108] 5. Medical diagnosis and treatment: used in medical equipment such as optical coherence tomography (OCT) and laser surgery.

[0109] 6. Quantum information processing: as a light source in integrated quantum photonic chips.

[0110] For those skilled in the art, it is obvious that the present application is not limited to the details of the above-mentioned exemplary embodiments, and the present application can be implemented in other specific forms without departing from the spirit or basic features of the present application. Therefore, no matter from which point of view, the embodiments should be regarded as exemplary and non-restrictive, and the scope of the present application is defined by the appended claims rather than the above description, and it is intended that all changes that fall within the meaning and scope of the equivalent elements of the claims are included in the present application. Any figure mark in the claims should not be regarded as limiting the claims involved. The above content is only a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto, and any changes or replacements within the technical scope disclosed in the present application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A photonic crystal surface emitting laser, characterized in that: include: A gain component, the gain component comprising a semiconductor substrate, a carrier transport layer, and an active layer stacked in sequence; A photonic crystal component, the photonic crystal component comprising a silicon-on-insulator structure and a photonic crystal structure formed on the silicon-on-insulator structure; The active layer is combined with the photonic crystal structure by bonding, so that light feedback and surface emission are achieved through the photonic crystal structure when the active layer emits light.

2. The photonic crystal surface emitting laser according to claim 1, wherein: The photonic crystal structure is a periodic structure.

3. The photonic crystal surface emitting laser according to claim 2, wherein: The periodic structure includes periodically arranged air holes or silicon pillars.

4. The photonic crystal surface emitting laser according to claim 1, wherein The photonic crystal component further includes a silicon optical device formed below the photonic crystal structure.

5. The photonic crystal surface emitting laser according to claim 4, characterized in that The silicon optical device is selected from at least one of a grating coupler, a silicon waveguide, and a silicon nitride waveguide.

6. The photonic crystal surface emitting laser according to claim 1, wherein The bonding method is wafer bonding or chip-level bonding.

7. The photonic crystal surface emitting laser according to claim 1, wherein: The bonding method is direct bonding.

8. The photonic crystal surface emitting laser according to claim 1, wherein The carrier transport layer includes a first conductivity type carrier transport layer, and the active layer is located between the first conductivity type carrier transport layer and the photonic crystal component.

9. The photonic crystal surface emitting laser according to claim 8, characterized in that The carrier transport layer further includes a carrier transport layer of a second conductivity type, and the active layer is located between the carrier transport layer of the first conductivity type and the carrier transport layer of the second conductivity type.

10. A method for manufacturing a photonic crystal surface emitting laser, characterized in that: The method is applied to the photonic crystal surface emitting laser according to any one of claims 1 to 9, and the method comprises: Providing a gain component, the gain component comprising a semiconductor substrate, a carrier transport layer, and an active layer stacked in sequence; Providing a photonic crystal component, the photonic crystal component comprising a silicon-on-insulator structure and a photonic crystal structure formed on the silicon-on-insulator structure; The active layer is combined with the photonic crystal structure by bonding, so that light feedback and surface emission are achieved through the photonic crystal structure when the active layer emits light.

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