Embedded circuit packaging substrate containing substrate core and manufacturing method thereof

Abstract

The invention relates to the field of packaging substrates, in particular to an embedded circuit packaging substrate containing a substrate core and a manufacturing method of the embedded circuit packaging substrate. The base plate comprises a first base plate surface and a second base plate surface which are opposite to each other, the base plate contains a core plate, and the core plate comprises a first core plate surface and a second core plate surface which are opposite to each other; a first circuit layer is embedded in the first surface of the substrate, and a second circuit layer and a third circuit layer are distributed between the first surface of the substrate and the first surface of the core plate; metal columns are distributed in the substrate, and the metal columns are connected with the first circuit layer, the second circuit layer and the third circuit layer. According to the embedded circuit packaging substrate, fine circuits can be arranged on the embedded circuit packaging substrate, meanwhile, the overall rigidity of the substrate is enhanced, warping of the substrate can be effectively reduced, the size of the substrate is increased, more original parts are integrated, and the technical level of the semiconductor packaging technology is greatly improved.

Description

Technical Field

[0001] The present invention relates to the field of packaging substrates, and in particular to an embedded circuit packaging substrate containing a substrate core and a manufacturing method thereof. Background Art

[0002] The current and upcoming period will be a critical strategic opportunity and a critical juncture for the development of my country's integrated circuit and chip technology. Strengthening independent R&D in integrated circuit and chip technology, developing and achieving breakthroughs in key technologies, and possessing independent intellectual property rights are currently crucial strategic imperatives for my country, as they strive to achieve high-quality development in the integrated circuit and chip industry. Chip packaging is a crucial component of the semiconductor industry. It serves as the interconnection channel between the chip and external signals, and also provides multiple functions for securing, sealing, dissipating heat, and protecting the bare chip. As my country's semiconductor technology enters a critical phase, advanced packaging will be one of the key areas of technological advancement that my country must focus on. Among the many advanced packaging technologies, fine circuit fabrication is a key area. This technology primarily includes three processes: tenting (subtractive fabrication), MSAP (modified semi-additive fabrication), and embedded circuit (ETS). These three processes achieve varying degrees of circuit fineness, and their varying complexity also results in varying costs. Embedded circuit substrates produced using the embedded circuit process produce the finest circuitry. Existing embedded circuit substrates utilize a coreless substrate process, which is used in applications with demanding space requirements and dense I / O counts, such as memory chips. However, existing embedded circuit substrates cannot be made larger in size, generally not exceeding 15 mm×15 mm in size. This size limits the number of semiconductors that can be integrated into the embedded circuit substrate. Summary of the Invention

[0003] The present invention aims to solve the above-mentioned related problems and designs a buried circuit package substrate containing a substrate core and a method for manufacturing the same. To achieve the above-mentioned purpose, the present invention provides the following solutions: A buried circuit package substrate containing a substrate core, characterized in that the substrate includes a first substrate surface and a second substrate surface facing each other, the substrate contains a core board, the core board includes a first core board surface and a second core board surface facing each other; the first substrate surface and the first core board surface are located on the same side, and the second substrate surface and the second core board surface are located on the same side; One or more circuit layers are arranged between the first surface of the substrate and the first surface of the core board, the first circuit layer is buried in the first surface of the substrate, and the other circuit layers are located between the first surface of the substrate and the first surface of the core board; Metal pillars are arranged in the substrate, and the metal pillars are connected to the circuit layer.

[0004] As a further improvement of the present technical solution, the core board is made of glass or organic board.

[0005] As a further improvement of the present technical solution, a solder mask layer is provided on the first surface of the substrate.

[0006] As a further improvement of the technical solution, the second surface of the substrate is provided with solder ball pads, and the solder ball pads are connected to the metal pillars.

[0007] As a further improvement of the present technical solution, the second surface of the substrate is covered with a solder mask except for the area where the solder ball pads are arranged.

[0008] A method for manufacturing an embedded circuit package substrate containing a substrate core comprises the following steps: S101. Manufacturing an intermediate substrate, wherein the intermediate substrate is two transition package substrates temporarily pressed onto both sides of a transition carrier; the surface of the intermediate substrate is embedded with a first circuit layer, and the interior of the intermediate substrate contains a second circuit layer and a third circuit layer; S102. A first dielectric is stacked on both sides of the intermediate carrier; S103. The core plates are stacked on both sides of the middle carrier plate; S104. Stacking a second dielectric on both sides of the intermediate carrier; S105. Forming a metal column and the circuit layer of the intermediate carrier board connected; S106. Remove the transition carrier of the intermediate substrate, and flash-etch the side of the embedded package substrate connected to the temporary transition carrier; S107. Arrange solder mask; S108. Arrange solder ball pads on the surface of the metal pillar.

[0009] As a further improvement of the present technical solution, the core board is a glass core board, and the glass core board has pre-processed through holes.

[0010] As a further improvement of this technical solution, the method for manufacturing the intermediate substrate is: S1. Laminating a first copper foil and a second copper foil on both sides of a transition carrier, wherein the first and the transition carrier are connected, and the second copper foil is connected to the first copper foil; S2. forming a first wiring layer on the second copper foil; S3. Laminating the first dielectric to form a metal column; S4. Forming a second wiring layer, and connected to the first wiring layer through metal pillars; S5. Laminating the second dielectric to form a metal column; S6. Form a third wiring layer and connect it to the second wiring layer through metal pillars.

[0011] As a further improvement of the present technical solution, the thickness of the first copper foil is 18 um, and the thickness of the second copper foil is 5 um or 3 um.

[0012] A method for manufacturing an embedded circuit package substrate containing a substrate core comprises the following steps: S201. Temporarily pressing two embedded package substrates onto both sides of a transition carrier; a first circuit layer is embedded in the surface of the embedded package substrate, and a second circuit layer and a third circuit layer are contained within the embedded package substrate; a side of the embedded package substrate embedded in the first circuit layer is connected to the transition carrier; S202. Stacking a first dielectric on the side of the embedded package substrate that is not connected to the transition carrier; S203. The core board is stacked on the side of the embedded package substrate that is not connected to the transition carrier; S204. Stacking a second dielectric on the side of the embedded package substrate that is not connected to the transition carrier; S205. Forming a metal column and a circuit layer connected to the embedded package substrate; S206. Remove the transition carrier; S207. Arrange solder mask; S208. Arrange solder ball pads on the surface of the metal pillar. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Various other advantages and benefits will become apparent to those skilled in the art by reading the detailed description of the preferred embodiment below. The accompanying drawings are only for the purpose of illustrating the preferred embodiment and are not to be considered as limiting the present invention; Figure 1 This is a schematic structural diagram of an embedded circuit packaging substrate containing a substrate core according to the present invention; Figure 2-1 to Figure 2-5 A schematic cross-sectional view of a manufacturing process of an intermediate substrate of an embedded circuit packaging substrate containing a substrate core according to the present invention; Figure 3-1 to Figure 3-5 A cross-sectional schematic diagram of a manufacturing process of an embedded circuit packaging substrate containing a substrate core according to the present invention; Figure 4-1 to Figure 4-5 The figure is a cross-sectional schematic diagram of the manufacturing process of another embedded circuit package substrate containing a substrate core according to the present invention. DETAILED DESCRIPTION

[0014] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0015] Those skilled in the art will appreciate that, unless otherwise stated, the singular forms "a," "an," and "the" used herein may also include plural forms. It should be further understood that the term "comprising" used in the specification of the present invention refers to the presence of the stated features, integers, steps, operations, elements, and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0016] The present invention will be described in detail below with reference to the accompanying drawings.

[0017] Example 1:

[0018] like Figure 1 As shown, a structural schematic diagram of an embedded circuit packaging substrate containing a substrate core.

[0019] The substrate includes a first substrate surface 100 and a second substrate surface 200 relative to each other, and the substrate contains a core board 300, which includes a first core board surface 301 and a second core board surface 302 relative to each other; the first substrate surface 100 and the first core board surface 301 are located on the same side, and the second substrate surface 200 and the second core board surface 302 are located on the same side; the first substrate surface 100 is buried in the first circuit layer 102, that is, the first circuit layer 102 is embedded in the first substrate surface 100.

[0020] A second circuit layer 104 and a third circuit layer 106 are arranged between the substrate first surface 100 and the core first surface 301. Dielectric insulation is provided between the first circuit layer 102, the second circuit layer 104, and the third circuit layer 106. Metal pillars 103 connect the first circuit layer 102, the second circuit layer 104, and the third circuit layer 106 to achieve electrical continuity between the circuit layers.

[0021] The core board 300 may be made of glass or resin, such as epoxy glass fiber laminate, polyester resin glass fiber laminate, polyimide resin glass fiber circuit board, etc.

[0022] The first surface 100 of the substrate is covered with a solder mask layer. Except for the first circuit layer 102 embedded in the first surface 100 of the substrate for connection with external circuits, components or devices, the first surface 100 of the substrate and the first circuit layer 102 are covered by the solder mask layer 101 to protect the substrate and the circuits, prevent the influence of external moisture, dust and mechanical wear on the substrate, and enhance the electrical performance of the substrate.

[0023] Solder ball pads 202 are arranged on the second surface 200 of the substrate. Solder ball pads 202 are connected to metal pillars 103. The diameter of solder ball pads 202 is designed to ensure easy alignment with metal pillars 103. Metal pillars 103 pass through the core board 300, connecting solder ball pads 202 and the third circuit layer 106. Except for the area where solder ball pads 202 are arranged, the entire second surface 200 of the substrate is covered with a solder mask 201.

[0024] Example 2:

[0025] like Figure 2-1 to Figure 2-5 FIG. 1 is a cross-sectional schematic diagram of a manufacturing process of an intermediate substrate of an embedded circuit package substrate containing a substrate core.

[0026] A first copper foil 401 and a second copper foil 402 are heat-pressed onto both sides of a transition carrier 400. The transition carrier 400 is a removable core board made of resin. The first copper foil 401 is directly attached to the transition carrier 400 and is 18 μm thick. The second copper foil 402, 5 μm thick, covers the first copper foil 401.

[0027] After removing particles, organic matter, and other contaminants from the surface of the transition carrier and drying the surface, photoresist is applied to the second copper foil. Spin coating, thin film lamination, or spray coating can be used for applying the photoresist. After the photoresist dries, the circuit image corresponding to the first circuit layer 102 is projected onto the photoresist through mask irradiation. A developing technique is used to obtain the circuit diagram corresponding to the first circuit layer 102 on the photoresist. Development can be performed using puddle development, immersion development, or spray development. After development is completed, copper electroplating is performed on the photoresist. After copper is deposited, the first circuit layer 102 is formed. After stripping the dry film on the surface of the first circuit layer 102, a layer of dielectric is pressed onto the outside of the first circuit layer 102. Then, holes are created in the dielectric surface using laser or mechanical drilling, with the holes being deep enough to expose the first circuit layer 102. After cleaning and removing impurities from the hole, a seed layer is deposited on the inner wall of the hole and the surface of the dielectric. Then, through electroplating, a metal pillar 103 is formed within the hole, along with a copper layer 104a on the dielectric surface connected to the metal pillar 103. After electroplating, the intermediate substrate is annealed to even out the copper grain distribution, improve copper electromigration reliability, and reduce its resistivity. Because the surface of the electroplated copper layer is uneven, chemical mechanical polishing is also required to remove excess copper, ensuring a flat and uniform copper layer 104a on the dielectric surface.

[0028] The second circuit layer 104 is processed on the copper layer 104a. Photoresist is laid on the copper layer 104a. After the photoresist dries, the circuit image corresponding to the second circuit layer 104 is projected onto the photoresist through mask irradiation. The circuit diagram corresponding to the second circuit layer 104 is obtained on the photoresist using development technology. After the development is completed, a copper electroplating process is performed on the photoresist. After the copper element is deposited, the second circuit layer 104 is formed. After the dry film on the surface of the second circuit layer 104 is peeled off, a layer of dielectric is pressed onto the outside of the second circuit layer 104. Then, a hole is made on the dielectric surface by laser or mechanical drilling. The hole is deep enough to expose the second circuit layer 104. After cleaning to remove impurities in the hole, a seed layer is deposited on the inner wall of the hole and the surface of the dielectric. Then, a metal column 103 and a copper layer are formed in the hole through electroplating filling process.

[0029] Repeat the above steps to form the second dielectric layer and the third circuit layer 106, thereby obtaining the intermediate substrate.

[0030] Example 3:

[0031] like Figure 3-1 to Figure 3-5 FIG. 1 is a cross-sectional diagram of a manufacturing process of an embedded circuit package substrate containing a substrate core.

[0032] A first dielectric is placed on both sides of the intermediate carrier, and then a core board 300 is stacked on both sides of the intermediate substrate. The core board is a glass core board and has pre-processed through holes. The glass core board with pre-processed through holes is used because the technical requirements for the production of through holes in the glass core board are relatively high, and it is necessary to prevent the glass core board from being dismantled due to unqualified through hole processing. Ultrasonic drilling, wet etching, deep reactive ion etching, photosensitive etching, laser etching, laser induced deep etching, and focused discharge hole forming technologies can be used to process through holes on the glass core board. After drilling is completed, it is necessary to clean the glass slag, glue, and dust remaining in the hole, and check whether there is any residue, and whether the core board has not been completely opened and closed during the processing process, and whether there are defects such as pits and scratches on the surface of the core board. Only the core boards 300 that have been processed to the best of their ability can be stacked on both sides of the intermediate carrier. Dielectrics are stacked on both sides of the core board 300. After stacking, the holes in the glass core board are re-drilled at the original through-hole locations using laser or other drilling techniques until the third circuit layer 106 is exposed. A seed layer of metal is formed in the hole, and copper is then deposited to form metal pillars 103. The intermediate substrate's transition carrier 400 is removed, and the intermediate substrate is split into two pieces, resulting in two embedded circuit package substrates containing substrate cores to be further processed. The sides of the embedded circuit package substrate containing the substrate core and the intermediate substrate connected to the transition carrier are flash-etched, and excess copper is removed by chemical etching, physical etching, or mixed etching to obtain the circuit layer 102 embedded in the substrate surface. A solder mask is placed on the surface of the embedded circuit package substrate containing the substrate core. The first surface 100 of the substrate containing the embedded circuit layer 102 and the first circuit layer 102 are covered with a solder mask 101, except for the connection between the circuit layer 102 and the external circuit, component, or device. The second surface 200 of the substrate is covered with a solder mask layer 201 except for the position where the solder ball pad 202 is arranged. The solder mask layer can be applied in liquid or dry film form, and then an area not covered by the solder mask layer is reserved on the solder mask layer through exposure and development processes, and finally the solder mask layer is cured. When reserving the position of the solder ball pad 202, it is necessary to be able to arrange a solder ball pad larger than 300um to ensure that the solder ball pad 202 and the metal column 103 can be smoothly connected. Before arranging the solder ball pad 202, the area reserved for the solder ball pad 202 must first be surface treated to enhance solderability, and then the solder ball pad 202 must be fixed in the reserved position using ball planting equipment, and then reflow soldering is performed to ensure that the solder ball pad and the substrate can be tightly combined.

[0033] Example 4:

[0034] like Figure 4-1 to Figure 4-5 FIG. 1 is a cross-sectional view of another process for manufacturing an embedded circuit package substrate containing a substrate core.

[0035] Two embedded package substrates are temporarily pressed onto both sides of a transition carrier 500. The embedded package substrates lack a substrate core; instead, the first circuit layer 102 is embedded within their surface, and the second and third circuit layers 104 and 106 are contained within their interior. The side of the embedded package substrate embedded within the first circuit layer 102 is connected to the transition carrier 500.

[0036] A dielectric is stacked on the side of the embedded package substrate not connected to the transition carrier, and a core board 300 is stacked on top of the dielectric. The core board is made of resin. The dielectric is then stacked on top of the core board. Subsequently, a hole is drilled in the core board using a laser or mechanical method, deep enough to expose the third circuit layer 106 of the embedded package substrate. After drilling, the hole is cleaned of any residual resin, glue, and dust, and inspected for any residue. After cleaning, a seed layer of metal is formed in the hole, followed by copper deposition to form metal pillars 103, which are connected to the third circuit layer 106. The transition carrier 500 is removed, resulting in two embedded circuit package substrates containing substrate cores ready for further processing. A solder mask is applied to the surfaces of the embedded circuit package substrates containing substrate cores. The first surface 100 of the substrate containing the embedded circuit layer 102 and the first circuit layer 102 are covered with a solder mask 101, except for the connection between the circuit layer 102 and external circuits, components, or devices. The second surface 200 of the substrate is covered with a solder mask layer 201 except for the position where the solder ball pad 202 is arranged. The solder mask layer can be applied in liquid or dry film form, and then an area not covered by the solder mask layer is reserved on the solder mask layer through exposure and development processes, and finally the solder mask layer is cured. When reserving the position of the solder ball pad 202, it is necessary to be able to arrange a solder ball pad larger than 300um to ensure that the solder ball pad 202 and the metal column 103 can be smoothly connected. Before arranging the solder ball pad 202, the area reserved for the solder ball pad 202 must first be surface treated to enhance solderability, and then the solder ball pad 202 must be fixed in the reserved position using ball planting equipment, and then reflow soldering is performed to ensure that the solder ball pad and the substrate can be tightly combined.

[0037] In summary, the present invention proposes an embedded circuit packaging substrate containing a substrate core and a manufacturing method thereof. This packaging substrate not only ensures that the embedded circuit packaging substrate can be arranged with refined circuits, but also enhances the overall rigidity of the substrate, can effectively reduce the warping of the substrate, and increase the size of the substrate, thereby integrating more components, greatly improving the technical level of the semiconductor packaging process.

Claims

1. A buried circuit package substrate containing a substrate core, characterized in that: The substrate includes a first substrate surface and a second substrate surface facing each other, the substrate contains a core board, and the core board includes a first core board surface and a second core board surface facing each other; the first substrate surface and the first core board surface are located on the same side, and the second substrate surface and the second core board surface are located on the same side; One or more circuit layers are arranged between the first surface of the substrate and the first surface of the core board, the first circuit layer is buried in the first surface of the substrate, and the other circuit layers are located between the first surface of the substrate and the first surface of the core board; Metal pillars are arranged in the substrate, and the metal pillars are connected to the circuit layer.

2. The embedded circuit package substrate containing a substrate core according to claim 1, characterized in that: The core board is made of glass or organic board.

3. The embedded circuit package substrate containing a substrate core according to claim 1, characterized in that: The first surface of the substrate is covered with a solder resist layer.

4. The embedded circuit package substrate containing a substrate core according to claim 1, characterized in that: The second surface of the substrate is provided with solder ball pads, and the solder ball pads are connected to the metal pillars.

5. The embedded circuit package substrate containing a substrate core according to claim 4, characterized in that: The second surface of the substrate is covered with a solder mask except for a portion where solder ball pads are arranged.

6. A method for manufacturing an embedded circuit package substrate containing a substrate core according to any one of claims 1 to 5, characterized in that: The following steps are involved: S101. Manufacturing an intermediate substrate, wherein the intermediate substrate is two transition substrates temporarily pressed onto both sides of a transition carrier; the surface of the intermediate substrate is embedded with a first circuit layer, and the interior of the intermediate substrate contains a second circuit layer and a third circuit layer; S102. A first dielectric is stacked on both sides of the intermediate carrier; S103. The core plates are stacked on both sides of the middle carrier plate; S104. Stacking a second dielectric on both sides of the intermediate carrier; S105. Forming a metal column and the circuit layer of the intermediate carrier board connected; S106. Remove the transition carrier of the intermediate substrate, and flash-etch the side of the embedded package substrate connected to the temporary transition carrier; S107. Arrange solder mask; S108. Arrange solder ball pads.

7. The method for manufacturing a buried circuit package substrate containing a substrate core according to claim 6, characterized in that: The core board is a glass core board, and the glass core board has pre-processed through holes.

8. The method for manufacturing an embedded circuit package substrate containing a substrate core according to claim 6, wherein: The method for manufacturing the intermediate substrate is as follows: S1. Laminating a first copper foil and a second copper foil on both sides of a transition carrier, wherein the first copper foil is connected to the transition carrier, and the second copper foil is connected to the first copper foil; S2. forming a first wiring layer on the second copper foil; S3. Laminating the first dielectric to form a metal column; S4. Forming a second wiring layer, and connected to the first wiring layer through metal pillars; S5. Laminating the second dielectric to form a metal column; S6. Form a third wiring layer and connect it to the second wiring layer through metal pillars.

9. The method for manufacturing an embedded circuit package substrate containing a substrate core according to claim 8, wherein: The thickness of the first copper foil is 18 μm, and the thickness of the second copper foil is 5 μm or 3 μm.

10. A method for manufacturing an embedded circuit package substrate containing a substrate core according to any one of claims 1 to 5, characterized in that: The following steps are involved: S201. Temporarily pressing two embedded package substrates onto both sides of a transition carrier; a first circuit layer is embedded in the surface of the embedded package substrate, and a second circuit layer and a third circuit layer are contained within the embedded package substrate; a side of the embedded package substrate embedded in the first circuit layer is connected to the transition carrier; S202. Stacking a first dielectric on the side of the embedded package substrate that is not connected to the transition carrier; S203. The core board is stacked on the side of the embedded package substrate that is not connected to the transition carrier; S204. Stacking a second dielectric on the side of the embedded package substrate that is not connected to the transition carrier; S205. Forming a metal column and a circuit layer connected to the embedded package substrate; S206. Remove the transition carrier; S207. Arrange solder mask; S208. Arrange solder ball pads on the surface of the metal pillar.

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