Preparation method of detector and detector

Abstract

According to the preparation method of the detector provided by the invention, the amorphous layer is prepared by adopting a melt quenching technology, the amorphous layer is cooled on the surface of the substrate to form the amorphous film layer, and the amorphous film layer is heated to be liquefied. The liquefied amorphous film layer is bonded with a single crystal, the single crystal is formed on the surface of the amorphous film layer after cooling, and an electrode layer is prepared on the surface of the single crystal. According to the detector provided by the invention, due to the fact that an amorphous material has strong interface adhesion, tight electrical connection is constructed between a functional layer and a substrate; the amorphous buffer layer has no grain boundary, so that a grain boundary recombination center is thoroughly eliminated, and efficient transmission of carriers is ensured; the amorphous material has strong plastic deformation capacity, the interface does not need to follow a strict lattice matching mode, and the amorphous material has less interface stress and interface defects; the amorphous material can fill interface holes and cracks and passivate interface defects.

Description

Technical Field

[0001] The present application relates to the field of semiconductor material technology, and in particular to a method for preparing a detector and the detector. Background Art

[0002] Semiconductor materials are expanding from traditional silicon-based materials to wide-bandgap materials (GaN, SiC, and perovskites), while organic and oxide semiconductors are being introduced into emerging fields such as flexible electronics and bioelectronics. Differences in lattice constants and coefficients of thermal expansion (CTE) between these materials lead to interfacial stresses, necessitating the use of buffer layer technology to achieve mechanical adaptation and defect suppression at the heterogeneous interface to ensure device reliability.

[0003] In the integrated technology of semiconductor and circuit board, the mainstream buffer layer technology can be divided into the following four categories, including polycrystalline / single crystal buffer layer, polymer buffer layer and nanostructured buffer layer. Typical materials of single crystal buffer layer are aluminum nitride (AIN), aluminum oxide (Al2O3), and silicon carbide (SiC). For example, in GaN / Si integration, single crystal AIN buffer layer can reduce the dislocation density from 10 10 cm -2 Down to 10 8 cm -2 , while lattice mismatch stress is alleviated through gradient component design (AIGAN transition layer). Typical materials for polycrystalline buffer layers include polycrystalline AIN, polycrystalline Al2O3, and polycrystalline SiC. Compared with single crystals, polycrystalline structures do not need to maintain strict lattice matching with the substrate, their fracture toughness is higher than that of single crystals, and the grain boundaries can serve as stress release channels, which can better disperse stress. For example, polycrystalline AIN absorbs thermal stress through grain boundary microslip during thermal cycling, and polycrystalline Al2O3 grain boundaries can prevent dislocations from extending into the functional layer. For polymer buffer layers, typical materials include polydimethylsilane (PDMS), polyimide (PI), polymethyl methacrylate (PMMA), and anisotropic conductive adhesive (ACA). They can be prepared by spin coating / printing processes, and the dynamic relaxation behavior of their molecular segments can absorb interface stress and effectively reduce interface cracks. For example, inserting a high-viscosity polymer layer ACA between the MAPbI3 perovskite layer and the TFT (thin-film transistor array) can significantly reduce or eliminate interface cracks. Typical materials for nanostructured buffer layers include nanopillar arrays and porous Al2O3. Their nanoscale geometry (pores / pillars) effectively absorbs stress. For example, nanopillars disperse interfacial stress through elastic deformation. A 50% porosity porous Al2O3 reduces the elastic modulus from 300 GPa to 80 GPa, achieving a thermal stress release efficiency of 85%.

[0004] For single-crystal buffer layers, strict lattice matching with the substrate material is required; otherwise, the interface dislocation density increases. Single-crystal buffer layers require precise control of epitaxial parameters, resulting in low yields and increased production costs. For polycrystalline buffer layers, grain boundaries induce defects and carrier scattering. For example, interfacial dangling bonds and dislocations significantly increase the defect state density, and potential barriers at grain boundaries hinder carrier transport, leading to increased resistivity. Furthermore, polycrystalline materials rely on grain boundary slip to release stress, but the uneven distribution of grain sizes results in incomplete stress release efficiency. For polymer buffer layers, while dynamic relaxation of their molecular chains can absorb stress in the short term, they are susceptible to chain segment breakage or interfacial debonding due to environmental aging (such as humidity and oxidation) over long-term service, leading to performance degradation. Furthermore, polymers have poor electrical and thermal conductivity, which is not conducive to carrier transport. For example, inserting a high-viscosity polymer layer (ACA) between the MAPbI3 perovskite layer and the TFT (thin-film transistor array) can rapidly degrade the imaging performance of the X-ray detector. For the nanostructured buffer layer, it needs to be realized through precisely controlled chemical vapor deposition (CVD) or molecular beam epitaxy (MBE) technology. The process parameters have low tolerance and are prone to introducing interface defects. Summary of the Invention

[0005] In view of this, it is necessary to provide a method for preparing a detector and a detector that can systematically solve the problems of lattice mismatch, thermal stress accumulation and process compatibility in traditional semiconductor integration in order to address the defects of the existing technology.

[0006] To solve the above problems, this application adopts the following technical solutions:

[0007] One of the purposes of this application is to provide a detector, comprising the following steps:

[0008] An amorphous layer is prepared by a melt quenching technique and the amorphous layer is cooled on a substrate surface to form an amorphous film layer;

[0009] The amorphous film layer is subjected to a heating treatment to liquefy it, the liquefied amorphous film layer is bonded to the single crystal, and after cooling, the single crystal is formed on the surface of the amorphous film layer;

[0010] An electrode layer is prepared on the surface of the single crystal.

[0011] In some embodiments, in the step of preparing an amorphous layer by melt quenching technology and cooling the amorphous layer on the surface of a substrate to form an amorphous film layer, the amorphous layer is at least one of an amorphous MTP3Bi2I9 layer, an amorphous MTP3Bi2Br9 layer, an amorphous (IPA)2PbI4 layer, or an amorphous (DMIPA)2PbI4 layer.

[0012] In some embodiments, the preparation method of the amorphous MTP3Bi2I9 layer is as follows: MTPI and BiI3 are mixed in a molar ratio of 3:2, and the mixture is heated to melt the mixture; the melted solution is placed in a preheated mold to remove bubbles, and then heated to completely melt it; the melted ionic liquid is scraped onto a substrate and cooled to form an amorphous film.

[0013] In some embodiments, the step of heating the amorphous film layer to liquefy it, bonding the liquefied amorphous film layer to the single crystal, and cooling the amorphous film layer to form the single crystal on the surface of the amorphous film layer specifically includes the following steps:

[0014] A single crystal is placed in the pixel area of ​​the substrate, the amorphous film layer is heated to liquefy it, the liquefied amorphous film layer is bonded to the single crystal, and after stopping heating, the amorphous film layer solidifies again so that the single crystal is tightly bonded to the surface of the amorphous film layer.

[0015] In some embodiments, the single crystal includes a perovskite single crystal or a Group III-V semiconductor or CdTe or CdZnTe, and the perovskite single crystal includes but is not limited to an all-inorganic perovskite single crystal or an organic-inorganic perovskite single crystal or a halide perovskite single crystal or a complex cation perovskite single crystal or a complex halide perovskite single crystal.

[0016] In some embodiments, the perovskite single crystal is a FAPbBr3 perovskite single crystal, and the preparation method of the FAPbBr3 perovskite single crystal is as follows: FABr and PbBr2 are mixed in a molar ratio of 1:1, and then a solvent is added to prepare a perovskite precursor solution; the perovskite precursor solution is placed at room temperature and stirred to become a clear liquid, and then placed in an oil bath for heating. After a small number of crystal nuclei appear, the oil bath temperature is lowered to 34°C, the critical temperature for crystal growth, and then increased by 1°C every day to promote continuous crystal growth. The FAPbBr3 perovskite single crystal can be collected after one week.

[0017] In some embodiments, the step of preparing an electrode layer on the surface of the single crystal specifically includes the following steps: evaporating an electrode layer on the surface of the single crystal, wherein the electrode layer includes a metal electrode, a semiconductor electrode, a carbon material electrode, or a composite material electrode.

[0018] In some embodiments, the substrate includes but is not limited to a pixel circuit board or conductive glass, and the pixel circuit board includes TFT or CMOS.

[0019] In some embodiments, the detector includes an X-ray detector, a Gamma detector, an α-particle detector, an LED detector, an ultraviolet detector, an infrared detector, a visible light detector, or a flexible device.

[0020] The second purpose of this application is to provide a detector, characterized in that it is prepared by the preparation method.

[0021] This application adopts the above technical solution, and its beneficial effects are as follows:

[0022] The preparation method of the detector provided in the present application adopts the melt quenching technology to prepare an amorphous layer and cool the amorphous layer on the surface of the substrate to form an amorphous film layer, the amorphous film layer is heat-treated to liquefy it, the liquefied amorphous film layer is bonded to the single crystal and cooled to form the single crystal on the surface of the amorphous film layer, and an electrode layer is prepared on the surface of the perovskite single crystal. The detector provided in the present application has a tight electrical connection between the functional layer and the substrate due to the strong interface adhesion of the amorphous material; the amorphous buffer layer has no grain boundaries, completely eliminates the grain boundary recombination center, and ensures efficient carrier transmission; the amorphous has a strong plastic deformation ability, and its interface does not need to follow a strict lattice matching mode, and has less interface stress and interface defects; the amorphous material can fill interface holes and cracks and passivate interface defects.

[0023] In addition, the detector provided in this application has a sandwich structure design of single crystal absorption layer-amorphous interface layer-pixel circuit. Compared with traditional polycrystalline thin film X-ray detectors, this structure has an extremely low body surface defect state density, and can achieve significant improvements in key performance indicators such as sensitivity, response speed, spatial resolution and working stability, providing a new technical path for the development and design of high-performance X-ray array detectors. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the embodiments of the present application or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0025] Figure 1 A flowchart of the steps of the method for preparing the detector provided in an embodiment of the present application.

[0026] Figure 2 A schematic diagram of the structure of the detector provided in an embodiment of the present application.

[0027] Figure 3 Figure a is a schematic diagram of the scraped MTP3Bi2I9 amorphous perovskite film provided in Example 1 of the present application.

[0028] Figure 3Figure b is the XRD pattern of the MTP3Bi2I9 amorphous perovskite film provided in Example 1 of the present application.

[0029] Figure 3 Figure c is the SEM image of the MTP3Bi2I9 amorphous perovskite film provided in Example 1 of the present application.

[0030] Figure 3 In the figure, d is the thickness of the MTP3Bi2I9 amorphous perovskite film characterized by a step gauge in Example 1 of the present application.

[0031] Figure 4 Schematic diagram of the optical photograph of the FAPbBr3 single crystal integrated on the MTP3Bi2I9 / ITO substrate provided in Example 1 of the present application.

[0032] Figure 5 This is a curve showing the relationship between photocurrent and voltage provided in Example 1 of the present application.

[0033] Figure 6 This is an optical photograph of the FAPbBr3 single crystal provided in Example 2 of the present application integrated on the MTP3Bi2I9 / CMOS substrate. DETAILED DESCRIPTION

[0034] The following describes in detail embodiments of the present application, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be construed as limiting the present application.

[0035] In the description of this application, it should be understood that the terms "upper", "lower", "horizontal", "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on this application.

[0036] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0037] In order to make the purpose, technical solutions and advantages of this application more clear, this application is further described in detail below with reference to the accompanying drawings and embodiments.

[0038] See also Figure 1 , which is a step flow chart of the detector provided in an embodiment of the present application, includes the following steps S110 to S130, and the implementation method of each step is described in detail below.

[0039] Step S110 : preparing an amorphous layer by using a melt quenching technique and cooling the amorphous layer on the substrate surface to form an amorphous film layer.

[0040] In this embodiment, the amorphous layer is at least one of an amorphous MTP3Bi2I9 layer, an amorphous MTP3Bi2Br9 layer, an amorphous (IPA)2PbI4 layer, and an amorphous (DMIPA)2PbI4 layer.

[0041] In this embodiment, the preparation method of the amorphous MTP3Bi2I9 layer is as follows: MTPI and BiI3 are mixed in a molar ratio of 3:2, and the mixture is heated to melt the mixture; the melted solution is placed in a preheated mold to remove bubbles, and then heated to completely melt it; the melted ionic liquid is scraped onto a substrate and cooled to form an amorphous film.

[0042] It is understandable that other amorphous layer materials can also be prepared using similar methods, which will not be described in detail here.

[0043] Step S120: the amorphous film layer is subjected to a heat treatment to be liquefied, the liquefied amorphous film layer is bonded to the single crystal and cooled so that the single crystal is formed on the surface of the amorphous film layer.

[0044] In this embodiment, the steps of heating the amorphous film layer to liquefy it, bonding the liquefied amorphous film layer to the single crystal and forming the single crystal on the surface of the amorphous film layer after cooling specifically include the following steps: placing the perovskite single crystal in the pixel area of ​​the substrate, heating the amorphous film layer to liquefy it, bonding the liquefied amorphous film layer to the single crystal, and solidifying the amorphous film layer again after stopping heating so that the single crystal is tightly bonded to the surface of the amorphous film layer.

[0045] In this embodiment, the single crystal includes a perovskite single crystal or a Group III-V semiconductor or CdTe or CdZnTe, and the perovskite single crystal includes but is not limited to an all-inorganic perovskite single crystal or an organic-inorganic perovskite single crystal or a halide perovskite single crystal or a composite cation perovskite single crystal or a composite halide perovskite single crystal.

[0046] In this embodiment, the perovskite single crystal is a FAPbBr3 perovskite single crystal, and the preparation method of the FAPbBr3 perovskite single crystal is as follows: FABr and PbBr2 are mixed in a molar ratio of 1:1, and then a solvent is added to prepare a perovskite precursor solution; the perovskite precursor solution is placed at room temperature and stirred to become a clear liquid, and then placed in an oil bath for heating. After a few crystal nuclei appear, the oil bath temperature is lowered to the critical temperature of crystal growth of 34°C, and then increased by 1°C every day to promote continuous crystal growth. After one week, the FAPbBr3 perovskite single crystal can be collected.

[0047] Furthermore, the perovskite single crystal provided in this embodiment can be single crystal, polycrystalline or amorphous; or zero-dimensional material, one-dimensional material, two-dimensional material, three-dimensional material. It can be understood that this embodiment adopts an amorphous layer without long-range ordered structure, and does not need to maintain strict lattice matching; the amorphous layer has no grain boundaries, completely eliminates the grain boundary recombination center, and ensures efficient carrier transmission and collection; the low Young's modulus of the amorphous layer gives it excellent plastic deformation ability, so that the thermal expansion mismatch stress of the heterogeneous interface is low, the interface defects are few, there is no interface charge loss, and the band gap of the amorphous material can be regulated to achieve energy level matching with the functional layer and reduce interface recombination loss; the amorphous layer has good adhesion, ensuring close physical and electrical connection between materials; the amorphous layer has the advantages of simple process and uniformity, and is suitable for large-scale, high-reliability industrial needs.

[0048] In addition, through element doping or composite phase design (such as amorphous SiO2 / graphene stacking), the viscoelastic modulus (0.1-100GPa) and thermal expansion coefficient (CTE adaptation ±1ppm / ℃) of the amorphous layer material are optimized to ensure interface mechanical compatibility with heterogeneous materials (such as perovskite single crystals, silicon-based circuits, TFTs, and CMOS).

[0049] Step S130: preparing an electrode layer on the surface of the perovskite single crystal.

[0050] In this embodiment, an electrode layer is evaporated on the surface of the single crystal, and the electrode layer includes a metal electrode, a semiconductor electrode, a carbon material electrode, or a composite material electrode.

[0051] In this embodiment, the substrate includes but is not limited to a pixel circuit board or conductive glass or inorganic material or organic material or organic-inorganic hybrid material, and the pixel circuit board includes a TFT or a CMOS.

[0052] See also Figure 2, a schematic diagram of the detector structure provided by the aforementioned embodiment of this application, comprises a perovskite single crystal, an amorphous film layer, and a substrate. This application proposes for the first time a sandwich structure design combining a "single crystal absorption layer-amorphous interface layer-pixel circuit." Compared to traditional polycrystalline thin-film X-ray detectors, this structure exhibits extremely low bulk and surface defect state densities, significantly improving key performance indicators such as sensitivity, response speed, spatial resolution, and operational stability. This provides a novel technical approach for the development and design of high-performance X-ray array detectors.

[0053] In this embodiment, the detector includes an X-ray detector, a Gamma detector, an α-particle detector, an LED detector, an ultraviolet detector, an infrared detector, a visible light detector, or a flexible device.

[0054] The preparation method and detector provided in this application use amorphous film materials. Amorphous materials not only achieve isotropic stress release due to their disordered structure, but also have good carrier mobility, allowing carriers to be effectively transported within them, significantly reducing charge transfer losses. In addition, amorphous materials have no grain boundaries and have large ion migration activation energy, thus showing good wet-heat and environmental stability. The solution of heterogeneous integration achieved by this application using amorphous materials has shown broad application potential in multiple cutting-edge fields, such as LEDs, photoelectric detection technology, and flexible electronic devices, due to its unique grain-boundary-free structure, low defect density, flexible adaptability, and excellent stress regulation capabilities.

[0055] The following is a detailed description of the above technical solutions of this application in conjunction with specific embodiments.

[0056] Example 1:

[0057] In this embodiment, the perovskite single crystal is specifically FAPbBr3; the amorphous perovskite material is MTP3Bi2I9, the top electrode is a Bi electrode, and the target substrate is an ITO glass plate.

[0058] The preparation method for FAPbBr3 single crystals is as follows: FAPbBr3 perovskite single crystals are prepared using the inversion growth method. FABr and PbBr2 are first mixed in a beaker at a 1:1 molar ratio. A 1:1 volumetric solvent mixture of DMF and GBL is then added dropwise to create a 1.4 mmol / mL perovskite precursor solution. The solution is then sealed with tin foil. The precursor solution is stirred at room temperature for 3 hours to become a clear liquid, which is then heated in an oil bath. The initial oil bath temperature is set to 39°C, the critical temperature for nucleation. Once a few nuclei appear in the beaker, the oil bath temperature is lowered to 34°C, the critical temperature for crystal growth. The temperature is then increased by 1°C daily to promote continued crystal growth. After a week, the FAPbBr3 single crystal can be harvested.

[0059] The amorphous MTP3Bi2I9 layer is prepared as follows: An MTP3Bi2I9 amorphous film is prepared using a simple melt-quenching technique. MTPI and BiI3 are mixed in a molar ratio of 3:2, transferred to a beaker, and heated in a 220°C oven until the raw materials are completely melted. The mixture is then quickly poured into a preheated mold to remove air bubbles and heated again in the oven to ensure complete melting. Next, the ionic liquid in the beaker is evenly applied to an ITO glass plate placed on an iron block using a scraper. Finally, the MTP3Bi2I9 is ​​rapidly cooled on the ITO glass plate to form a uniform amorphous film with a thickness of 3 μm.

[0060] See also Figure 3 (a) Schematic diagram of the blade-coated MTP3Bi2I9 amorphous perovskite film. (b) XRD pattern of the MTP3Bi2I9 amorphous perovskite film, with the inset being a photograph of the amorphous film. (c) SEM image of the MTP3Bi2I9 amorphous perovskite film, with a scale bar of 2 μm. (d) Thickness of the MTP3Bi2I9 amorphous perovskite film as characterized using a step gauge.

[0061] The method for integrating a FAPbBr3 single crystal onto an MTP3Bi2I9 / ITO substrate is as follows: The FAPbBr3 single crystal is placed on the MTP3Bi2I9 / ITO substrate and then heated on a 180°C hot plate. This causes the MTP3Bi2I9 amorphous material to liquefy and bond to the FAPbBr3 single crystal. The hot plate is then removed, allowing the MTP3Bi2I9 amorphous material to solidify again, tightly bonding the FAPbBr3 single crystal to the ITO glass.

[0062] like Figure 4 The figure shows a schematic diagram of the optical photograph of the FAPbBr3 single crystal integrated on the MTP3Bi2I9 / ITO substrate. The FAPbBr3 perovskite single crystal with a size of 0.5 cm × 0.5 cm can be stably integrated on the MTP3Bi2I9 / ITO glass and can withstand the sum of its own weight, the weight of the spring dynamometer and the weight of the weight (110 g), which is equivalent to a tensile pressure of 44 kPa.

[0063] Finally, a Bi electrode was deposited on the FAPbBr3 / MTP3Bi2I9 / ITO structure to create a Bi / FAPbBr3 / MTP3Bi2I9 / ITO single-crystal X-ray detector. The MTP3Bi2I9 amorphous phase effectively passivates the dangling bonds on the surface of the FAPbBr3 single crystal, improving device performance.

[0064] See also Figure 5, which is the relationship curve between the photocurrent and voltage provided in this embodiment. The μτ product obtained by fitting the modified Hecht equation, where the device containing amorphous has a higher μτ value.

[0065] Example 2:

[0066] In this embodiment, the perovskite single crystal is specifically FAPbBr3; the amorphous perovskite material is MTP3Bi2I9, the top electrode is a Bi electrode, and the target substrate is a CMOS pixel circuit board.

[0067] The preparation method for FAPbBr3 single crystals is as follows: FAPbBr3 perovskite single crystals are prepared using the inversion growth method. FABr and PbBr2 are first mixed in a beaker at a 1:1 molar ratio. A 1:1 volumetric solvent mixture of DMF and GBL is then added dropwise to create a 1.4 mmol / mL perovskite precursor solution. The solution is then sealed with tin foil. The precursor solution is stirred at room temperature for 3 hours to become a clear liquid, which is then heated in an oil bath. The initial oil bath temperature is set to 39°C, the critical temperature for nucleation. Once a few nuclei appear in the beaker, the oil bath temperature is lowered to 34°C, the critical temperature for crystal growth. The temperature is then increased by 1°C daily to promote continued crystal growth. After a week, the FAPbBr3 single crystal can be harvested.

[0068] The preparation method of the amorphous MTP3Bi2I9 layer is as follows: an MTP3Bi2I9 amorphous film is prepared using a simple melt quenching technique. MTPI and BiI3 are mixed in a molar ratio of 3:2, transferred to a beaker, and placed in a 220°C oven and continued to heat until the raw materials are completely melted. It is then quickly poured into a preheated mold to remove bubbles and heated again in the oven to ensure complete melting. Next, the ionic liquid in the above beaker is evenly scraped onto a CMOS circuit board placed on an iron block and scraped into a film. Finally, the MTP3Bi2I9 is ​​rapidly cooled on the CMOS pixel circuit board to form an amorphous film.

[0069] The method for integrating a FAPbBr3 single crystal onto an MTP3Bi2I9 / CMOS substrate is as follows: The FAPbBr3 single crystal is placed in the pixel area of ​​the MTP3Bi2I9 / CMOS substrate and then heated on a 180°C hot plate. This causes the MTP3Bi2I9 amorphous material to liquefy and bond to the FAPbBr3 single crystal. The hot plate is then removed, allowing the MTP3Bi2I9 amorphous material to solidify again, tightly bonding the FAPbBr3 single crystal to the CMOS.

[0070] like Figure 6Figure 2 shows an optical photograph of a FAPbBr3 single crystal integrated on an MTP3Bi2I9 / CMOS substrate. The 0.3 cm × 0.4 cm FAPbBr3 perovskite single crystal can be robustly integrated on the MTP3Bi2I9 / CMOS panel and can withstand a 150 g weight, equivalent to a tensile stress of 125 kPa.

[0071] Finally, a layer of Bi electrode was evaporated on the FAPbBr3 / MTP3Bi2I9 / CMOS structure to prepare a Bi / FAPbBr3 / MTP3Bi2I9 / CMOS X-ray array detector.

[0072] For a CMOS circuit board, its CMOS array consists of 72×72 active pixels, a scanning module, a switch array, and a buffer. The analog signal of each pixel is transmitted through the switch array and buffer. The switch array is controlled by the scanning module. The CMOS array uses a rolling shutter readout method, with a maximum signal readout speed of over 300 frames per second. The readout circuit of each pixel consists of a charge collection electrode, a charge sensitive amplifier (CSA), and a two-stage series source follower. The charge collected by the collection electrode is fed into the CSA and then converted into a voltage signal. The gate voltage of the feedback transistor is adjusted according to the decay time of the CSA to maximize the output dynamic range.

[0073] For X-ray detection, a miniature X-ray tube (Amptek) with a maximum output power of 4W and a characteristic Kα peak of 20keV was used. The target material was 0.75μm silver (Ag). The tube voltage range was 10–50kV, and the tube current range was 5–200μA. The X-ray dose rate was calibrated using a RadicalAccu-Gold+ DDX6-WL. During the measurement, the current signal was recorded by a precision source meter (Keithley 2635B).

[0074] It can be understood that the various technical features of the above-described embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the various technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0075] The above are merely preferred embodiments of the present application and only specifically describe the technical principles of the present application. These descriptions are intended only to explain the principles of the present application and should not be construed in any way as limiting the scope of protection of the present application. Based on the explanations herein, any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present application, as well as other specific implementations of the present application that can be conceived by those skilled in the art without inventive effort, shall be included within the scope of protection of the present application.

Claims

1. A method for preparing a detector, characterized in that: The steps include: An amorphous layer is prepared by a melt quenching technique and the amorphous layer is cooled on a substrate surface to form an amorphous film layer; The amorphous film layer is subjected to a heating treatment to liquefy it, the liquefied amorphous film layer is bonded to the single crystal, and after cooling, the single crystal is formed on the surface of the amorphous film layer; An electrode layer is prepared on the surface of the single crystal.

2. The method for preparing a detector according to claim 1, wherein: In the step of preparing an amorphous layer by melt quenching technology and cooling the amorphous layer on the surface of the substrate to form an amorphous film layer, the amorphous layer is at least one of an amorphous MTP3Bi2I9 layer, an amorphous MTP3Bi2Br9 layer, an amorphous (IPA)2PbI4 layer, and an amorphous (DMIPA)2PbI4 layer.

3. The method for preparing a detector according to claim 2, wherein: The preparation method of the amorphous MTP3Bi2I9 layer is as follows: MTPI and BiI3 are mixed in a molar ratio of 3:2, and the mixture is heated to melt the mixture; the melted solution is then placed in a preheated mold to remove bubbles, and then heated to completely melt it; the melted ionic liquid is scraped onto a substrate and cooled to form an amorphous film.

4. The method for preparing a detector according to claim 1, wherein: The step of heating the amorphous film layer to liquefy it, bonding the liquefied amorphous film layer to the single crystal, and cooling the amorphous film layer to form the single crystal on the surface of the amorphous film layer specifically includes the following steps: A single crystal is placed in the pixel area of ​​the substrate, the amorphous film layer is heated to liquefy it, the liquefied amorphous film layer is bonded to the single crystal, and after stopping heating, the amorphous film layer solidifies again so that the single crystal is tightly bonded to the surface of the amorphous film layer.

5. The method for preparing a detector according to claim 4, wherein: The single crystal includes a perovskite single crystal or a Group III-V semiconductor or CdTe or CdZnTe, and the perovskite single crystal includes but is not limited to an all-inorganic perovskite single crystal or an organic-inorganic perovskite single crystal or a halide perovskite single crystal or a composite cation perovskite single crystal or a composite halide perovskite single crystal.

6. The method for preparing a detector according to claim 5, wherein: The perovskite single crystal is a FAPbBr3 perovskite single crystal. The preparation method of the FAPbBr3 perovskite single crystal is as follows: FABr and PbBr2 are mixed in a molar ratio of 1:1, and then a solvent is added dropwise to prepare a perovskite precursor solution; the perovskite precursor solution is stirred at room temperature to turn it into a clear liquid, and then placed in an oil bath for heating. After a few crystal nuclei appear, the oil bath temperature is lowered to 34°C, the critical temperature for crystal growth, and then increased by 1°C every day to promote continuous crystal growth. After one week, the FAPbBr3 perovskite single crystal can be collected.

7. The method for preparing a detector according to claim 1, wherein: The step of preparing an electrode layer on the surface of the single crystal specifically includes the following steps: evaporating an electrode layer on the surface of the single crystal, wherein the electrode layer includes a metal electrode, a semiconductor electrode, a carbon material electrode, or a composite material electrode.

8. The method for preparing a detector according to claim 7, wherein: The substrate includes but is not limited to a pixel circuit board or conductive glass, and the pixel circuit board includes TFT or CMOS.

9. The method for preparing a detector according to claim 1, wherein: The detector includes an X-ray detector, a Gamma detector, an α particle detector, an LED detector, an ultraviolet detector, an infrared detector, a visible light detector, or a flexible device.

10. A detector, characterized in that: The compound is prepared by the preparation method according to any one of claims 1 to 9.

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