Method, system and equipment for extracting mobility of low-temperature CMOS (Complementary Metal Oxide Semiconductor) and storage medium

Abstract

The invention discloses a mobility extraction method, system and equipment of a low-temperature CMOS (Complementary Metal Oxide Semiconductor) and a storage medium, which are corresponding schemes: on the premise that a mobility model does not need to be preset, effective carrier mobility can be accurately extracted from standard I-V data, and errors caused by model dependence are avoided; moreover, different contributions of a strong field and a weak field to the mobility can be effectively distinguished and quantified, so that decoupling of a mobility physical mechanism is realized; meanwhile, drain-source parasitic resistance is extracted synchronously, interference of the drain-source parasitic resistance on mobility errors is avoided, and modeling consistency and physical integrity are enhanced; in addition, the method has good robustness and universality, is suitable for devices with different process nodes and different sizes, and can be conveniently integrated into an automatic modeling and evaluation process; and finally, the extracted mobility has clear physical parameter interpretability, can be directly used for tasks such as low-temperature circuit simulation, process analysis and device reliability evaluation, and has important engineering practical value.

Description

Technical Field

[0001] The present invention relates to the technical field of low-temperature CMOS mobility extraction, and in particular to a low-temperature CMOS mobility extraction method, system, device and storage medium. Background Art

[0002] With the development of quantum computing, low-temperature sensing and other technologies, the application of low-temperature CMOS (complementary metal oxide semiconductor) devices in the 4K (4 Kelvin) temperature range has become more and more extensive, and its electrical modeling has become a research hotspot. In this type of modeling, the effective carrier mobility It is a key parameter that determines device performance and circuit design, and it directly affects the drive current, transconductance and overall circuit performance. Therefore, it is necessary to accurately extract the effective carrier mobility. It not only helps to deeply understand the physical behavior of devices, but also forms the basis for low-temperature CMOS circuit simulation and design, which is especially important at deep submicron technology nodes.

[0003] Traditionally, The device linear region Feature extraction, the formula is: ; in, is the charge density of the inversion layer, is the gate-source voltage, drain-source voltage , taking into account the influence of drain-source parasitic resistance; is the external drain-source voltage (excluding contact resistance), is the drain-source current, L and W represent the device channel length and width respectively.

[0004] Those skilled in the art can understand that gate-source and drain-source are commonly used abbreviations in the industry, where gate refers to the gate electrode, source refers to the source electrode, and drain refers to the drain electrode. Similar abbreviations are also used in the following text, so they are not repeated here.

[0005] Inversion layer charge density The low-frequency split capacitance-voltage (Split C-V) method can be used for measurement, but this method not only requires expensive equipment but also has problems such as bias mismatch between C-V and I-V (current-voltage) measurements. The S-parameter method can improve accuracy but relies on RF instruments. A more practical method relies only on I-V measurements and approximates the ,Will The calculation is converted to threshold voltage and drain-source parasitic resistance However, this is still very challenging in low temperature environments.

[0006] To this end, researchers have proposed a variety of low-temperature mobility extraction methods. The Y-function method (Reference 1: A. Emrani, F.Balestra, and G. Ghibaudo, “Generalized mobility law for drain current modeling in si mos transistors from liquid helium to room temperatures,” IEEE Transactions on Electron Devices, vol. 40, no. 3, pp. 564–569, 1993.) can be used to extract the low-temperature mobility without being affected by the current. Extraction under influence , but cannot obtain ; Based on the linear fitting of channel resistance and channel length (Reference 2: G. Niu, J. Cressler, S. Mathew, and S. Subbanna, “A total resistance slope-based effective channel mobility extraction method for deep submicrometer cmostechnology,” IEEE Transactions on Electron Devices, vol. 46, no. 9, pp. 1912–1914, 1999.) can be extracted , but assumes that mobility is independent of channel length, which is often not true in submicron CMOS; based on small signal output conductivity method (Literature 3: F. Kong, Y. Yeow, and Z. Yao, "Extraction of mosfet threshold voltage, series resistance, effective channel length, and inversion layer mobility from small-signal channel conductance measurement," IEEE Transactions on Electron Devices, vol. 48, no. 12, pp. 2870–2874, 2001.; Document 4: F. Jazaeri, A. Pezzotta, and C. Enz, “Free carrier mobility extraction in fets,” IEEE Transactions on Electron Devices, vol. 64, no. 12, pp. 5279–5283, 2017.) or based on low The multi-point measurement method (Reference 5: JP Campbell, KP Cheung, JSSuehle, and A. Oates, “A simple series resistance extraction methodology for advanced CMOS devices,” IEEE Electron Device Letters, vol. 32, no. 8, pp.1047–1049, 2011.) is extremely sensitive to noise.

[0007] These methods are acceptable at room temperature or under long channel conditions, but accurate extraction is difficult in 4K and sub-micron devices. This is not only due to the size effect brought about by the device structure, but also because at extremely low temperatures, thermal excitation is significantly weakened, and carrier transport is mainly controlled by mechanisms such as interface roughness, Coulomb scattering, and long-range impurity scattering. Its behavior is different from that at room temperature, and traditional empirical models often fail.

[0008] It is worth noting that in addition to extracting The numerical value of is also crucial for understanding the physical decoupling of its influencing mechanisms. Different scattering processes (such as surface roughness and Coulomb scattering) dominate in different bias regions. Isolating their relative contributions can help establish a physics-based mobility model, thereby improving the simulation accuracy of low-temperature devices and providing guidance for process optimization and circuit design. For example, power-law behavior can be used to identify Coulomb scattering dominance, while linear behavior is common in surface scattering in strong field regions.

[0009] Therefore, there is an urgent need for a new solution that has the following characteristics: (1) based only on I-V data, without the need for expensive or complex equipment; (2) applicable to 4K and sub-micron CMOS devices; (3) independent of preset mobility models; (4) able to distinguish and quantify the contribution of different scattering mechanisms to mobility; and (5) with strong versatility and automation potential.

[0010] In view of this, the present invention is proposed. Summary of the Invention

[0011] The purpose of the present invention is to provide a low-temperature CMOS mobility extraction method, system, device and storage medium, which only rely on conventional I-V data acquisition and do not require split C-V or radio frequency measurement. It has good feasibility and data versatility. The effective carrier mobility finally output not only has a clear functional form with bias changes, but can also be clearly decomposed into the physical contributions of multiple scattering mechanisms, thereby forming a low-temperature mobility model with explanatory power and scalability.

[0012] The purpose of the present invention is achieved through the following technical solutions: A low-temperature CMOS mobility extraction method, comprising: Based on the carrier transport mechanism, the inverse of the effective carrier mobility is decomposed into strong field scattering term and weak field scattering term; Combining strong field scattering terms with weak field scattering terms, a linear region resistance model is constructed; The enhanced resistance model is obtained by combining the linear region resistance model with the derivative processing technology, and the threshold voltage of the device under test is extracted by using the threshold voltage offset between the device under test and the selected reference device; The enhanced resistance model is used to quantitatively model the weak field scattering term and perform power law fitting to obtain the power law model parameters. The parameters of the strong field scattering term and the drain-source parasitic resistance of the reference device are extracted by combining the power law model parameters; The effective carrier mobility of the device under test is calculated by using the drain-source parasitic resistance of the reference device and combining it with the current and voltage measurement data of the device under test. The effective carrier mobility model is reconstructed through mathematical analysis, and the contributions of the strong field scattering term and the weak field scattering term are quantified by combining the power law model parameters and the strong field scattering term parameters.

[0013] A low-temperature CMOS mobility extraction system, used to implement the aforementioned method, comprising: The mobility model decomposition unit is used to decompose the inverse of the effective carrier mobility into strong-field scattering terms and weak-field scattering terms based on the carrier transport mechanism; The linear region resistance modeling unit is used to combine the strong field scattering term and the weak field scattering term to construct a linear region resistance model; A threshold voltage extraction unit is used to obtain an enhanced resistance model by combining a linear region resistance model with a derivative processing technique, and to extract the threshold voltage of the device under test by utilizing the threshold voltage offset between the device under test and a selected reference device; A weak field scattering term physical parameter fitting unit is used to quantitatively model and perform power law fitting on the weak field scattering term using an enhanced resistance model to obtain power law model parameters; A strong field scattering term parameter and drain-source parasitic resistance extraction unit is used to extract the strong field scattering term parameters and the drain-source parasitic resistance of the reference device by combining the power law model parameters; The effective carrier mobility calculation and contribution quantification unit is used to calculate the effective carrier mobility of the device under test using the drain-source parasitic resistance of the reference device and combined with the current and voltage measurement data of the device under test, and to reconstruct the effective carrier mobility model through mathematical analysis, and to quantify the contributions of the strong field scattering term and the weak field scattering term in combination with the strong field scattering term parameters.

[0014] A processing device comprising: one or more processors; a memory for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the aforementioned method.

[0015] A readable storage medium stores a computer program, which implements the aforementioned method when the computer program is executed by a processor.

[0016] It can be seen from the technical solution provided by the present invention that: (1) without the need to preset the mobility model, the effective carrier mobility can be accurately extracted from the standard I-V data, avoiding the error caused by model dependence; (2) the different contributions of strong field (such as surface roughness scattering) and weak field (such as Coulomb scattering) to the mobility can be effectively distinguished and quantified, thereby realizing the decoupling of the physical mechanism of mobility; (3) the drain-source parasitic resistance is extracted simultaneously to avoid its interference with the mobility error and enhance the consistency and physical integrity of the modeling; (4) it has good robustness and versatility, is applicable to different process nodes and devices of different sizes, and only requires conventional linear region I-V data, which is easy to integrate into the automated modeling and evaluation process; (5) the extracted mobility model has clear physical parameter interpretation and can be directly used for tasks such as low-temperature circuit simulation, process analysis and device reliability evaluation, and has important engineering practical value. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0018] Figure 1 A flow chart of a low-temperature CMOS mobility extraction method provided by an embodiment of the present invention.

[0019] Figure 2 A schematic diagram of a low-temperature CMOS mobility extraction system provided by an embodiment of the present invention.

[0020] Figure 3 A schematic diagram of a processing device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0021] The following is a clear and complete description of the technical solutions in the embodiments of the present invention, in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0022] First, the following terms may be used in this article: The terms "include," "comprises," "contains," "has," or other similar expressions should be interpreted as non-exclusive. For example, "including certain technical features (such as raw materials, components, ingredients, carriers, dosage forms, materials, dimensions, parts, components, mechanisms, devices, steps, procedures, methods, reaction conditions, processing conditions, parameters, algorithms, signals, data, products, or manufactured articles)" should be interpreted as including not only the technical features explicitly listed, but also other technical features known in the art that are not explicitly listed.

[0023] The term "consisting of" excludes any technical features not explicitly listed. If used in a claim, this term renders the claim closed, excluding any technical features other than those explicitly listed, except for conventional impurities associated with them. If this term appears only in a clause of a claim, it limits only the elements explicitly listed in that clause; elements listed in other clauses are not excluded from the claim as a whole.

[0024] The following describes in detail a low-temperature CMOS mobility extraction method, system, device, and storage medium provided by the present invention. Any information not described in detail in the embodiments of the present invention is prior art known to those skilled in the art. Where specific conditions are not specified in the embodiments of the present invention, the process was performed in accordance with conventional conditions in the art or the conditions recommended by the manufacturer. Instruments used in the embodiments of the present invention, where the manufacturer is not specified, are all commercially available conventional products.

[0025] Example 1 like Figure 1 As shown, an embodiment of the present invention provides a low-temperature CMOS mobility extraction method, which mainly includes the following steps: Step 1: Based on the carrier transport mechanism, decompose the inverse of the effective carrier mobility into strong field scattering term and weak field scattering term (with gate overdrive voltage as the input). is the bias variable).

[0026] The preferred implementation of this step is as follows: Based on the carrier transport mechanism, the effective carrier mobility The reciprocal form of is decomposed into strong field scattering term and weak field scattering term according to Mathiessen's rule, which is expressed as: ; Among them, Mathiessen's rule is Mathiessen's rule. Indicates a given gate overdrive voltage The effective carrier mobility with the device channel length L is is the strong field scattering term, is the weak field scattering term.

[0027] For the i-th group of devices, the channel length is , strong field scattering term and weak-field scattering terms Respectively expressed as: ; ; in, is the channel length of the i-th group of devices under test Related strong field scattering fitting parameters, M+1 is the truncation order, m is the order index, and the superscript m+1 represents the m+1 power. is the bias-related weak field scattering function, is the channel length of the i-th group of devices under test The associated geometric scaling factor.

[0028] In the linear region ( ) in the channel, the determination of strong or weak field is still based on the longitudinal electric field in the channel. and critical field The size relationship is based on is the carrier saturation velocity, For its migration rate: , then it is a weak field region (weak field linear region); if , then it is a strong field region (strong field linear region).

[0029] Those skilled in the art will understand that when modeling the carrier transport characteristics in semiconductor devices, the scattering mechanism is usually divided into weak-field scattering and strong-field scattering, and is reflected in the model through corresponding functions. It should be clarified that the weak-field and strong-field scattering mechanisms exist simultaneously and work together within the full bias operating range of the device, and their relative contribution to the total mobility will continuously change with the bias conditions and device characteristics. Therefore, the corresponding functions are named "weak-field scattering term" and "strong-field scattering term" based on the dominance they exhibit in a specific electric field strength range: the weak-field scattering term plays a dominant role in the mobility in the weak field region, while the strong-field scattering term becomes the dominant factor in the strong field region. The "dominant role" described here is a relative concept, intended to indicate the physical mechanism that has a decisive influence within this range, and does not require that the absolute contribution value of one scattering term must be smaller than that of the other scattering term. From this we can see that the division of strong and weak electric fields is essentially a functional theoretical definition that serves the explanation of physical mechanisms and the construction of mathematical models. It itself does not constitute a strict physical boundary or specific threshold for the scope of the scattering mechanism.

[0030] Step 2: Combine the strong field scattering term and the weak field scattering term to construct a linear region resistance model.

[0031] The preferred implementation of this step is as follows: For the i-th group of devices under test, the corresponding linear region resistance model is expressed as: ; in, is the total source-drain resistance of the i-th group of devices under test, is the drain-source parasitic resistance of the i-th group of devices under test, which are connected in series in the linear region resistance model. Hereinafter, they are collectively referred to as drain-source parasitic resistances and will not be further explained unless otherwise specified. is the channel length of the i-th group of devices under test, is the channel width of the i-th group of devices under test, is the capacitance per unit area of ​​the gate oxide layer, Indicates a given gate overdrive voltage and device channel length The effective carrier mobility at .

[0032] In order to simplify the formula writing, the strong field scattering term is separated from The weak field scattering terms are divided by , expressed as: ; ; in, represents the strong field scattering part in the linear region resistance model, Represents the separation geometric scaling factor in the linear region resistor model The weak field scattering part after that.

[0033] Reconstruct the linear region resistance model, expressed as: .

[0034] Step 3: Combine the linear region resistance model with the derivative processing technology to obtain the enhanced resistance model, and use the threshold voltage offset between the device under test and the selected reference device to extract the threshold voltage of the device under test.

[0035] The preferred implementation of this step is as follows: Using n-order derivative processing technology (satisfying ), the enhanced resistance model is obtained, which is expressed as: ; in, is the symbol of the n-th order partial derivative, is the symbol of the nth-order total derivative, d is the symbol of the total derivative, is the gate-source voltage, in the linear region test , is the gate voltage, is the gate voltage and is the source voltage; is the enhanced resistance model of the i-th group of devices under test.

[0036] Select a reference device whose enhanced resistance model is recorded as , use the ratio method to calculate the device Function of gate-source voltage Perform horizontal offset operation so that the proportional function is at the optimal voltage offset converges to a constant, the proportional function Expressed as: ; in, The voltage of the device under test in group i is The horizontal offset is The nth-order derivative of resistance when .

[0037] The optimization objective function is: ; in, is the gate voltage of the kth sampling, For a given gate voltage and voltage offset The proportional function of is the mean of the proportional function of N samples.

[0038] Optimal voltage offset Reflects the threshold voltage of the device in group i relative to the reference device Offset, combined with the threshold voltage of the reference device, extract the threshold voltage of the i-th group of devices : .

[0039] Step 4: Use the enhanced resistance model to quantitatively model the weak field scattering term and perform power law fitting to obtain the power law model parameters.

[0040] The preferred implementation of this step is as follows:

[0041] set up: .

[0042] Set the intermediate parameter K: ; Among them, A is the amplitude and B is the power exponent, both of which are power law model parameters; n is the stage during derivative processing, and j is the order index.

[0043] For the i-th group of devices, the corresponding threshold voltage is obtained Then, calculate the gate overdrive voltage , then the gate overdrive voltage Replace gate-source voltage , bring in the enhanced resistance model to obtain a new enhanced resistance model , combined with the above settings and the intermediate parameter K, we get: ; in, is the natural logarithm function.

[0044] Through and Perform linear fitting and extract the power exponent B and amplitude A.

[0045] Step 5: Combine the power law model parameters to extract the strong field scattering term parameters and the drain-source parasitic resistance of the reference device.

[0046] The preferred implementation of this step is as follows: Define the residual function : ; in, is the total source-drain resistance corresponding to the i-th group of devices under test; is the drain-source parasitic resistance of the i-th group of devices under test, expressed as: , is the channel width of the reference device, is the drain-source parasitic resistance of the reference device; is the strong field scattering part in the linear region resistance model, M-order polynomial of ; parameter and Can be achieved through Get it by polynomial fitting.

[0047] For example, taking M=1, it is expressed as: .

[0048] The strong field scattering fitting parameters Approximately Represents Not relevant, then: ; ; In fixed Under the conditions, for a given , fitting residual function and The linear relationship between the strong field scattering fitting parameters is obtained , and then the obtained Substitute the residual function minus Term, by fitting the function and The linear relationship between and , this part of the fitting obtains the strong field scattering fitting parameters as well as Both belong to strong field scattering parameters.

[0049] Combined with the above example of M=1, we have: ; In this example, by fitting the residual function and The linear relationship can obtain the parameters , and then use the same method as above to extract and .

[0050] Step 6. Use the drain-source parasitic resistance of the reference device and combine it with the current and voltage measurement data of the device under test to calculate the effective carrier mobility of the device under test, and reconstruct the effective carrier mobility model through mathematical analysis, combining the power law model parameters (power exponent B and amplitude A) and the strong field scattering term parameters Quantify the contributions of strong-field and weak-field scattering terms.

[0051] The calculation method involved in this step can be expressed as: ; in, is the drain-source parasitic resistance of the device under test in group i, and the drain-source parasitic resistance of the reference device is used. Calculated; is the drain-source voltage, is the drain-source current of the i-th group of devices under test.

[0052] Furthermore, the calculation formula of effective carrier mobility is converted into the effective carrier mobility model through mathematical analysis, which is expressed as: ; in, Using the extracted strong field scattering fitting parameters as well as calculate, Calculation using the obtained power-law model parameters.

[0053] The above solution provided by the embodiment of the present invention mainly achieves the following beneficial effects: (1) Without presetting the mobility model, the standard Accurately extract effective carrier mobility from (I–V) data to avoid errors caused by model dependence.

[0054] (2) It can effectively distinguish and quantify the different contributions of strong fields (such as surface roughness scattering) and weak fields (such as Coulomb scattering) to mobility, thereby achieving the decoupling of the physical mechanism of mobility.

[0055] (3) Synchronously extract the drain-source parasitic resistance to avoid its interference with mobility error and enhance the consistency and physical integrity of the modeling.

[0056] (4) It has good robustness and versatility, is applicable to devices of different process nodes and sizes, and only requires conventional linear region I-V data, making it easy to integrate into automated modeling and evaluation processes.

[0057] (5) The extracted mobility model has clear physical parameter interpretation and can be directly used in tasks such as low-temperature circuit simulation, process analysis, and device reliability evaluation, and has important engineering practical value.

[0058] In order to more clearly demonstrate the technical solution and technical effects provided by the present invention, the method provided by the embodiment of the present invention is described in detail below with reference to specific embodiments.

[0059] 1. Overall overview

[0060] The method provided by the present invention is a mobility extraction method suitable for low-temperature CMOS devices. It is generally applicable to the temperature range of 1K-50K, and of course, it can also be used in the range of 2K-70K. The temperature range boundaries involved here are related to the actual physical properties, device processes, etc., and this application does not limit the specific temperature range. The method uses the device's linear region I-V data as input and decomposes the inverse form of the effective carrier mobility into two types of contributions: strong-field scattering and weak-field scattering according to Mathiessen's rule based on the carrier transport mechanism. Through series expansion and high-order derivative operations, the smooth strong-field scattering term is effectively suppressed, while the contrast of the weak-field scattering term is enhanced, achieving the isolation and identification of its dominant mechanism (such as Coulomb scattering).

[0061] Subsequently, the threshold voltage of different devices is accurately extracted by combining the published Shift-and-Ratio method, and the linear region resistance model is further fitted to extract the drain-source parasitic resistance. , strong field scattering term and weak-field scattering terms The parameter expression of is obtained and the complete mobility function form is finally reconstructed.

[0062] This method relies solely on conventional I–V data acquisition, eliminating the need for split C–V or RF measurements, resulting in excellent feasibility and data versatility. The resulting effective carrier mobility model not only exhibits a well-defined bias-dependent functional form but also clearly decomposes the physical contributions of multiple scattering mechanisms, resulting in a low-temperature mobility model with both explanatory power and scalability.

[0063] In general, this method has the following advantages: (1) There is no need to preset the mobility model, thus avoiding empirical model errors.

[0064] (2) It can effectively separate the contributions of strong-field and weak-field scattering mechanisms and enhance the physical explanatory power.

[0065] (3) It can accurately extract the threshold voltage and drain-source parasitic resistance, improving the accuracy of low-temperature modeling.

[0066] (4) The method is based only on I-V data and has good potential for automation and modeling integration.

[0067] (5) It is particularly suitable for the mobility extraction and scattering mechanism analysis of submicron CMOS devices in low temperature regions (e.g., 1K-50K, 2K-70K, etc.).

[0068] In summary, the present invention can provide a solid foundation for low-temperature CMOS modeling, mobility physical analysis and quantification, and subsequent low-temperature circuit design, and has good promotion and engineering practical value.

[0069] 2. Detailed introduction.

[0070] This invention consists of six main parts, each with a clear interdependence: from theoretical model setup to parameter separation and extraction, ultimately achieving complete reconstruction and physical decomposition of mobility. Each part's input relies on the results of the previous parts and serves to achieve the ultimate goal.

[0071] 1. Mobility model setting.

[0072] In the embodiments of the present invention, a theoretical basis for effective mobility is established, providing both physical interpretation and computational feasibility. To this end, based on Mathiessen's rule, the present invention decomposes the inverse of effective carrier mobility into a parallel term consisting of a strong-field scattering term (e.g., surface roughness scattering) and a weak-field scattering term (e.g., Coulomb scattering). This provides a basic model for subsequent parameter identification and fitting, expressed as: ; in, is the strong field scattering term, which characterizes the strong field scattering; is the weak field scattering term, which characterizes the behavior dominated by the weak field mechanism and mainly affects the low gate overdrive voltage area.

[0073] In order to express the strong field scattering term and the weak field scattering term in a mathematically clear and fitable manner, the present invention further introduces the idea of ​​Laurent series, regarding the strong field scattering term as the regular part and the weak field scattering term as the singular part. For the i-th group of devices, the strong field scattering term and weak-field scattering terms It can be expanded into the following form: ; ; in, is the channel length of the i-th group of devices under test (geometric structure) related strong field scattering fitting parameters, M+1 is the truncation order, is the bias-related weak field scattering function, is the channel length of the i-th group of devices under test The geometric scaling factor is related to It absorbs the influence of geometric structure on weak field scattering, reflects the locality of Coulomb scattering, and is convenient for This decomposition method not only maintains the physical interpretability of the model but also lays the mathematical foundation for subsequent parameter extraction and mechanism decoupling through derivative enhancement and scaling methods.

[0074] 2. Linear region resistance modeling.

[0075] After obtaining the physical decomposition model of mobility (i.e., the strong-field and weak-field scattering terms) based on the previous section, the present invention substitutes this into the measurable linear region resistance expression. This process establishes a bridge between mobility and device geometry and current-voltage measurement data, paving the way for subsequent derivative analysis and parameter extraction.

[0076] Construct the following linear region resistance model: ; in, is the drain-source parasitic resistance of the i-th group of devices under test, is the channel width of the i-th group of devices under test, is the capacitance per unit area of ​​the gate oxide layer, is the drain-source voltage, is the drain-source current of the i-th group of devices under test, is the channel resistance.

[0077] Combining the two terms obtained from the decomposition in Part 1 above, define: ; ; The symbols with asterisk superscripts in the above equation represent the strong-field and weak-field scattering partial functions in the drain-source resistance.

[0078] Finally, the linear region resistor model is rewritten as: .

[0079] 3. Eliminate the strong field scattering term and extract the threshold voltage.

[0080] Based on the resistance model constructed in Part 2 above, the strong field scattering term It can be modeled as a polynomial expression with a truncation order of M+1, according to the total source-drain resistance obtained in the previous step Expression (i.e. linear region resistance model), right The highest power order of is M. In order to enhance the identification of weak field scattering terms, the present invention calculates the total source-drain resistance by right Find the nth-order derivative Processing is used to suppress the smooth strong-field scattering term.

[0081] The order is recorded as n, and the enhanced resistance model is obtained by the following formula, which is expressed as: ; in, is the symbol of the n-th order partial derivative, is the symbol of the nth-order total derivative, , d is the symbol of total derivative, is the gate-source voltage; is the enhanced resistance model of the i-th group of devices under test.

[0082] When making a relative comparison, a reference device (denoted as device 0) is selected. This device has a larger channel length and width, and its small size effect (such as short channel threshold shift) is relatively weak. Therefore, its threshold voltage Traditional methods that do not rely on drain-source parasitic resistance can be used, such as the method described in Reference 6 (M. Tsuno, M. Suga, M. Tanaka, K. Shibahara, M. Miura-Mattausch, and M. Hirose, “Physically-based threshold voltage determination for mosfet's of all gate lengths,” IEEE Trans. ElectronDevices, vol. 46, no. 7, pp. 1429–34, 1999.).

[0083] The Shift-and-Ratio method (7: Y. Taur, D. Zicherman, D.Lombardi, P. Restle, C. Hsu, H. Nanafi, M. Wordeman, B. Davari, and G.Shahidi, “A new 'shift and ratio' method for mosfet channel-length extraction,” IEEE Electron Device Letters, vol. 13, no. 5, pp. 267–269, 1992.) was then used to perform voltage shifts on the curves of different devices so that the ratio function is at the optimal voltage offset. The lower convergence is a constant, and the proportional function is expressed as: .

[0084] The optimization objective function is: .

[0085] is the mean of the proportional function, expressed as: ; in, is the gate voltage of the kth sampling, For a given gate voltage and voltage offset The proportional function when , N is the number of samples.

[0086] Optimal voltage offset Reflects the threshold voltage shift of the i-th group device relative to the reference device , combined with the threshold voltage of the reference device, the threshold voltage of the device in group i can be extracted : .

[0087] The present invention converts the threshold voltage extraction problem of small-size devices into a relative offset relative to a reference device, thereby indirectly achieving robust and accurate extract.

[0088] 4. Fit the physical parameters of the weak field scattering term.

[0089] This section follows the enhanced resistance model from Section 3, performing quantitative modeling and power-law fitting of the weak-field scattering term to clarify the relationship between the scattering mechanism and bias voltage. This fitting result will be used to isolate the weak-field component from the total source-drain resistance, paving the way for the next strong-field analysis.

[0090] Based on the physical assumption that the weak field scattering term at low temperature is dominated by Coulomb scattering, the scattering rate and the electric field are approximately in a power law relationship, so it is set: .

[0091] For the i-th group of devices, the corresponding threshold voltage is obtained Then, calculate the gate overdrive voltage , then the gate overdrive voltage Replace gate-source voltage , bring in the enhanced resistance model to obtain a new enhanced resistance model , combined with the above settings, we get: ; Among them, the intermediate parameter K is: .

[0092] Through and Do linear fitting and extract the power index B and amplitude A to quantitatively characterize the Coulomb scattering impact.

[0093] 5. Extract strong field scattering terms and drain-source parasitic resistance.

[0094] After successfully fitting and eliminating the parameters related to the weak field scattering term, this section analyzes the total resistance Subtract the weak field scattering function The remaining resistance residuals are analyzed to extract the drain-source parasitic resistance and strong field scattering parameters. After this part of the modeling is completed, all components of the mobility expression have been fully extracted and can be reconstructed.

[0095] Define the residual function : ; in, is the drain-source parasitic resistance of the i-th group of devices under test. It is usually assumed to be inversely proportional to the channel width and independent of the channel length, that is: ; in, is the channel width of the reference device, is the drain-source parasitic resistance of the reference device.

[0096] The strong field scattering term normalized for modeling The bias dependence of , referring to the expansion of the strong field scattering term and the weak field scattering term in the first part above, adopts the finite order power form as an approximate expression: .

[0097] The use of this power law form with M = 1 has the following rationales: (1) In actual low-temperature experiments, the strong field scattering term The dependence of is usually smooth, especially in the medium and high bias regions, where its growth trend can be well approximated by a low-order power function.

[0098] (2) Although higher-order powers are mathematically feasible, they may lead to overfitting, lose physical meaning, and be sensitive to measurement errors.

[0099] (3) If the residual function The fitting performance of has a systematic deviation, and higher orders (such as ), forming an extensible modeling mechanism.

[0100] It mainly reflects the surface roughness scattering mechanism, which is weakly related to the channel length and can be approximated as , yes First level Dependencies, which can be used in subsequent refactoring models Calculation, and Approximately , indicating that It is irrelevant and can be regarded as Irrelevant constant.

[0101] Will Substitute the above residual function formula to obtain: ; In fixed Under the conditions, for a given , fitting residual function Follow The changes obtained , and then the obtained Substitute into the formula and subtract Term, fitting residual function and The relationship between and . Ultimately, it provides a basis for formal modeling and parameter extraction of strong field scattering terms.

[0102] The example provided here is M=1. When M is greater than 1, a similar method can be used to obtain ,as well as , m=1,…,M.

[0103] 6. Extract the effective carrier mobility.

[0104] With all the aforementioned parameters already defined, this section recombines the strong-field and weak-field scattering terms to construct a complete expression for the effective carrier mobility. This expression can be used to analyze mobility behavior under different bias conditions and supports circuit modeling and performance evaluation at low temperatures.

[0105] Model-based reconstruction: ;

[0106] The above formula is the analytical calculation form of the effective carrier mobility of the device under test, which decouples the effective carrier mobility into the strong field scattering term and weak-field scattering terms , and the contributions of strong field scattering and weak field scattering can be quantitatively decoupled. The parameters of the strong field scattering term extracted in the previous section 、 calculate, The power law model parameters power exponent B and amplitude A extracted previously are combined for calculation.

[0107] Based on the linear region definition: .

[0108] In the embodiment of the present invention, the above two expressions are essentially the same. The former is a model form and the latter is a linear region definition. The corresponding model form can be obtained by mathematically analyzing the linear region definition. In addition, the different algorithms for the effective carrier mobility corresponding to the two can be used to verify the self-consistency of the model.

[0109] Based on the above solution provided by the present invention, effective carrier mobility extraction with high robustness, no model dependence, and physical decoupling can be finally achieved.

[0110] Through the above description of the embodiments, those skilled in the art will clearly understand that the above embodiments can be implemented via software or by utilizing software plus a necessary general-purpose hardware platform. Based on this understanding, the technical solutions of the above embodiments can be embodied in the form of a software product. This software product can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, or mobile hard drive) and includes a number of instructions for enabling a computer device (such as a personal computer, server, or network device) to execute the methods described in various embodiments of the present invention.

[0111] Example 2 The present invention also provides a low-temperature CMOS mobility extraction system, which is mainly used to implement the method provided in the above embodiment, such as Figure 2 As shown, the system mainly includes: The mobility model decomposition unit is used to decompose the inverse of the effective carrier mobility into strong-field scattering terms and weak-field scattering terms based on the carrier transport mechanism; The linear region resistance modeling unit is used to combine the strong field scattering term and the weak field scattering term to construct a linear region resistance model; A threshold voltage extraction unit is used to obtain an enhanced resistance model by combining a linear region resistance model with a derivative processing technique, and to extract the threshold voltage of the device under test by utilizing the threshold voltage offset between the device under test and a selected reference device; A weak field scattering term physical parameter fitting unit is used to quantitatively model and perform power law fitting on the weak field scattering term using an enhanced resistance model to obtain power law model parameters; A strong field scattering term parameter and drain-source parasitic resistance extraction unit is used to extract the strong field scattering term parameters and the drain-source parasitic resistance of the reference device by combining the power law model parameters; The effective carrier mobility calculation and contribution quantification unit is used to calculate the effective carrier mobility of the device under test by using the drain-source parasitic resistance of the reference device and combining the current and voltage measurement data of the device under test, and to reconstruct the effective carrier mobility model through mathematical analysis and combine the power law model parameters And the strong field scattering parameters Quantify the contributions of strong-field and weak-field scattering terms.

[0112] Those skilled in the art will clearly understand that for the convenience and brevity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional modules as needed, that is, the internal structure of the system can be divided into different functional modules to complete all or part of the functions described above.

[0113] Example 3 The present invention also provides a processing device, such as Figure 3 As shown, it mainly includes: one or more processors; a memory for storing one or more programs; wherein, when the one or more programs are executed by the one or more processors, the one or more processors implement the method provided by the aforementioned embodiment.

[0114] Furthermore, the processing device further includes at least one input device and at least one output device; in the processing device, the processor, memory, input device, and output device are connected via a bus.

[0115] In the embodiment of the present invention, the specific types of the memory, input device, and output device are not limited; for example: The input device can be a touch screen, image acquisition device, physical button or mouse; The output device may be a display terminal; The memory can be random access memory (RAM) or non-volatile memory, such as disk storage.

[0116] Example 4 The present invention also provides a readable storage medium storing a computer program, which implements the method provided in the above embodiment when the computer program is executed by a processor.

[0117] In the embodiments of the present invention, the computer-readable storage medium may be provided in the aforementioned processing device, for example, as a memory in the processing device. Alternatively, the computer-readable storage medium may be a USB flash drive, a removable hard drive, a read-only memory (ROM), a magnetic disk, or an optical disk, among other media capable of storing program code.

[0118] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by any person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims. The information disclosed in the background technology section of this article is only intended to deepen the understanding of the overall background technology of the present invention, and should not be regarded as an admission or any form of implication that the information constitutes prior art already known to those skilled in the art.

Claims

1. A low-temperature CMOS mobility extraction method, characterized in that: include: Based on the carrier transport mechanism, the inverse of the effective carrier mobility is decomposed into strong field scattering term and weak field scattering term; Combining strong field scattering terms with weak field scattering terms, a linear region resistance model is constructed; The enhanced resistance model is obtained by combining the linear region resistance model with the derivative processing technology, and the threshold voltage of the device under test is extracted by using the threshold voltage offset between the device under test and the selected reference device; The enhanced resistance model is used to quantitatively model the weak field scattering term and perform power law fitting to obtain the power law model parameters. The parameters of the strong field scattering term and the drain-source parasitic resistance of the reference device are extracted by combining the power law model parameters; The effective carrier mobility of the device under test is calculated by using the drain-source parasitic resistance of the reference device and combining it with the current and voltage measurement data of the device under test. The effective carrier mobility model is reconstructed through mathematical analysis, and the contributions of the strong field scattering term and the weak field scattering term are quantified by combining the power law model parameters and the strong field scattering term parameters.

2. The low-temperature CMOS mobility extraction method according to claim 1, characterized in that: The decomposition of the inverse of the effective carrier mobility into a strong field scattering term and a weak field scattering term based on the carrier transport mechanism includes: Based on the carrier transport mechanism, the effective carrier mobility The reciprocal form of is decomposed into strong field scattering term and weak field scattering term according to Mathiessen's rule, which is expressed as: ； Among them, Mathiessen's rule is Mathiessen's rule. Indicates a given gate overdrive voltage The effective carrier mobility with the device channel length L is is the strong field scattering term, is the weak field scattering term; For the i-th group of devices, the strong field scattering term and weak-field scattering terms Respectively expressed as: ； ； in, is the channel length of the i-th group of devices under test Related strong field scattering fitting parameters, M+1 is the truncation order, m is the order index, and the superscript m+1 represents the m+1 power. is the bias-related weak field scattering function, is the channel length of the i-th group of devices under test The associated geometric scaling factor.

3. The low-temperature CMOS mobility extraction method according to claim 2, characterized in that: The combination of the strong field scattering term and the weak field scattering term to construct the linear region resistance model includes: For the i-th group of devices under test, the corresponding linear region resistance model is expressed as: ； in, is the total source-drain resistance of the i-th group of devices under test, is the drain-source parasitic resistance of the i-th group of devices under test, is the channel width of the i-th group of devices under test, is the capacitance per unit area of ​​the gate oxide layer, Indicates a given gate overdrive voltage and channel length The effective carrier mobility when ; Strong field scattering and Divide by , expressed as: ； ； in, represents the strong field scattering part in the linear region resistance model, Represents the separation geometry factor in the linear region resistor model The weak field scattering part after Reconstruct the linear region resistance model, expressed as: 。 4. The low-temperature CMOS mobility extraction method according to claim 3, characterized in that: The method of combining the linear region resistance model with the derivative processing technology to obtain the enhanced resistance model and utilizing the threshold voltage offset between the device under test and a selected reference device to extract the threshold voltage of the device under test includes: Using the n-order derivative processing technology, the enhanced resistance model is obtained, which is expressed as: ； in, is the symbol of the n-th order partial derivative, is the symbol of the nth-order total derivative, , d is the symbol of total derivative, is the gate-source voltage; is the enhanced resistance model of the i-th group of devices under test; Select a reference device whose enhanced resistance model is recorded as , using the proportional method to model the enhanced resistance of the i-th group of devices Gate-source voltage Perform horizontal offset operation so that the proportional function is at the optimal voltage offset converges to a constant, the proportional function Expressed as: ； in, The voltage of the device under test in group i is The horizontal offset is The nth-order derivative of resistance when ; The optimization objective function is: ； in, is the gate voltage of the kth sampling, For a given gate voltage and voltage offset The proportional function of is the mean of the proportional function; Optimal voltage offset Reflects the threshold voltage of the device in group i relative to the reference device Offset, combined with the threshold voltage of the reference device, extract the threshold voltage of the i-th group of devices : 。 5. The low-temperature CMOS mobility extraction method according to claim 4, characterized in that: The enhanced resistance model is used to quantitatively model and perform power law fitting on the weak field scattering term to obtain the power law model parameters, including: set up: ； Set the intermediate parameter K: ； Where A is the amplitude and B is the power index, both of which are parameters of the power law model; n is the stage of derivative processing, and j is the order index; For the i-th group of devices, the corresponding threshold voltage is obtained Then, calculate the gate overdrive voltage , then the gate overdrive voltage Replace gate-source voltage , bring in the enhanced resistance model to obtain a new enhanced resistance model , combined with the above settings and the intermediate parameter K, we get: ； in, is the natural logarithm function; Through and Perform linear fitting and extract the power exponent B and amplitude A.

6. The low-temperature CMOS mobility extraction method according to claim 5, characterized in that: The extracting of the strong field scattering term parameters by combining the power law model parameters and thereby extracting the drain-source parasitic resistance of the device under test includes: Define the residual function : ； in, is the total source-drain resistance corresponding to the i-th group of devices under test; the drain-source parasitic resistance of the i-th group of devices under test Expressed as: , is the channel width of the reference device, is the drain-source parasitic resistance of the reference device; is the normalized strong field scattering term, M-order polynomial of ; parameter Fitting parameters with strong field scattering Through Do polynomial fitting to get; Let the strong field scattering fitting parameters Represents Not relevant, then: ； In fixed Under the conditions, for a given , for the residual function and The strong field scattering fitting parameters are obtained by polynomial fitting , and then obtain Substitute the residual function minus Term, by fitting the function and The linear relationship between and This part obtains the strong field scattering fitting parameters as well as Both belong to strong field scattering parameters.

7. The low-temperature CMOS mobility extraction method according to claim 6, characterized in that: The effective carrier mobility of the device under test is calculated by using the drain-source parasitic resistance of the reference device in combination with the current and voltage measurement data of the device under test, and the effective carrier mobility model is reconstructed through mathematical analysis. The contributions of the strong field scattering field and the weak field scattering term are quantified by combining the power law model parameters and the strong field scattering term parameters. The effective carrier mobility of the device under test is calculated using the following formula: : ； Among them, the drain-source parasitic resistance of the i-th group of devices under test is , using the drain-source parasitic resistance of the reference device Calculated; is the drain-source voltage, is the drain-source current of the i-th group of devices under test; Furthermore, the calculation formula of effective carrier mobility is converted into the effective carrier mobility model through mathematical analysis, which is expressed as: ； in, Using the extracted strong field scattering fitting parameters as well as calculate, Calculation using the obtained power-law model parameters.

8. A low-temperature CMOS mobility extraction system, characterized in that: The method for implementing any one of claims 1 to 7 comprises: The mobility model decomposition unit is used to decompose the inverse of the effective carrier mobility into strong-field scattering terms and weak-field scattering terms based on the carrier transport mechanism; The linear region resistance modeling unit is used to combine the strong field scattering term and the weak field scattering term to construct a linear region resistance model; A threshold voltage extraction unit is used to obtain an enhanced resistance model by combining a linear region resistance model with a derivative processing technique, and to extract the threshold voltage of the device under test by utilizing the threshold voltage offset between the device under test and a selected reference device; A weak field scattering term physical parameter fitting unit is used to quantitatively model and perform power law fitting on the weak field scattering term using an enhanced resistance model to obtain power law model parameters; A strong field scattering term parameter and drain-source parasitic resistance extraction unit is used to extract the strong field scattering term parameters and the drain-source parasitic resistance of the reference device by combining the power law model parameters; The effective carrier mobility calculation and contribution quantification unit is used to calculate the effective carrier mobility of the device under test using the drain-source parasitic resistance of the reference device and combined with the current and voltage measurement data of the device under test, and to reconstruct the effective carrier mobility model through mathematical analysis, and to quantify the contributions of the strong field scattering term and the weak field scattering term in combination with the strong field scattering term parameters.

9. A processing device, characterized in that: include: one or more processors; a memory for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the method according to any one of claims 1 to 7.

10. A readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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