Semiconductor structure and forming method thereof

Abstract

The invention discloses a semiconductor structure and a forming method thereof. The semiconductor structure comprises a substrate; the drift region is located in the substrate, first type doping ions are arranged in the drift region, the drift region comprises a plurality of sub-drift regions with different doping ion concentrations, any sub-drift region close to one side of the top surface of the substrate is located in the other adjacent sub-drift region and points to the top surface of the substrate along the bottom surface of the substrate, and the doping ion concentrations of the sub-drift regions are gradually increased; the first body region is positioned in the substrate at the side part of the drift region, and the first body region is internally provided with second type doping ions; the gate structure is located on the substrate and covers part of the drift region and part of the first body region; and the drain doped region is positioned on one side of the gate structure and is positioned in the sub-drift region with the maximum doped ion concentration in the drift region. The doping ion concentration of each sub drift region is increased progressively, so that the average concentration of the doping ions of the drift region is increased, and the on-resistance of the semiconductor structure is reduced.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular to a semiconductor structure and a method for forming the same. Background Art

[0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are moving towards higher component density, higher integration, and higher performance. Power semiconductor devices (Power Electronic Devices) refer to high-power electronic devices mainly used in power conversion and control circuits of power equipment.

[0003] Among them, LDMOS (Laterally Diffused Metal Oxide Semiconductor) is a double-diffused power device commonly used in radio frequency power circuits. In high-voltage power integrated circuits, high-voltage LDMOS is often used to meet requirements for high-voltage resistance and power control. Laterally double-diffused field-effect transistors (LDMOS) offer numerous advantages, including high thermal and frequency stability, good gain and durability, low feedback capacitance and thermal resistance, constant input impedance, and simpler bias circuitry. Furthermore, LDMOS exhibits excellent process compatibility with CMOS, leading to its widespread application.

[0004] However, the performance of current LDMOS devices still needs to be improved. Summary of the Invention

[0005] The problem solved by the embodiments of the present invention is to provide a semiconductor structure and a method for forming the same, so as to improve the performance of the semiconductor structure.

[0006] To solve the above problems, an embodiment of the present invention provides a semiconductor structure, comprising: a substrate; a drift region located in the substrate, the drift region having first-type dopant ions, the drift region comprising a plurality of sub-drift regions with different dopant ion concentrations, any of the sub-drift regions close to the side of the top surface of the substrate is located in another adjacent sub-drift region, and the dopant ion concentration of each sub-drift region increases along the direction from the bottom surface of the substrate to the top surface of the substrate; a first body region located in the substrate at the side of the drift region, the first body region having second-type dopant ions with a conductivity type different from that of the first-type dopant ions; a gate structure located on the substrate and covering part of the drift region and part of the first body region; a drain doping region located on one side of the gate structure and in the sub-drift region with the highest dopant ion concentration in the drift region; and a source doping region located in the first body region on the other side of the gate structure.

[0007] Optionally, the drift region includes a first sub-drift region and a second sub-drift region located in the first sub-drift region; the lateral width of the second sub-drift region is greater than the lateral width of the first sub-drift region, and the side wall of the second sub-drift region facing the first body region is located between the first body region and the first sub-drift region.

[0008] Optionally, the semiconductor structure also includes: a second body region, located at the bottom of the first body region and in the substrate between the first body region and the second sub-drift region, the second body region is in contact with the first body region and the second sub-drift region, and there is a gap between the second body region and the first sub-drift region, the second body region has the second type of dopant ions, and the dopant ion concentration of the second body region is less than the dopant ion concentration of the first body region.

[0009] Optionally, the semiconductor structure also includes: a third body region located in the substrate at the bottom of the second body region, the third body region is in contact with the second body region, the second sub-drift region, and the first sub-drift region, the third body region has the second type of dopant ions, and the dopant ion concentration of the third body region is less than the dopant ion concentration of the second body region.

[0010] Optionally, along a direction parallel to the top surface of the substrate, the third body region extends to a portion of the bottom of the first sub-drift region.

[0011] Optionally, the drift region further includes: a third sub-drift region located in the second sub-drift region, and a gap is formed between a sidewall of the third sub-drift region facing the first body region and the second sub-drift region.

[0012] Optionally, there is a gap between the first body region and the second sub-drift region.

[0013] Accordingly, an embodiment of the present invention further provides a method for forming a semiconductor structure, comprising: providing a substrate, wherein the substrate includes a first region and a second region arranged adjacent to each other along a direction parallel to the top surface of the substrate; forming a drift region in the substrate in the first region, wherein the drift region has first-type dopant ions, and the drift region includes a plurality of sub-drift regions with different dopant ion concentrations, wherein any of the sub-drift regions close to one side of the top surface of the substrate is located in another adjacent sub-drift region, and the dopant ion concentration of each sub-drift region increases gradually along a direction from the bottom surface of the substrate to the top surface of the substrate; forming a semiconductor structure in the substrate; The steps of forming the body region include: forming a first body region in the substrate of the second region, the first body region having second-type dopant ions with a conductivity type different from that of the first-type dopant ions; forming a gate structure on the substrate at the junction of the first region and the second region, the gate structure covering part of the drift region and part of the first body region; forming a drain doping region in the drift region on one side of the gate structure, and the drain doping region is located in the sub-drift region with the highest dopant ion concentration in the drift region; forming a source doping region in the first body region on the other side of the gate structure.

[0014] Optionally, the step of forming the drift region includes: forming a first sub-drift region in the substrate of the first region; forming a second sub-drift region in the substrate of the first region, the second sub-drift region is located in the first sub-drift region, and the lateral width of the second sub-drift region is greater than the lateral width of the first sub-drift region, and the side wall of the second sub-drift region facing the first region is located between the first region and the first sub-drift region; the drift region includes the first sub-drift region and the second sub-drift region.

[0015] Optionally, the step of forming the drift region also includes: after forming the second sub-drift region, forming a third sub-drift region in the substrate of the first region, the third sub-drift region is located in the second sub-drift region, and there is a gap between the side wall of the third sub-drift region facing the first region and the second sub-drift region; the drift region includes the third sub-drift region, the second sub-drift region and the first sub-drift region.

[0016] Optionally, the step of forming the body region also includes: before forming the first body region, forming a second body region in the substrate of the second region and part of the first region, the second body region is in contact with the second sub-drift region, and there is a gap between the second body region and the first sub-drift region, and the second body region has the second type of dopant ions; in the step of forming the first body region, forming the first body region in the second body region of the second region, and the dopant ion concentration of the first body region is greater than the dopant ion concentration of the second body region.

[0017] Optionally, the step of forming the second body region includes: forming an initial second body region in the substrate of the second area, the initial second body region having the second type dopant ions; annealing the initial second body region so that the initial second body region extends to a position in contact with the second sub-drift region and spaced apart from the first sub-drift region to form the second body region.

[0018] Optionally, the step of forming the body region also includes: before forming the second body region, forming a third body region in the substrate of the second region and part of the first region, the third body region is in contact with both the second sub-drift region and the first sub-drift region, and the third body region has the second type of dopant ions; in the step of forming the second body region, forming the second body region in the third body region, and the dopant ion concentration of the second body region is greater than the dopant ion concentration of the third body region.

[0019] Optionally, the step of forming the third body region includes: forming an initial third body region in the substrate of the second region, the initial third body region having the second type dopant ions; annealing the initial third body region so that the third body region extends to a position in contact with both the second sub-drift region and the first sub-drift region to form the third body region.

[0020] Optionally, in the step of performing annealing on the initial third body region to form the third body region, the third body region extends to a position contacting a portion of the bottom of the first sub-drift region.

[0021] Optionally, the body region is formed after the drift region is formed.

[0022] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages: The semiconductor structure provided by an embodiment of the present invention includes a drift region located in a substrate, wherein the drift region has first-type dopant ions, and the drift region includes multiple sub-drift regions with different dopant ion concentrations. Any of the sub-drift regions close to the side of the top surface of the substrate is located in another adjacent sub-drift region, and the dopant ion concentration of each sub-drift region increases along the direction from the bottom surface of the substrate to the top surface of the substrate. The drain doping region is located on one side of the gate structure and in the sub-drift region with the highest dopant ion concentration in the drift region. Since the drift region includes multiple sub-drift regions with different doping ion concentrations, any sub-drift region close to the side of the top surface of the substrate is located in another adjacent sub-drift region, and the doping ion concentration of each sub-drift region increases along the direction of the bottom surface of the substrate pointing to the top surface of the substrate, which is beneficial to increasing the average concentration of doping ions in the drift region, thereby reducing the on-resistance of the semiconductor structure, and further beneficial to improving the performance of the semiconductor structure; moreover, the drift region includes multiple sub-drift regions with different doping ion concentrations, and the drain doping region is located in the sub-drift region with the largest doping ion concentration in the drift region, which is convenient for increasing the longitudinal dimension of the drain doping region to the bottom of the drift region, thereby beneficial to improving the electric field concentration in the drain doping region in the longitudinal direction, thereby reducing the electric field strength in the drain doping region in the longitudinal direction, and correspondingly also beneficial to improving the performance of the semiconductor structure.

[0023] In the method for forming a semiconductor structure provided by an embodiment of the present invention, a drift region is formed in the substrate of the first area, the drift region has first-type dopant ions, and the drift region includes multiple sub-drift regions with different dopant ion concentrations. Any of the sub-drift regions close to the side of the top surface of the substrate is located in another adjacent sub-drift region, and the dopant ion concentration of each sub-drift region increases along the direction from the bottom surface of the substrate to the top surface of the substrate. A drain doping region is formed in the drift region on one side of the gate structure, and the drain doping region is located in the sub-drift region with the highest dopant ion concentration in the drift region. Since the drift region includes multiple sub-drift regions with different doping ion concentrations, and the doping ion concentrations of each sub-drift region increase along the direction from the bottom surface of the substrate to the top surface of the substrate, it is beneficial to increase the average concentration of doping ions in the drift region, thereby reducing the on-resistance of the semiconductor structure, and further improving the performance of the semiconductor structure; moreover, the drift region includes multiple sub-drift regions with different doping ion concentrations, and the drain doping region is located in the sub-drift region with the largest doping ion concentration in the drift region, which is convenient for increasing the longitudinal dimension of the drain doping region to the bottom of the drift region, thereby improving the electric field concentration in the drain doping region in the longitudinal direction, thereby reducing the electric field strength in the drain doping region in the longitudinal direction, and correspondingly also beneficial for improving the performance of the semiconductor structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is a structural diagram of a semiconductor structure; Figure 2 is a schematic structural diagram of an embodiment of a semiconductor structure of the present invention; Figures 3 to 14 1 is a schematic structural diagram corresponding to each step in an embodiment of a method for forming a semiconductor structure of the present invention. DETAILED DESCRIPTION

[0025] Currently, the performance of semiconductor structures still needs to be improved. This article analyzes the reasons why the performance of semiconductor structures needs to be improved by combining a semiconductor structure. Figure 1 It is a structural diagram of a semiconductor structure.

[0026] refer to Figure 1 The semiconductor structure includes: a substrate 10; a drift region 11 located in the substrate 10, wherein the drift region 11 has first-type dopant ions; a body region 12 located in the substrate 10 at a side of the drift region 11, wherein the body region 12 has second-type dopant ions having a conductivity type different from that of the first-type dopant ions; a gate structure 13 located on the substrate 10 and covering part of the drift region 11 and part of the body region 12; a drain doping region 14 located on one side of the gate structure 13 and in the drift region 11; and a source doping region 15 located in the body region 12 on the other side of the gate structure 13.

[0027] Research has found that the low average concentration of dopant ions in the drift region 11 can easily lead to a high on-resistance in the semiconductor structure. Furthermore, the small longitudinal dimension from the drain doping region 14 to the bottom of the drift region 11 can easily lead to severe electric field concentration in the drain doping region. This, in turn, can easily lead to a high vertical electric field strength in the drain doping region 14, potentially causing breakdown of the semiconductor device.

[0028] In order to solve the above technical problems, an embodiment of the present invention provides a semiconductor structure, comprising: a substrate; a drift region located in the substrate, the drift region having first-type dopant ions, the drift region including multiple sub-drift regions with different dopant ion concentrations, any of the sub-drift regions close to the side of the top surface of the substrate is located in another adjacent sub-drift region, and the dopant ion concentration of each sub-drift region increases along the direction from the bottom surface of the substrate to the top surface of the substrate; a first body region located in the substrate at the side of the drift region, the first body region having second-type dopant ions with a conductivity type different from that of the first-type dopant ions; a gate structure located on the substrate and covering part of the drift region and part of the first body region; a drain doping region located on one side of the gate structure and in the sub-drift region with the largest dopant ion concentration in the drift region; and a source doping region located in the first body region on the other side of the gate structure.

[0029] The semiconductor structure disclosed in the embodiment of the present invention includes a drift region located in a substrate, wherein the drift region has first-type dopant ions, and the drift region includes multiple sub-drift regions with different dopant ion concentrations. Any of the sub-drift regions close to the side of the top surface of the substrate is located in another adjacent sub-drift region, and the dopant ion concentration of each sub-drift region increases along the direction from the bottom surface of the substrate to the top surface of the substrate. The drain doping region is located on one side of the gate structure and is located in the sub-drift region with the highest dopant ion concentration in the drift region. Since the drift region includes multiple sub-drift regions with different doping ion concentrations, any sub-drift region close to the side of the top surface of the substrate is located in another adjacent sub-drift region, and the doping ion concentration of each sub-drift region increases along the direction of the bottom surface of the substrate pointing to the top surface of the substrate, which is beneficial to increasing the average concentration of doping ions in the drift region, thereby reducing the on-resistance of the semiconductor structure, and further beneficial to improving the performance of the semiconductor structure; moreover, the drift region includes multiple sub-drift regions with different doping ion concentrations, and the drain doping region is located in the sub-drift region with the largest doping ion concentration in the drift region, which is convenient for increasing the longitudinal dimension of the drain doping region to the bottom of the drift region, thereby beneficial to improving the electric field concentration in the drain doping region in the longitudinal direction, thereby reducing the electric field strength in the drain doping region in the longitudinal direction, and correspondingly also beneficial to improving the performance of the semiconductor structure.

[0030] In order to make the above-mentioned objects, features and advantages of the embodiments of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0031] Figure 2 is a schematic structural diagram of an embodiment of a semiconductor structure of the present invention; refer to Figure 2In this embodiment, the semiconductor structure includes: a substrate 100; a drift region 110 located in the substrate 100, wherein the drift region 110 has first-type dopant ions, and the drift region 110 includes a plurality of sub-drift regions 111 with different dopant ion concentrations, wherein any of the sub-drift regions 111 close to the top surface of the substrate 100 is located in another adjacent sub-drift region 111, and the dopant ion concentrations of the sub-drift regions 111 increase gradually along the direction from the bottom surface of the substrate 100 to the top surface of the substrate 100; a first body region 121 located in the drift region 111; In the substrate 100 on the side of the region 110, the first body region 121 has second-type dopant ions with a conductivity type different from that of the first-type dopant ions; the gate structure 130 is located on the substrate 100 and covers part of the drift region 110 and part of the first body region 121; the drain doping region 141 is located on one side of the gate structure 130 and is located in the sub-drift region 111 with the highest dopant ion concentration in the drift region 110; the source doping region 142 is located in the first body region 121 on the other side of the gate structure 130.

[0032] The substrate 100 is used to provide a process platform for forming a semiconductor structure. In this embodiment, the semiconductor structure is an LDMOS transistor, which can be an N-type transistor or a P-type transistor.

[0033] In this embodiment, the substrate 100 includes a first region i and a second region ii that are adjacent to each other.

[0034] The substrate 100 in the first region i is used to provide a process basis for forming the drift region 110 and a portion of the body region, and the substrate 100 in the second region ii is used to provide a process basis for forming the first body region 121 .

[0035] In this embodiment, the base includes a substrate (not shown), which is a silicon substrate. In other embodiments, the substrate may be made of other materials such as germanium, silicon germanium, silicon carbide, gallium arsenide, or indium gallium. The substrate may also be a silicon-on-insulator substrate or a germanium-on-insulator substrate, or other types of substrates.

[0036] In this embodiment, the substrate is a P-type substrate (P-Sub), and the substrate is doped with P-type ions. As an example, the P-type ions include B ions, Ga ions, or In ions.

[0037] The drift region 110 is used to withstand a large partial pressure.

[0038] It can be understood that since any of the sub-drift regions 111 close to the top surface of the substrate 100 is located in another adjacent sub-drift region 111, that is, along the direction of the bottom surface of the substrate 100 pointing to the top surface of the substrate 100, the distance from the bottom surface of each sub-drift region 111 to the top surface of the substrate 100 decreases.

[0039] Because the drift region 110 includes multiple sub-drift regions 111 with different dopant ion concentrations, and the dopant ion concentrations of each sub-drift region 111 increase in a direction from the bottom surface of the substrate 100 to the top surface of the substrate 100, this helps increase the average concentration of dopant ions in the drift region 110, thereby reducing the on-resistance of the semiconductor structure and thereby improving the performance of the semiconductor structure. Furthermore, the drift region 110 includes multiple sub-drift regions 111 with different dopant ion concentrations, and the drain doping region 141 is located within the sub-drift region 111 with the highest dopant ion concentration in the drift region 110, thereby facilitating an increase in the longitudinal dimension of the drain doping region 141 to the bottom of the drift region 110, thereby helping to improve the electric field concentration in the drain doping region 141 in the longitudinal direction, thereby reducing the electric field strength in the drain doping region 141 in the longitudinal direction, and correspondingly helping to improve the performance of the semiconductor structure.

[0040] Accordingly, in this embodiment, the drift region 110 is located in the substrate 100 in the first area i.

[0041] In this embodiment, the first-type dopant ions are N-type ions, such as P ions, As ions, or Sb ions. In other embodiments, the first-type dopant ions may also be P-type ions. Accordingly, when the substrate is a P-type substrate and the first-type dopant ions are P-type ions, the substrate has a deep N-type well (DNW) region, and the drift region is located in the deep N-type well region.

[0042] In this embodiment, the drift region 110 includes a first sub-drift region 112 and a second sub-drift region 113 located in the first sub-drift region 112 , that is, the doping ion concentration of the second sub-drift region 113 is greater than the doping ion concentration of the first sub-drift region 112 .

[0043] It should be noted that the lateral width of the second sub-drift region 113 is greater than the lateral width of the first sub-drift region 112 , and the sidewall of the second sub-drift region 113 facing the first body region 121 is located between the first body region 121 and the first sub-drift region 112 .

[0044] The lateral width refers to a direction parallel to the top surface of the substrate 100 and perpendicular to the sidewall of the drift region 110 .

[0045] The lateral width of the second sub-drift region 113 is greater than the lateral width of the first sub-drift region 112 , which is beneficial to increasing the lateral width of the drift region 110 , thereby facilitating increasing the partial pressure borne by the drift region 110 .

[0046] It should also be noted that there is a gap between the first body region 121 and the second sub-drift region 113, which is beneficial to improving the situation where the doping ion concentration in the area between the first body region 121 and the second sub-drift region 113 changes sharply, thereby helping to reduce the electric field strength in the area between the first body region 121 and the second sub-drift region 113.

[0047] In this embodiment, the drift region 110 further includes a third sub-drift region 114 located in the second sub-drift region 113 , with a gap between the sidewall of the third sub-drift region 114 facing the first body region 121 and the second sub-drift region 113 .

[0048] It can be understood that the doping ion concentration of the third sub-drift region 114 is greater than the doping ion concentration of the second sub-drift region 113 , which is beneficial to further increase the average doping ion concentration of the drift region 110 , thereby further reducing the on-resistance of the semiconductor structure.

[0049] The first body region 121 is used to form a conducting channel of the semiconductor structure and provides a process basis for forming the source doping region 142 .

[0050] The first body region 121 serves as the body region 120 .

[0051] Correspondingly, in this embodiment, the first body region 121 is located in the substrate 100 in the second region ii.

[0052] In this embodiment, the first-type dopant ions are N-type ions, such as P ions, As ions, or Sb ions. Accordingly, the second-type dopant ions are P-type ions, such as B ions, Ga ions, or In ions. In other embodiments, when the first-type dopant ions are P-type ions, the second-type dopant ions may also be N-type ions.

[0053] In this embodiment, the semiconductor structure also includes: a second body region 122, located at the bottom of the first body region 121 and in the substrate 100 between the first body region 121 and the second sub-drift region 113, the second body region 122 is in contact with the first body region 121 and the second sub-drift region 113, and there is a gap between the second body region 122 and the first sub-drift region 112, the second body region 122 has the second type of dopant ions, and the dopant ion concentration of the second body region 122 is less than the dopant ion concentration of the first body region 121.

[0054] It can be understood that the second body region 122 and the first body region 121 both serve as the body region 120 .

[0055] The second body region 122 is in contact with the second sub-drift region 113, and the doping ion concentration of the second body region 122 is lower than the doping ion concentration of the first body region 121, which is beneficial to reducing the amplitude of the change in the doping ion concentration at the junction of the body region 120 and the drift region 110, and is beneficial to forming an inversion layer at the junction of the second body region 122 and the second sub-drift region 113, thereby facilitating a more uniform electric field distribution at the junction of the body region 120 and the drift region 110, and is also beneficial to reducing the electric field peak at the junction of the body region 120 and the drift region 110, thereby facilitating improving the breakdown voltage at the junction of the body region 120 and the drift region 110; moreover, it is also beneficial to improving the problem of fast hot carrier relaxation time between the drift region 110 and the body region 120.

[0056] There is a gap between the second body region 122 and the first sub-drift region 112, which is beneficial to improving the situation where the doping ion concentration in the area between the second body region 122 and the first sub-drift region 112 changes sharply, thereby helping to reduce the electric field strength in the area between the second body region 122 and the first sub-drift region 112.

[0057] In this embodiment, the semiconductor structure further includes: a third body region 123, located in the substrate 100 at the bottom of the second body region 122, that is, the third body region 123, the second body region 122 and the first body region 121 all serve as the body region 120, the third body region 123 is in contact with the second body region 122, the second sub-drift region 113, and the first sub-drift region 112, the third body region 123 has the second type dopant ions, and the dopant ion concentration of the third body region 123 is less than the dopant ion concentration of the second body region 122, which is beneficial to further reduce the amplitude of the concentration change of the dopant ions at the junction of the body region 120 and the drift region 110, and correspondingly improves the situation of the sharp change of the dopant ion concentration in the area between the body region 120 and the drift region 110, thereby further improving the uniformity of the electric field distribution at the junction of the body region 120 and the drift region 110.

[0058] Specifically, along a direction parallel to the top surface of the substrate 100, the third body region 123 extends to part of the bottom of the first sub-drift region 112, so as to facilitate the formation of an inversion layer at the bottom of the first sub-drift region 112, thereby facilitating the formation of a depletion region with a larger longitudinal dimension when the semiconductor device is reverse biased, thereby facilitating the improvement of the electric field distribution, reducing the local electric field strength, and correspondingly improving the breakdown voltage of the semiconductor device.

[0059] The gate structure 130 is used to control the opening and closing of the channel.

[0060] The gate structure 130 includes a gate dielectric layer (not labeled) and a gate layer (not labeled) covering the gate dielectric layer. In this embodiment, the gate structure 130 is a polysilicon gate structure, the gate dielectric layer is made of silicon oxide, and the gate layer is made of polysilicon.

[0061] It is worth noting that since the electric field strength of the drain doping region 141 in the longitudinal direction is reduced, the electric field distribution in the area between the drift region 110 and the drain doping region 141 is more uniform, which is beneficial to improving the capacitance effect, and further beneficial to reducing the Miller capacitance between the gate structure 130 and the drain doping region 141, and also reducing the power consumption of the semiconductor device.

[0062] In this embodiment, the semiconductor structure further includes a sidewall spacer 131 located on the sidewall of the gate structure 130 .

[0063] The sidewall spacer 131 protects the sidewall of the gate structure 130 .

[0064] It should be noted that the material of the sidewall spacer 131 may be one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon carbonitride oxide, silicon oxynitride, boron nitride and boron carbonitride.

[0065] It should also be noted that the sidewall 131 can be a single-layer structure or a stacked structure.

[0066] In other embodiments, the semiconductor structure further includes a field plate located on a portion of the drift region between the gate layer and the substrate, with the gate layer covering the gate dielectric layer and a portion of the field plate. Accordingly, a sidewall spacer located on one side of the field plate is formed on the field plate.

[0067] When the device is working, the drain doping region 141 and the source doping region 142 are used to provide carrier sources.

[0068] In this embodiment, the drain doping region 141 is used as the drain of the LDMOS transistor, and the source doping region 142 is used as the source of the LDMOS transistor.

[0069] In this embodiment, the first-type dopant ions are N-type ions; accordingly, the drain doping region 141 and the source doping region 142 are both doped with N-type ions. Furthermore, the dopant ion concentrations in the drain doping region 141 and the source doping region 142 are both greater than the dopant ion concentration in each of the drift sub-regions 111 .

[0070] In other embodiments, when the first-type doping ions are P-type ions, both the drain doping region and the source doping region are doped with P-type ions.

[0071] In this embodiment, the semiconductor structure includes: a body contact region 143 located in the first body region 121 on a side of the source doping region 142 facing away from the drain doping region 141 .

[0072] Specifically, the body contact region 143 is connected to the source doping region 142 .

[0073] More specifically, both the body contact region 143 and the source doping region 142 are connected to the ground terminal.

[0074] In this embodiment, the semiconductor structure further includes an interlayer dielectric layer (not shown), which is located on the substrate 100 and covers the gate structure 130 and the spacer 131 .

[0075] Specifically, the material of the interlayer dielectric layer is a dielectric material.

[0076] In this embodiment, the semiconductor structure further includes: a gate plug 151, which penetrates the interlayer dielectric layer and contacts the gate structure 130; a drain plug 152, which penetrates the interlayer dielectric layer and contacts the drain doped region 141; a source plug 153, which penetrates the interlayer dielectric layer and contacts the source doped region 142; a body contact region plug 154 which penetrates the interlayer dielectric layer and contacts the body contact region 143; and an interconnect structure 155, which is located in the interlayer dielectric layer on top of the source plug 153 and the body contact region plug 154, and the interconnect structure 155 contacts the source plug 153 and the body contact region plug 154 respectively. That is, the body contact region 143 and the source doped region 142 are connected through the interconnect structure 155, the source plug 153 and the body contact region plug 154.

[0077] Specifically, the body contact region 143 and the source doping region 142 are connected to the ground terminal through the interconnect structure 155 , the source plug 153 , and the body contact region plug 154 .

[0078] Correspondingly, the present invention also provides a method for forming a semiconductor structure. Figures 3 to 14 1 is a schematic structural diagram corresponding to each step in an embodiment of a method for forming a semiconductor structure of the present invention.

[0079] refer to Figure 3 , providing a substrate 500, along a direction parallel to the top surface of the substrate 500, the substrate 500 includes a first region I and a second region II arranged adjacent to each other.

[0080] The substrate 100 is used to provide a process platform for forming a semiconductor structure. In this embodiment, the semiconductor structure is an LDMOS transistor, which can be an N-type transistor or a P-type transistor.

[0081] The substrate 500 in the first region I is used to provide a process basis for the subsequent formation of a drift region and a portion of a body region, and the substrate 500 in the second region II is used to provide a process basis for the subsequent formation of a first body region.

[0082] In this embodiment, the base includes a substrate (not shown), which is a silicon substrate. In other embodiments, the substrate may be made of other materials such as germanium, silicon germanium, silicon carbide, gallium arsenide, or indium gallium. The substrate may also be a silicon-on-insulator substrate or a germanium-on-insulator substrate, or other types of substrates.

[0083] In this embodiment, the substrate is a P-type substrate (P-Sub), and the substrate is doped with P-type ions. As an example, the P-type ions include B ions, Ga ions, or In ions.

[0084] refer to Figures 4 to 6 A drift region 510 is formed in the substrate 500 of the first region I, and the drift region has first-type dopant ions. The drift region 510 includes a plurality of sub-drift regions 511 with different dopant ion concentrations. Any of the sub-drift regions 511 close to the top surface of the substrate 500 is located in another adjacent sub-drift region 511, and the dopant ion concentrations of each sub-drift region 511 increase gradually along the direction from the bottom surface of the substrate 500 to the top surface of the substrate 500.

[0085] The drift region 510 is used to withstand a large partial pressure.

[0086] It can be understood that since any of the sub-drift regions 511 close to the top surface of the substrate 500 is located in another adjacent sub-drift region 511, that is, along the direction of the bottom surface of the substrate 500 pointing to the top surface of the substrate 500, the distance from the bottom surface of each sub-drift region 511 to the top surface of the substrate 500 decreases.

[0087] Because the drift region 510 includes multiple sub-drift regions 511 with different dopant ion concentrations, and the dopant ion concentrations of each sub-drift region 511 increase in a direction from the bottom surface of the substrate 500 to the top surface of the substrate 500, this helps increase the average concentration of dopant ions in the drift region 510, thereby reducing the on-resistance of the semiconductor structure and thereby improving the performance of the semiconductor structure. Furthermore, the drift region 510 includes multiple sub-drift regions 511 with different dopant ion concentrations, and the subsequent drain doping region is located in the sub-drift region with the highest dopant ion concentration in the drift region 510, which facilitates increasing the longitudinal dimension of the drain doping region to the bottom of the drift region 510, thereby improving the electric field concentration in the drain doping region in the longitudinal direction, thereby reducing the electric field strength in the drain doping region in the longitudinal direction, and correspondingly improving the performance of the semiconductor structure.

[0088] In this embodiment, the first-type dopant ions are N-type ions, such as P ions, As ions, or Sb ions. In other embodiments, the first-type dopant ions may also be P-type ions. Accordingly, when the substrate is a P-type substrate and the first-type dopant ions are P-type ions, a deep N-type well (DNW) region is defined in the substrate, and the drift region is formed in the DNW region.

[0089] In this embodiment, the steps of forming the drift region 510 include: Figure 4 As shown, a first sub-drift region 512 is formed in the substrate 500 of the first region I; Figure 5As shown, a second sub-drift region 513 is formed in the substrate 500 of the first region I, and the second sub-drift region 513 is located in the first sub-drift region 512, that is, the doping ion concentration of the second sub-drift region 513 is greater than the doping ion concentration of the first sub-drift region 512, and the lateral width of the second sub-drift region 513 is greater than the lateral width of the first sub-drift region 512, and the side wall of the second sub-drift region 513 facing the first region I is located between the first region I and the first sub-drift region 512; the drift region 510 includes a first sub-drift region 512 and a second sub-drift region 513.

[0090] The lateral width refers to a direction parallel to the top surface of the substrate 500 and perpendicular to the sidewall of the drift region 510 .

[0091] After forming the first sub-drift region 512 in the substrate 500 of the first region I, forming the second sub-drift region 513 in the first sub-drift region 512 is beneficial to reducing the difficulty of forming the first sub-drift region 512 and the second sub-drift region 513.

[0092] The lateral width of the second sub-drift region 513 is greater than the lateral width of the first sub-drift region 512 , which is beneficial to increasing the lateral width of the drift region 510 , thereby facilitating increasing the partial pressure borne by the drift region 510 .

[0093] In this embodiment, the step of forming the drift region 510 further includes: Figure 6 As shown, after the second sub-drift region 513 is formed, a third sub-drift region 514 is formed in the substrate 500 of the first region I, and the third sub-drift region 514 is located in the second sub-drift region 513, and there is a gap between the side wall of the third sub-drift region 514 facing the first region I and the second sub-drift region 513; the drift region 510 includes the third sub-drift region 514, the second sub-drift region 513 and the first sub-drift region 512.

[0094] It can be understood that the doping ion concentration of the third sub-drift region 514 is greater than the doping ion concentration of the second sub-drift region 513, which is beneficial to further increase the average doping ion concentration of the drift region 510, thereby further reducing the on-resistance of the semiconductor structure.

[0095] Moreover, after forming the second sub-drift region 513 , forming the third sub-drift region 514 in the substrate 500 in the first region I is beneficial for reducing the difficulty of forming the third sub-drift region 514 .

[0096] refer to Figures 7 to 11, forming a body region 520 in the substrate 500, the step of forming the body region 520 includes: forming a first body region 521 (such as Figure 11 As shown), the first body region 521 contains second-type dopant ions having a conductivity type different from that of the first-type dopant ions.

[0097] The first body region 521 is used to form a conducting channel of the semiconductor structure and provide a process basis for the subsequent formation of a source doping region.

[0098] In this embodiment, in the step of forming the first body region 521, there is a gap between the first body region 521 and the second sub-drift region 513, which is beneficial to reducing the probability of overlap between the first body region 521 and the second sub-drift region 513, thereby facilitating the difficulty of forming the first body region 521 and the second sub-drift region 513.

[0099] In this embodiment, the step of forming the body region 520 further includes: Figures 9 and 10 As shown, before forming the first body region 521, a second body region 522 is formed in the substrate of the second region II and part of the first region I, the second body region 522 is in contact with the second sub-drift region 513, and there is a gap between the second body region 522 and the first sub-drift region 512, and the second body region 522 contains the second type dopant ions; as shown Figure 11 As shown, in the step of forming the first body region 521, the first body region 521 is formed in the second body region 522 of the second region II, and the doping ion concentration of the first body region 521 is greater than the doping ion concentration of the second body region 522, that is, the doping ion concentration of the second body region 522 is less than the doping ion concentration of the first body region 521.

[0100] After forming the second body region 522 in the substrate of the second region II and part of the first region I, forming the first body region 521 in the second body region 522 of the second region II helps to reduce the difficulty of forming the second body region 522 .

[0101] The second body region 522 is in contact with the second sub-drift region 513, and the doping ion concentration of the second body region 522 is lower than the doping ion concentration of the first body region 521, which is beneficial to reducing the amplitude of the concentration change of the doping ions at the junction of the body region 520 and the drift region 510, and is beneficial to forming an inversion layer at the junction of the second body region 522 and the second sub-drift region 513, thereby facilitating a more uniform electric field distribution at the junction of the body region 520 and the drift region 510, and is also beneficial to reducing the electric field peak at the junction of the body region 520 and the drift region 510, thereby facilitating improving the breakdown voltage at the junction of the body region 520 and the drift region 510; moreover, it is also beneficial to improving the problem of fast hot carrier relaxation time between the drift region 510 and the body region 520.

[0102] There is a gap between the second body region 522 and the first sub-drift region 512, which is beneficial to improving the situation where the doping ion concentration in the area between the second body region 522 and the first sub-drift region 512 changes sharply, thereby helping to reduce the electric field strength in the area between the second body region 522 and the first sub-drift region 512.

[0103] It should be noted that the steps of forming the second body region 522 include: Figure 9 As shown, an initial second body region 522' is formed in the substrate of the second region II, and the initial second body region 522' contains the second type dopant ions; Figure 10 As shown, the initial second body region 522 ′ is annealed to extend the initial second body region 522 ′ to a position contacting the second sub-drift region 513 and spaced apart from the first sub-drift region 512 , so as to form the second body region 522 .

[0104] First, an initial second body region 522 ′ is formed in the substrate in the second region II, and then the initial second body region 522 ′ is annealed to form the second body region 522 , which is beneficial to further reduce the difficulty of forming the second body region 522 .

[0105] In this embodiment, the step of forming the body region 520 further includes: Figure 7 and Figure 8As shown, before forming the second body region 522, a third body region 523 is formed in the substrate 500 of the second region II and part of the first region I, and the third body region 523 is in contact with the second sub-drift region 513 and the first sub-drift region 512, and the third body region 523 has the second type dopant ions; in the step of forming the second body region 522, the second body region 522 is formed in the third body region 523, and the dopant ion concentration of the second body region 522 is greater than the dopant ion concentration of the third body region 523, that is, the dopant ion concentration of the third body region 523 is less than the dopant ion concentration of the second body region 522.

[0106] The third body region 523 is in contact with both the second sub-drift region 513 and the first sub-drift region 512. The third body region 523 contains the second type of dopant ions, and the dopant ion concentration of the third body region 523 is less than the dopant ion concentration of the second body region 522, which is beneficial to further reduce the amplitude of the concentration change of the dopant ions at the junction of the body region 520 and the drift region 510, and correspondingly improves the situation of the sharp change of the dopant ion concentration in the area between the body region 520 and the drift region 510, thereby helping to further improve the uniformity of the electric field distribution at the junction of the body region 520 and the drift region 510.

[0107] Furthermore, first forming the third body region 523 in the second region II and part of the first region I of the substrate 500 and then forming the second body region 522 in the third body region 523 helps to reduce the difficulty of forming the third body region 523 .

[0108] Specifically, the steps of forming the third body region 523 include: Figure 7 As shown, an initial third body region 523 ′ is formed in the substrate 500 in the second region II′, and the initial third body region 523 ′ has the second type dopant ions; Figure 8 As shown, the initial third body region 523 ′ is annealed to extend the third body region 523 to a position in contact with both the second sub-drift region 513 and the first sub-drift region 512 , so as to form the third body region 523 .

[0109] An initial third body region 523 ′ is first formed in the substrate 500 in the second region II′, and then the initial third body region 523 ′ is annealed to form the third body region 523 , which is beneficial to further reduce the difficulty of forming the third body region 523 .

[0110] More specifically, in the step of annealing the initial third body region 523 ′ to form the third body region 523 , the third body region 523 extends to a position contacting a portion of the bottom of the first sub-drift region 512 .

[0111] The third body region 523 extends to a position in contact with part of the bottom of the first sub-drift region 512, which facilitates the formation of an inversion layer at the bottom of the first sub-drift region 512, thereby facilitating the formation of a depletion region with a larger longitudinal dimension when the semiconductor device is reverse biased, thereby facilitating the improvement of the electric field distribution, reducing the local electric field strength, and correspondingly increasing the breakdown voltage of the semiconductor device.

[0112] In this embodiment, the body region 520 is formed after the drift region 510 is formed, which is beneficial to reducing changes to the existing process, thereby facilitating combination with the existing process, and further helping to reduce the difficulty of forming the drift region 510 and the body region 520.

[0113] In other embodiments, the drift region may be formed after the body region is formed.

[0114] In other embodiments, the steps of forming the drift region and the body region include: forming a third body region in the substrate of the second region and part of the first region; after forming the third body region, forming a first sub-drift region in the substrate of the first region, and the bottom of the first sub-drift region is in contact with the third body region; after forming the first sub-drift region, forming the second body region in the third body region of the second region and part of the first region, and there is a gap between the second body region and the first sub-drift region; after forming the second body region, forming the second sub-drift region in the first sub-drift region, and the second sub-drift region is in contact with the second body region; after forming the second sub-drift region, forming a first body region in the second body region of the second region; after forming the first body region, forming a third sub-drift region in the second sub-drift region.

[0115] refer to Figure 12 A gate structure 530 is formed on the substrate 500 at the junction of the first region I and the second region II, and the gate structure 530 covers a portion of the drift region 510 and a portion of the first body region 521.

[0116] The gate structure 530 is used to control the opening and closing of the channel.

[0117] The gate structure 530 includes a gate dielectric layer (not labeled) and a gate layer (not labeled) covering the gate dielectric layer. In this embodiment, the gate structure 530 is a polysilicon gate structure, the gate dielectric layer is made of silicon oxide, and the gate layer is made of polysilicon.

[0118] Continue to refer Figure 12 After forming the gate structure 530 , the method further includes: forming the sidewall 531 on the sidewall of the gate structure 530 .

[0119] The sidewall spacer 531 protects the sidewall of the gate structure 530 .

[0120] It should be noted that the material of the sidewall spacer may be one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon carbonitride oxide, silicon oxynitride, boron nitride and boron carbonitride.

[0121] It should be noted that the material of the sidewall spacer 531 can be one or more of silicon oxide, silicon nitride, silicon carbide, silicon carbonitride, silicon carbonitride oxide, silicon oxynitride, boron nitride and boron carbonitride.

[0122] It should also be noted that the sidewall 531 can be a single-layer structure or a stacked structure.

[0123] In other embodiments, the formation method further includes: in the step of forming the gate structure, forming a field plate on the substrate on the side of the gate dielectric, covering a portion of the drift region, with the gate layer covering the gate dielectric layer and a portion of the field plate. Accordingly, in the step of forming the sidewall spacer, the sidewall spacer located on one side of the field plate is formed on the field plate.

[0124] refer to Figure 13 A drain doping region 541 is formed in the drift region 510 on one side of the gate structure 530 , and the drain doping region 541 is located in the sub-drift region 511 having the highest doping ion concentration in the drift region 510 .

[0125] Since the electric field strength of the drain doping region 541 in the longitudinal direction is reduced, the electric field distribution in the area between the drift region 510 and the drain doping region 541 is more uniform, which is beneficial to improving the capacitance effect, and further beneficial to reducing the Miller capacitance between the gate structure 530 and the drain doping region 541, and also reducing the power consumption of the semiconductor device.

[0126] Continue to refer Figure 13 , a source doped region 542 is formed in the first body region 521 on the other side of the gate structure 530 .

[0127] When the device is working, the drain doping region 541 and the source doping region 542 are used to provide carrier sources.

[0128] In this embodiment, the drain doping region 541 is used as the drain of the LDMOS transistor, and the source doping region 542 is used as the source of the LDMOS transistor.

[0129] In this embodiment, the first-type dopant ions are N-type ions; accordingly, both the drain doping region 541 and the source doping region 542 are doped with N-type ions. Furthermore, the dopant ion concentrations in the drain doping region 541 and the source doping region 542 are greater than the dopant ion concentration in each of the drift sub-regions 511 .

[0130] In other embodiments, when the first-type doping ions are P-type ions, both the drain doping region and the source doping region are doped with P-type ions.

[0131] In this embodiment, after forming the gate structure 530 , the method further includes forming a body contact region 543 in the first body region 521 . The body contact region 543 is located on a side of the source doping region 542 facing away from the drain doping region 541 .

[0132] Specifically, the body contact region 543 is connected to the source doping region 542 .

[0133] More specifically, the body contact region 543 and the source doping region 542 are both connected to the ground terminal.

[0134] In this embodiment, after forming the drain doping region 541 , the source doping region 542 and the body contact region 543 , the method further includes forming an interlayer dielectric layer (not shown) on the substrate 500 to cover the gate structure 530 and the sidewall spacer 531 .

[0135] Specifically, the material of the interlayer dielectric layer is a dielectric material.

[0136] In this embodiment, the method for forming the semiconductor structure further includes: Figure 14 As shown, a gate plug 551 is formed that penetrates the interlayer dielectric layer and contacts the gate structure 530, a drain plug 552 is formed that penetrates the interlayer dielectric layer and contacts the drain doping region 541, a source plug 553 is formed that penetrates the interlayer dielectric layer and contacts the source doping region 542, and a body contact region plug 554 is formed that penetrates the interlayer dielectric layer and contacts the body contact region 543; after forming the source plug 553 and the body contact region plug 554, an interconnection structure 555 is formed in the interlayer dielectric layer on top of the source plug 553 and the body contact region plug 554, and the interconnection structure 555 contacts the source plug 553 and the body contact region plug 554 respectively, so that the body contact region 543 and the source doping region 542 are connected through the interconnection structure 555, the source plug 553 and the body contact region plug 554.

[0137] Specifically, the body contact region 543 and the source doping region 542 are connected to the ground terminal through the interconnection structure 555 , the source plug 553 , and the body contact region plug 554 .

[0138] It should be noted that the semiconductor structure can be formed by the formation method described in the above embodiment, or by other formation methods. For the detailed description of the semiconductor structure of this embodiment, reference can be made to the corresponding description in the above embodiment, and this embodiment will not be repeated here.

[0139] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A semiconductor structure, characterized in that include: substrate; a drift region located in the substrate, wherein the drift region has first-type dopant ions, and the drift region includes a plurality of sub-drift regions with different dopant ion concentrations, wherein any sub-drift region close to the top surface of the substrate is located within another adjacent sub-drift region, and the dopant ion concentrations of the sub-drift regions increase in a direction from the bottom surface of the substrate to the top surface of the substrate; a first body region located in the substrate at a side of the drift region, wherein the first body region contains second-type dopant ions having a conductivity type different from that of the first-type dopant ions; a gate structure, located on the substrate and covering a portion of the drift region and a portion of the first body region; a drain doping region, located on one side of the gate structure and in the sub-drift region having the highest doping ion concentration in the drift region; The source doped region is located in the first body region on the other side of the gate structure.

2. The semiconductor structure according to claim 1, wherein The drift region includes a first sub-drift region and a second sub-drift region located in the first sub-drift region; A lateral width of the second sub-drift region is greater than a lateral width of the first sub-drift region, and a sidewall of the second sub-drift region facing the first body region is located between the first body region and the first sub-drift region.

3. The semiconductor structure according to claim 2, wherein: The semiconductor structure also includes: a second body region, located at the bottom of the first body region and in the substrate between the first body region and the second sub-drift region, the second body region is in contact with the first body region and the second sub-drift region, and there is a gap between the second body region and the first sub-drift region, the second body region has the second type of dopant ions, and the dopant ion concentration of the second body region is less than the dopant ion concentration of the first body region.

4. The semiconductor structure according to claim 3, wherein: The semiconductor structure further comprises: A third body region is located in the substrate at the bottom of the second body region, the third body region is in contact with the second body region, the second sub-drift region, and the first sub-drift region, the third body region has the second type of dopant ions, and the dopant ion concentration of the third body region is less than the dopant ion concentration of the second body region.

5. The semiconductor structure according to claim 4, wherein: The third body region extends to a portion of the bottom of the first drift sub-region along a direction parallel to the top surface of the substrate.

6. The semiconductor structure according to claim 2, wherein: The drift region further includes a third sub-drift region located in the second sub-drift region, and a gap is formed between a sidewall of the third sub-drift region facing the first body region and the second sub-drift region.

7. The semiconductor structure according to any one of claims 2 to 6, wherein: A gap is provided between the first body region and the second drift sub-region.

8. A method for forming a semiconductor structure, characterized in that: include: Providing a substrate, wherein the substrate includes a first region and a second region adjacent to each other along a direction parallel to a top surface of the substrate; forming a drift region in the substrate of the first region, wherein the drift region has first-type dopant ions, and the drift region includes a plurality of sub-drift regions with different dopant ion concentrations, wherein any sub-drift region close to the top surface of the substrate is located within another adjacent sub-drift region, and the dopant ion concentrations of the sub-drift regions increase gradually in a direction from the bottom surface of the substrate to the top surface of the substrate; forming a body region in the substrate, the step of forming the body region comprising: forming a first body region in the substrate in the second region, the first body region having second-type dopant ions having a conductivity type different from that of the first-type dopant ions; forming a gate structure on the substrate at a junction of the first region and the second region, wherein the gate structure covers a portion of the drift region and a portion of the first body region; forming a drain doping region in the drift region on one side of the gate structure, wherein the drain doping region is located in the sub-drift region having the highest doping ion concentration in the drift region; A source doping region is formed in the first body region on the other side of the gate structure.

9. The method for forming a semiconductor structure according to claim 8, wherein: The step of forming the drift region includes: forming a first sub-drift region in a substrate of the first region; forming a second sub-drift region in the substrate of the first region, the second sub-drift region being located in the first sub-drift region, the second sub-drift region having a lateral width greater than a lateral width of the first sub-drift region, and a sidewall of the second sub-drift region facing the first region being located between the first region and the first sub-drift region; The drift region includes a first sub-drift region and a second sub-drift region.

10. The method for forming a semiconductor structure according to claim 9, wherein: The step of forming the drift region further includes: after forming the second sub-drift region, forming a third sub-drift region in the substrate of the first region, the third sub-drift region being located in the second sub-drift region, with a gap between a sidewall of the third sub-drift region facing the first region and the second sub-drift region; The drift region includes the third sub-drift region, the second sub-drift region, and the first sub-drift region.

11. The method for forming a semiconductor structure according to claim 9, wherein: The step of forming the body region further includes: before forming the first body region, forming a second body region in the substrate of the second region and a portion of the first region, wherein the second body region is in contact with the second drift sub-region, a gap is provided between the second body region and the first drift sub-region, and the second body region contains the second type dopant ions; In the step of forming the first body region, the first body region is formed in the second body region of the second area, and the doping ion concentration of the first body region is greater than the doping ion concentration of the second body region.

12. The method for forming a semiconductor structure according to claim 11, wherein: The step of forming the second body region comprises: forming an initial second body region in the substrate of the second region, wherein the initial second body region has the second type dopant ions; Annealing is performed on the initial second body region to extend the initial second body region to a position contacting the second sub-drift region and spaced apart from the first sub-drift region, so as to form the second body region.

13. The method for forming a semiconductor structure according to claim 12, wherein: The step of forming the body region further includes: before forming the second body region, forming a third body region in the substrate of the second region and a portion of the first region, the third body region being in contact with both the second sub-drift region and the first sub-drift region, and the third body region having the second type dopant ions; In the step of forming the second body region, the second body region is formed in the third body region, and the doping ion concentration of the second body region is greater than the doping ion concentration of the third body region.

14. The method for forming a semiconductor structure according to claim 13, wherein: The step of forming the third body region comprises: forming an initial third body region in the substrate of the second region, wherein the initial third body region has the second type dopant ions; The initial third body region is annealed to extend the third body region to a position contacting both the second sub-drift region and the first sub-drift region, thereby forming the third body region.

15. The method for forming a semiconductor structure according to claim 14, wherein: In the step of annealing the initial third body region to form the third body region, the third body region extends to a position contacting a portion of the bottom of the first sub-drift region.

16. The method for forming a semiconductor structure according to any one of claims 8 to 15, wherein: After forming the drift region, the body region is formed.

Images