Optimized II-type superlattice infrared detector chip bottom filling method, preparation method and infrared detector
By depositing a dielectric layer between the infrared detector chip and the readout circuit and interconnecting indium pillars, the problem of filling voids in the existing technology is solved, and the imaging quality and reliability of the infrared detector are improved.
CN120751798AInactive Publication Date: 2025-10-03山西创芯光电科技有限公司
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Patent Information
- Application Number
- CN202511173390.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-21
- Publication Date
- 2025-10-03
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
Technical Problem
In the existing process, the gap filling between the type-II superlattice infrared focal plane detector chip and the readout circuit is prone to produce voids, resulting in imaging defects and affecting the performance of the infrared detector.
Method used
After etching the mesa, a dielectric layer is deposited and polished to make it flat. A hole is opened and an indium column is prepared. The bottom is then filled with glue. The dielectric layer material is silicon oxide or silicon nitride, and the filling is completed by high-temperature curing.
Benefits of technology
The void defects caused by epoxy resin filling are avoided, the imaging quality of the infrared focal plane detector chip is optimized, and the performance of the infrared detector is improved.
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Abstract
The invention provides an optimized II-type superlattice infrared detector chip bottom filling method, a preparation method and an infrared detector, and belongs to the field of infrared detectors. The problem that the performance of an infrared detector is affected due to the fact that the filling glue filled in an existing bottom filling process is prone to generating holes and finally causes defects during imaging of an infrared focal plane detector chip is solved. The method comprises the following steps that a dielectric layer is deposited on the surface of an epitaxial material after table top etching is completed, and the height of the dielectric layer is larger than the table top etching depth; after the dielectric layer is deposited, the surface of the dielectric layer is polished to be flat; opening holes in the dielectric layer on the surface of the table board; preparing an indium column in the opening of the dielectric layer, and then performing flip-chip bonding interconnection on the indium column at the epitaxial material end and the indium column on the readout circuit; filling bottom filling glue between the dielectric layer and the reading circuit after the reverse welding interconnection, and then curing the filling glue at high temperature; the invention is applied to the type-II superlattice infrared detector.
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