Slope signal generation circuit and slope signal generation method for power converter

Abstract

The application provides a slope signal generation circuit and a slope signal generation method for a power converter. The slope signal generation circuit compensates the slope of the slope signal according to a slope compensation curve, and non-linearly adjusts the slope of the slope signal in a predetermined duty cycle interval of a current ripple cancellation point of the power converter. The slope signal generation circuit disclosed in the application is particularly suitable for multi-phase power converters and multi-level power converters, and can effectively solve the problem of gate pulse mixing near the current ripple cancellation point. By using the slope modulation technology, the circuit optimizes the dynamic response performance while maintaining system stability. In the working interval of the non-current ripple cancellation point, the circuit maintains a low slope signal slope to ensure the system bandwidth. In the predetermined duty cycle interval near the current ripple cancellation point, the slope signal slope is smoothly increased through a non-linear adjustment mode, thereby avoiding the system shock problem caused by the sudden change of the slope in the traditional scheme.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power supply, in particular to a ramp signal generation circuit and a ramp signal generation method for a power converter. BACKGROUND

[0002] In electronic products, power converters have been widely used to provide power supply voltage for electronic devices inside the electronic products. For example, the power supply voltage of the electronic devices is higher than the battery voltage, and the power converter is used to convert the battery voltage into the power supply voltage of the electronic devices so that the electronic devices can work correctly. The power converter can adopt a current mode or a voltage control mode, the current mode refers to that the power converter controls in a closed loop by detecting an inductor current signal, and has advantages of simple loop compensation and fast dynamic response. In the constant switching frequency current mode control, such as peak current mode (PCM), valley current mode (VCM) and average current mode (ACM), are widely used in the industry.

[0003] In the current mode control, the ramp compensation technology is an important means to improve the stability of the system, and the basic principle is to introduce a ramp signal related to the output voltage or current in the control loop, which is used to suppress the ripple and fluctuation in the switching converter. The traditional ramp compensation circuit usually adopts a fixed slope sawtooth signal, and the inductor current signal is compared with the ramp signal by a comparator to generate an error signal to adjust the duty cycle of the switching tube.

[0004] However, in the application of multi-phase interleaved parallel or multi-level topology, due to the superposition effect of inductor current, the system will have current ripple cancellation phenomenon at a certain duty cycle point (such as D=0.5 when two-phase interleaved parallel), which will cause the traditional fixed slope compensation scheme to have switching drive signal jitter (Jitter) problem near the ripple cancellation point. In the existing current mode control, the method of increasing the slope compensation slope is usually used to suppress the Jitter phenomenon, but this method will cause over-compensation problem in the working interval of the system at the non-ripple cancellation point. Over-compensation will make the current mode control degenerate into voltage mode control, which will cause the system phase to decrease at low frequency and the bandwidth to decrease, thereby affecting the dynamic response performance. In addition, slope switching can also be performed near the ripple cancellation point, but this sudden slope adjustment will cause fluctuations in the control loop and the output voltage, which is not conducive to the stable operation of the system. SUMMARY

[0005] In view of the above technical problems, the purpose of the present application is to provide a ramp signal generation circuit and a ramp signal generation method for a power converter, in which nonlinear slope compensation is performed near the ripple cancellation point, so as to optimize the dynamic response performance while ensuring the stability of the system.

[0006] According to a first aspect of the present application, a ramp signal generating circuit for a power converter is provided, the power converter comprising an inductor, a plurality of switch tubes for controlling a charging process and a discharging process of the inductor, and a current control loop for driving the plurality of switch tubes, the power converter generating an output voltage using a combined inductor current generated by switching actions of the plurality of switch tubes, the ramp signal generating circuit comprising:

[0007] a charging control module for generating a charging control signal according to the input voltage and the output voltage;

[0008] a transconductance amplifier for generating a charging current according to the charging control signal;

[0009] a capacitor connected between an output terminal of the transconductance amplifier and a ground,

[0010] a switch connected in parallel with the capacitor,

[0011] wherein, during a switching period of the power converter, the capacitor is charged using the charging current and discharged via the switch to generate the ramp signal for adjusting a first slope of a detection signal of the combined inductor current,

[0012] the charging control module controls a magnitude of the charging control signal according to a relationship curve between a duty cycle of the power converter and a magnitude of the charging control signal, in consecutive first duty cycle intervals and second duty cycle intervals, the charging control module adjusts a second slope of the ramp signal according to a linear curve and a nonlinear curve respectively.

[0013] Optionally, the first duty cycle intervals do not include a current ripple cancellation point of the power converter, and the second duty cycle intervals include the current ripple cancellation point, the current ripple cancellation point representing a duty cycle corresponding to a minimum value of a current ripple generated by switching actions of the plurality of switch tubes.

[0014] Optionally, in the first duty cycle intervals, the charging control signal is equal to a first control signal.

[0015] Optionally, the nonlinear curve can be any one of a polyline curve or a smooth curve.

[0016] Optionally, the polyline curve comprises a rising phase, a peak phase, and a falling phase, and the current ripple cancellation point is located in the peak phase.

[0017] Optionally, in the peak phase, the charging control module adds a first control signal and a second control signal to obtain the charging control signal,

[0018] in the rising phase, the charging control module adds the first control signal and the third control signal to obtain the charging control signal,

[0019] in the falling phase, the charging control module adds the first control signal and the fourth control signal to obtain the charging control signal.

[0020] Optionally, the charging control module comprises:

[0021] a first operational amplifier for obtaining the first control signal; and,

[0022] a charging compensation module for selecting one of the second control signal, the third control signal and the fourth control signal according to the input voltage and the output voltage to generate a charging compensation signal,

[0023] wherein the charging control module adds the first control signal and the charging compensation signal to obtain the charging control signal.

[0024] Optionally, the charging compensation module comprises:

[0025] a second operational amplifier for obtaining the second control signal;

[0026] a third operational amplifier and a fourth operational amplifier cascaded with each other to obtain the third control signal;

[0027] a fifth operational amplifier and a sixth operational amplifier cascaded with each other to obtain the fourth control signal.

[0028] Optionally, when the power converter is a step-down converter, the first operational amplifier obtains the first control signal according to the input voltage, the second operational amplifier obtains the second control signal according to the input voltage, a positive input terminal of the third operational amplifier receives the input voltage, a positive input terminal of the fourth operational amplifier receives the output voltage, a negative input terminal of the fourth operational amplifier receives an output terminal signal of the third operational amplifier, the fourth operational amplifier outputs the third control signal, a positive input terminal of the fifth operational amplifier receives the input voltage, a positive input terminal of the sixth operational amplifier receives an output terminal signal of the fifth operational amplifier, a negative input terminal of the sixth operational amplifier receives the output voltage, and the sixth operational amplifier outputs the fourth control signal;

[0029] When the power converter is a step-up converter, the first operational amplifier obtains the first control signal according to the output voltage, the second operational amplifier obtains the second control signal according to the output voltage, the positive input terminal of the third operational amplifier receives the output voltage, the positive input terminal of the fourth operational amplifier receives a difference signal of the output voltage and the input voltage, the negative input terminal of the fourth operational amplifier receives an output terminal signal of the third operational amplifier, the fourth operational amplifier outputs the third control signal, the positive input terminal of the fifth operational amplifier receives the output voltage, the positive input terminal of the sixth operational amplifier receives an output terminal signal of the fifth operational amplifier, the negative input terminal of the sixth operational amplifier receives a difference signal of the output voltage and the input voltage, and the sixth operational amplifier outputs the fourth control signal.

[0030] When the power converter is a step-up / down converter, the first operational amplifier obtains the first control signal according to a sum of the output voltage and the input voltage, the second operational amplifier obtains the second control signal according to the sum of the output voltage and the input voltage, the positive input terminal of the third operational amplifier receives the sum of the output voltage and the input voltage, the positive input terminal of the fourth operational amplifier receives the output voltage, the negative input terminal of the fourth operational amplifier receives an output terminal signal of the third operational amplifier, the fourth operational amplifier outputs the third control signal, the positive input terminal of the fifth operational amplifier receives the sum of the output voltage and the input voltage, the positive input terminal of the sixth operational amplifier receives an output terminal signal of the fifth operational amplifier, the negative input terminal of the sixth operational amplifier receives the output voltage, and the sixth operational amplifier outputs the fourth control signal.

[0031] Optionally, the duty ratio in the second duty ratio interval comprises a rising phase start duty ratio D1, a rising phase end duty ratio D2, a falling phase start duty ratio D3, and a falling phase end duty ratio D4, and the circuit parameters of the charge compensation module satisfy the following formula:

[0032] ,

[0033] ,

[0034] ,

[0035] ,

[0036] wherein Vin and Vo represent the input voltage and the output voltage of the power converter respectively, the gains of the second to fourth operational amplifiers are represented as k1 to k3 respectively, and the gain coefficients of the fifth and sixth operational amplifiers are represented as k5 and k6 respectively.

[0037] Optionally, the first operational amplifier comprises a first input end, a first output end of the same polarity as the first input end, and a second output end of the opposite polarity to the first input end.

[0038] The second output end receives the charge compensation signal respectively, and the first output end outputs the charge control signal.

[0039] And the difference between the first output end and the second output end is equal to the product of the gain of the first operational amplifier and the signal of the first input end.

[0040] When the power converter is a step-down converter, the first input end of the first operational amplifier receives the input voltage.

[0041] When the power converter is a step-up converter, the first input end of the first operational amplifier receives the output voltage.

[0042] When the power converter is a step-up / down converter, the first input end of the first operational amplifier receives the sum of the output voltage and the input voltage.

[0043] Optionally, the charge compensation module further comprises:

[0044] a first diode and a second diode, whose anodes are commonly connected to the output end of the fourth operational amplifier, the cathode of the first diode is connected to the output end of the second operational amplifier, and the cathode of the second diode is connected to the output end of the sixth operational amplifier; the charge compensation signal is generated at the anodes of the first diode and the second diode.

[0045] Optionally, the power converter comprises N current ripple cancellation points, and the relationship curve between the duty cycle of the power converter and the amplitude of the charge control signal comprises N second duty cycle intervals corresponding to the N current ripple cancellation points of the power converter, and N is an integer greater than or equal to 1.

[0046] Optionally, when N is greater than 1, the peak values of the charge compensation signal in the N second duty cycle intervals increase successively.

[0047] Optionally, the ramp signal generation circuit comprises N selection switches and N charge compensation modules, the N charge compensation modules are connected to the first operational amplifier via corresponding selection switches, and the second control signals generated by the N charge compensation modules have amplitudes that increase sequentially.

[0048] Optionally, the power converter comprises any one selected from a multi-phase power converter and a multi-level power converter.

[0049] According to a second aspect of the present application, a ramp signal generation circuit for a power converter is provided, the power converter comprising an inductor, a plurality of groups of switching tubes for controlling a charging process and a discharging process of the inductor, and a current control loop for driving the plurality of groups of switching tubes, the power converter generating an output voltage by using a combined inductor current generated by switching actions of the plurality of groups of switching tubes, the ramp signal generation circuit comprising:

[0050] a duty cycle calculation module configured to calculate a duty cycle according to an input voltage and an output voltage of the power converter;

[0051] a slope compensation module configured to obtain a slope of a ramp signal according to a preset slope compensation curve, and to calculate a digital value of the ramp signal in real time; and

[0052] a digital-to-analog converter configured to generate the ramp signal according to the slope,

[0053] wherein the slope compensation curve comprises a first duty cycle interval and a second duty cycle interval, and the slope compensation module adjusts the slope of the ramp signal according to a linear curve and a nonlinear curve respectively.

[0054] According to a third aspect of the present application, a control circuit for a power converter is provided, comprising a ramp signal generation circuit as disclosed in any embodiment of the present application.

[0055] According to a fourth aspect of the present application, a power converter is provided, comprising a control circuit as disclosed in any embodiment of the present application.

[0056] According to a fifth aspect of the present application, a ramp signal generation method for a power converter is provided, the power converter comprising an inductor, a plurality of groups of switching tubes for controlling a charging process and a discharging process of the inductor, and a current control loop for driving the plurality of groups of switching tubes, the power converter generating an output voltage by using a combined inductor current generated by switching actions of the plurality of groups of switching tubes, the ramp signal generation method comprising:

[0057] obtaining a current ripple cancellation point of the power converter, the current ripple cancellation point representing a duty cycle corresponding to a minimum value of the combined inductor current generated by the switching actions of the plurality of groups of switching tubes.

[0058] obtaining an input voltage and an output voltage of the power converter; and

[0059] generating a ramp signal according to the input voltage and the output voltage,

[0060] wherein, in the generating of the ramp signal, a slope of the ramp signal is compensated according to a slope compensation curve, and the slope of the ramp signal is nonlinearly adjusted at a predetermined duty cycle interval of a current ripple cancellation point of the power converter; the slope of the ramp signal is first increased and then decreased by the nonlinear adjustment, and the current ripple cancellation point is located at a maximum value part of the slope of the ramp signal.

[0061] The application has at least the following beneficial effects:

[0062] The ramp signal generation circuit and the ramp signal generation method for the power converter provided by the application control the size of the charging control signal according to the slope compensation curve (such as the relationship curve between the duty cycle of the power converter and the amplitude of the charging control signal) to adjust the slope of the ramp signal according to the linear curve and the nonlinear curve in the continuous first duty cycle interval and the second duty cycle interval, respectively, so that the slope of the ramp signal can be adjusted in real time according to different duty cycles when the slope compensation is performed, and the problem of the slope jump of the ramp signal near the current ripple cancellation point does not occur. Compared with the traditional scheme, the slope modulation scheme disclosed by the application can effectively solve the problem of the gate pulse mixing near the current ripple cancellation point, effectively avoid the overcompensation of the working point at the non-current ripple cancellation point, and avoid the problem of the oscillation of the system control loop and the output voltage caused by the smooth switching of the slope of the ramp signal, so that the system can have good stability and dynamic response performance.

[0063] In a further preferred embodiment, the second duty cycle interval includes the current ripple cancellation point of the power converter, and the nonlinear curve corresponding to the second duty cycle interval has a rising stage, a peak stage and a falling stage, so that when the slope of the ramp signal is nonlinearly adjusted in the second duty cycle interval, the slope value of the ramp signal can be controlled to be linearly increased and then linearly decreased at the duty cycle near the current ripple cancellation point, so that the system can only use high slope compensation near the current ripple cancellation point, and work at low slope compensation at more non-current ripple cancellation points, which not only avoids the problem of gate pulse mixing near the current ripple cancellation point, but also ensures that the system can achieve high system bandwidth and dynamic response performance at more non-current ripple cancellation points.

[0064] In further preferred embodiments, in the multi-phase or multi-level application of the power converter, only the number of the second duty cycle interval settings is increased according to the actual application (for example, N-phase switch tubes correspond to N-1 second duty cycle intervals), and the gate pulse mixing problem existing in the multi-phase or multi-level power converter can be solved, which can be well applied to the multi-phase power converter and the multi-level power converter, and has strong versatility.

[0065] It should be noted that the foregoing general description and the following detailed description are only exemplary and explanatory, and cannot limit the present application. BRIEF DESCRIPTION OF DRAWINGS

[0066] Figure 1 A schematic circuit diagram of a single-phase power converter is shown.

[0067] Figure 2 A typical working waveform diagram of the peak current control mode of the power converter is shown. Figure 1

[0068] A schematic circuit diagram of a multi-phase power converter is shown. Figure 3

[0069] A schematic circuit diagram of a multi-level power converter is shown. Figure 4

[0070] A typical working waveform diagram of the peak current control mode of the power converter is shown. Figure 5 Figure 3 Figure 4 A relationship diagram between the current ripple and the duty cycle of the power converter is shown.

[0071] Figure 6 A schematic block diagram of a slope signal generating circuit according to the first embodiment of the present application is shown.

[0072] Figure 7 A slope compensation curve of the slope signal generating circuit is shown. Figure 6

[0073] A schematic circuit diagram of a slope signal generating circuit according to the second embodiment of the present application is shown. Figure 8a

[0074] A schematic circuit diagram of a slope signal generating circuit according to the third embodiment of the present application is shown. Figure 8b

[0075] A schematic circuit diagram of a slope signal generating circuit according to the fourth embodiment of the present application is shown. Figure 8c

[0076] A charging compensation curve of the slope signal generating circuit is shown. Figure 9 Figure 8a

[0077] ​​​​Figure 10 A schematic circuit diagram of a ramp signal generating circuit according to a fifth embodiment of the present application is shown.

[0078] Figure 11 A schematic circuit diagram of a ramp signal generating circuit according to a fifth embodiment of the present application is shown. Figure 10 A charging compensation curve of the shown ramp signal generating circuit.

[0079] Figure 12 A schematic circuit diagram of a ramp signal generating circuit according to a fifth embodiment of the present application is shown. DETAILED DESCRIPTION

[0080] The preferred embodiments of the present disclosure are described in detail below with reference to the accompanying drawings, but the present disclosure is not limited to only these embodiments. The present disclosure encompasses any alternative, modification, equivalent method and scheme made within the spirit and scope of the present disclosure.

[0081] Figure 1 A schematic circuit diagram of a single-phase power converter is shown. The power converter 100 comprises, for example, switching transistors Q1 and Q2, an inductor L, and a control circuit 101. Figure 1 In the shown embodiment, the power converter 100 adopts a buck (BUCK) topology, in which the switching transistor Q1 and the inductor L are connected in series between an input terminal and an output terminal, and the switching transistor Q2 is connected between the inductor L and a ground terminal and a middle node of the switching transistor Q1. An output capacitor Co is connected between the output terminal and the ground terminal, for obtaining a waveform of a smoothed output voltage Vo.

[0082] Although not shown in the figure, the power converter 100 further comprises a resistance network connected in series between the output terminal and the ground terminal, for obtaining a voltage feedback signal Vfb of the output voltage Vo. The power converter 100 further comprises a current detection device (for example, a sampling resistor) connected between the switching transistor Q1 and the output terminal, for obtaining a current detection signal Vsen of the inductor current iL.

[0083] The control circuit 101 comprises a ramp signal generator 110, an error amplifier 102, a subtractor 103, a proportional circuit 104, a comparator 105, and an RS flip-flop 106. The error amplifier 102 receives a reference voltage Vref and a voltage feedback signal Vfb at its positive input terminal and negative input terminal, respectively. The error amplifier 102 converts the difference voltage between the voltage feedback signal Vfb and the reference voltage Vref into a compensation signal Vc1. A capacitor C102 can be connected between the output terminal of the error amplifier 102 and the ground for obtaining a smooth voltage waveform of the compensation signal Vc1. The ramp signal generator 110 is configured to generate a ramp signal. The subtractor 103 subtracts the compensation signal Vc1 from the ramp signal to obtain a compensation signal Vc2. The proportional circuit 104 is configured to obtain a proportional signal of the current sensing signal Vsen. The comparator 105 receives the proportional signal of the current sensing signal Vsen and the compensation signal Vc2 at its positive input terminal and negative input terminal, respectively, and compares the two signals to generate a reset signal. In some embodiments, the proportional circuit 104 can be omitted.

[0084] Further, the control circuit 101 is further provided with a clock module (not shown) to generate a clock signal CLK as a set signal of the RS flip-flop 106. The RS flip-flop 106 generates a switching control signal PWM according to the set signal and the reset signal to control the complementary conduction of the switching transistors Q1 and Q2. Herein, the switching transistors Q1 and Q2 are both NMOS as an example.

[0085] Reference is made to Figure 2 The RS flip-flop 106 outputs a high level switching control signal PWM at the rising edge of the clock signal CLK, and outputs a low level switching control signal PWM when the current sensing signal Vsen reaches the compensation signal Vc2, for example. During the high level of the switching control signal PWM (e.g. HS phase), the switching transistor Q1 is turned on and the switching transistor Q2 is turned off, and at this time, the input terminal of the power converter 100 receives the input voltage Vin to charge the inductor L. The inductor current iL flows through the switching transistor Q1 and the inductor L in sequence. During the low level of the switching control signal PWM (e.g. LS phase), the switching transistor Q1 is turned off and the switching transistor Q2 is turned on, and at this time, the inductor L is connected in a loop with the load via the switching transistor Q2 to supply power to the output terminal to generate the output voltage Vo. In the successive switching period, the output capacitor Co filters the output voltage Vo to obtain a smooth voltage waveform.

[0086] Reference is made to Figure 1The ramp signal generator 110 specifically comprises a trans-impedance amplifier 120, a capacitor C11 and a switch Q11, wherein the trans-impedance amplifier 120 is configured to generate a charging current according to a charging control signal, the capacitor C11 is connected between an output terminal of the trans-impedance amplifier 120 and a ground, and the switch Q11 is connected in parallel with the capacitor C11 and is controlled to be turned on or turned off according to a switch control signal PWM, so that the capacitor C11 is charged by the charging current output by the trans-impedance amplifier 120 and discharged via the switch Q11 in the on state during a switching period of the power converter 100, to generate a ramp signal with a fixed slope to compensate for the dynamic performance of the system.

[0087] Since the gain of the trans-impedance amplifier 120 is usually a fixed value, the slope value of the ramp signal can be adjusted by changing the size of the charging control signal received by the trans-impedance amplifier 120, so as to adjust the slope value of the compensation signal Vc2. A typical existing technique is to make the slope value of the ramp signal related to the input voltage Vin or the output voltage Vo (such as Figure 1 In the prior art, the charging control signal received by the trans-impedance amplifier 120 is changed to the output voltage Vo, so as to achieve the purpose of adjusting the slope value of the ramp signal at different duty cycles.

[0088] When the current mode control scheme is extended to a multi-phase interleaved parallel application or a multi-level application, there are multiple current ripple cancellation points in the system. For example, Figure 3 a schematic circuit diagram of a multi-phase power converter is shown, Figure 4 a schematic circuit diagram of a multi-level power converter is shown. The multi-phase interleaved parallel multi-phase power converter is usually applied in a situation where the load current demand of the system is large, and the system usually adopts the method of multi-phase interleaved parallel to reduce the current stress of each phase circuit and improve the overall conversion efficiency of the system. For example, a multi-phase buck converter has been widely applied in VR systems. Correspondingly, the multi-level power converter usually adopts low-voltage devices in series to reduce the voltage stress of MOSFET and other power devices through multiple flying capacitors.

[0089] Exemplarily, Figure 3The shown example takes a two-phase interleaved parallel power converter as an example. The power circuit part of the power converter 300 includes: switching tubes Q1-Q4, inductors L1 and L2, and a capacitor Co. The control circuit part of the power converter 300 includes: an error amplifier 310, an adder 320, proportional circuits 350 and 340, a comparator 360, a constant conduction time control unit 380, and RS flip-flops 370 and 390. Among them, the switching tube Q1 and the switching tube Q2 are connected in series between the input voltage Vin end and the ground, the switching tube Q3 and the switching tube Q4 are connected in series between the input voltage Vin end and the ground, the first end of the inductor L1 is connected with the common connection node of the switching tube Q1 and the switching tube Q2, the second end of the inductor L1 is connected with the output end, the first end of the inductor L2 is connected with the common connection node of the switching tube Q3 and the switching tube Q4, the second end of the inductor L2 is connected with the output end, and the capacitor Co is connected between the output end and the ground. The positive input end and the negative input end of the error amplifier 310 respectively receive a reference voltage Vref and a voltage feedback signal Vfb, so as to convert the difference voltage of the voltage feedback signal Vfb and the reference voltage Vref into a compensation signal Vc1. A capacitor can be connected between the output end of the error amplifier 310 and the ground, for obtaining a smooth voltage waveform of the compensation signal Vc1. The adder 320 is used to add the compensation signal Vc1 and a ramp signal 1 to obtain a compensation signal Vc2. The proportional circuit 340 is used to obtain a proportional signal of a current detection signal Vsen1 of the inductor L1, the proportional circuit 350 is used to obtain a proportional signal of a current detection signal Vsen2 of the inductor L2, and the comparator 360 respectively receives the proportional signal of the current detection signal Vsen1, the proportional signal of the current detection signal Vsen2 and the compensation signal Vc2, for comparing the three to generate a set signal. The constant conduction time control unit 380 is used to generate a reset signal according to a preset constant conduction time threshold. In some embodiments, the proportional circuit 340 and the proportional circuit 350 can be omitted.

[0090] Further, the control circuit part of the power converter 300 is also provided with a ramp signal generator (not shown) to generate a ramp signal. The RS flip-flop 370 generates switching control signals PWM1 and PWM4 of the switching tubes Q1 and Q4 according to the set signal and the reset signal, and the RS flip-flop 390 generates switching control signals PWM2 and PWM3 of the switching tubes Q2 and Q3 according to the set signal and the reset signal. Here, the switching tubes Q1-Q4 are all taken as NMOS as an example for illustration.

[0091] Figure 4The shown example takes a three-phase level power converter as an example. The power circuit part of the power converter 400 includes: switching tubes Q1-Q4, an inductor L, a capacitor CFLY, and a capacitor COUT. The control circuit part of the power converter 400 includes: an error amplifier 401, subtractors 402, 405, and 406, an adder 403, a proportional circuit 407, comparators 408 and 409, and RS flip-flops 410 and 411. The switching tube Q1, the switching tube Q2, the switching tube Q3, and the switching tube Q4 are connected in series between an input voltage Vin terminal and a ground in sequence. The first end of the inductor L is connected to the common connection node of the switching tube Q2 and the switching tube Q3. The second end of the inductor L is connected to an output terminal. The first end of the capacitor CFLY is connected to the common connection node of the switching tube Q1 and the switching tube Q2. The second end of the capacitor CFLY is connected to the common connection node of the switching tube Q3 and the switching tube Q4. The capacitor COUT is connected between the output terminal and the ground. The positive input terminal and the negative input terminal of the error amplifier 401 respectively receive a reference voltage Vref and a voltage feedback signal Vfb, so as to convert the difference voltage of the voltage feedback signal Vfb and the reference voltage Vref into a compensation signal Vc. A capacitor can be connected between the output terminal of the error amplifier 401 and the ground, for obtaining a smooth voltage waveform of the compensation signal Vc. The positive input terminal and the negative input terminal of the error amplifier 404 respectively receive a proportional signal (such as 1 / 2Vin) of the input voltage and a voltage signal VCfly on the capacitor CFLY, so as to convert the difference voltage of the proportional signal (such as 1 / 2Vin) of the input voltage and the voltage signal VCfly on the capacitor CFLY into a compensation signal Vc0. A capacitor can be connected between the output terminal of the error amplifier 404 and the ground, for obtaining a smooth voltage waveform of the compensation signal Vc0. The subtractor 402 is used to subtract the compensation signal Vc from a slope signal 1. The adder 403 is used to add the output signal of the subtractor 402 and the compensation signal Vc0, so as to obtain a compensation signal VcH. The subtractor 405 is used to subtract the compensation signal Vc from a slope signal 2. The subtractor 406 is used to subtract the output signal of the subtractor 405 and the compensation signal Vc0, so as to obtain a compensation signal VcL. The proportional circuit 407 is used to obtain a proportional signal of a current detection signal Vsen of the inductor L. The comparator 408 respectively receives the proportional signal of the current detection signal Vsen and the compensation signal VcH, for comparison, so as to generate a third reset signal. The comparator 409 respectively receives the proportional signal of the current detection signal Vsen and the compensation signal VcL, for comparison, so as to generate a fourth reset signal. In some embodiments, the proportional circuit 407 can be omitted.

[0092] Further, the control circuit part of the power converter 400 is also provided with a ramp signal generator (not shown) to generate a ramp signal, and also provided with a clock module (not shown) to generate a clock signal CLK as the set signal of the RS flip-flop 410 and 411. The RS flip-flop 410 generates the switching control signals PWM1 and PWM4 of the switching tubes Q1 and Q4 according to the set signal and a third reset signal, and the RS flip-flop 411 generates the switching control signals PWM2 and PWM3 of the switching tubes Q2 and Q3 according to the set signal and a fourth reset signal. Here, it is taken for example that the switching tubes Q1-Q4 are all NMOS.

[0093] For the multi-phase interleaved parallel application and multi-level application of the power converter, since there is a merging of inductance current in the circuit, there are multiple current ripple cancellation points in the system. As shown in Figure 5 The amplitude of the output current ripple of the two-phase interleaved parallel buck-type power converter or the three-level buck-type power converter approaches zero when the duty cycle value is equal to 0.5, so that the stable gate pulse signal sequence cannot be obtained by comparing with the reference value, and the pulse width oscillates near the duty cycle, which is called "Jitter", that is, the driving pulse of the MOSFET will have high-frequency jitter near the duty cycle. With the increase of the number of interleaved parallel phases, the duty cycle value of the current ripple cancellation point will also increase, which will seriously affect the application based on the ripple amplitude control strategy, and the stability problem of the gate pulse mixing near each current ripple cancellation point. For more phase interleaved parallel circuits or more level circuits, the current ripple cancellation points will gradually increase. For a four-phase interleaved parallel circuit or a 5-level circuit, there are three current ripple cancellation points, such as D=0.25, D=0.5 and D=0.75 in the system.

[0094] For the multi-phase interleaved parallel application and multi-level application of the power converter, in order to solve the compensation problem or the large fluctuation problem of the control loop and the output voltage of the traditional scheme in solving the above-mentioned gate pulse mixing jitter problem near the current ripple cancellation point, the ramp signal generation scheme in the application scene is further optimized, the non-linear slope compensation is performed near the ripple cancellation point, and the dynamic response performance is optimized while the system stability is ensured.

[0095] Figure 6 a schematic block diagram of the ramp signal generation circuit of the first embodiment of the application is shown, Figure 7 a schematic block diagram of the ramp signal generation circuit of the second embodiment of the application is shown, Figure 6 a slope compensation curve of the ramp signal generation circuit shown in Figure 8a a schematic block diagram of the ramp signal generation circuit of the second embodiment of the application is shown, Figure 8bA schematic circuit diagram of the ramp signal generation circuit according to the third embodiment of this application is shown. Figure 8c A schematic circuit diagram of the ramp signal generation circuit according to the fourth embodiment of this application is shown. Figure 9 It shows Figure 8a The charging compensation curve of the ramp signal generation circuit shown is shown. Figure 10 A schematic circuit diagram of a ramp signal generation circuit according to a fifth embodiment of this application is shown. The ramp signal generation circuits provided in the various embodiments of this application can be applied not only to... Figure 3 and Figure 4 This can be applied to any of the following topologies: multiphase buck power converter topologies and multilevel buck power converter topologies. It can also be applied to other topologies such as multiphase boost power converter topologies, multiphase buck-boost power converter topologies, multilevel boost power converter topologies, and multilevel buck-boost power converter topologies. (Reference) Figure 3 and Figure 4 It is understandable that these power converters share the following characteristics: they all include an inductor, multiple sets of switching transistors for controlling the charging and discharging processes of the inductor, and a current control loop for driving the multiple sets of switching transistors. These power converters use the combined inductor current generated by the switching actions of the multiple sets of switching transistors to generate the output voltage Vo.

[0096] Figure 6 This application illustrates one implementation of the ramp signal generation circuit, such as... Figure 6 As shown, the ramp signal generation circuit 10 includes: a duty cycle calculation module 11, a slope compensation module 12, and a digital-to-analog converter 13. The duty cycle calculation module 11 calculates the duty cycle of the control signals of multiple sets of switching transistors in the power converter based on the input voltage Vin and output voltage Vo of the power converter. The slope compensation module 12 obtains the slope K2 of the ramp signal according to a preset slope compensation curve and calculates the digital value of the ramp signal in real time. The digital-to-analog converter 13 generates the ramp signal based on the digital value of the ramp signal. The slope compensation curve includes a continuous first duty cycle interval and a second duty cycle interval. The slope compensation module adjusts the slope K2 of the ramp signal according to linear and nonlinear curves within the continuous first and second duty cycle intervals, respectively.

[0097] Optionally, the duty cycle calculation module 11 can use digital or analog circuits to calculate the duty cycle of the control signals of multiple sets of switching transistors in the power converter.

[0098] refer to Figure 7The first duty cycle interval corresponds to 0~D1, and the second duty cycle interval corresponds to D1~D4. The linear range (Linear Range) 0~D1 corresponding to the first duty cycle interval does not include the current ripple cancellation point Dc of the power converter, and the nonlinear range (Nolinear Range) D1~D4 corresponding to the second duty cycle interval includes the current ripple cancellation point Dc of the power converter. The current ripple cancellation point Dc represents the duty cycle corresponding to the minimum current ripple generated by the switching action of the plurality of groups of switching tubes. Taking a two-phase interleaved parallel power converter or a three-level power converter as an example, in each switching period of the power converter, only one first duty cycle interval and one second duty cycle interval are included.

[0099] Optionally, in the second duty cycle interval, the nonlinear curve in the slope compensation curve can be any one of a broken line curve or a smooth curve. For example, as shown in FIG. 3, in an embodiment, the broken line curve includes a rising phase (corresponding to the D1~D2 phase), a peak phase (corresponding to the D2~D3 phase), and a falling phase (corresponding to the D3~D4 phase). In the rising phase, the slope K2 of the ramp signal increases linearly with the increase of the duty cycle D; in the peak phase, the slope K2 of the ramp signal remains unchanged with the increase of the duty cycle D, wherein the current ripple cancellation point Dc is located in the peak phase; and in the falling phase, the slope K2 of the ramp signal decreases linearly with the increase of the duty cycle D. For example, when the duty cycle D is D1 or D4, the slope K2 of the ramp signal is K21, and when the duty cycle D is D2 or D3, the slope K2 of the ramp signal is K21+K22. Figure 7

[0100] The technical solution of the present application modulates different duty cycles, controls the slope K2 of the ramp signal to first linearly increase and then linearly decrease in the duty cycle near the current ripple cancellation point Dc (i.e. in the second duty cycle interval), so that the system can only use a higher slope compensation near the current ripple cancellation point Dc, and work in a lower slope compensation at more non-current ripple cancellation points. In this way, it can not only avoid the problem of gate pulse mixing at the current ripple cancellation point Dc, but also ensure that the system has higher system bandwidth and dynamic response performance at more non-current ripple cancellation points. At the same time, the structure of this digital implementation is simple.

[0101] As shown in FIG. 4, Figure 8a , Figure 8b and Figure 8c ​As shown, the ramp signal generating circuit 20 comprises a charge control module 21, a transconductance amplifier 120, a capacitor C11 and a switch Q11, wherein the charge control module 21 is configured to generate a charge control signal according to an input voltage Vin and an output voltage Vo; the transconductance amplifier 120 is configured to generate a charging current Ichg according to the charge control signal; the capacitor C11 is connected between an output terminal of the transconductance amplifier 120 and a ground, and the switch Q11 is connected in parallel with the capacitor C11 and is controlled to be turned on or turned off according to a reset signal, so that during a switching period of the power converter, the capacitor C11 is charged by the charging current Ichg output by the transconductance amplifier 120 and discharged via the switch Q11 in the on state, to generate a ramp signal for adjusting a first slope of a detection signal of the combined inductor current. In this embodiment, the charge control module 21 is further configured to control the magnitude of the charge control signal according to a relationship curve between a duty cycle of the power converter and the magnitude of the charge control signal, and in a continuous first duty cycle interval and a second duty cycle interval, the charge control module 21 adjusts a second slope of the ramp signal according to a linear curve and a nonlinear curve, respectively.

[0102] Reference Figure 9 For example, the first duty cycle interval corresponds to 0~D1, and the second duty cycle interval corresponds to D1~D4. The linear range (Linear Range) 0~D1 corresponding to the first duty cycle interval does not include the current ripple cancellation point Dc of the power converter, and the nonlinear range (Nolinear Range) D1~D4 corresponding to the second duty cycle interval includes the current ripple cancellation point Dc of the power converter. The current ripple cancellation point Dc represents the duty cycle corresponding to the minimum value of the current ripple generated by the switching action of the plurality of groups of switching tubes. For a two-phase interleaved parallel power converter or a three-level power converter, only one first duty cycle interval and one second duty cycle interval are included during each switching period.

[0103] In some embodiments, in the first duty cycle interval, the charge control signal is constant, for example, equal to the first control signal V1. Alternatively, in the second duty cycle interval, the nonlinear curve in the slope compensation curve can be any one of a broken line curve or a smooth curve. For example, in the case of a broken line curve, as shown in Figure 9As shown, in this embodiment, the fold line curve includes a rising phase (corresponding to D1-D2 phase, where D1 is the duty ratio at the beginning of the rising phase, and D2 is the duty ratio at the end of the rising phase), a peak phase (corresponding to D2-D3 phase, where D2 is the duty ratio at the beginning of the peak phase, and D3 is the duty ratio at the end of the peak phase), and a falling phase (corresponding to D3-D4 phase, where D3 is the duty ratio at the beginning of the falling phase, and D4 is the duty ratio at the end of the falling phase). In the rising phase, the charging control signal increases linearly with the increase of the duty ratio D; in the peak phase, the charging control signal remains unchanged with the increase of the duty ratio D, and the current ripple cancellation point Dc is located in the peak phase; in the falling phase, the charging control signal decreases linearly with the increase of the duty ratio D. For example, when the duty ratio D is D1 or D4, the charging control signal is equal to the first control signal V1; when the duty ratio D is D2 or D3, the charging control signal is equal to the sum of the first control signal V1 and the second control signal V2, i.e. V1+V2.

[0104] In this application, the charging control module 21 generates a plurality of control signals according to the input voltage Vin and the output voltage Vo, so as to obtain the charging control signal by different combination processing of the plurality of control signals under different duty ratios. In the peak phase, the charging control module 21 adds the first control signal V1 and the second control signal V2 to obtain the charging control signal; in the rising phase, the charging control module 21 adds the first control signal V1 and the third control signal V3 to obtain the charging control signal; in the falling phase, the charging control module 21 adds the first control signal V1 and the fourth control signal V4 to obtain the charging control signal.

[0105] For example, in a two-phase interleaved parallel buck power converter or a three-level buck power converter, as shown in Figure 8a As shown, the charging control module 21 generates the first control signal V1 and the second control signal V2 according to the input voltage Vin, and generates the third control signal V3 and the fourth control signal V4 according to the input voltage Vin and the output voltage Vo, wherein the first control signal V1 and the second control signal V2 are proportional to the input voltage Vin (for example, V1=k4·Vin, V2=k1·Vin, k1 and k4 represent proportional coefficients), the third control signal V3 is proportional to the difference between the output voltage Vo and the input voltage Vin (or the proportional signal of the input voltage Vin) (for example, V3=k3·(Vo-k2·Vin), k2 and k3 represent proportional coefficients), and the fourth control signal V4 is proportional to the difference between the input voltage Vin (or the proportional signal of the input voltage Vin) and the output voltage Vo (for example, V4=k6·(k5·Vin-Vo), k5 and k6 represent proportional coefficients).

[0106] Alternatively, in a two-phase interleaved boost power converter or a three-level boost power converter, as shown in FIG. 2A, the charge control module 21 generates the first control signal V1 and the second control signal V2 according to the output voltage Vo, and generates the third control signal V3 and the fourth control signal V4 according to the input voltage Vin and the output voltage Vo, wherein the first control signal V1 and the second control signal V2 are proportional to the output voltage Vo (e.g., V1=k4·Vo, V2=k1·Vo, k1 and k4 represent proportional coefficients), the third control signal V3 is equal to k3·(Vo-Vin-k2·Vo) for example, k2 and k3 represent proportional coefficients, and the fourth control signal V4 is equal to k6·(k5·Vo-Vo-Vin) for example, k5 and k6 represent proportional coefficients. Figure 8b

[0107] Alternatively, in a two-phase interleaved boost power converter or a three-level boost power converter, as shown in FIG. 2A, the charge control module 21 generates the first control signal V1 and the second control signal V2 according to the output voltage Vo, and generates the third control signal V3 and the fourth control signal V4 according to the input voltage Vin and the output voltage Vo, wherein the first control signal V1 and the second control signal V2 are proportional to the output voltage Vo (e.g., V1=k4·Vo, V2=k1·Vo, k1 and k4 represent proportional coefficients), the third control signal V3 is equal to k3·(Vo-Vin-k2·Vo) for example, k2 and k3 represent proportional coefficients, and the fourth control signal V4 is equal to k6·(k5·Vo-Vo-Vin) for example, k5 and k6 represent proportional coefficients. Figure 8c

[0108] In particular implementations, the charge control module 21 includes an operational amplifier 810 and a charge compensation module 22, wherein the operational amplifier 810 is configured to obtain the first control signal V1, and the aforementioned proportional coefficient k4 is the gain of the operational amplifier 810; the charge compensation module 22 is configured to generate the second control signal V2, the third control signal V3 and the fourth control signal V4 according to the input voltage Vin and the output voltage Vo, and select one of the second control signal V2, the third control signal V3 and the fourth control signal V4 to generate a charge compensation signal, and the charge control module 21 obtains the charge control signal by adding the first control signal V1 and the charge compensation signal. Figure 8a Figure 8b Figure 8c In particular implementations, the charge control module 21 includes an operational amplifier 810 and a charge compensation module 22, wherein the operational amplifier 810 is configured to obtain the first control signal V1, and the aforementioned proportional coefficient k4 is the gain of the operational amplifier 810; the charge compensation module 22 is configured to generate the second control signal V2, the third control signal V3 and the fourth control signal V4 according to the input voltage Vin and the output voltage Vo, and select one of the second control signal V2, the third control signal V3 and the fourth control signal V4 to generate a charge compensation signal, and the charge control module 21 obtains the charge control signal by adding the first control signal V1 and the charge compensation signal.

[0109] It can be understood that, in the second duty cycle interval, the peak value of the charge compensation signal is equal to the amplitude of the second control signal V2.

[0110] In some embodiments, as shown in FIGS. 2B, 2C and 2D, Figure 8a Figure 8b Figure 8c ​​​​​​As shown, the operational amplifier 810 includes a first input terminal, a first output terminal with the same polarity as the first input terminal, and a second output terminal with the opposite polarity to the first input terminal. The difference between the first output terminal and the second output terminal of the operational amplifier 810 is equal to the product of the signal of the first input terminal and the gain of the operational amplifier 810. In the embodiments, the second output terminal of the operational amplifier 810 receives the charging compensation signal, and the first output terminal of the operational amplifier 810 outputs the charging control signal, and the charging control module 21 adjusts the charging control signal by adjusting the potential of the second output terminal of the operational amplifier 810. Wherein, in the embodiments shown in FIG. 8, the first output terminal of the operational amplifier 810 receives the input voltage Vin, so that the operational amplifier 810 obtains the first control signal V1 according to the input voltage Vin; in the embodiments shown in FIG. 9, the first output terminal of the operational amplifier 810 receives the output voltage Vo, so that the operational amplifier 810 obtains the first control signal V1 according to the output voltage Vo; in the embodiments shown in FIG. 10, the first output terminal of the operational amplifier 810 receives the sum of the output voltage Vo and the input voltage Vin, i.e. Vo+Vin, so that the operational amplifier 810 obtains the first control signal V1 according to the sum of the output voltage Vo and the input voltage Vin Vo+Vin. Figure 8a Figure 8b Figure 8c

[0111] In other embodiments, the output terminal of the operational amplifier 810 and the output terminal of the charging compensation module 22 are both connected to the input terminal of an adder (not shown), so that the adder is used to add the first control signal V1 and the charging compensation signal.

[0112] Further, the charging compensation module 22 at least includes: operational amplifiers 820-860. Wherein, the operational amplifier 840 is used to obtain the second control signal V2; the operational amplifier 820 and the operational amplifier 830 are cascaded with each other to obtain the third control signal V3; the operational amplifier 850 and the operational amplifier 860 are cascaded with each other to obtain the fourth control signal V4. At this time, the aforementioned proportional coefficient k1 is the gain of the operational amplifier 840, the proportional coefficient k2 is the gain of the operational amplifier 820, the proportional coefficient k3 is the gain of the operational amplifier 830, the proportional coefficient k5 is the gain of the operational amplifier 850, and the proportional coefficient k6 is the gain of the operational amplifier 860.

[0113] When the power converter is a step-down converter, the duty cycle D of the power converter satisfies D=Vo / Vin. At this time, in the embodiments shown in FIG. 8, the first control signal V1 is equal to the input voltage Vin, so that the charging control signal is equal to the input voltage Vin; in the embodiments shown in FIG. 9, the first control signal V1 is equal to the output voltage Vo, so that the charging control signal is equal to the output voltage Vo; in the embodiments shown in FIG. 10, the first control signal V1 is equal to the sum of the output voltage Vo and the input voltage Vin, i.e. Vo+Vin, so that the charging control signal is equal to the sum of the output voltage Vo and the input voltage Vin Vo+Vin. Figure 8a ​​​In the shown embodiment, the input end of the operational amplifier 840 receives the input voltage Vin, so that the operational amplifier 840 obtains the second control signal V2 according to the input voltage Vin; the positive input end of the operational amplifier 820 receives the input voltage Vin, the positive input end of the operational amplifier 830 receives the output voltage Vo, the negative input end of the operational amplifier 830 receives the output end signal of the operational amplifier 820, and the output end of the operational amplifier 830 outputs the third control signal V3; the positive input end of the operational amplifier 850 receives the input voltage Vin, the positive input end of the operational amplifier 860 receives the output end signal of the operational amplifier 850, the negative input end of the operational amplifier 860 receives the output voltage Vo, and the output end of the operational amplifier 860 outputs the fourth control signal V4.

[0114] When the power converter is a step-up converter, the duty cycle D of the power converter satisfies D = 1 - Vin / Vo = (Vo - Vin) / Vo. At this time, in the Figure 8b In the shown embodiment, the input end of the operational amplifier 840 receives the output voltage Vo, so that the operational amplifier 840 obtains the second control signal V2 according to the output voltage Vo; the positive input end of the operational amplifier 820 receives the output voltage Vo, the positive input end of the operational amplifier 830 receives the difference signal of the output voltage Vo and the input voltage Vin, the negative input end of the operational amplifier 830 receives the output end signal of the operational amplifier 820, and the output end of the operational amplifier 830 outputs the third control signal V3; the positive input end of the operational amplifier 850 receives the output voltage Vo, the positive input end of the operational amplifier 860 receives the output end signal of the operational amplifier 850, the negative input end of the operational amplifier 860 receives the difference signal of the output voltage Vo and the input voltage Vin, and the output end of the operational amplifier 860 outputs the fourth control signal V4.

[0115] When the power converter is a step-up-down converter, the duty cycle D of the power converter satisfies D = Vo / (Vo + Vin). At this time, in the Figure 8cIn the illustrated embodiment, the input of the operational amplifier 840 receives the sum of the output voltage Vo and the input voltage Vin, so that the operational amplifier 840 obtains the second control signal V2 according to the sum of the output voltage Vo and the input voltage Vin; the positive input of the operational amplifier 820 receives the sum of the output voltage Vo and the input voltage Vin, the positive input of the operational amplifier 830 receives the output voltage Vo, the negative input of the operational amplifier 830 receives the output signal of the operational amplifier 820, and the output of the operational amplifier 830 outputs the third control signal V3; the positive input of the operational amplifier 850 receives the sum of the output voltage Vo and the input voltage Vin, the positive input of the operational amplifier 860 receives the output signal of the operational amplifier 850, the negative input of the operational amplifier 860 receives the output voltage Vo, and the output of the operational amplifier 860 outputs the fourth control signal V4.

[0116] In Figure 8a , Figure 8b and Figure 8c , the setting of the gain parameters of the operational amplifiers 820-860 conforms to the following formula, so that the slope compensation curve as shown in Figure 9 can be obtained:

[0117] (1),

[0118] (2),

[0119] (3),

[0120] (4).

[0121] It should be noted that in the above embodiments, when the voltage at the positive input of the operational amplifier 830 or the operational amplifier 860 is less than the voltage at the negative input, the voltage at the output of the operational amplifier 830 or the operational amplifier 860 is zero, which is equivalent to achieving zero clamping of the output signal of the operational amplifier 830 or the operational amplifier 860.

[0122] Further, the charging compensation module 22 further includes a diode D11 and a diode D12, the anodes of the diode D11 and the diode D12 are commonly connected to the output of the operational amplifier 830, the cathode of the diode D11 is connected to the output of the operational amplifier 840, and the cathode of the diode D12 is connected to the output of the operational amplifier 860. In the embodiments, the charging compensation module 22 generates a charging compensation signal at the anodes of the diode D11 and the diode D12, which is equivalent to using the diode D11 and the diode D12 to achieve selection of the second control signal V2, the third control signal V3 and the fourth control signal V4, so that automatic selection of the signals can be achieved without the need for a control signal, and the circuit structure is simple.

[0123] In combination Figure 8a , Figure 8b , Figure 8c and Figure 9 , when the duty cycle of the system is less than D1, the voltage at the output of the operational amplifier 830 is zero, thereby clamping the negative output of the operational amplifier 810 to zero, and the voltage of the charge control signal is equal to the first control signal V1, and the slope of the ramp signal is constant at a small value.

[0124] When the duty cycle of the system is less than D2 and greater than D1, both diodes D11 and D12 are not conducting, and the voltage of the charge control signal at the positive output of the operational amplifier 810 is equal to the sum of the first control signal V1 and the third control signal V3, and the slope of the ramp signal linearly increases with the increase of the output voltage Vo.

[0125] When the duty cycle of the system is less than D3 and greater than D2, diode D11 is conducting and D12 is not conducting, and the voltage of the charge control signal at the positive output of the operational amplifier 810 is equal to the sum of the first control signal V1 and the second control signal V2, and the slope of the ramp signal is constant at a large value.

[0126] When the duty cycle of the system is greater than D3 and less than D4, due to the competitive effect of diodes D11 and D12, diode D12 is conducting and D11 is not conducting, and the voltage of the charge control signal at the positive output of the operational amplifier 810 is equal to the sum of the first control signal V1 and the fourth control signal V4, and the slope of the ramp signal linearly decreases with the increase of the output voltage Vo.

[0127] When the duty cycle of the system is greater than D4, the voltage at the output of the operational amplifier 860 is zero, thereby clamping the negative output of the operational amplifier 810 to zero, and the voltage of the charge control signal is equal to the first control signal V1, and the slope of the ramp signal is constant at a small value.

[0128] For example, if D1=0.3, D2=0.4, D3=0.6, and D4=0.7 in the above equation, when the application is used Figure 9 , Figure 8a , Figure 8b or Figure 8cThe slope signal generated by the scheme can only use a higher slope compensation near the current ripple cancellation point, and work at a lower slope compensation at more regions of the non-current ripple cancellation point, so that when the two-phase interleaved parallel or three-level power converter works at the duty cycle corresponding to the current ripple cancellation point, a stable gate pulse signal sequence can be obtained, that is, the driving pulses of the multiple groups of switching tubes in the power converter do not have high-frequency jitter near the duty cycle, and the output voltage of the system does not have large fluctuations, and the stability and dynamic response performance of the system are better.

[0129] Further, the power converter can include N current ripple cancellation points, and correspondingly, the relationship curve between the duty cycle of the power converter and the amplitude of the charging control signal includes N second duty cycle intervals corresponding to the N current ripple cancellation points of the power converter, N being an integer greater than or equal to 1. In a two-phase power converter or a three-level power converter, N is equal to 1; in a power converter with more than two phases or a power converter with more than three levels, N is an integer greater than or equal to 2.

[0130] In some embodiments, when N is greater than 1, the peak values of the charging compensation signals in the N second duty cycle intervals increase in turn.

[0131] In a power converter with more than two phases or a power converter with more than three levels, the slope signal generating circuit 20 in the specific implementation is different from the examples shown in Figure 8a 、 Figure 8b or Figure 8c in that it includes N selection switches and N charging compensation modules 22, wherein the N charging compensation modules 22 are connected to the operational amplifier 810 via the corresponding selection switches, and the amplitudes of the second control signals V2 generated by the N charging compensation modules 22 increase in turn. It should be noted that at this time, in a power converter with more than two phases or a power converter with more than three levels, the input end of the operational amplifier 810 in the slope signal generating circuit 20 receives the input voltage Vin, and the structure of each charging compensation module 22 in the slope signal generating circuit 20 is basically the same as that of the charging compensation module 22 in the example shown in Figure 8a , the difference being that the gain of the operational amplifier in each charging compensation module 22 is different; in a power converter with more than two phases or a power converter with more than three levels, the input end of the operational amplifier 810 in the slope signal generating circuit 20 receives the output voltage Vo, and the structure of each charging compensation module 22 in the slope signal generating circuit 20 is basically the same as that of the charging compensation module 22 in the example shown in Figure 8bThe structures of the charge compensation modules 22 in the shown example are basically the same, with the only difference being the gain of the operational amplifier in each charge compensation module 22; in a power converter with more than two phases or a boost-buck type power converter with more than three levels, the input end of the operational amplifier 810 in the slope signal generating circuit 20 receives the sum of the input voltage Vin and the output voltage Vo, i.e. Vo+Vin, and the structure of each charge compensation module 22 in the slope signal generating circuit 20 is the same as that shown in Figure 8c The structures of the charge compensation modules 22 in the shown example are basically the same, with the only difference being the gain of the operational amplifier in each charge compensation module 22.

[0132] Taking N equal to 3 as an example and taking a four-phase interleaved parallel or five-level buck type power converter as an example, referring to Figure 10 , Figure 10 the slope signal generating circuit 20 shown in the shown embodiment is basically the same as that shown in Figure 8a the difference being that: Figure 10 In the shown embodiment, the slope signal generating circuit 20 includes 3 charge compensation modules 22 and 3 selection switches Q11-Q13 connected between the 3 charge compensation modules 22 and the operational amplifier 810 respectively. Among them, the charge compensation module 22 connected with the selection switch Q11 is used to provide a charge compensation signal 1 according to the input voltage Vin and the output voltage Vo, the charge compensation module 22 connected with the selection switch Q12 is used to provide a charge compensation signal 2 according to the input voltage Vin and the output voltage Vo, and the charge compensation module 22 connected with the selection switch Q13 is used to provide a charge compensation signal 3 according to the input voltage Vin and the output voltage Vo.

[0133] Figure 10 In the shown embodiment, preferably, the selection switches Q11-Q13 are configured to be switched when the charge compensation signal output by the corresponding branch is zero, so as to avoid affecting the slope value of the generated slope signal and causing the mutation of the slope of the slope signal.

[0134] At the same time, as shown in Figure 11 the relationship curve between the duty cycle of the four-phase interleaved parallel or five-level power converter and the amplitude of the charge control signal includes 3 second duty cycle intervals (including D1-D4, D5-D8, D9-D12) corresponding to 3 current ripple cancellation points of the power converter. For example, in the second duty cycle interval D1-D4, the duty cycle corresponding to the current ripple cancellation point is 0.25; in the second duty cycle interval D5-D8, the duty cycle corresponding to the current ripple cancellation point is 0.5; in the second duty cycle interval D9-D12, the duty cycle corresponding to the current ripple cancellation point is 0.75.

[0135] Furthermore, by flexibly configuring the gain parameters of each of the 22 operational amplifiers in each charging compensation module, the peak value of the charging compensation signal in the three second duty cycle intervals is configured to increase sequentially. For example, the peak value 1 of the charging compensation signal in the second duty cycle intervals D1~D4 is less than the peak value 2 in the second duty cycle intervals D5~D8, and the peak value 2 of the charging compensation signal in the second duty cycle intervals D5~D8 is less than the peak value 3 in the second duty cycle intervals D9~D12.

[0136] Since the peak value of the charging compensation signal 1 is equal to the amplitude of the second control signal V21 generated by the charging compensation module 22 connected to the selection switch Q11 in the second duty cycle interval D1~D4; the peak value of the charging compensation signal 2 is equal to the amplitude of the second control signal V22 generated by the charging compensation module 22 connected to the selection switch Q12 in the second duty cycle interval D5~D8; and the peak value of the charging compensation signal 3 is equal to the amplitude of the second control signal V23 generated by the charging compensation module 22 connected to the selection switch Q13 in the second duty cycle interval D9~D12, it is equivalent to configuring the amplitudes V21, V22, and V23 of the second control signals generated by the three charging compensation modules 22 to increase sequentially.

[0137] For example, if let Figure 11 If D1=0.15, D2=0.2, D3=0.3, D4=0.35, D5=0.4, D6=0.45, D7=0.55, D8=0.6, D9=0.65, D10=0.7, D11=0.8, and D12=0.85, then when adopting this application... Figure 10 When the ramp signal generated by the buck converter scheme shown, or other schemes such as boost converters or buck-boost converters, is used for ramp compensation of the power converter, a higher ramp compensation rate is used only near the three current ripple cancellation points, while a lower ramp compensation rate is used at more non-current ripple cancellation points. This ensures that when a four-phase interleaved parallel or five-level power converter operates at the duty cycle corresponding to each current ripple cancellation point, a stable gate pulse signal sequence can be obtained. That is, the drive pulses of multiple sets of switching transistors in the power converter will not experience high-frequency jitter near these duty cycles, and the output voltage of the system will not fluctuate significantly, resulting in better system stability and dynamic response performance. Furthermore, this application embodiment also provides a ramp signal generation method for a power converter. This ramp signal generation method can be applied to the power converter disclosed in any embodiment of this application. Specifically, refer to... Figure 12 The method for generating the ramp signal includes performing the following steps:

[0138] Step 121: Obtain the current ripple cancellation point of the power converter. The current ripple cancellation point represents the duty cycle corresponding to the minimum combined inductor current generated by the switching actions of multiple sets of switching transistors.

[0139] Step 122, obtaining the input voltage and the output voltage of the power converter.

[0140] Step 123, generating a ramp signal according to the input voltage and the output voltage, wherein, when generating the ramp signal, the slope of the ramp signal is compensated according to a slope compensation curve, and the slope of the ramp signal is nonlinearly adjusted in a predetermined duty ratio interval of a current ripple cancellation point of the power converter; the slope of the ramp signal is first increased and then decreased through the nonlinear adjustment, and the current ripple cancellation point is located in a maximum value part of the slope of the ramp signal.

[0141] In specific implementation, the specific implementation of each step in the above-described ramp signal generation method for the power converter and the technical effects brought after implementation can be referred to the related content of the power converter and the ramp signal generation circuit thereof described in the foregoing embodiments, which will not be described here.

[0142] In summary, the technical scheme of the present application has at least the following advantages by modulating different duty ratios and linearly increasing and then linearly decreasing the slope value of the ramp compensation in the duty ratio near the current ripple cancellation point:

[0143] 1. The ramp compensation with a higher slope can be used only near the current ripple cancellation point, and the ramp compensation with a lower slope can be used at more non-current ripple cancellation points, so that the gate pulse mixing problem at the current ripple cancellation point can be avoided, and the system bandwidth and dynamic response performance at more non-current ripple cancellation points can be ensured;

[0144] 2. The slope of the generated ramp signal when performing the ramp compensation is continuously changed with the duty ratio, and there is no state jump of switching, and such smooth switching can avoid the oscillation of the system control loop and the output voltage;

[0145] 3. There is a higher adjustable degree of freedom, and the slope of the ramp signal under different duty ratios can be conveniently configured;

[0146] 4. It can be applied to changes of various typical topologies, has universality, and realizes optimization of system bandwidth and stability margin.

[0147] Finally, it should be noted that: obviously, the above embodiments are only examples for clearly illustrating the present application, and are not limitations on the implementation. For ordinary skilled persons in the art, other different forms of changes or variations can be made on the basis of the above description. Here, it is not necessary and impossible to exhaust all the implementation modes. The obvious changes or variations derived therefrom are still within the protection scope of the present application.

Claims

1. A ramp signal generating circuit for a power converter, said power converter comprising an inductance, a plurality of sets of switching transistors for controlling a charging process and a discharging process of said inductance, and a current control loop for driving said plurality of sets of switching transistors, said power converter generating an output voltage from a combined inductance current generated by switching actions of said plurality of sets of switching transistors, characterized in that, The ramp signal generation circuit comprises: a charging control module configured to generate a charging control signal according to an input voltage of the power converter and the output voltage; a transconductance amplifier configured to generate a charging current according to the charging control signal; a capacitor connected between an output terminal of the transconductance amplifier and a ground; a switch connected in parallel with the capacitor, wherein, during a switching period of the power converter, the capacitor is charged with the charging current and discharged via the switch to generate the ramp signal, which is used to adjust a first slope of a detection signal of the combined inductor current, the charging control module is configured to control a magnitude of the charging control signal according to a relationship curve between a duty cycle of the power converter and a magnitude of the charging control signal, and the charging control module is configured to adjust a second slope of the ramp signal according to a linear curve and a nonlinear curve in a continuous first duty cycle interval and a second duty cycle interval, respectively; the second duty cycle interval comprises a current ripple cancellation point of the power converter, the current ripple cancellation point represents a duty cycle corresponding to a minimum value of a current ripple generated by switching actions of the plurality of sets of switching tubes, and the charging control module is configured to adjust the second slope of the ramp signal nonlinearly in the second duty cycle interval, so that the second slope of the ramp signal first increases and then decreases, and the current ripple cancellation point is located in a maximum value part of the slope of the ramp signal.

2. The ramp signal generation circuit of claim 1, wherein, The first duty cycle interval does not comprise the current ripple cancellation point of the power converter.

3. The ramp signal generation circuit of claim 1, wherein, In the first duty cycle interval, the charging control signal is equal to a first control signal.

4. The ramp signal generation circuit of claim 2, wherein, The nonlinear curve can be any one of a polyline curve or a smooth curve.

5. The ramp signal generation circuit of claim 4, wherein, The polyline curve comprises a rising phase, a peak phase, and a falling phase, and the current ripple cancellation point is located in the peak phase.

6. The ramp signal generation circuit of claim 5, wherein in the peak phase, the charging control module adds a first control signal and a second control signal to obtain the charging control signal, in the rising phase, the charging control module adds the first control signal and a third control signal to obtain the charging control signal, in the falling phase, the charging control module adds the first control signal and a fourth control signal to obtain the charging control signal.

7. The ramp signal generation circuit of claim 6, wherein, The charging control module comprises: a first operational amplifier configured to obtain the first control signal; and a charging compensation module configured to select one of the second control signal, the third control signal, and the fourth control signal to generate a charging compensation signal according to the input voltage and the output voltage, wherein the charging control module adds the first control signal and the charging compensation signal to obtain the charging control signal.

8. The ramp signal generation circuit of claim 7, wherein, The charging compensation module comprises: a second operational amplifier configured to obtain the second control signal; a third operational amplifier and a fourth operational amplifier cascaded with each other to obtain the third control signal; a fifth operational amplifier and a sixth operational amplifier cascaded with each other to obtain the fourth control signal.

9. The ramp signal generating circuit according to claim 8, wherein The power converter is a step-down converter. The first operational amplifier obtains the first control signal according to the input voltage; The second operational amplifier obtains the second control signal according to the input voltage; The positive input terminal of the third operational amplifier receives the input voltage, the positive input terminal of the fourth operational amplifier receives the output voltage, the negative input terminal of the fourth operational amplifier receives the output signal of the third operational amplifier, and the fourth operational amplifier outputs the third control signal; The positive input terminal of the fifth operational amplifier receives the input voltage, the positive input terminal of the sixth operational amplifier receives the output signal of the fifth operational amplifier, the negative input terminal of the sixth operational amplifier receives the output voltage, and the sixth operational amplifier outputs the fourth control signal.

10. The ramp signal generation circuit of claim 8, wherein, The power converter is a step-up converter; The first operational amplifier obtains the first control signal according to the output voltage; The second operational amplifier obtains the second control signal according to the output voltage; The positive input terminal of the third operational amplifier receives the output voltage, the positive input terminal of the fourth operational amplifier receives the difference signal between the output voltage and the input voltage, the negative input terminal of the fourth operational amplifier receives the output signal of the third operational amplifier, and the fourth operational amplifier outputs the third control signal; The positive input terminal of the fifth operational amplifier receives the output voltage, the positive input terminal of the sixth operational amplifier receives the output signal of the fifth operational amplifier, the negative input terminal of the sixth operational amplifier receives the difference signal between the output voltage and the input voltage, and the sixth operational amplifier outputs the fourth control signal.

11. The ramp signal generation circuit of claim 8, wherein, The power converter is a step-up / down converter; The first operational amplifier obtains the first control signal according to the sum of the output voltage and the input voltage; The second operational amplifier obtains the second control signal according to the sum of the output voltage and the input voltage; The positive input terminal of the third operational amplifier receives the sum of the output voltage and the input voltage, the positive input terminal of the fourth operational amplifier receives the output voltage, the negative input terminal of the fourth operational amplifier receives the output signal of the third operational amplifier, and the fourth operational amplifier outputs the third control signal; The positive input terminal of the fifth operational amplifier receives the sum of the output voltage and the input voltage, the positive input terminal of the sixth operational amplifier receives the output signal of the fifth operational amplifier, the negative input terminal of the sixth operational amplifier receives the output voltage, and the sixth operational amplifier outputs the fourth control signal.

12. The ramp signal generating circuit according to any one of claims 8 to 11, characterized by, The duty ratio in the second duty ratio interval includes a rising phase start duty ratio D1, a rising phase end duty ratio D2, a falling phase start duty ratio D3, and a falling phase end duty ratio D4, and the circuit parameters of the charge compensation module satisfy the following formula: Wherein, the gains of the second to fourth operational amplifiers are represented as k1 to k3, and the gain coefficients of the fifth and sixth operational amplifiers are represented as k5 and k6, respectively.

13. The ramp signal generation circuit of claim 7, wherein, The first operational amplifier comprises a first input end, a first output end with the same polarity as the first input end, and a second output end with the opposite polarity of the first input end; The second output end receives the charging compensation signal, and the first output end outputs the charging control signal; The difference between the first output end and the second output end is equal to the product of the gain of the first operational amplifier and the signal of the first input end; When the power converter is a step-down converter, the first input end of the first operational amplifier receives the input voltage; When the power converter is a step-up converter, the first input end of the first operational amplifier receives the output voltage; When the power converter is a step-up / down converter, the first input end of the first operational amplifier receives the sum of the input voltage and the output voltage.

14. The ramp signal generation circuit of any one of claims 8-11, wherein, The charging compensation module further comprises: A first diode and a second diode, whose anodes are commonly connected to the output end of the fourth operational amplifier, the cathode of the first diode is connected to the output end of the second operational amplifier, and the cathode of the second diode is connected to the output end of the sixth operational amplifier; The charging compensation signal is generated at the anodes of the first diode and the second diode.

15. The ramp signal generation circuit of claim 7, wherein, The power converter comprises N current ripple cancellation points, and a relationship curve between the duty cycle of the power converter and the amplitude of the charging control signal comprises N second duty cycle intervals corresponding to the N current ripple cancellation points of the power converter, N being an integer greater than or equal to 1.

16. The ramp signal generation circuit of claim 15, wherein, When N is greater than 1, the peak values of the charging compensation signal in the N second duty cycle intervals increase in turn.

17. The ramp signal generation circuit of claim 16, wherein, The slope signal generation circuit comprises N selection switches and N charging compensation modules, the N charging compensation modules are connected to the first operational amplifier via corresponding selection switches, and the amplitudes of the second control signals generated by the N charging compensation modules increase in turn.

18. The ramp signal generating circuit of claim 1, wherein, The power converter comprises any one selected from a multi-phase power converter and a multi-level power converter.

19. A ramp signal generating circuit for a power converter, said power converter comprising an inductor, a plurality of sets of switching transistors for controlling a charging process and a discharging process of said inductor, and a current control loop for driving said plurality of sets of switching transistors, said power converter generating an output voltage using a combined inductor current generated by switching actions of said plurality of sets of switching transistors, characterized in that, The slope signal generation circuit comprises: A duty cycle calculation module for calculating a duty cycle according to an input voltage and an output voltage of the power converter; A slope compensation module for obtaining a slope of a slope signal according to a preset slope compensation curve, and calculating a digital value of the slope signal in real time; and A digital-to-analog converter for generating a slope signal according to the slope, The slope compensation curve comprises a first duty cycle interval and a second duty cycle interval, and the slope compensation module adjusts the slope of the slope signal according to a linear curve and a nonlinear curve respectively; The second duty cycle interval comprises a current ripple cancellation point of the power converter, the current ripple cancellation point represents a duty cycle corresponding to a minimum current ripple generated by the switching action of the plurality of groups of switching tubes, and the slope compensation module adjusts the slope of the slope signal nonlinearly in the second duty cycle interval, so that the slope of the slope signal first increases and then decreases, and the current ripple cancellation point is located in the maximum value part of the slope of the slope signal.

20. A control circuit for a power converter, characterized by Comprise: The ramp signal generation circuit according to any one of claims 1-18, or the ramp signal generation circuit according to claim 19.

21. A power converter, comprising: Comprising: The control circuit according to claim 20.

22. A method for generating a ramp signal for a power converter, said power converter comprising an inductor, a plurality of sets of switching transistors for controlling a charging process and a discharging process of said inductor, and a current control loop for driving said plurality of sets of switching transistors, said power converter generating an output voltage using a combined inductor current generated by switching actions of said plurality of sets of switching transistors, characterized in that, The ramp signal generation method comprises: obtaining a current ripple cancellation point of the power converter, the current ripple cancellation point representing a duty cycle corresponding to a minimum value of a combined inductance current generated by switching actions of the plurality of groups of switching tubes; obtaining an input voltage and an output voltage of the power converter; and, generating a ramp signal according to the input voltage and the output voltage, wherein, in generating the ramp signal, a slope of the ramp signal is compensated according to a slope compensation curve, the slope of the ramp signal is nonlinearly adjusted in a predetermined duty cycle interval of the current ripple cancellation point of the power converter; the slope of the ramp signal is first increased and then decreased by the nonlinear adjustment, and the current ripple cancellation point is located at a maximum value part of the slope of the ramp signal.

Images