Counter design method and device and storage medium

Abstract

The invention relates to the technical field of data processing, in particular to a counter design method and device and a storage medium, and the method comprises the steps: when the count value of a counter jumps, adjusting an abnormal signal to a preset signal, and determining the current counting state of the counter; if the current counting state meets the preset counting state, the current counting value of the counter is transmitted to the previous counting value; determining a difference value between the current count value and the previous count value; if the difference value is larger than a preset threshold value, the abnormal signal is adjusted, and an interrupt signal is generated to stop updating the previous count value; under the condition that the self-recovery function is configured, the hardware transmits the previous count value to the current count value, and recovers an abnormal signal to start counting; the software processes the counter in response to the interrupt signal without configuring the self-recovery function. According to the method, the manpower and hardware cost is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data processing, in particular to a design method of a counter, a design device of the counter and a storage medium. BACKGROUND

[0002] In the software driver, a timer is often used for various delay processing. When the count value meets a certain condition, the next step is continued or the processing is interrupted. Under normal circumstances, the timer will count in sequence. However, if the clock counted by the timer is unstable or has glitches, the count value of the timer will jump, and the threshold value of the software judgment cannot be reached at the predetermined time, so that the normal software processing flow cannot be performed. SUMMARY

[0003] The purpose of the present application is to provide a design method of a counter, a design device of the counter and a storage medium, and the technical solutions adopted are as follows: In a first aspect, the present application provides a design method of a counter, which comprises the following steps: generating an abnormal signal when the count value of the counter jumps; adjusting the abnormal signal to a preset signal to determine the current count state of the counter; if the current count state meets a preset count state, transmitting the current count value of the counter to a previous count value; determining the difference between the current count value and the previous count value; if the difference is greater than a preset threshold value, adjusting the abnormal signal to generate an interrupt signal to stop updating the previous count value; in the case that the counter is configured with a self-recovery function, transmitting the previous count value to the current count value through hardware and recovering the abnormal signal to start counting; in the case that the counter is not configured with a self-recovery function, processing the counter through software in response to the interrupt signal.

[0004] In a second aspect, the present application provides a design device of a counter, which comprises the following modules: a generating module configured to generate an abnormal signal when the count value of the counter jumps; a first determining module configured to adjust the abnormal signal to a preset signal to determine the current count state of the counter; a transmitting module configured to transmit the current count value of the counter to a previous count value if the current count state meets a preset count state; a second determining module configured to determine the difference between the current count value and the previous count value; an adjusting module configured to, if the difference is greater than a preset threshold, adjust the abnormal signal to generate an interrupt signal to stop updating the previous count value; a restoring module configured to, if the counter is configured with a self-restoring function, pass the previous count value to the current count value by hardware and restore the abnormal signal to start counting; and if the counter is not configured with the self-restoring function, process the counter by software in response to the interrupt signal.

[0005] In a third aspect, a computer program product is provided, which includes computer program code, when the computer program code is run on a computer, causes the computer to execute the method of the first aspect.

[0006] In a fourth aspect, a computer readable storage medium is provided, which stores computer program code, when the computer program code is run on a computer, causes the computer to execute the method of the first aspect.

[0007] The present application has the following beneficial effects: when the count value of the counter jumps, an abnormal signal (i.e. error signal) is generated; if the detected abnormal signal meets a preset signal, the current count state of the counter is determined; if the current count state meets a preset count state, the current count value of the counter is passed to the previous count value; in this way, by generating an abnormal signal when the count value of the counter jumps, detecting the abnormal signal and the current count state of the counter, and continuing counting and passing the current count value to the previous count value when the abnormal signal and the current count state both meet the conditions, the real-time updating of the count value is realized. Then, by determining the difference between the current count value and the previous count value; if the difference is greater than a preset threshold, the abnormal signal is adjusted to generate an interrupt signal to stop updating the previous count value; if the counter is configured with a self-restoring function, the previous count value is passed to the current count value by hardware and the abnormal signal is restored to start counting; and if the counter is not configured with the self-restoring function, the counter is processed by software in response to the interrupt signal. In this way, when the count value of the counter jumps, the error signal can be sent to facilitate the software to obtain. Moreover, when the count value of the counter jumps, the self-repairing function can be realized to reduce the probability of counting error of the counter; thereby the human cost and hardware cost input due to the problem of the counter caused by the clock and the count jump are reduced. BRIEF DESCRIPTION OF DRAWINGS

[0008] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required by the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained from these drawings without creative labor.

[0009] Figure 1 is an implementation flow diagram of a design method of a counter provided by an embodiment of the present application; Figure 2 is another implementation flow diagram of a design method of a counter provided by an embodiment of the present application; Figure 3 is still another implementation flow diagram of a design method of a counter provided by an embodiment of the present application; Figure 4 is a component structure diagram of a design device of a counter provided by an embodiment of the present application; Figure 5 is a structure diagram of a computer device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0010] In order to further illustrate the technical means and effects taken by the present application to achieve the predetermined invention purpose, the following describes the specific implementation, structure, features and effects of a design method of a counter according to the present application, with reference to the drawings and preferred embodiments. In the following description, different "one embodiment" or "another embodiment" do not necessarily refer to the same embodiment. In addition, the specific features, structures or characteristics in one or more embodiments can be combined in any suitable form.

[0011] In the description of the embodiments of the present application, unless otherwise specified, " / " represents the meaning of or, for example, A / B can represent A or B: "and / or" in the text only describes the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent: A exists alone, A and B exist together, and B exists alone. In addition, in the description of the embodiments of the present application, "multiple" means two or more than two.

[0012] Hereinafter, the terms "first" and "second" are only used for description purposes, and cannot be understood as implying or suggesting relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with "first" and "second" can explicitly or implicitly include one or more features.

[0013] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as understood by those skilled in the art to which the present application belongs.

[0014] The embodiment of the present application provides a design method of a counter, and the specific scheme of the design method of the counter is specifically explained below in combination with the drawings. Please refer to Figure 1 , which shows an implementation flow diagram of the design method of the counter provided by the embodiment of the present application, and the method comprises the following steps: 101, generating an abnormal signal when the counting value of the counter jumps.

[0015] Here, when it is detected that the counting value of the counter jumps in the counting process, an abnormal signal (i.e. an error signal) is generated.

[0016] 102, adjusting the abnormal signal to a preset signal to determine the current counting state of the counter.

[0017] Here, the preset signal can be self-defined, for example, the preset signal is 1 or 0; taking the preset signal as 0 as an example, the initial state of the abnormal signal is consistent with the normal counting state. When an abnormality occurs, the state of the abnormal signal is opposite to the initial state. For example: the initial state of the abnormal signal is 0 (low level), and when an abnormality occurs, the abnormal signal is pulled high, i.e. the abnormal signal is adjusted to 1. At the same time, the current counting state of the counter is obtained, and the current counting state is used to represent whether the counter can count normally.

[0018] 103, if the current counting state meets a preset counting state, the current counting value of the counter is transmitted to the previous counting value.

[0019] Here, the preset counting state can be a self-defined state, for example, a normal counting state. If the current counting state is the normal counting state, it is determined that the current counting state meets the preset counting state, and the current counting value of the counter is assigned to the previous counting value, and the counter is controlled to continue counting. In this way, the previous counting value can be updated in real time while the counter is counting, and the accuracy of the counting value is improved.

[0020] In some possible implementation manners, the above step 103 can be implemented by hardware processing, and when the counting is normal (i.e. there is no error signal), the value of the current counting value (timer_value_now) is assigned to the previous counting value (timer_value_last).

[0021] 104, determining the difference between the current counting value and the previous counting value.

[0022] Here, while the counter is controlled to count normally, the difference between the current counting value and the previous counting value is calculated.

[0023] In some possible implementation manners, in the continuous multiple counts, it is judged whether the current counting state of the counter is a normal counting state; wherein the continuous multiple counts can be understood as, after the counter jumps, an abnormal signal is generated and the abnormal signal is pulled low, in the subsequent continuous multiple counts, it is counted whether the current counting state of the counter is a normal counting state, that is, it is judged whether the counter can count normally. If in the continuous multiple counts, the current counting state of the counter is a normal counting state, it is judged whether the abnormal signal is detected in the continuous multiple counts; that is, it is judged whether the abnormal signal is received in the continuous multiple counting process, if the abnormal signal is not detected in the continuous multiple counts, the current counting value of the counter is transmitted to the previous counting value, the counting is continued, and the current counting value and the previous counting value are compared synchronously. In this way, by judging whether the counter is continuously in a normal counting state in the continuous multiple counts, the current counting value of the counter is assigned to the previous counting value in the case that the counter is continuously in a normal counting state, the counting is continued, and the current counting value and the previous counting value are compared synchronously, so that the counting accuracy can be improved.

[0024] 105, if the difference is greater than a preset threshold, adjusting the abnormal signal to generate an interrupt signal to stop updating the previous counting value.

[0025] Here, the preset threshold can be a self-defined value, for example, the preset threshold is n. The initial state of the abnormal signal is consistent with the normal counting state. When an abnormality occurs, the state of the abnormal signal is opposite to the initial state. If the difference is greater than the preset threshold, the abnormal signal at the low level is pulled high again, and an interrupt signal is generated to stop updating the previous counting value, that is, the current counting value is assigned to the previous counting value. If the difference is less than the preset threshold, the low level of the abnormal signal is maintained, that is, the abnormal signal is 0.

[0026] In some possible implementation manners, the above step 105 can be implemented by the steps shown in FIG. 8: Figure 2 201, determining a candidate signal opposite to the preset signal.

[0027] Here, if the preset signal is 0, then the candidate signal is 1; if the preset signal is 1, then the candidate signal is 0.

[0028] 202, if the difference is greater than the preset threshold, adjusting the abnormal signal from the preset signal to the candidate signal, and outputting the interrupt signal to the CPU to stop updating the previous counting value of the counter by hardware control.

[0029] ​Here, if the difference is less than the preset threshold, the error signal is 0 (i.e. error == 0), and the current count value is assigned to the previous count value to continue updating the previous count value. If the difference is greater than the preset threshold and the preset signal is 0, the error signal is pulled high, i.e. the error signal is 1, and the generated interrupt signal is output to the CPU, so that, in the case where the self-recovery function is not configured, the CPU processes the counter through the callback function bound to the interrupt signal and the current processing state of the software corresponding to the counter. In the case where the self-recovery function is configured, the counter is controlled by hardware to stop updating the previous count value. In this way, when the difference greater than the preset threshold is detected, the generated interrupt signal is output to the CPU by changing the state of the error signal, and the current count value is simultaneously stopped from being assigned to the previous count value, so that the accuracy of the current count value can be ensured.

[0030] The updating process of the error signal is as follows: if the difference between the current count value and the previous count value is greater than the preset threshold, the error signal is pulled high, i.e. the error signal is 1; if the difference between the current count value and the previous count value is less than the preset threshold, the error signal is 0.

[0031] The updating process of the previous count value (timer_value_last) is as follows: if the error signal is 0, the current count value is assigned to the previous count value; if the error signal is 1, the previous count value is not modified.

[0032] The updating process of the current count value (timer_value_now) is as follows: if the error signal is 1, it is determined whether the self-recovery function is configured; if the self-recovery function is configured, the previous count value is assigned to the current count value; if the self-recovery function is not configured, no modification is performed.

[0033] 106. In the case where the counter is configured with the self-recovery function, the previous count value is transmitted to the current count value by hardware, and the error signal is restored to start counting.

[0034] Here, when configured with the self-recovery function, no interrupt needs to be generated, and the hardware directly performs the repair processing, which can not be perceived by the software. That is, if the software is configured with the self-recovery function, the hardware automatically transmits the value of timer_value_last to timer_value_now to start counting, and pulls the error signal low (the state is not limited to being pulled low, and can be inconsistent with the state when the error occurs).

[0035] 107. In the case where the counter is not configured with the self-recovery function, the counter is processed by software in response to the interrupt signal.

[0036] Here, when configured not to need the self-recovery function, an interrupt signal needs to be generated, so that the software can perceive the exception through the interrupt signal and make corresponding processing through the CPU, such as reconfiguring the timer to count.

[0037] In some possible implementation manners, the timer can be configured with the self-recovery function through the following process: First, in a preset register, a setting bit for judging whether to perform automatic recovery when the counter jumps is determined.

[0038] Here, the preset register can be a control register. The setting bit can be any bit set in the preset register. By setting a bit in the control register, it is judged whether to perform automatic recovery when the jump occurs.

[0039] Then, based on the setting bit, the self-recovery function is configured in the counter.

[0040] Here, by obtaining a preset value for controlling the automatic recovery of the counter, and assigning the preset value to the setting bit, the self-recovery function is configured in the counter. The preset value can be 0 or 1. By writing 1 in the setting bit, it means that the self-recovery function is configured in the counter, and the hardware can automatically assign the current count value to the previous count value and start counting, while pulling up the exception signal.

[0041] In some embodiments, by determining a bit value opposite to the preset value, and assigning the bit value to the setting bit, the counter is caused to stop updating the previous count value when the jump occurs, and the current data state of the counter is maintained.

[0042] For example, the default value of the preset value is 1, indicating that the counter automatically recovers when the jump occurs. When the software writes 0 (i.e., a bit value opposite to the preset value) in this bit, it means that the counter only stops updating the timer_value_last when the jump occurs, and other values are not processed.

[0043] In some possible implementation manners, if the counter is not configured with the self-recovery function, a callback function bound with the interrupt signal and a current processing state of software corresponding to the counter are determined; and based on the callback function and the current processing state of the software, the counter is processed.

[0044] Here, if the software is not configured with the self-recovery function, corresponding processing can be performed in the interrupt processing function after receiving the interrupt generated by the error signal. When the CPU receives the interrupt signal, the callback function bound with the interrupt is executed. The specific function implementation can be determined according to the software flow, which can directly skip after reporting an error, or can reconfigure the timer to start counting again.

[0045] In an embodiment of the present invention, when a counter's count value changes, an exception signal (i.e., an error signal) is generated. If the detected exception signal satisfies a preset signal, the current count state of the counter is determined. If the current count state satisfies the preset count state, the current count value of the counter is transferred to the previous count value. Thus, by generating an exception signal when the counter's count value changes, detecting the exception signal and the current count state of the counter, and continuing counting while transferring the current count value to the previous count value when both the exception signal and the current count state meet conditions, real-time updating of the count value is achieved. Subsequently, the difference between the current count value and the previous count value is determined. If the difference is greater than a preset threshold, the exception signal is adjusted and an interrupt signal is generated to stop updating the previous count value. If the counter is configured with a self-recovery function, the previous count value is transferred to the current count value via hardware, and the exception signal is restored to resume counting. If the counter is not configured with a self-recovery function, software is used to process the counter in response to the interrupt signal. This allows the counter to send an error signal when the count value jumps, facilitating software detection. Furthermore, the self-repair function implemented when the counter value jumps reduces the probability of counter errors, thereby reducing the labor and hardware costs associated with counter problems caused by clock jumps.

[0046] In some possible implementations, this can be achieved by Figure 3 The process shown is implemented as follows: First, the error signal is pulled low (i.e., error == 0). Second, the current count value (timer_value_now) is transferred to the previous count value (timer_value_last), and counting continues. Finally, each time the timer counts, |timer_value_last - timer_value_now| is calculated. When the difference exceeds the preset threshold, the error signal is pulled high (i.e., error == 1), an interrupt is sent to the CPU (this can be any signal, not just an interrupt), and the timer_value_last value stops updating. When the difference falls below the preset threshold, the exception signal is set to 0 (i.e., error == 0), and the previous count value continues to be updated.

[0047] Thirdly, the software can configure whether the self-recovery is needed when the counting value jumps through the register. If the software configures the self-recovery, the hardware automatically transmits the last counting value to the current counting value, starts counting, and pulls down the error signal (the state is not limited to being pulled down, as long as the state is inconsistent with the state when the error occurs). If the software does not configure the self-recovery, the corresponding processing can be performed in the interrupt processing function after receiving the error interrupt.

[0048] An embodiment of the present application provides a design device of a counter, as shown in the figure, the device 400 comprises: Figure 4 A generating module 401, configured to generate an abnormal signal when a counting value of the counter jumps; A first determining module 402, configured to adjust the abnormal signal to a preset signal, and determine a current counting state of the counter; A transmitting module 403, configured to transmit a current counting value of the counter to a last counting value if the current counting state meets a preset counting state; A second determining module 404, configured to determine a difference between the current counting value and the last counting value; An adjusting module 405, configured to adjust the abnormal signal to generate an interrupt signal to stop updating the last counting value if the difference is greater than a preset threshold; A recovery module 406, configured to transmit the last counting value to the current counting value through hardware and recover the abnormal signal to start counting if the counter is configured with a self-recovery function; and configured to process the counter through software in response to the interrupt signal if the counter is not configured with the self-recovery function. In some possible implementation manners, the transmitting module 403 is further configured to determine that the current counting state meets the preset counting state if the current counting state is a normal counting state; and configured to assign the current counting value of the counter to the last counting value, and control the counter to continue counting.

[0049] In some possible implementation manners, the adjusting module 405 is further configured to determine a candidate signal opposite to the preset signal; and configured to adjust the abnormal signal from the preset signal to the candidate signal if the difference is greater than the preset threshold, and output the interrupt signal to a CPU, and control the counter to stop updating the last counting value through the hardware.

[0050] In some possible implementation manners, the adjusting module 405 is further configured to determine a candidate signal opposite to the preset signal; and configured to adjust the abnormal signal from the preset signal to the candidate signal if the difference is greater than the preset threshold, and output the interrupt signal to a CPU, and control the counter to stop updating the last counting value through the hardware.

[0051] In some possible implementation manners, the recovery module 406 is further configured to determine a callback function bound with the interrupt signal and a current processing state of software corresponding to the counter, if the counter is not configured with the self-recovery function; and perform processing on the counter based on the callback function and the current processing state of the software.

[0052] In some possible implementation manners, the recovery module 406 is further configured to determine, in a preset register, a setting bit used to determine whether to perform automatic recovery when the counter jumps; and configure the self-recovery function in the counter based on the setting bit.

[0053] In some possible implementation manners, the recovery module 406 is further configured to obtain a preset value used to control automatic recovery of the counter; and assign the preset value to the setting bit, to configure the self-recovery function in the counter.

[0054] In some possible implementation manners, the recovery module 406 is further configured to determine a bit value opposite to the preset value; and assign the bit value to the setting bit, to make the counter stop updating the previous counting value when the counter jumps, and keep a current data state of the counter.

[0055] In some possible implementation manners, the transmission module 403 is further configured to determine, in a plurality of continuous counting, whether a current counting state of the counter is a normal counting state; if the current counting state of the counter is the normal counting state in the plurality of continuous counting, determine whether the abnormal signal is detected in the plurality of continuous counting; and if the abnormal signal is not detected in the plurality of continuous counting, transmit the current counting value of the counter to the previous counting value, continue counting, and synchronously compare the current counting value and the previous counting value.

[0056] Optionally, the transmission medium can be a wired link (for example, but not limited to, a coaxial cable, an optical fiber, a Digital Subscriber Line (DSL), and the like) or a wireless link (for example, but not limited to, Wireless Fidelity (WIFI), Bluetooth, and a mobile device network, and the like). It should be noted that the system provided in the above embodiments is only used as an example for the division of the above functional modules, and in actual applications, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the computer device is divided into different functional modules to complete all or part of the functions described above. In addition, the method embodiments provided in the above embodiments belong to the same concept, and the specific implementation process is shown in the method embodiments, which will not be repeated here.

[0057] Figure 5is a structural schematic diagram of a computer device provided by an embodiment of the present application. As shown in the example, Figure 5 The computer device 500 includes a memory 501, a processor 502, and a computer program 503 stored in the memory 501 and running on the processor 502. When the processor 502 executes the computer program 503, the computer device can execute the design method of any one of the counters described above.

[0058] In addition, an embodiment of the present application also protects a system, which can include a memory and a processor, wherein the memory stores executable program code, and the processor is configured to invoke and execute the executable program code to execute the design method of a counter provided by an embodiment of the present application. The embodiment can divide the system into functional modules according to the above method examples, for example, each functional module can be corresponding, or two or more functions can be integrated in one processing module, and the integrated module can be implemented in the form of hardware. It should be noted that the division of the modules in the embodiment is illustrative, and is only a logical functional division. In actual implementation, another division manner can be used. It should be noted that all related contents of each step involved in the above method embodiments can be cited to the functional description of the corresponding functional module, and will not be described herein.

[0059] It should be understood that the system provided by the embodiment is used to execute the design method of a counter described above, and thus can achieve the same effect as the above implementation method. In the case of using an integrated unit, the system can include a processing module and a storage module. When the system is applied to a device, the processing module can be used to control and manage the actions of the device. The storage module can be used to support the device to execute related program codes and the like. The processing module can be a processor or a controller, which can implement or execute various exemplary logical blocks, modules and circuits described in combination with the disclosure. The processor can also be a combination of computing functions, such as one or more microprocessor combinations, a combination of digital signal processing (DSP) and microprocessor, and the like. The storage module can be a memory.

[0060] In addition, the system provided by the embodiment of the present application can be a chip, an assembly or a module. The chip can include a connected processor and a memory. The memory is used to store instructions, and when the processor invokes and executes the instructions, the chip can execute the design method of a counter provided by the above embodiment. The embodiment also provides a computer readable storage medium, which stores computer program codes. When the computer program codes run on a computer, the computer can execute the above related method steps to implement the design method of a counter provided by the above embodiment.

[0061] The embodiment further provides a computer program product, which, when running on a computer, causes the computer to execute the above-mentioned related steps to realize the design method of the counter provided by the above-mentioned embodiment. The system, the computer readable storage medium, the computer program product or the chip provided by the embodiment are used to execute the corresponding method provided above, and therefore, the beneficial effects achieved by the system, the computer readable storage medium, the computer program product or the chip can refer to the beneficial effects in the corresponding method provided above, which will not be described here again. Through the description of the above implementation manners, those skilled in the art can understand that, for the convenience and brevity of description, only the division of the above functional modules is taken as an example for illustration, and in actual application, the above functions can be completed by different functional modules according to needs, that is, the internal structure of the system is divided into different functional modules to complete all or part of the functions described above. In the embodiments provided by the present application, it should be understood that the disclosed system and method can be implemented in other ways. For example, the system embodiments described above are only schematic, for example, the division of the modules or units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some interface, system or unit, and can be electrical, mechanical or other forms.

[0062] It should be noted that: the above-mentioned sequence of the embodiments of the present application is only for description, and does not represent the advantages and disadvantages of the embodiments. The processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multiple task processing and parallel processing are also possible. Each embodiment in the specification is described in a progressive manner, and the same or similar parts between each embodiment can be referred to, and each embodiment mainly describes the differences from other embodiments. The above content is only a specific implementation manner of the present application, but the protection scope of the present application is not limited to this. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present application, which should be covered within the protection scope of the present application.

Claims

1. A method for designing a counter, characterized in that: The method comprises: When the count value of the counter jumps, an abnormal signal is generated; Adjusting the abnormal signal to a preset signal to determine the current counting state of the counter; If the current counting state satisfies the preset counting state, transferring the current counting value of the counter to the previous counting value; determining a difference between the current count value and the previous count value; If the difference is greater than a preset threshold, adjusting the abnormal signal and generating an interrupt signal to stop updating the previous count value; In the case where the counter is configured with a self-recovery function, the previous count value is transferred to the current count value through hardware, and the abnormal signal is restored to start counting; In the case that the counter is not configured with a self-recovery function, the counter is processed by software in response to the interrupt signal.

2. The method for designing a counter according to claim 1, wherein: If the current counting state satisfies a preset counting state, transferring the current counting value of the counter to the previous counting value comprises: If the current counting state is a normal counting state, determining that the current counting state satisfies a preset counting state; The current count value of the counter is assigned to the previous count value, and the counter is controlled to continue counting.

3. The method for designing a counter according to claim 1, wherein: If the difference is greater than a preset threshold, adjusting the abnormal signal and generating an interrupt signal to stop updating the previous count value includes: determining a candidate signal that is opposite to the predetermined signal; If the difference is greater than a preset threshold, the abnormal signal is adjusted from the preset signal to the candidate signal, and the interrupt signal is output to the CPU, and the counter is controlled by the hardware to stop updating the previous count value.

4. The method for designing a counter according to claim 1, wherein: When the counter is not configured with a self-recovery function, processing the counter by software in response to the interrupt signal includes: If the counter is not configured with a self-recovery function, determining a callback function bound to the interrupt signal and a current processing state of software corresponding to the counter; The counter is processed based on the callback function and the current processing state of the software.

5. The method for designing a counter according to claim 1, wherein: The method further comprises: In the preset register, determine the setting bit for determining whether to automatically recover when the counter jumps; Based on the setting bit, a self-recovery function is configured in the counter.

6. The method for designing a counter according to claim 5, wherein: The configuring a self-recovery function in the counter based on the setting bit includes: Obtaining a preset value for controlling the self-recovery of the counter; A preset value is assigned to the setting bit to configure a self-recovery function in the counter.

7. The method for designing a counter according to claim 6, wherein: The method further comprises: determining a bit value opposite to the preset value; The bit value is assigned to the setting bit, so that the counter stops updating the previous count value when a jump occurs and maintains the current data state of the counter.

8. The method for designing a counter according to claim 1, wherein: If the current counting state satisfies a preset counting state, transferring the current counting value of the counter to the previous counting value, the method further includes: During multiple consecutive counts, determining whether the current counting state of the counter is a normal counting state; If the current counting state of the counter is a normal counting state during the multiple consecutive countings, determining whether the abnormal signal is detected during the multiple consecutive countings; If the abnormal signal is not detected during the multiple consecutive counting, the current count value of the counter is transferred to the previous count value, the counting is continued, and the current count value and the previous count value are synchronously compared.

9. A design device for a counter, characterized in that: The design device of the counter includes: A generating module, used for generating an abnormal signal when the count value of the counter jumps; a first determining module, configured to adjust the abnormal signal to a preset signal and determine a current counting state of the counter; a transfer module, configured to transfer the current count value of the counter to the previous count value if the current count state satisfies a preset count state; a second determining module, configured to determine a difference between the current count value and the previous count value; an adjusting module, configured to adjust the abnormal signal and generate an interrupt signal to stop updating the previous count value if the difference is greater than a preset threshold; A recovery module is used to transfer the previous count value to the current count value through hardware and restore the abnormal signal to start counting when the counter is configured with a self-recovery function; and to process the counter through software in response to the interrupt signal when the counter is not configured with a self-recovery function.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and when the computer instructions are executed on an electronic device, the electronic device is caused to perform the method according to any one of claims 1 to 8.

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