Broadband injection-locked frequency divide-quad

Abstract

The invention discloses a broadband injection locking frequency-quad divider, relates to the technical field of radio frequency integrated circuit design, and is used for solving the technical problems that the actual locking bandwidth range of an existing frequency divider is insufficient, and the impedance matching characteristic of a resonant cavity is disturbed by parasitic capacitance of an injection node and distributed parameters. According to the broadband injection-locked quad frequency divider, n injection ring oscillation units are connected in series to form a multi-stage chain type structure, wherein each injection ring oscillation unit is provided with a tail current injection unit and a cross-coupled inverter injection unit; in the chain type structure, the first output end and the second output end of the last stage of injection ring vibration unit are respectively connected with the second input end and the first input end of the first stage of injection ring vibration unit. A first signal is injected into a tail current injection unit and a cross-coupling inverter injection unit of each injection ring oscillation unit, and the last stage of injection ring oscillation unit receives a second signal from the previous stage of injection ring oscillation unit and converts the second signal into a third signal with four frequency divisions to be output.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of radio frequency integrated circuit design, and more particularly, to a wideband injection-locked frequency divider. BACKGROUND

[0002] The frequency divider is a key module in radio frequency and millimeter wave communication systems, which is used to divide high frequency signals into lower frequencies for subsequent signal processing. In systems such as phase-locked loops, frequency synthesizers, and wireless transceivers, the performance of the frequency divider directly affects the frequency stability, phase noise, and power consumption of the system. Among them, the injection-locked frequency divider has become the preferred solution in high-frequency applications due to its low power consumption, low phase noise, and high operating frequency.

[0003] In the prior art, the injection-locked frequency divider based on the LC resonant cavity has high-frequency working capability and low phase noise characteristics, but its locking range is limited by the Q value of the resonant cavity, the bandwidth is narrow, and the on-chip inductor occupies a large chip area, which is difficult to meet the miniaturization demand. In contrast, the frequency divider with a ring oscillator structure performs excellently in terms of area compactness and wide locking range due to its inductor-free design, but its inherent multi-stage inverter cascade structure can significantly increase power consumption, especially in high-frequency millimeter wave scenarios. The current mainstream injection-locked frequency divider of the ring oscillator mostly adopts a single-point or double-node injection scheme; for example, through direct gate injection or tail current injection, a single or two injection nodes are used to couple external signals to expand the locking range. However, such schemes have the following defects: on the one hand, the synchronization efficiency of single-point injection is limited, which is difficult to fully stimulate the harmonic response of the oscillator, resulting in insufficient actual locking bandwidth range; on the other hand, although the direct injection mechanism can effectively improve the injection strength, its expansion capability of the loop bandwidth still has a physical bottleneck, especially in the high-frequency millimeter wave band, the parasitic capacitance and distributed parameters of the injection node will significantly disturb the impedance matching characteristics of the resonant cavity, causing non-ideal deviation of the voltage-controlled oscillation resonance frequency, and thus deteriorating the phase noise performance and frequency tuning linearity, which severely restricts the performance potential of the frequency divider. SUMMARY

[0004] The present application aims to provide a wideband injection-locked frequency divider to solve the technical problems of insufficient actual locking bandwidth range of the existing frequency divider and disturbance of the parasitic capacitance and distributed parameters of the injection node to the impedance matching characteristics of the resonant cavity. In view of this, the present application is implemented by the following scheme.

[0005] The present application provides a wideband injection-locked frequency divider formed by n injection ring oscillator units in series to form a multi-stage chain structure, and n is an even number greater than or equal to 4; wherein: The injection ring oscillator unit is provided with a tail current injection unit and a cross-coupled inverter injection unit; In the chain structure, the first output end and the second output end of the last-stage injection ring oscillator unit are connected with the second input end and the first input end of the first-stage injection ring oscillator unit respectively; By injecting the first signal into the tail current injection unit and the cross-coupled inverter injection unit of each injection ring oscillator unit, the last-stage injection ring oscillator unit receives the second signal from the upper-stage injection ring oscillator unit and converts the second signal into the third signal output which is divided by four.

[0006] Compared with the prior art, the wideband injection-locked frequency divider of the present application is formed by n injection ring oscillator units in a multi-stage chain structure in series, and each injection ring oscillator unit is provided with a tail current injection unit and a cross-coupled inverter injection unit, and by injecting the first signal into the tail current injection unit and the cross-coupled inverter injection unit of each injection ring oscillator unit, the last-stage injection ring oscillator unit receives the second signal from the upper-stage injection ring oscillator unit and converts the second signal into the third signal output which is divided by four. As can be seen, the above-mentioned injection ring oscillator unit serves as the basic unit part of the frequency divider, and the two-point injection ring oscillator unit forms an injection loop in two dimensions of the common source node and the tail current through the tail current injection and the cross-coupled inverter injection based on the tail current injection unit and the cross-coupled inverter injection unit. Compared with the traditional direct injection structure, the cross-coupled network can form a resonant cavity, can provide better frequency selectivity and better phase matching characteristics, allows the injection signal to still be able to successfully lock to the target frequency under a larger frequency deviation, while avoiding the influence of the parasitic capacitance effect on the stability, effectively filtering out the high-frequency noise through the coupling network, expanding the locking range while reducing the phase noise and improving the stability. Further, the tail current injection is performed through the tail current tube while the cross-coupled injection is performed, which expands the locking range while making the injection-locked frequency divider not susceptible to the process, voltage and temperature changes. Through the above technical scheme of the present application, the technical problems of the insufficient actual locking bandwidth range of the existing frequency divider and the impedance matching characteristics of the parasitic capacitance and distributed parameter disturbance resonant cavity of the injection node are solved.

[0007] Further, in the wideband injection-locked frequency divider of the present application, the tail current injection unit comprises a seventh NMOS transistor, a first resistor and a first capacitor; one end of the first capacitor is connected with the tail injection end of the injection ring oscillator unit, and the other end is connected with the gate of the seventh NMOS transistor; one end of the first resistor is connected with a bias voltage, and the other end is connected with the gate of the seventh NMOS transistor, and the source of the seventh NMOS transistor is grounded.

[0008] Further, in the wideband injection-locked frequency divider of the present application, the cross-coupled inverter injection unit comprises a second NMOS transistor, a fifth NMOS transistor, and a second PMOS transistor and a fifth PMOS transistor; the gate of the second NMOS transistor and the fifth NMOS transistor is connected to the first cross-coupled injection end of the injection ring oscillator unit; the gate of the second PMOS transistor and the fifth PMOS transistor is connected to the second cross-coupled injection end of the injection ring oscillator unit.

[0009] Further, in the wideband injection-locked frequency divider of the present application, the injection ring oscillator unit further comprises a first PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a sixth PMOS transistor, and a first NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, and a sixth NMOS transistor; the source of the first PMOS transistor, the third PMOS transistor, the fourth PMOS transistor, and the sixth PMOS transistor is connected to a power supply voltage; the gate of the first PMOS transistor is connected to the gate of the first NMOS transistor; the drain of the first PMOS transistor is connected to the drain of the first NMOS transistor, the second NMOS transistor, the second PMOS transistor, and the gate of the second PMOS transistor and the second NMOS transistor; the source of the second PMOS transistor is connected to the drain of the third PMOS transistor; the gate of the third PMOS transistor is connected to the gate of the third NMOS transistor; the gate of the third PMOS transistor is connected to the drain of the sixth PMOS transistor, the sixth NMOS transistor, the fifth PMOS transistor, and the fifth NMOS transistor; the source of the fifth PMOS transistor is connected to the drain of the fourth PMOS transistor; the gate of the sixth PMOS transistor is connected to the gate of the fifth PMOS transistor; the source of the second NMOS transistor is connected to the drain of the third NMOS transistor; the source of the fifth NMOS transistor is connected to the drain of the fourth NMOS transistor; the drain of the seventh NMOS transistor is connected to the source of the first NMOS transistor, the third NMOS transistor, the fourth NMOS transistor, and the sixth NMOS transistor; and the gate of the seventh NMOS transistor is grounded.

[0010] Further, in the wideband injection-locked frequency divider of the present application, in the injection ring oscillator unit, the gate of the first PMOS transistor is used as the first input end of the injection ring oscillator unit; the drain of the first PMOS transistor is used as the first output end of the injection ring oscillator unit; the gate of the sixth PMOS transistor is used as the second input end of the injection ring oscillator unit; and the gate of the third PMOS transistor is used as the second output end of the injection ring oscillator unit.

[0011] Furthermore, in the broadband injection-locked four-frequency divider of the present invention, the broadband injection-locked four-frequency divider is formed by connecting four injection ring oscillator units in series to form a four-stage chain structure; wherein: The first output end of the first-level injection ring oscillator unit is connected to the first input end of the second-level injection ring oscillator unit; the second output end of the first-level injection ring oscillator unit is connected to the second input end of the second-level injection ring oscillator unit; the first output end of the second-level injection ring oscillator unit is connected to the first input end of the third-level injection ring oscillator unit; the second output end of the second-level injection ring oscillator unit is connected to the second input end of the third-level injection ring oscillator unit; the first output end of the third-level injection ring oscillator unit is connected to the first input end of the fourth-level injection ring oscillator unit; the second output end of the third-level injection ring oscillator unit is connected to the second input end of the fourth-level injection ring oscillator unit; the first output end of the fourth-level injection ring oscillator unit is connected to the second input end of the first-level injection ring oscillator unit; and the second output end of the fourth-level injection ring oscillator unit is connected to the first input end of the first-level injection ring oscillator unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings: Figure 1 Schematic diagram of the overall structure of the broadband injection-locked four-way frequency divider of the present invention; Figure 2 Schematic diagram of the structure of the injection ring oscillation unit in the broadband injection-locked four-way frequency divider of the present invention; Figure 3 This is a schematic diagram of the locking range simulation in simulation 1 of the present invention.

[0013] Reference numerals: Figure 1 and Figure 2 In the figure, P1 is a first PMOS transistor; P2 is a second PMOS transistor; P3 is a third PMOS transistor; P4 is a fourth PMOS transistor; P5 is a fifth PMOS transistor; P6 is a sixth PMOS transistor; N1 is a first NMOS transistor; N2 is a second NMOS transistor; N3 is a third NMOS transistor; N4 is a fourth NMOS transistor; N5 is a fifth NMOS transistor; N6 is a sixth NMOS transistor; N7 is a seventh NMOS transistor; C1 is a first capacitor; R1 is a first resistor; VBIAS is a bias voltage; VDD is a power supply voltage; CLK_P is a forward frequency division signal; CLK_N is a reverse frequency division signal; INJ_P is a forward injection signal; INJ_N is a reverse injection signal; INJ_S is a tail injection signal. DETAILED DESCRIPTION

[0014] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0015] It should be noted that when an element is referred to as being “fixed on” or “disposed on” another element, it may be directly on the other element or indirectly on the other element. When an element is referred to as being “connected to” another element, it may be directly connected to the other element or indirectly connected to the other element.

[0016] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Thus, a feature specified as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more, unless otherwise specifically defined. "Several" means one or more, unless otherwise specifically defined.

[0017] In the existing technology, although the injection-locked divider based on the LC resonant cavity has high-frequency operating capabilities and low phase noise characteristics, its locking range is limited by the Q value of the resonant cavity, the bandwidth is narrow, and the on-chip integrated inductor will occupy a large chip area, making it difficult to meet the needs of miniaturization. In contrast, the divider with a ring oscillator structure excels in area compactness and wide locking range due to its inductor-free design, but its inherent multi-stage inverter cascade structure will lead to a significant increase in power consumption, especially in high-frequency millimeter wave scenarios. The current mainstream ring oscillator injection-locked divider mostly adopts a single-point or dual-node injection scheme; for example, through direct gate injection or tail current injection, a single or two injection nodes are used to couple external signals to expand the locking range. However, such schemes have the following defects: on the one hand, the synchronization efficiency of single-point injection is limited, making it difficult to fully stimulate the harmonic response of the oscillator, resulting in insufficient actual locking bandwidth range; on the other hand, although the direct injection mechanism can effectively improve the injection intensity, its ability to expand the loop bandwidth still has a physical bottleneck, especially in the high-frequency millimeter wave band. The parasitic capacitance and distributed parameters of the injection node will significantly disturb the impedance matching characteristics of the resonant cavity, causing non-ideal shifts in the resonant frequency of the voltage-controlled oscillation, thereby deteriorating the phase noise performance and frequency tuning linearity, seriously restricting the performance potential of the divider.

[0018] To solve the above technical problems, the application provides a wideband injection-locked frequency divider, which is formed by n injection ring oscillator units in a multi-stage chain structure through series connection, n being an even number greater than or equal to 4; wherein: the injection ring oscillator unit is provided with a tail current injection unit and a cross-coupled inverter injection unit; in the chain structure, the first output end and the second output end of the last-stage injection ring oscillator unit are connected with the second input end and the first input end of the first-stage injection ring oscillator unit respectively; the first signal is injected into the tail current injection unit and the cross-coupled inverter injection unit of each injection ring oscillator unit, the last-stage injection ring oscillator unit receives the second signal from the upper-stage injection ring oscillator unit, and converts the second signal into a third signal output of frequency division by four.

[0019] In the case of the above technical solution, the wideband injection-locked frequency divider of the application is formed by n injection ring oscillator units in a multi-stage chain structure through series connection, and the injection ring oscillator unit is provided with a tail current injection unit and a cross-coupled inverter injection unit, and then the first signal is injected into the tail current injection unit and the cross-coupled inverter injection unit of each injection ring oscillator unit, the last-stage injection ring oscillator unit receives the second signal from the upper-stage injection ring oscillator unit, and converts the second signal into a third signal output of frequency division by four. As can be seen, the above injection ring oscillator unit serves as a basic unit part of the frequency divider, and the two-point injection ring oscillator unit forms an injection loop in two dimensions of a common source node and a tail current through tail current injection and cross-coupled inverter injection based on the tail current injection unit and the cross-coupled inverter injection unit. Compared with the traditional direct injection structure, the cross-coupled network can form a resonant cavity, which can provide better frequency selectivity and better phase matching characteristics, allowing the injection signal to still be successfully locked to the target frequency under a larger frequency deviation, while avoiding the influence of parasitic capacitance effect on stability, effectively filtering out high-frequency noise through the coupling network, expanding the locking range while reducing the phase noise and improving the stability. Further, the tail current injection is performed through the tail current tube while the cross-coupled injection is performed, which expands the locking range while making the injection-locked frequency divider less susceptible to process, voltage and temperature changes. Further, in the wideband injection-locked frequency divider of the application, the forward frequency division signal CLK_P and the reverse frequency division signal CLK_N of each injection ring oscillator unit are cross-coupled injected by the forward injection signal INJ_P and the reverse injection signal INJ_N, and are tail-injected by the tail injection signal INJ_S, so as to determine the frequency of the forward frequency division signal CLK_P and the reverse frequency division signal CLK_N. Through the above technical solution of the application, the technical problems of insufficient actual locking bandwidth range of the existing frequency divider and impedance matching characteristics of the parasitic capacitance and distributed parameter disturbance resonant cavity of the injection node are solved.

[0020] As a possible implementation, in the wideband injection-locked frequency divider of the application, the tail current injection unit comprises a seventh NMOS transistor N7, a first resistor R1 and a first capacitor C1; one end of the first capacitor C1 is connected with the tail injection end of the injection ring oscillator unit, and the other end is connected with the gate of the seventh NMOS transistor N7; one end of the first resistor R1 is connected with a bias voltage VBIAS, and the other end is connected with the gate of the seventh NMOS transistor N7, and the source of the seventh NMOS transistor N7 is grounded. In the case of adopting the technical scheme, the seventh NMOS transistor N7 serves as a tail current source, the gate thereof sets the working point through the bias voltage VBIAS, the source thereof is grounded, and the drain thereof is connected with each branch to provide a stable bias current; the value of the bias voltage VBIAS is adjusted to change the tail current size, so as to determine the oscillation frequency and amplitude of the injection ring oscillator. The first capacitor C1 and the first resistor R1 constitute a low-pass filter, reduce the bias voltage fluctuation, improve the purity of the tail current, and optimize the performance indicators such as phase noise and frequency stability; the transistor is used to provide sufficient injection gain, the resistor is used to input a direct current bias, and the capacitor is used to input an alternating current signal.

[0021] As a possible implementation, in the wideband injection-locked frequency divider of the application, the cross-coupled inverter injection unit comprises a second NMOS transistor N2, a fifth NMOS transistor N5, a second PMOS transistor P2 and a fifth PMOS transistor P5; the gates of the second NMOS transistor N2 and the fifth NMOS transistor N5 are connected with the first cross-coupled injection end of the injection ring oscillator unit; and the gates of the second PMOS transistor P2 and the fifth PMOS transistor P5 are connected with the second cross-coupled injection end of the injection ring oscillator unit. In the case of adopting the technical scheme, the signal injection mode of the cross-coupled inverter injection unit can directly utilize the cross-coupled inverter structure in the negative resistance unit to realize injection, the current of the cross-coupled pair of transistors is affected by controlling the gate voltage of the injection transistor, and a wider frequency change range can be realized at a lower injection strength through the positive feedback effect.

[0022] As a possible implementation, in the wideband injection locking frequency divider of the present application, the injection ring oscillator unit further comprises a first PMOS transistor P1, a third PMOS transistor P3, a fourth PMOS transistor P4, a sixth PMOS transistor P6, and a first NMOS transistor N1, a third NMOS transistor N3, a fourth NMOS transistor N4, and a sixth NMOS transistor N6; the sources of the first PMOS transistor P1, the third PMOS transistor P3, the fourth PMOS transistor P4, and the sixth PMOS transistor P6 are connected to a power supply voltage VDD; the gate of the first PMOS transistor P1 is connected to the gate of the first NMOS transistor N1; the drain of the first PMOS transistor P1 is connected to the drain of the first NMOS transistor N1, the second NMOS transistor N2, the second PMOS transistor P2, and the gates of the second PMOS transistor P2 and the second NMOS transistor N2; the source of the second PMOS transistor P2 is connected to the drain of the third PMOS transistor P3; the gate of the third PMOS transistor P3 is connected to the gate of the third NMOS transistor N3; the gate of the third PMOS transistor P3 is connected to the drains of the sixth PMOS transistor P6, the sixth NMOS transistor N6, the fifth PMOS transistor P5, and the fifth NMOS transistor N5; the source of the fifth PMOS transistor P5 is connected to the drain of the fourth PMOS transistor P4; the gate of the sixth PMOS transistor P6 is connected to the gate of the fifth PMOS transistor P5; the source of the second NMOS transistor N2 is connected to the drain of the third NMOS transistor N3; the source of the fifth NMOS transistor N5 is connected to the drain of the fourth NMOS transistor N4; the drain of the seventh NMOS transistor N7 is connected to the sources of the first NMOS transistor N1, the third NMOS transistor N3, the fourth NMOS transistor N4, and the sixth NMOS transistor N6; and the gate of the seventh NMOS transistor N7 is grounded. In this case, the injection locking is performed through tail injection and cross-coupled injection, and the injection mode does not introduce additional parasitic capacitance.

[0023] As a possible implementation, in the wideband injection-locked frequency divider of the application, for the injection ring oscillator unit, the gate of the first PMOS transistor P1 is the first input end of the injection ring oscillator unit; the drain of the first PMOS transistor P1 is the first output end of the injection ring oscillator unit; the gate of the sixth PMOS transistor P6 is the second input end of the injection ring oscillator unit; and the gate of the third PMOS transistor P3 is the second output end of the injection ring oscillator unit. In the wideband injection-locked frequency divider of the application, the wideband injection-locked frequency divider is formed into a four-stage chain structure by four injection ring oscillator units in series; wherein: the first output end of the first-stage injection ring oscillator unit is connected to the first input end of the second-stage injection ring oscillator unit; the second output end of the first-stage injection ring oscillator unit is connected to the second input end of the second-stage injection ring oscillator unit; the first output end of the second-stage injection ring oscillator unit is connected to the first input end of the third-stage injection ring oscillator unit; the second output end of the second-stage injection ring oscillator unit is connected to the second input end of the third-stage injection ring oscillator unit; the first output end of the third-stage injection ring oscillator unit is connected to the first input end of the fourth-stage injection ring oscillator unit; the second output end of the third-stage injection ring oscillator unit is connected to the second input end of the fourth-stage injection ring oscillator unit; the first output end of the fourth-stage injection ring oscillator unit is connected to the second input end of the first-stage injection ring oscillator unit; and the second output end of the fourth-stage injection ring oscillator unit is connected to the first input end of the first-stage injection ring oscillator unit. In the case of using this technical solution, a closed-loop feedback system is formed by the four-stage injection ring oscillator unit to meet the oscillation condition, and the multi-stage injection structure can realize a wider frequency adjustment range.

[0024] In summary, the application introduces two injection methods of tail current injection and cross-coupled inverter injection in the injection ring oscillator unit of the wideband injection-locked frequency divider; in addition, the bias voltage VBIAS is used to set the DC bias of the tail current, and all bias voltages are filtered by RC low-pass filters to suppress the influence of power supply noise. In the low-frequency band, the tail injection path plays a leading role, the injection ring oscillator unit changes the AC impedance of the node by modulating the transconductance value gm of the tail current injection MOS transistor, and the nonlinear characteristics of the transistor are used to expand the low-frequency band locking range; in the medium and high-frequency band, the resonant structure of the cross-coupled injection effectively eliminates the parasitic capacitance effect, enhances the high-frequency adaptability, and widens the locking range. Further, the wideband injection-locked frequency divider of the application ensures that the best injection efficiency can be obtained in the entire working frequency band through the multi-path cooperative working mode, finally realizes the full-band frequency locking range expansion, and adds an RC filter network to the tail injection path to optimize the noise performance.

[0025] Further, simulation experiments are carried out on the wideband injection-locked frequency divider of the application; specifically, the simulation experiment elements of the application adopt the SMIC 40nm RF CMOS process, a complete frequency divider circuit is built based on the Cadence IC617 simulation platform under the Linux system environment; the simulation experiment adopts the Spectre RF simulation tool, the power supply voltage VDD is set to 1.2V, the working temperature is set to 27℃, the bias voltage Vbias is set to 0.75V, and the input signal frequency is set to 5GHz. BIAS

[0026] Simulation 1: Under standard working conditions, the Spectre RF simulation tool is used to set the output port at the differential output end of the wideband injection-locked frequency divider of the application, and frequency range scanning simulation is carried out. The simulation result is shown in Figure 3 Figure 3 , in which the abscissa represents the input signal frequency, the unit is GHz, and the ordinate represents the input power, the unit is dBm. The simulation result shows that when the input power is 0dBm, the locking range is 4-25GHz.

[0027] Simulation 2: In order to verify the function of the injection ring vibration unit in the wideband injection-locked frequency divider of the application, injection efficiency comparison simulation is designed. Under the condition of keeping the total injection power unchanged, the locking range when single injection path and double-path injection are simulated respectively. The result shows that when the tail injection is made alone, the locking range is 64.5%, and when the cross-coupled inverter injection is made, the locking range is ±50.2%; when the double-path joint injection is made, the locking range is expanded to 172.5%, which verifies the significant advantage of multi-path cooperative injection.

[0028] Simulation 3: Transient simulation analysis is carried out to start the characteristics, the input signal is applied at 5ns, and the result shows that the circuit completes the initial locking within 15ns, and reaches the complete stable state at 35ns.

[0029] The simulation results show that the wideband injection-locked frequency divider of the application realizes the super-wide locking range and excellent phase noise performance while ensuring low power consumption and low voltage. These excellent performance indicators fully verify the technical advantages of the wideband double injection path in the application, and provide a high-performance frequency conversion solution for the millimeter wave communication system.

[0030] In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0031] ​​The above merely illustrates the specific embodiments of the present application, but the protection scope of the present application is not limited thereto, any person skilled in the art can easily think of the changes or replacements within the technical range disclosed by the present application, which should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A broadband injection-locked four-way frequency divider, characterized in that: The broadband injection-locked four-way frequency divider is formed by connecting n injection ring oscillator units in series to form a multi-stage chain structure, where n is an even number greater than or equal to 4; wherein: The injection ring oscillator unit is provided with a tail current injection unit and a cross-coupled inverter injection unit; In the chain structure, the first output terminal and the second output terminal of the last stage injection ring oscillator unit are connected to the second input terminal and the first input terminal of the first stage injection ring oscillator unit respectively; By injecting the first signal into the tail current injection unit and the cross-coupled inverter injection unit of each injection ring oscillation unit, the last injection ring oscillation unit receives the second signal from the previous injection ring oscillation unit and converts it into a fourth-frequency third signal for output.

2. The broadband injection-locked four-way frequency divider according to claim 1, wherein: The tail current injection unit includes a seventh NMOS transistor, a first resistor and a first capacitor; One end of the first capacitor is connected to the tail injection end of the injection ring oscillator unit, and the other end is connected to the gate of the seventh NMOS transistor; one end of the first resistor is connected to the bias voltage, and the other end is connected to the gate of the seventh NMOS transistor, and the source of the seventh NMOS transistor is grounded.

3. The broadband injection-locked four-way frequency divider according to claim 2, wherein: The cross-coupled inverter injection unit includes a second NMOS transistor, a fifth NMOS transistor, a second PMOS transistor and a fifth PMOS transistor; The gates of the second NMOS transistor and the fifth NMOS transistor are connected to the first cross-coupling injection terminal of the injection ring oscillation unit; the gates of the second PMOS transistor and the fifth PMOS transistor are connected to the second cross-coupling injection terminal of the injection ring oscillation unit.

4. The broadband injection-locked four-way frequency divider according to claim 3, wherein: The injection ring oscillation unit further includes a first PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a sixth PMOS transistor, and a first NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, and a sixth NMOS transistor; The sources of the first PMOS transistor, the third PMOS transistor, the fourth PMOS transistor and the sixth PMOS transistor are connected to the power supply voltage; the gate of the first PMOS transistor is connected to the gate of the first NMOS transistor; the drain of the first PMOS transistor is connected to the drains of the first NMOS transistor, the second NMOS transistor, the second PMOS transistor and the gates of the second PMOS transistor and the second NMOS transistor; the source of the second PMOS transistor is connected to the drain of the third PMOS transistor; the gate of the third PMOS transistor is connected to the gate of the third NMOS transistor; the gate of the third PMOS transistor is connected to the sixth PMOS transistor; MOS transistor, the sixth NMOS transistor, the fifth PMOS transistor and the drain of the fifth NMOS transistor; the source of the fifth PMOS transistor is connected to the drain of the fourth PMOS transistor; the gate of the sixth PMOS transistor is connected to the gate of the fifth PMOS transistor; the source of the second NMOS transistor is connected to the drain of the third NMOS transistor; the source of the fifth NMOS transistor is connected to the drain of the fourth NMOS transistor; the drain of the seventh NMOS transistor is connected to the sources of the first NMOS transistor, the third NMOS transistor, the fourth NMOS transistor and the sixth NMOS transistor; the gate of the seventh NMOS transistor is grounded.

5. The broadband injection-locked four-way frequency divider according to claim 4, wherein: In the injection ring oscillation unit, the gate of the first PMOS transistor serves as the first input end of the injection ring oscillation unit; the drain of the first PMOS transistor serves as the first output end of the injection ring oscillation unit; the gate of the sixth PMOS transistor serves as the second input end of the injection ring oscillation unit; and the gate of the third PMOS transistor serves as the second output end of the injection ring oscillation unit.

6. The broadband injection-locked four-way frequency divider according to claim 5, characterized in that: The broadband injection-locked four-frequency divider is composed of four injection ring oscillator units connected in series to form a four-stage chain structure; wherein: The first output end of the first-level injection ring oscillator unit is connected to the first input end of the second-level injection ring oscillator unit; the second output end of the first-level injection ring oscillator unit is connected to the second input end of the second-level injection ring oscillator unit; the first output end of the second-level injection ring oscillator unit is connected to the first input end of the third-level injection ring oscillator unit; the second output end of the second-level injection ring oscillator unit is connected to the second input end of the third-level injection ring oscillator unit; the first output end of the third-level injection ring oscillator unit is connected to the first input end of the fourth-level injection ring oscillator unit; the second output end of the third-level injection ring oscillator unit is connected to the second input end of the fourth-level injection ring oscillator unit; the first output end of the fourth-level injection ring oscillator unit is connected to the second input end of the first-level injection ring oscillator unit; and the second output end of the fourth-level injection ring oscillator unit is connected to the first input end of the first-level injection ring oscillator unit.

Images