Packaging structure and manufacturing method thereof

Through the packaging structure combining a glass interposer and a thin film redistribution layer, circuit components are heterogeneously integrated and optical/electrical signal conversion is performed, which solves the cost and area problems of high-density, high-performance packaging structures and achieves low-cost, high-performance packaging effects.

CN120824296APending Publication Date: 2025-10-21UNIMICRON TECH CORP
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Patent Information

Application Number
CN202410443169.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-04-12
Publication Date
2025-10-21

AI Technical Summary

Technical Problem

Existing technologies cannot meet the requirements of high-density, high-performance packaging structures, and the cost of silicon via intermediate substrates is high, making it impossible to reduce the area of ​​the packaging substrate.

Method used

A packaging structure combining a glass interposer and a thin film redistribution layer is used to heterogeneously integrate application-specific integrated circuit components, electronic integrated circuit components, and photonic integrated circuit components. Optical connections are made through optical fiber components, and optical/electrical signal conversion is achieved using glass waveguides and optical couplers.

Benefits of technology

The low cost and high performance of the high-density packaging structure are achieved, meeting the requirements for the refinement of line width and line spacing and the thinning of the dielectric layer thickness.

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Abstract

The invention provides a packaging structure and a manufacturing method thereof. The package structure includes a circuit board, a glass interposer, a first thin film redistribution layer, a second thin film redistribution layer, an application specific integrated circuit component, a photonic integrated circuit component, an electronic integrated circuit component, and an optical fiber component. The glass interposer includes a recess and at least one glass via. The first thin film redistribution layer and the second thin film redistribution layer are respectively arranged on the upper surface and the lower surface of the glass interposer and are electrically connected with the glass through hole. The application-specific integrated circuit component is disposed on and electrically connected to the first thin film redistribution layer. The photonic integrated circuit component is disposed in the recess of the glass interposer and electrically connected to the first thin film redistribution layer. The electronic integrated circuit component is stacked on and electrically connected with the photonic integrated circuit component. The optical fiber assembly is disposed on the glass interposer and optically connected to the photonic integrated circuit assembly. The packaging structure provided by the invention can solve the problems in the prior art, and has lower cost and higher density and performance.
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Description

Technical Field

[0001] The present invention relates to a semiconductor structure and a manufacturing method thereof, and in particular to a packaging structure and a manufacturing method thereof. Background Art

[0002] High-performance computing (HPC) is becoming increasingly popular and widely used in advanced network and server applications, particularly in artificial intelligence (AI)-related products that require high data rates, increasing bandwidth, and decreasing latency. In recent years, the co-packaged optics (CPO) architecture has emerged. Application-specific integrated circuits (ASICs), electronic integrated circuits (EICs), and photonic integrated circuits (PICs) are placed side by side on a co-packaged optical substrate with thin-film redistribution layers (RDLs). These layers are then used to electrically connect these components to achieve optical / electrical signal conversion.

[0003] As people have more and more expectations and requirements for high-density (HD) package substrates used in packaging structures including high-performance computing (HPC), for example, the requirements for the line width and line spacing of the metal layer are getting finer, and the requirements for the thickness of the dielectric layer of the reconfiguration circuit layer are getting thinner. The current build-up package substrate cannot meet the above requirements. Some industries have further proposed adding a through-silicon via (TSV)-interposer to the build-up package substrate. Although the through-silicon via interposer can solve the above problems, the price of the through-silicon via interposer is very expensive. In addition, because the dedicated integrated circuit components, electronic integrated circuit components and photonic integrated circuit components are placed side by side, the area of ​​the required thin film redistribution layer is large, and thus the area of ​​the package substrate cannot be reduced. Summary of the Invention

[0004] The present invention is directed to a packaging structure that can solve the problems of the prior art and has lower cost and higher density and performance.

[0005] The present invention also provides a method for manufacturing a packaging structure, which is used to manufacture the above packaging structure.

[0006] According to an embodiment of the present invention, a packaging structure includes a circuit board, a glass interposer, a first thin-film redistribution layer, a second thin-film redistribution layer, an application-specific integrated circuit component, a photonic integrated circuit component, an electronic integrated circuit component, and an optical fiber component. The glass interposer is disposed on the circuit board and electrically connected to the circuit board. The glass interposer includes an upper surface and a lower surface opposite to each other, a groove extending from the upper surface to the lower surface, and at least one through-glass via (TGL) penetrating the glass interposer and connecting the upper and lower surfaces. The first thin-film redistribution layer is disposed on the upper surface of the glass interposer and electrically connected to one end of the at least one TGL. The second thin-film redistribution layer is disposed on the lower surface of the glass interposer and electrically connected to the other end of the at least one TGL. The application-specific integrated circuit component is disposed on the first thin-film redistribution layer and electrically connected to the first thin-film redistribution layer. The photonic integrated circuit component is disposed in the groove of the glass interposer and electrically connected to the first thin-film redistribution layer. The electronic integrated circuit component is stacked and disposed on the photonic integrated circuit component and electrically connected to the photonic integrated circuit component. The optical fiber component is disposed on the glass interposer and optically connected to the photonic integrated circuit component.

[0007] In a packaging structure according to an embodiment of the present invention, the optical fiber assembly includes a plurality of glass waveguides, an optical coupler, and an optical fiber cable. The glass waveguides are disposed on a glass interposer and extend to connect to the photonic integrated circuit assembly. The optical fiber cable passes through the optical coupler and is optically connected to the photonic integrated circuit assembly via the glass waveguides.

[0008] In the package structure according to an embodiment of the present invention, the photonic integrated circuit component includes at least one photodiode and at least one laser diode, and a glass waveguide is connected to the at least one photodiode and the at least one laser diode.

[0009] In the package structure according to an embodiment of the present invention, the package structure further includes a plurality of connectors disposed between the second thin film redistribution layer and the circuit board, wherein the second thin film redistribution layer is electrically connected to the circuit board through the connectors.

[0010] In the package structure according to an embodiment of the present invention, the package structure further includes a plurality of connectors disposed between the ASIC and the first TFT-RDL, wherein the ASIC is electrically connected to the first TFT-RDL via the connectors.

[0011] In the packaging structure according to an embodiment of the present invention, the packaging structure further includes a plurality of connectors disposed between the electronic integrated circuit component and the photonic integrated circuit component, wherein the electronic integrated circuit component is electrically connected to the photonic integrated circuit component through the connectors.

[0012] In a package structure according to an embodiment of the present invention, the photonic integrated circuit component includes a plurality of first pads, and the electronic integrated circuit component includes a plurality of second pads. The first pads and the second pads are hybrid-bonded to form hybrid bonding pads, thereby electrically connecting the electronic integrated circuit component to the photonic integrated circuit component.

[0013] In the packaging structure according to an embodiment of the present invention, the packaging structure further includes an adhesive layer disposed in the groove of the glass interposer, wherein the photonic integrated circuit component is fixed in the groove through the adhesive layer.

[0014] In the packaging structure according to the embodiment of the present invention, the packaging structure further includes a colloid filled in the groove of the glass interposer to cover the surrounding surface of the photonic integrated circuit component.

[0015] According to an embodiment of the present invention, a method for manufacturing a package junction includes the following steps: providing a glass interposer. The glass interposer includes an upper surface and a lower surface opposite to each other, a groove extending from the upper surface to the lower surface, and at least one through-glass via extending through the glass interposer and connecting the upper surface and the lower surface. arranging a photonic integrated circuit component in the groove of the glass interposer. arranging an optical fiber component on the glass interposer, the optical fiber component optically connecting the photonic integrated circuit component. forming a first thin-film redistribution layer on the upper surface of the glass interposer. the first thin-film redistribution layer electrically connects at least one end of the through-glass via and the photonic integrated circuit component. arranging a dedicated integrated circuit component on the first thin-film redistribution layer. the dedicated integrated circuit component is electrically connected to the first thin-film redistribution layer. arranging an electronic integrated circuit component in a stacked manner on the photonic integrated circuit component. the electronic integrated circuit component is electrically connected to the photonic integrated circuit component. forming a second thin-film redistribution layer on the lower surface of the glass interposer. the second thin-film redistribution layer electrically connects at least one other end of the through-glass via. arranging the glass interposer on a circuit board. the glass interposer is electrically connected to the circuit board.

[0016] Based on the above, the packaging structure of the present invention heterogeneously integrates ASIC components, electronic integrated circuit components, and photonic integrated circuit components onto a glass interposer via thin-film redistribution layers. Optical fiber components are positioned on the glass interposer and optically connect the photonic integrated circuit components. Compared to conventional build-up layer packaging substrates or through-silicon via interposers, the packaging structure of the present invention not only meets the expectations and requirements for high-density packaging structures, but also offers lower costs and higher performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figures 1A to 1G is a cross-sectional schematic diagram of a method for manufacturing a packaging structure according to an embodiment of the present invention;

[0018] Figure 1H for Figure 1G A schematic top view of area A in FIG.

[0019] Figures 2A to 2F It is a cross-sectional schematic diagram of partial steps of a method for manufacturing a packaging structure according to another embodiment of the present invention.

[0020] Description of Reference Numerals

[0021] 10, 20: fixing parts;

[0022] 12: fixed part;

[0023] 100a, 100b: packaging structure;

[0024] 110: circuit board;

[0025] 120: glass interlayer;

[0026] 121: upper surface;

[0027] 122: groove;

[0028] 123: lower surface;

[0029] 124: Glass through hole;

[0030] 125: one end;

[0031] 127: The other end;

[0032] 130: first thin film redistribution layer;

[0033] 132, 142: dielectric layer;

[0034] 134, 144: conductive layer;

[0035] 136, 146: conductive holes;

[0036] 140: second thin film redistribution layer;

[0037] 150: ASIC;

[0038] 160, 160': Photonic integrated circuit components;

[0039] 161, 161': active side;

[0040] 162: pad;

[0041] 162': First contact pad;

[0042] 163, 163': surrounding surface;

[0043] 164: photodiode;

[0044] 166: Laser diode;

[0045] 170, 170': Electronic integrated circuit components;

[0046] 172': Second pad;

[0047] 180: Fiber optic components;

[0048] 182: Glass waveguide;

[0049] 184: Optocoupler;

[0050] 186: Fiber optic cable;

[0051] 115, 155, 175: connectors;

[0052] 190: adhesive layer;

[0053] 195: glue layer;

[0054] 197: Primer;

[0055] A: Region;

[0056] P: Mixed bonding pad. DETAILED DESCRIPTION

[0057] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0058] The embodiments of the present invention are to be understood in conjunction with the accompanying drawings, which are also considered part of the disclosure. It should be understood that the drawings are not drawn to scale and that the dimensions of the elements may be arbitrarily enlarged or reduced to clearly illustrate the features of the present invention.

[0059] Unless expressly stated otherwise, directional terms used herein (e.g., up, down, left, right, front, back, top, bottom) are used only with reference to the drawings and are not intended to imply absolute orientation. Furthermore, unless expressly stated otherwise, any method described herein is in no way intended to be construed as requiring that its steps be performed in a specific order.

[0060] Figures 1A to 1G It is a cross-sectional schematic diagram of a method for manufacturing a packaging structure according to an embodiment of the present invention. Figure 1H for Figure 1G Schematic top view of area A in FIG.

[0061] According to the manufacturing method of the package structure of this embodiment, first, please refer to Figure 1A, providing a glass interposer 120. The glass interposer 120 includes an upper surface 121 and a lower surface 123 facing each other, a groove 122 extending from the upper surface 121 to the lower surface 123, and at least one through-glass via (schematically showing one through-glass via 124) penetrating the glass interposer 120 and connecting the upper surface 121 and the lower surface 123.

[0062] Next, please refer to Figure 1B The photonic integrated circuit component 160 is disposed within the recess 122 of the glass interposer 120 via a holding device 10. An adhesive layer 190 is disposed within the recess 122 of the glass interposer 120, and the photonic integrated circuit component 160 is secured within the recess 122 via the adhesive layer 190. In one embodiment, the holding device 10 has a plurality of fixing portions 12. The pads 162 (copper pillars with solder bump caps) of the photonic integrated circuit component 160 can be embedded in the fixing portions 12 of the holding device 10 and disposed within the recess 122 of the glass interposer 120 via the holding device 10. In one embodiment, the adhesive layer 190 is, for example, a die-attach film (DAF), but is not limited thereto.

[0063] Next, please also refer to Figure 1B and Figure 1C , the fixing member 10 is removed to expose the pads 162 of the photonic integrated circuit component 160 . Here, the pads 162 of the photonic integrated circuit component 160 protrude from the active surface 161 of the photonic integrated circuit component 160 .

[0064] Next, please refer to Figure 1C , a colloid 195 is filled into the groove 122 of the glass interposer 120 to cover the peripheral surface 163 of the photonic integrated circuit component 160. In one embodiment, the colloid 195 is coplanar with the active surface 161 of the photonic integrated circuit component 160, meaning that the colloid 195 exposes the pads 162 of the photonic integrated circuit component 160. In one embodiment, the material of the colloid 195 is, for example, epoxy molding compound (EMC), but is not limited thereto.

[0065] Next, please refer to Figure 1D, forming a first thin film redistribution layer 130 on the upper surface 121 of the glass interposer 120. The first thin film redistribution layer 130 is electrically connected to one end 125 of the through glass via 124 and the photonic integrated circuit component 160. In an embodiment, the first thin film redistribution layer 130 may include a dielectric layer 132, a conductive layer 134 and a conductive hole 136, wherein the dielectric layer 132 and the conductive layer 134 are alternately stacked, and the conductive layers 134 are electrically connected through the conductive hole 136, and the conductive layer 134 can constitute a corresponding circuit (such as a redistributed fine circuit, a pad and a solder pad, etc.). The wiring design (layout design) of the circuit can be adjusted according to needs and is not limited here. For example, in the circuit of the first thin film redistribution layer 130, the unconnected parts in the drawing may be electrically connected by other places not shown and / or other conductive elements.

[0066] Next, please refer to Figure 1E A glass waveguide 182 is disposed on the glass interposer 120 and extends to connect to the active surface 161 of the photonic integrated circuit device 160. In one embodiment, the material of the glass waveguide 182 is, for example, polymer, but is not limited thereto.

[0067] Please refer to Figure 1E 、 Figure 1G as well as Figure 1H In region A, the photonic integrated circuit component 160 includes a photodiode 164 and a laser diode 166 , wherein a glass waveguide 182 is connected to the photodiode 164 and the laser diode 166 .

[0068] Next, please refer to Figure 1F The electronic integrated circuit component 170 is stacked on the photonic integrated circuit component 160, wherein the electronic integrated circuit component 170 is electrically connected to the photonic integrated circuit component 160 via connectors 175. In one embodiment, connectors 175 are, for example, C2 microbumps or copper pillars with solder bump caps, but are not limited thereto. In other words, the electronic integrated circuit component 170 of this embodiment is electrically connected to the photonic integrated circuit component 160 via flip-chip bonding.

[0069] Furthermore, to ensure the reliability of the electrical connection between the electronic integrated circuit component 170 and the photonic integrated circuit component 160, the package structure 100a of this embodiment may be provided with an underfill 197 between the electronic integrated circuit component 170 and the photonic integrated circuit component 160 to cover the connector 175. In one embodiment, the material of the underfill 197 may be, for example, resin, epoxy resin, or molding compound, but is not limited thereto.

[0070] Next, please refer to Figure 1F, an optical coupler 184 and an optical fiber cable 186 are disposed on the glass interposer 120, wherein the glass waveguide 182, the optical coupler 184, and the optical fiber cable 186 can be defined as an optical fiber assembly 180, and the optical fiber assembly 180 is optically connected to the photonic integrated circuit component 160. In this embodiment, the optical fiber cable 186 passes through the optical coupler 184 and is optically connected to the photonic integrated circuit component 160 via the glass waveguide 182. In short, this embodiment heterogeneously integrates optical and electrical components (i.e., the photonic integrated circuit component 160 and the electronic integrated circuit component 170) into the groove 122 of the glass interposer 120, and transmits optical / electrical signals through the optical fiber assembly 180 and the first thin-film redistribution layer 130.

[0071] Next, please refer to Figure 1G ASIC 150 is disposed on the first thin-film redistribution layer 130, wherein ASIC 150 is electrically connected to the first thin-film redistribution layer 130 via connectors 155. In other words, ASIC 150 of this embodiment is electrically connected to the first thin-film redistribution layer 130 via flip-chip bonding. In one embodiment, connector 155 is, for example, a C2 microbump or a copper pillar with a solder bump cap, but is not limited thereto.

[0072] Afterwards, please refer to Figure 1G , forming a second thin film redistribution layer 140 on the lower surface 123 of the glass interposer 120, wherein the second thin film redistribution layer 140 is electrically connected to the other end 127 of the through glass hole 124. In an embodiment, the second thin film redistribution layer 140 may include a dielectric layer 142, a conductive layer 144 and a conductive hole 146, wherein the dielectric layer 142 and the conductive layer 144 are alternately stacked, and the conductive layers 144 are electrically connected through the conductive hole 146, and the conductive layer 144 can constitute a corresponding circuit (such as a redistribution fine circuit, a pad and a solder pad, etc.). The wiring design (layout design) of the circuit can be adjusted according to needs and is not limited here. For example, in the circuit of the second thin film redistribution layer 140, the unconnected parts in the drawing may be electrically connected by other places not shown and / or other conductive elements.

[0073] Finally, please refer to Figure 1G , a glass interposer 120 is disposed on the circuit board 110, wherein the glass interposer 120 is electrically connected to the circuit board 110 via connectors 115. In one embodiment, connectors 115 are, for example, solder balls, but are not limited thereto. Thus, the fabrication of the package structure 100a is complete, wherein the package structure 100a is a co-package-optical (CPO) package.

[0074] Regarding the structure, please refer to Figure 1GThe package structure 100a of this embodiment includes a circuit board 110, a glass interposer 120, a first thin-film redistribution layer 130, a second thin-film redistribution layer 140, an application-specific integrated circuit component 150, a photonic integrated circuit component 160, an electronic integrated circuit component 170, and an optical fiber component 180. The glass interposer 120 is disposed on the circuit board 110 and electrically connected to the circuit board 110. The glass interposer 120 includes an upper surface 121 and a lower surface 123 opposing each other, a groove 122 extending from the upper surface 121 to the lower surface 123, and a through-glass via 124 passing through the glass interposer 120 and connecting the upper surface 121 and the lower surface 123. The first thin-film redistribution layer 130 is disposed on the upper surface 121 of the glass interposer 120 and electrically connected to one end 125 of the through-glass via 124. The second thin-film redistribution layer 140 is disposed on the lower surface 123 of the glass interposer 120 and electrically connected to the other end 127 of the through-glass via 124. ASIC 150 is disposed on and electrically connected to first thin-film redistribution layer 130. PHIC 160 is disposed within recess 122 of glass interposer 120 and electrically connected to first thin-film redistribution layer 130. Electronic IC 170 is stacked and disposed on and electrically connected to PHIC 160. Optical fiber 180 is disposed on glass interposer 120 and optically connected to PHIC 160.

[0075] In detail, the packaging structure 100a of this embodiment further includes a connector 115, which is disposed between the second thin film redistribution layer 140 and the circuit board 110, wherein the second thin film redistribution layer 140 is electrically connected to the circuit board 110 through the connector 115. In one embodiment, the connector 115 is, for example, a solder ball, but is not limited to this. Furthermore, the packaging structure 100a of this embodiment further includes a connector 155, which is disposed between the dedicated integrated circuit component 150 and the first thin film redistribution layer 130, wherein the dedicated integrated circuit component 150 is electrically connected to the first thin film redistribution layer 130 through the connector 155. In one embodiment, the connector 155 is, for example, a C2 microbump, a C4 microbump, or a copper pillar with a solder bump cap, but is not limited to this. Furthermore, the package structure 100a of this embodiment further includes a connector 175 disposed between the electronic integrated circuit component 170 and the photonic integrated circuit component 160. The electronic integrated circuit component 170 is electrically connected to the pad 162 of the photonic integrated circuit component 160 via the connector 175. In one embodiment, the connector 175 is, for example, a C2 microbump, a C4 microbump, or a copper pillar with a solder bump cap, but is not limited thereto. To ensure the reliability of the electrical connection between the electronic integrated circuit component 170 and the photonic integrated circuit component 160, the package structure 100a of this embodiment may be configured with an underfill 197 between the electronic integrated circuit component 170 and the photonic integrated circuit component 160 to cover the connector 175.

[0076] Please refer to Figure 1G and Figure 1H In this embodiment, the optical fiber assembly 180 includes a glass waveguide 182, an optical coupler 184, and an optical fiber cable 186. The glass waveguide 182 is disposed on the glass interposer 120 and extends to connect to the photonic integrated circuit assembly 160. The optical fiber cable 186 passes through the optical coupler 184 and is optically connected to the photonic integrated circuit assembly 160 via the glass waveguide 182. The photonic integrated circuit assembly 160 includes a photodiode 164 and a laser diode 166, wherein the glass waveguide 182 is connected to the photodiode 164 and the laser diode 166.

[0077] In one embodiment, an optical signal can enter photodiode 164 from optical fiber cable 186. Photodiode 164 converts the optical signal into an electrical signal, which is then transmitted to a transresistor via first thin-film redistribution layer 130 for amplification. The amplified electrical signal is then transmitted to ASIC 150 via first thin-film redistribution layer 130. ASIC 150 then transmits the electrical signal to laser diode 166 via first thin-film redistribution layer 130, which then emits the optical signal in the form of a laser to optical fiber cable 186 for transmission to an external circuit (e.g., an interconnect).

[0078] Furthermore, the package structure 100a of this embodiment further includes an adhesive layer 190 disposed within the recess 122 of the glass interposer 120, wherein the photonic integrated circuit component 160 is fixed within the recess 122 via the adhesive layer 190. Furthermore, the package structure 100a of this embodiment further includes a colloid 195 filled within the recess 122 of the glass interposer 120 to cover the peripheral surface 163 of the photonic integrated circuit component 160.

[0079] In short, the ASIC 150, the electronic IC 170, and the photonic IC 160 are heterogeneously integrated on the glass interposer 120 via the first thin-film redistribution layer 130. The optical fiber 180 is disposed on the glass interposer 120 and optically connects the photonic IC 160. Compared to conventional build-up layer packaging substrates or through-silicon via (TSV) interposer substrates, the package structure 100a of this embodiment not only meets the expectations and requirements for high-density packaging structures, but also offers lower costs and higher performance.

[0080] It should be noted that the following embodiments share the same component numbers and some of the contents of the previous embodiments, wherein the same reference numerals are used to represent the same or similar components, and the description of the same technical contents is omitted. For the description of the omitted parts, please refer to the previous embodiments, and the following embodiments will not repeat them.

[0081] Figures 2A to 2F This is a cross-sectional schematic diagram of a partial step of a method for manufacturing a packaging structure according to another embodiment of the present invention. Figure 1B as well as Figure 2A The manufacturing method for the package structure of this embodiment is similar to the aforementioned method, with the primary difference being that the first pad 162' of the photonic integrated circuit component 160' is an embedded pad, embedded within the active surface 161', i.e., flush with the active surface 161'. Therefore, the photonic integrated circuit component 160' is positioned within the recess 122 of the glass interposer 120 using a flat-plate fixture 20. The adhesive layer 190 is disposed within the recess 122 of the glass interposer 120, and the photonic integrated circuit component 160' is secured within the recess 122 via the adhesive layer 190.

[0082] Next, please also refer to Figure 2A and Figure 2B The fixing member 20 is removed to expose the first pad 162 ′ of the photonic integrated circuit component 160 ′. Here, the first pad 162 ′ of the photonic integrated circuit component 160 ′ is flush with the active surface 161 ′.

[0083] Next, please refer to Figure 2B , a colloid 195 is filled into the recess 122 of the glass interposer 120 to cover the peripheral surface 163' of the photonic integrated circuit component 160'. In one embodiment, the colloid 195 is coplanar with the active surface 161' of the photonic integrated circuit component 160', meaning that the colloid 195 exposes the surface of the first pad 162' of the photonic integrated circuit component 160'.

[0084] Next, please refer to Figure 2C A first thin-film redistribution layer 130 is formed on the upper surface 121 of the glass interposer 120. The first thin-film redistribution layer 130 is electrically connected to the through-glass via 124 and the photonic integrated circuit device 160'.

[0085] Next, please refer to Figure 2D The glass waveguide 182 is disposed on the glass interposer 120 and extends to connect to the active surface 161 ′ of the photonic integrated circuit component 160 ′.

[0086] Next, please refer to Figure 2E, the electronic integrated circuit component 170' is stacked on the photonic integrated circuit component 160', wherein the electronic integrated circuit component 170' is electrically connected to the photonic integrated circuit component 160'. Furthermore, the electronic integrated circuit component 170' includes a plurality of second pads 172', wherein the first pads 162' of the photonic integrated circuit component 160' and the second pads 172' of the electronic integrated circuit component 170' are hybrid-bonded to form hybrid bonding pads P, thereby electrically connecting the electronic integrated circuit component 170' to the photonic integrated circuit component 160'. In other words, in this embodiment, the photonic integrated circuit component 160' and the electronic integrated circuit component 170' are electrically connected via hybrid bonding.

[0087] Next, please refer to Figure 2E , an optical coupler 184 and an optical fiber cable 186 are disposed on the glass interposer 120, wherein the glass waveguide 182, the optical coupler 184 and the optical fiber cable 186 may be defined as an optical fiber assembly 180. The optical fiber cable 186 passes through the optical coupler 184 and is optically connected to the photonic integrated circuit assembly 160' via the glass waveguide 182.

[0088] Next, please refer to Figure 2F , an ASIC component 150 is disposed on the first thin-film redistribution layer 130, wherein the ASIC component 150 is electrically connected to the first thin-film redistribution layer 130 via connectors 155. In other words, the ASIC component 150 of this embodiment is electrically connected to the first thin-film redistribution layer 130 via flip-chip bonding. In one embodiment, connectors 155 are, for example, C2 micro-bumps, C4 micro-bumps, or copper pillars with solder bump caps, but are not limited thereto.

[0089] Afterwards, please refer to Figure 2F A second thin-film redistribution layer 140 is formed on the lower surface 123 of the glass interposer 120 , wherein the second thin-film redistribution layer 140 is electrically connected to the through-glass via 124 .

[0090] Finally, please refer to Figure 2F , a glass interposer 120 is disposed on the circuit board 110, wherein the glass interposer 120 is electrically connected to the circuit board 110 via connectors 115. In one embodiment, connectors 115 are, for example, solder balls, but are not limited thereto. Thus, the fabrication of the package structure 100b is complete, wherein the package structure 100b is a co-package-optical (CPO) package.

[0091] In terms of structure, please also refer to Figure 1G as well as Figure 2FThe package structure 100b of this embodiment is similar to the package structure 100a described above, with the primary difference being that, in this embodiment, the first pad 162' of the photonic integrated circuit component 160' and the second pad 172' of the electronic integrated circuit component 170' are hybrid-bonded to form a hybrid bonding pad P, electrically connecting the electronic integrated circuit component 170' to the photonic integrated circuit component 160'. In other words, in this embodiment, the photonic integrated circuit component 160' and the electronic integrated circuit component 170' are electrically connected via hybrid bonding.

[0092] It should be noted that when the pitch between the photonic integrated circuit component 160 and the electronic integrated circuit component 170 is greater than 10 microns, the photonic integrated circuit component 160 and the electronic integrated circuit component 170 can be electrically connected by providing a connector 175. When the pitch between the photonic integrated circuit component 160' and the electronic integrated circuit component 170' is less than 10 microns, the photonic integrated circuit component 160' and the electronic integrated circuit component 170' are electrically connected by hybrid bonding.

[0093] In summary, the packaging structure of the present invention heterogeneously integrates ASIC components, electronic IC components, and photonic IC components onto a glass interposer via thin-film redistribution layers. Optical fiber components are positioned on the glass interposer and optically connect the photonic IC components. Compared to conventional build-up layer packaging substrates or through-silicon via (TSV) interposers, the packaging structure of the present invention not only meets the expectations and requirements for high-density packaging structures, but also offers lower costs and higher performance.

[0094] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A packaging structure, characterized in that: include: circuit boards; a glass interposer disposed on the circuit board and electrically connected to the circuit board, the glass interposer comprising an upper surface and a lower surface opposite to each other, a groove extending from the upper surface to the lower surface, and at least one through-glass via penetrating the glass interposer and connecting the upper surface and the lower surface; A first thin-film redistribution layer is disposed on the upper surface of the glass interposer and electrically connected to one end of the at least one through-glass via; a second thin film redistribution layer, disposed on the lower surface of the glass interposer and electrically connected to the other end of the at least one through-glass via; an application-specific integrated circuit component, disposed on the first thin-film redistribution layer and electrically connected to the first thin-film redistribution layer; a photonic integrated circuit component, disposed in the groove of the glass interposer and electrically connected to the first thin-film redistribution layer; an electronic integrated circuit component, stacked and arranged on the photonic integrated circuit component and electrically connected to the photonic integrated circuit component; as well as The optical fiber component is disposed on the glass interposer and optically connected to the photonic integrated circuit component.

2. The packaging structure according to claim 1, wherein: The optical fiber component includes a plurality of glass waveguides, an optical coupler, and an optical fiber cable. The plurality of glass waveguides are arranged on the glass interposer and extend to connect to the photonic integrated circuit component. The optical fiber cable passes through the optical coupler and is optically connected to the photonic integrated circuit component through the plurality of glass waveguides.

3. The packaging structure according to claim 2, wherein: The photonic integrated circuit component includes at least one photodiode and at least one laser diode, and the plurality of glass waveguides are connected to the at least one photodiode and the at least one laser diode.

4. The packaging structure according to claim 1, wherein: Also includes: A plurality of connectors are disposed between the second thin film redistribution layer and the circuit board, wherein the second thin film redistribution layer is electrically connected to the circuit board through the plurality of connectors.

5. The packaging structure according to claim 1, wherein: Also includes: A plurality of connectors are disposed between the ASIC component and the first thin-film redistribution layer, wherein the ASIC component is electrically connected to the first thin-film redistribution layer through the plurality of connectors.

6. The packaging structure according to claim 1, wherein: Also includes: A plurality of connectors are disposed between the electronic integrated circuit component and the photonic integrated circuit component, wherein the electronic integrated circuit component is electrically connected to the photonic integrated circuit component through the plurality of connectors.

7. The packaging structure according to claim 1, wherein: The photonic integrated circuit component includes a plurality of first pads, and the electronic integrated circuit component includes a plurality of second pads. The plurality of first pads and the plurality of second pads are hybrid-bonded to form hybrid bonding pads, so that the electronic integrated circuit component is electrically connected to the photonic integrated circuit component.

8. The packaging structure according to claim 1, wherein: Also includes: An adhesive layer is disposed in the groove of the glass interposer, wherein the photonic integrated circuit component is fixed in the groove through the adhesive layer.

9. The packaging structure according to claim 1, wherein: Also includes: The colloid is filled in the groove of the glass interposer to cover the peripheral surface of the photonic integrated circuit component.

10. A method for manufacturing a packaging structure, characterized in that: include: Providing a glass interposer, the glass interposer comprising an upper surface and a lower surface opposite to each other, a groove extending from the upper surface to the lower surface, and at least one through-glass hole penetrating the glass interposer and connecting the upper surface and the lower surface; Disposing a photonic integrated circuit component in the groove of the glass interposer; Disposing an optical fiber component on the glass interposer, wherein the optical fiber component is optically connected to the photonic integrated circuit component; forming a first thin-film redistribution layer on the upper surface of the glass interposer, wherein the first thin-film redistribution layer is electrically connected to one end of the at least one through-glass via and the photonic integrated circuit component; Disposing an application-specific integrated circuit component on the first thin-film redistribution layer, wherein the application-specific integrated circuit component is electrically connected to the first thin-film redistribution layer; stacking an electronic integrated circuit component on the photonic integrated circuit component, wherein the electronic integrated circuit component is electrically connected to the photonic integrated circuit component; forming a second thin-film redistribution layer on the lower surface of the glass interposer, wherein the second thin-film redistribution layer is electrically connected to the other end of the at least one through-glass via; as well as The glass interposer is disposed on a circuit board, and the glass interposer is electrically connected to the circuit board.

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