Forwarding device

Abstract

The invention provides a forwarding device, and belongs to the technical field of computers. The forwarding equipment comprises a machine frame 1, an interface board 2, a main forwarding control single board 3 and a standby forwarding control single board 4, the machine frame 1 is respectively connected with the interface board 2, the main forwarding control single board 3 and the standby forwarding control single board 4, and the interface board 2 is used for switching the main forwarding control single board 3 and the standby forwarding control single board 4 based on a specified switching mechanism. And the main forwarding control single board 3 and the standby forwarding control single board 4 are used for executing message forwarding control logic and are mutually switched under a specified switching mechanism. Therefore, when the connection between the main forwarding control single board 3 and the machine frame 1 goes wrong, the message can be forwarded through the standby forwarding control single board 4, so that the probability that the forwarding equipment cannot work can be greatly reduced, and the working reliability of the forwarding equipment can be improved.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technology, and in particular to a forwarding device. Background Art

[0002] With the development of computer technology, forwarding equipment has been widely used.

[0003] A forwarding device is generally configured with a chassis, in which a single board is inserted. The single board can be installed with multiple switching chips and a corresponding master-slave switching mechanism is set up to control the switching of multiple switching chips to ensure the reliability of the forwarding device.

[0004] However, when there is a problem with the connection between the board and the chassis, all switching chips will become unavailable and the forwarding device will not work properly. Summary of the Invention

[0005] The embodiments of the present disclosure provide a forwarding device that can solve the problems of related technologies.

[0006] An embodiment of the present disclosure provides a forwarding device, which includes a machine frame 1, an interface board 2, a main forwarding control board 3 and a backup forwarding control board 4. The machine frame 1 is connected to the interface board 2, the main forwarding control board 3 and the backup forwarding control board 4 respectively. The interface board 2 is electrically connected to the main forwarding control board 3 and the backup forwarding control board 4 respectively through the machine frame 1. The interface board 2 can send and receive messages with other devices and can switch the main forwarding control board 3 and the backup forwarding control board 4 through a specified switching mechanism. The main forwarding control board 3 and the backup forwarding control board 4 are both used to forward messages and can switch with each other under the specified switching mechanism.

[0007] The active forwarding control board 3 and the standby forwarding control board 4 can synchronize information.

[0008] Interface board 2 is responsible for physical layer and link layer processing and for switching between the active forwarding control board 3 and the standby forwarding control board 4 based on a specified switching mechanism. Interface board 2 can be of various types, such as a physical interface controller (PIC) or a line processing unit (LPU).

[0009] The main forwarding control board 3 is used to execute message forwarding control logic, for example, maintaining the routing table, looking up the routing table to determine the outgoing interface when forwarding messages, and for example, broadcasting the routing information of the forwarding device externally.

[0010] In this way, the interface board 2, the main forwarding control board 3, and the backup forwarding control board 4 are respectively connected to the frame 1, and a master-slave switching mechanism is set for the main forwarding control board 3 and the backup forwarding control board 4. When the main forwarding control board 3 cannot be used (for example, there is a problem with the connection with the frame 1, the hardware is damaged, it is down, etc.), the message can be forwarded through the backup forwarding control board 4. When the backup forwarding control board 4 cannot be used, the message can be forwarded through the main forwarding control board 3. In this way, the probability of the forwarding device failing to work is reduced, thereby improving the working reliability of the forwarding device.

[0011] In one possible implementation, the main forwarding control board 3 includes a main processor 31 and a main switching chip 32 electrically connected to each other, and the main switching chip 32 is electrically connected to the interface board 2. The standby forwarding control board 4 includes a standby processor 41 and a standby switching chip 42 electrically connected to each other, and the standby switching chip 42 is electrically connected to the interface board 2.

[0012] In this way, the processor and the switching chip are responsible for the related processing of the control plane and the forwarding plane respectively, which can improve the processing performance and working reliability of the forwarding control board.

[0013] In a possible implementation, the interface board 2 includes multiple interfaces 21 and an interface chip 22 . The multiple interfaces 21 are electrically connected to the interface chip 22 , respectively. The interface chip 22 is electrically connected to the main switching chip 32 and the standby switching chip 42 .

[0014] The interface 21 is used to send and receive messages with other devices. Multiple interfaces 21 can be installed on the interface board 2. The multiple interfaces 21 can be of the same type or of different types. Different types of interfaces can have different transmission speeds.

[0015] In this way, the interface chip 22 can share some related processing of the message forwarding process, such as related processing of the physical layer and the link layer, which can share the working pressure of the switching chip and improve the working reliability of the equipment.

[0016] In one possible implementation, the interface board 2 may further include a switch 23, which is electrically connected to the interface chip 22, the main processor 31, the main switching chip 32, the standby processor 41, and the standby switching chip 42, respectively. The main processor 31 may send a first status indication signal to the switch 23, wherein the first status indication signal is used to indicate whether the main processor 31 and the main switching chip 32 are available. The standby processor 41 is used to send a second status indication signal to the switch 23, wherein the second status indication signal is used to indicate whether the standby processor 41 and the standby switching chip 42 are available. The interface chip 22 is used to send messages received by any interface to the main switching chip 32 and the standby switching chip 42, respectively, for processing, through electrical connections with the main switching chip 32 and the standby switching chip 42. The switch 23 is used to connect one of the main switching chip 32 and the standby switching chip 42 to the interface chip 22 based on the first status indication signal and the second status indication signal.

[0017] In this way, the first status indication signal can reflect whether the main forwarding control board 3 is available, and the second status indication signal can reflect whether the backup forwarding control board 4 is available. The switch 23 controls one of the main switching chip 32 and the backup switching chip 42 to be connected to the interface chip 22 through these two status indication signals, which can ensure that the currently available forwarding control board is selected in time for message forwarding processing, thereby improving the working reliability of the forwarding equipment.

[0018] In one possible implementation, when the first status indication signal indicates that the main processor 31 and the main switching chip 32 are both available, the switch 23 connects the main switching chip 32 with the interface chip 22; when the first status indication signal indicates that the main processor 31 and / or the main switching chip 32 are unavailable, and the second status indication signal indicates that the standby processor 41 and the standby switching chip 42 are both available, the switch 23 connects the standby switching chip 42 with the interface chip 22.

[0019] In this way, a specific switching method based on the status indication signal is provided.

[0020] In one possible implementation, when the first status indication signal is a first signal value, it indicates that the main processor 31 and the main switching chip 32 are both available; when the first status indication signal is a second signal value, it indicates that the main processor 31 and / or the main switching chip 32 are unavailable; when the second status indication signal is a third signal value, it indicates that the standby processor 41 and the standby switching chip 42 are both available; when the second status indication signal is a fourth signal value, it indicates that the standby processor 41 and / or the standby switching chip 42 are unavailable.

[0021] In this way, the switch 23 can determine the status of the active forwarding control board 3 and the standby forwarding control board 4 according to the status indication signal, thereby determining which board to connect the interface chip to.

[0022] In a possible implementation, the first signal value and the third signal value are high level values, and the second signal value and the fourth signal value are low level values.

[0023] In this way, the status indication signal is more concise, which can reduce resource usage and improve processing efficiency.

[0024] In a possible implementation, the main switching chip 32 is used to send first status indication information to the main processor 31 , where the first status indication information is used to indicate whether the main switching chip 32 is available.

[0025] The main processor 31 obtains the status of the main switching chip 32 through a bus connected to the main switching chip 32 , thereby determining whether the main switching chip 32 is available.

[0026] In this way, the main processor 31 can periodically obtain the status of the main switching chip 32 , thereby determining the status of the main forwarding control board 3 .

[0027] In a possible implementation, the standby switching chip 42 is configured to send second status indication information to the standby processor 41 , where the second status indication information is used to indicate whether the standby switching chip 42 is available.

[0028] The standby processor 41 obtains the status of the standby switch chip 42 through a bus connected to the standby switch chip 42 , thereby determining whether the standby switch chip 42 is available.

[0029] In this way, the standby processor 41 can periodically obtain the status of the standby switching chip 42 , thereby determining the status of the standby forwarding control board 4 .

[0030] In a possible implementation, the forwarding device further includes a service board 5 , which includes a service processor 51 . The service processor 51 is electrically connected to the active switching chip 32 and the standby switching chip 42 , respectively.

[0031] The service board 5 can be used to perform various auxiliary service processes related to message forwarding, for example, judging whether the message is offensive based on the length of the message, counting message traffic of different applications, and so on.

[0032] The service board 5 may further include a switch 23, which is respectively connected to the main processor 31, the main switching chip 32, the standby processor 41, the standby switching chip 42, and the service processor 51. The switch 23 is configured to selectively receive and process messages sent by the main switching chip 32 and the standby switching chip 42 based on the status (whether available) of the main processor 31, the main switching chip 32, the standby processor 41, and the standby switching chip 42.

[0033] In this way, the service board 5 performs various auxiliary service processing related to message forwarding, such as attack judgment, etc., thereby increasing the security of the forwarding device. The service board 5 can share the working pressure of the switching chip and improve the working reliability of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 is a structural diagram of a forwarding device provided by an embodiment of the present disclosure;

[0035] Figure 2 is a structural diagram of a forwarding device provided by an embodiment of the present disclosure;

[0036] Figure 3 is a structural diagram of a forwarding device provided by an embodiment of the present disclosure;

[0037] Figure 4 is a structural diagram of a forwarding device provided by an embodiment of the present disclosure;

[0038] Figure 5 is a structural diagram of a forwarding device provided by an embodiment of the present disclosure;

[0039] Figure 6 is a structural diagram of a forwarding device provided by an embodiment of the present disclosure;

[0040] Figure 7 This is a schematic diagram of a processing flow for upgrading a forwarding device provided by an embodiment of the present disclosure;

[0041] Figure 8 This is a schematic diagram of a processing flow for forwarding a message provided by an embodiment of the present disclosure;

[0042] Figure 9 This is a schematic diagram of a process flow for receiving a control plane message provided by an embodiment of the present disclosure;

[0043] Figure 10 This is a schematic diagram of a processing flow for sending a control plane message provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0044] To make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure are further described in detail below with reference to the accompanying drawings.

[0045] The embodiment of the present disclosure provides a forwarding device, such as Figure 1 As shown, the forwarding device includes a chassis 1, an interface board 2, an active forwarding control board 3, and a standby forwarding control board 4. The chassis 1 is connected to the interface board 2, the active forwarding control board 3, and the standby forwarding control board 4. The interface board 2 is electrically connected to the active forwarding control board 3 and the standby forwarding control board 4 through the chassis 1.

[0046] The following describes the components of the forwarding device:

[0047] Frame 1

[0048] The chassis 1 may include a housing and a circuit board secured therein. The circuit board has multiple slots for various types of boards. The chassis 1 is available in various models, each accommodating a different number of boards. For example, the chassis 1 in the embodiment of the present disclosure may accommodate at least one interface board 2, one active forwarding control board 3, and one standby forwarding control board 4.

[0049] Interface board 2

[0050] Interface board 2 is used to send and receive messages with other devices, performs physical and link layer processing, and switches between the active forwarding control board 3 and the standby forwarding control board 4 based on a specified switching mechanism. For example, interface board 2 can receive messages from other devices and send them to the active forwarding control board 3 and the standby forwarding control board 4. Interface board 2 can also receive messages from the active forwarding control board 3 or the standby forwarding control board 4 and send them to other devices. Interface board 2 can be of various types, such as a physical interface controller (PIC) or a line processing unit (LPU).

[0051] Active forwarding control board 3

[0052] The active forwarding control board 3 is responsible for executing message forwarding control logic. For example, it maintains the routing table and queries the routing table to determine the outgoing interface when forwarding messages. Another example is broadcasting routing information of the forwarding device. The active forwarding control board 3 and the standby forwarding control board 4 switch between them under a specified switching mechanism.

[0053] Backup forwarding control board 4

[0054] The standby forwarding control board 4 is responsible for executing message forwarding control logic. For example, it maintains the routing table, queries the routing table to determine the outgoing interface when forwarding messages, and broadcasts routing information of the forwarding device. The active forwarding control board 3 and the standby forwarding control board 4 switch between each other under a designated switching mechanism.

[0055] The active forwarding control board 3 and the standby forwarding control board 4 can synchronize information.

[0056] The embodiment of the present disclosure provides a forwarding device. Based on the above structure, the forwarding device may further include: Figure 2In the structural details shown, the interface board 2 includes multiple interfaces 21 and interface chips 22. The multiple interfaces 21 are electrically connected to the interface chips 22. The active forwarding control board 3 includes a main processor 31 and a main switching chip 32, which are electrically connected to each other. The standby forwarding control board 4 includes a standby processor 41 and a standby switching chip 42, which are electrically connected to each other. The interface chip 22 is electrically connected to the main switching chip 32 and the standby switching chip 42, respectively. This electrical connection can be achieved through the chassis 1.

[0057] The following describes the components of the forwarding device:

[0058] Interface 21

[0059] Interface 21 is used to send and receive messages with other devices. Multiple interfaces 21 can be installed on the interface board 2. These interfaces 21 can be of the same or different types, and different types of interfaces can have different transmission speeds. Interfaces of the same type can be grouped together to form multiple interface groups. For example, the interface board can have four interface groups, and the multiple interfaces 21 in each interface group can be as shown in Table 1. Depending on the transmission rate, the interface 21 can have multiple types. For example, the small form-factor pluggable optical module interface (SFP+) has one transceiver channel with a transmission rate of 10 Gbps; the small form-factor pluggable optical module interface (SFP28) is an enhanced version of SFP+ and supports a single-channel transmission rate of 25 Gbps; the quad small form-factor pluggable optical module interface (QSFP+) has four transceiver channels, each with a transmission rate of 10 Gbps; and the quad small form-factor pluggable optical module interface (QSFP28) has four transceiver channels, each with a transmission rate of 25 Gbps.

[0060] Table 1

[0061] Interface group number interface Interface Group 1 8 SFP+ Interface Group 2 4 SFP28 Interface Group 3 2 QSFP+ Interface Group 4 1 QSFP28 …… ……

[0062] Interface chip 22

[0063] The interface chip 22 is used to send messages from other devices received by multiple interfaces 21 to the active forwarding control board 3 and the standby forwarding control board 4, or to send messages from the active forwarding control board 3 and the standby forwarding control board 4 from the target interface among the multiple interfaces 21 to other devices.

[0064] Main processor 31

[0065] The main processor 31 can be used for control plane-related processing, such as establishing and updating routing tables and advertising routing information. The main processor 31 can also be used to detect the status of the main switching chip 32 to determine whether the main switching chip 32 is available. The main processor 31 can be a central processing unit (CPU) or a system-on-chip (SoC).

[0066] Main switching chip 32

[0067] The main switch chip 32, also known as the main local area network switch (LSW), is responsible for forwarding-plane processing, such as searching for outbound interfaces in routing tables and adding or removing path labels from packet headers. The main processor 31 obtains the status of the main switch chip 32 via a bus connected to the main switch chip 32 to determine whether the main switch chip 32 is available.

[0068] The master forwarding control board 3 may be provided with one or more master switching chips 32 .

[0069] In the case where there is one main switching chip 32 , the main processor 31 is electrically connected to the main switching chip 32 , and the main switching chip 32 is electrically connected to the interface chip 22 .

[0070] In the case where there are multiple main switching chips 32, the main switching chips 32 can be electrically connected to each other, and the main processor 31 can be connected to one of the multiple main switching chips 32 (referred to as the first main switching chip). The main processor 31 sends the message to be sent to the first main switching chip, and the first main switching chip is responsible for distributing processing tasks among the multiple main switching chips 32 based on a specified mechanism (such as polling, random, etc.). Alternatively, the main processor 31 can be connected to multiple main switching chips 32. In this connection mode, the main processor 31 distributes processing tasks (related to the processing of messages actively sent by the main processor 31) among the multiple main switching chips 32 according to the specified mechanism.

[0071] The main processor 31 can record whether multiple main switching chips 32 are available. For example, the main forwarding control board 3 has two main switching chips 32A and 32B. When the status flag is 1, it indicates that the switching chip is available, and when the status flag is 0, it indicates that the switching chip is unavailable. The main processor 31 can establish a correspondence table between the main switching chip identifiers and the status identifiers as shown in Table 2. When, in the correspondence recorded by the main processor 31, in certain scenarios, the status of multiple main switching chips 32 is all unavailable, it indicates that the main forwarding control board 3 is unavailable. In certain scenarios, when the status of any one of the multiple main switching chips 32 is unavailable, it indicates that the main forwarding control board 3 is unavailable.

[0072] Table 2

[0073] Main switch chip ID Status indicator 32A 1 32B 0 …… ……

[0074] The interface chip 22 can be connected to one of the multiple main switching chips 32 (i.e., the first main switching chip mentioned above). The interface chip 22 sends the message to be forwarded to the first main switching chip, which is responsible for distributing processing tasks among the multiple main switching chips 32 based on a specified mechanism (such as polling, random, etc.). Alternatively, the interface chip 22 can be connected to multiple main switching chips 32 respectively. In this connection mode, the interface chip 22 distributes processing tasks (related to processing of messages received from the outside) among the multiple main switching chips 32 according to the specified mechanism.

[0075] Backup processor 41

[0076] The backup processor 41 can be used for control plane-related processing, such as establishing and updating routing tables and advertising routing information. The main processor 31 can also be used to detect the status of the backup switching chip 42 to determine whether the main switching chip 32 is available. The backup processor 41 can be a central processing unit (CPU) or a system-on-chip (SoC).

[0077] Backup switching chip 42

[0078] The standby switching chip 42, also known as a standby LSW, is used for forwarding-plane related processing, such as searching for outbound interfaces in routing tables and adding or removing path labels from packet headers. The standby processor 41 obtains the status of the standby switching chip 42 via a bus connected to the standby switching chip 42 to determine whether the standby switching chip 42 is available.

[0079] The standby forwarding control board 4 may be provided with one or more standby switching chips 42 .

[0080] In the case where there is one standby switching chip 42 , the standby processor 41 is electrically connected to the standby switching chip 42 , and the standby switching chip 42 is electrically connected to the interface chip 22 .

[0081] In the case where there are multiple backup switching chips 42, the backup switching chips 42 can be electrically connected to each other, and the backup processor 41 can be connected to one of the multiple backup switching chips 42 (referred to as the first backup switching chip). The backup processor 41 sends the message to be forwarded to the first backup switching chip, which is responsible for distributing processing tasks among the multiple backup switching chips 42 based on a specified mechanism (such as polling, random, etc.). Alternatively, the backup processor 41 can be connected to multiple backup switching chips 42. In this connection mode, the backup processor 41 distributes processing tasks (related processing of messages actively sent by the main processor 31) among the multiple main switching chips 32 according to the specified mechanism.

[0082] The standby processor 41 can record whether multiple standby switching chips 42 are available. For example, if the standby forwarding control board 4 has two standby switching chips 42A and 42B, a status flag of 1 indicates that the switching chip is available, and a status flag of 0 indicates that the switching chip is unavailable. The standby processor 41 can establish a correspondence table between standby switching chip identifiers and status identifiers, as shown in Table 3. In certain scenarios, when the status of multiple standby switching chips 42 is all unavailable in the correspondence recorded by the standby processor 41, it indicates that the standby forwarding control board 4 is unavailable. In certain scenarios, when the status of any one of the multiple standby switching chips 42 is unavailable, it indicates that the standby forwarding control board 4 is unavailable.

[0083] Table 3

[0084] Standby switching chip ID Status indicator 42A 1 42B 0 …… ……

[0085] The interface chip 22 can be connected to one of the multiple backup switching chips 42 (i.e., the first backup switching chip mentioned above). The interface chip 22 sends the message to be forwarded to the first backup switching chip, and the first backup switching chip is responsible for distributing processing tasks among the multiple main switching chips 32 based on a specified mechanism (such as polling, random, etc.). Alternatively, the interface chip 22 can be connected to multiple backup switching chips 42 respectively. In this connection mode, the interface chip 22 distributes processing tasks (related to processing of messages received from the outside) among the multiple main switching chips 32 according to the specified mechanism.

[0086] The main processor 31 and the main switching chip 32 may also be integrated into one chip, and the standby processor 41 and the standby switching chip 42 may also be integrated into one chip.

[0087] The forwarding device may also include a service board 5, such as Figure 3 As shown, the service board 5 includes a service processor 51 , which is electrically connected to the main switching chip 32 and the backup switching chip 42 .

[0088] The service board 5 can be used to perform various auxiliary service processes related to message forwarding, for example, judging whether the message is offensive based on the length of the message, counting message traffic of different applications, and so on.

[0089] After receiving a message to be forwarded, the main switching chip 32 can determine whether the message needs to be sent to the service processor 51. This determination can be based on the service type carried in the message header. For example, messages of certain specified service types require specified service processing (such as aggressiveness identification). The specified service types here can be some or all service types. If the determination result is yes, the main switching chip 32 sends the message to the service processor 51. For certain types of service processing, the main switching chip 32 waits for feedback from the service processor 51 before deciding whether to forward the message based on the result. For certain types of service processing, the main switching chip 32 does not need to wait for feedback from the service processor 51 and can directly forward the message. For example, after receiving a message, the main switching chip 32 determines that the message needs to be identified as offensive and can send the message to the service processor 51. The service processor 51 identifies whether the message is offensive based on the packet length and feeds the result back to the main switching chip 32. If the result is that the message is not offensive, the main switching chip 32 performs subsequent processing on the message. If the result is that the message is offensive, the main switching chip 32 discards the message. For another example, after receiving a message, the main switching chip 32 determines that the message is a message required for traffic statistics of different applications and can send the message to the service processor 51. The service processor 51 determines which application the message comes from based on the information carried in the message header. This information can be the source address, destination address, or port number. The service processor 51 records the result. The main switching chip 32 and the backup switching chip 42 do not need to wait for the service processor 51 to feedback the result and can directly forward the message.

[0090] The processing logic of the backup switching chip 42 can be identical to that of the active switching chip 32. Based on the service type, the active switching chip 32 and the backup switching chip 42 can simultaneously send packets to the service processor 51. The service processor 51 can process each packet separately. For statistical services, the service processor 51 can avoid repeated statistics on the same packet.

[0091] In the embodiment of the present disclosure, Figure 4As shown, the interface board 2 may further include a switch 23, which is electrically connected to the interface chip 22, the main processor 31, the main switching chip 32, the standby processor 41, and the standby switching chip 42. The switch 23 is configured to selectively transmit messages sent by the main switching chip 32 and the standby switching chip 42 to the outside based on the status (whether available) of the main processor 31, the main switching chip 32, the standby processor 41, and the standby switching chip 42.

[0092] The interface board 2, the active forwarding control board 3, and the standby forwarding control board 4 can all be installed with logic chips. The switch 23 is connected to the logic chip on the interface board 2, the main processor 31 is connected to the logic chip on the active forwarding control board 3, and the standby processor 41 is connected to the logic chip on the standby forwarding control board 4. The logic chip on the interface board 2 is also connected to the logic chips on the active forwarding control board 3 and the standby forwarding control board 4, respectively. The first status indication signal of the main processor 31 is sent to the switch 23 via the active forwarding control board 3 and the logic chip on the interface board 2 for status reporting. The second status indication signal of the standby processor 41 is sent to the switch 23 via the standby forwarding control board 4 and the logic chip on the interface board 2 for status reporting.

[0093] The lines connecting the main switching chip 32 and the backup switching chip 42 to the interface chip 22 through the switch 23 are used for the main switching chip 32 and the backup switching chip 42 to send messages to the interface chip 22. The lines directly connecting the main switching chip 32 and the backup switching chip 42 to the interface chip 22 are used for the interface chip 22 to send messages to the main switching chip 32 and the backup switching chip 42.

[0094] Based on the above structure, the following introduces the relevant processing logic of each component.

[0095] (1) The main processor 31 and the backup processor 41 are responsible for reporting status to the switch 23. The corresponding processing is as follows:

[0096] The main processor 31 may report the status of the main processor 31 and the main switching chip 32 to the switch 23 , and may also receive the status of the main switching chip 32 .

[0097] The main processor 31 can send a first status indication signal to the switch 23, where the first status indication signal is used to indicate whether the main processor 31 and the main switching chip 32 are available. For example, when the first status indication signal has a first signal value, it indicates that both the main processor 31 and the main switching chip 32 are available (i.e., the main forwarding control board 3 is available); when the first status indication signal has a second signal value, it indicates that the main processor 31 and / or the main switching chip 32 are unavailable (i.e., the main forwarding control board 3 is unavailable). The first signal value can be a high level value, and the second signal value can be a low level value.

[0098] The standby processor 41 may report the status of the standby processor 41 and the standby switching chip 42 to the switch 23 , and may also receive the status of the standby switching chip 42 .

[0099] The standby processor 41 may send a second status indication signal to the switch 23, where the second status indication signal is used to indicate whether the standby processor 41 and the standby switching chip 42 are available. For example, when the second status indication signal has a third signal value, it indicates that both the standby processor 41 and the standby switching chip 42 are available (i.e., the standby forwarding control board 4 is available). When the second status indication signal has a fourth signal value, it indicates that the standby processor 41 and / or the standby switching chip 42 are unavailable (i.e., the standby forwarding control board 4 is unavailable). The third signal value may be a high level value, and the fourth signal value may be a low level value.

[0100] (2) The switching logic of the switch 23 may be as follows:

[0101] The switch 23 is configured to connect one of the primary switching chip 32 and the backup switching chip 42 to the interface chip 22 based on the first status indication signal and the second status indication signal. When receiving messages sent by the primary switching chip 32 or the backup switching chip 42, the switch 23 may select to receive messages sent by either the primary switching chip 32 or the backup switching chip 42. Only messages sent by the switching chip connected to the interface chip 22 can be successfully received by the interface chip 22.

[0102] When the first status indication signal indicates that the main processor 31 and the main switching chip 32 are both available (i.e., the main forwarding control board 3 is available), the main switching chip 32 is connected to the interface chip 22. When the first status indication signal indicates that the main processor 31 and / or the main switching chip 32 are unavailable (i.e., the main forwarding control board 3 is unavailable), and the second status indication signal indicates that the standby processor 41 and the standby switching chip 42 are both available (i.e., the standby forwarding control board 4 is available), the standby switching chip 42 is connected to the interface chip 22.

[0103] (3) The main processor 31 can obtain the status of the main switching chip 32, and the standby processor 41 can obtain the status of the standby switching chip 42. The corresponding processing is as follows:

[0104] The main switching chip 32 can send status indication information (whether the main switching chip 32 is available) to the main processor 31 , and the main switching chip 32 can also receive messages sent by the interface chip 22 and the service processor 51 .

[0105] The main processor 31 may periodically send a status acquisition notification to the main switching chip 32 , and the main switching chip 32 may send first status indication information to the main processor 31 , where the first status indication information is used to indicate whether the main switching chip 32 is available.

[0106] The standby switching chip 42 may send status indication information (whether the standby switching chip 42 is available) to the standby processor 41 , and the standby switching chip 42 may also receive messages sent by the interface chip 22 and the service processor 51 .

[0107] The standby processor 41 may periodically send a status acquisition notification to the standby switching chip 42 , and the standby switching chip 42 may send second status indication information to the standby processor 41 , where the second status indication information is used to indicate whether the standby switching chip 42 is available.

[0108] (4) Working mechanism of the main switching chip 32 and the standby switching chip 42:

[0109] The working mechanism of the main switching chip 32 and the backup switching chip 42 can be completely the same. They can have only one working mode, and do not need to set two working modes. The main and backup selection in the message forwarding process can be dominated by the switch 23.

[0110] (5) Working mechanism of the main processor 31 and the standby processor 41:

[0111] In the first approach, the main processor 31 and the backup processor 41 may adopt exactly the same working mechanism.

[0112] In the second mode, both the main processor 31 and the backup processor 41 are provided with two working modes, which can be referred to as a main working mode and a backup working mode.

[0113] The standby processor 41 may receive the first status indication signal, that is, may sense the status of the main processor 31 and the main switching chip 32 .

[0114] For the standby processor 41, when the first status indication signal indicates that both the main processor 31 and the main switching chip 32 are available (i.e., the active forwarding control board 3 is available), the standby processor 41 can be set to the standby working mode. When the first status indication signal indicates that the main processor 31 and / or the main switching chip 32 are unavailable (i.e., the active forwarding control board 3 is unavailable), and both the standby processor 41 and the standby switching chip 42 are available (i.e., the standby forwarding control board 4 is available), the standby processor 41 can be set to the active working mode.

[0115] For the main processor 31, when it detects that both the main processor 31 and the main switching chip 32 are available (i.e., the main forwarding control board 3 is available), the main processor 31 can set itself to the main working mode. When it detects that the main processor 31 and / or the main switching chip 32 are unavailable (i.e., the main forwarding control board 3 is unavailable), the main processor 31 can set itself to the backup working mode.

[0116] For the main processor 31 and the backup processor 41, in the main working mode, various control plane-related processes are performed normally. When the control plane data (such as the routing table) is updated, the control plane data is synchronized to the other party (the main processor 31 and the backup processor 41 are "each other"); in the backup working mode, various control plane-related processes are not performed (for example, the control plane message sent by the switching chip is discarded when received, the control plane message is not actively sent to the switching chip, etc.). In addition, when the control plane data sent by the other party is received, the control plane data of the own is synchronized and updated based on the received control plane data.

[0117] In addition, if Figure 5 As shown, the service board 5 may also include a switch 23, which is respectively connected to the main processor 31, the main switching chip 32, the standby processor 41, the standby switching chip 42, and the service processor 51. The main switching chip 32 can report the status of the main processor 31 and the main switching chip 32 to the switch 23 on the service board 5, and the standby processor 41 can report the status of the standby processor 41 and the standby switching chip 42 to the switch 23 on the service board 5. The switch 23 is used to selectively receive and process messages sent by the main switching chip 32 and the standby switching chip 42 based on the status (whether available) of the main processor 31, the main switching chip 32, the standby processor 41, and the standby switching chip 42. When both the main processor 31 and the main switching chip 32 are available (i.e., the active forwarding control board 3 is available), the main switching chip 32 is connected to the service processor 51. When the main processor 31 and / or the main switching chip 32 are unavailable (i.e., the active forwarding control board 3 is unavailable), and both the backup processor 41 and the backup switching chip 42 are available (i.e., the backup forwarding control board 4 is available), the backup switching chip 42 is connected to the service processor 51. The main switching chip 32 and the backup switching chip 42 send messages to the service processor 51 through the switch 23, and the service processor 51 feeds back the results to them through the direct connection lines between them.

[0118] In addition, if Figure 6 As shown, the active forwarding control board 3 may also be provided with multiple interfaces 21 and interface chips 22, and may also be provided with a switch 23. Accordingly, on the active forwarding control board 3, the connection method between the interfaces 21, interface chips 22, and switch 23 is the same as the connection method between the interfaces 21, interface chips 22, and switch 23 on the interface board 2. The standby forwarding control board 4 may also be provided with multiple interfaces 21 and interface chips 22, and may also be provided with a switch 23. Accordingly, on the standby forwarding control board 4, the connection method between the interfaces 21, interface chips 22, and switch 23 is the same as the connection method between the interfaces 21, interface chips 22, and switch 23 on the interface board 2.

[0119] Referring to the connection method of the main processor 31, the main switching chip 32, the interface chip 22 on the interface board 2, and the switch 23 (or the connection method of the standby processor 41, the standby switching chip 42, the interface chip 22 on the interface board 2, and the switch 23), the connection method of the following components is the same as this connection method:

[0120] The connection mode between the main processor 31, the main switching chip 32 and the interface chip 22 and the switch 23 on the main forwarding control board 3;

[0121] The connection mode between the main processor 31, the main switching chip 32 and the interface chip 22 and the switch 23 on the standby forwarding control board 4;

[0122] The connection between the standby processor 41, the standby switching chip 42 and the interface chip 22 and the switch 23 on the standby forwarding control board 4;

[0123] The connection mode of the standby processor 41, the standby switching chip 42 and the interface chip 22 and the switch 23 on the active forwarding control board 3.

[0124] The processing logic of the interface chip 22 and switch 23 on the active forwarding control board 3 and the standby forwarding control board 4 can be the same as the processing logic of the interface chip 22 and switch 23 on the interface board 2. The main processor 31 also reports status to the switch 23 on the active forwarding control board 3 and the standby forwarding control board 4, and the standby processor 41 also reports status to the switch 23 on the active forwarding control board 3 and the standby forwarding control board 4.

[0125] In the above structure, all interfaces 21 on the interface board 2, the active forwarding control board 3, and the standby forwarding control board 4 constitute the forwarding device's interface set. The forwarding device can receive packets through any interface 21 in the interface set, and can also send packets through any interface 21 in the interface set.

[0126] The circuit consisting of interface 21, interface chip 22, and switch 23 on active forwarding control board 3 is called the first interface circuit. The circuit consisting of interface 21, interface chip 22, and switch 23 on standby forwarding control board 4 is called the second interface circuit. In the forwarding device, the first interface circuit, the second interface circuit, and interface board 2 can be considered equivalent.

[0127] In the embodiment of the present disclosure, when the forwarding device is upgraded, the service processing of the forwarding device will not be affected. The process of upgrading the forwarding device can be as follows: Figure 7 As shown, the following steps are included:

[0128] 701, the administrator confirms to start forwarding device upgrade.

[0129] 702 , the forwarding device performs automatic pre-check processing to ensure that the forwarding device environment meets the upgrade requirements.

[0130] 703, the standby forwarding control board 4 enters the upgrade state and restarts.

[0131] The standby forwarding control board 4 backs up all service entries and operation data to the database. At this time, the active forwarding control board 3 and the standby forwarding control board 4 stop communicating.

[0132] 704 , after the upgrade of the standby forwarding control board 4 is completed, a notification is sent to the active forwarding control board 3 , and the active forwarding control board 3 enters the upgrade state and restarts.

[0133] After the upgrade of the standby forwarding control board 4 is completed, all service entries (control plane data) are restored from the database.

[0134] The active forwarding control board 3 backs up all service entries and operation data to the database. At this time, the active forwarding control board 3 and the standby forwarding control board 4 stop communicating.

[0135] The active forwarding control board 3 is unavailable, and the standby forwarding control board 4 is available. The switch 23 connects the standby switching chip 42 to the interface chip 22, and the standby processor 41 sets itself to the active working mode.

[0136] 705, the standby forwarding control board 4 checks whether the interface board 2 needs to be upgraded (can be determined by the firmware version). If the interface board 2 needs to be upgraded, the interface board 2 is notified to upgrade. If the interface board 2 does not need to be upgraded, the forwarding device upgrade is completed.

[0137] The forwarding device can receive the messages to be forwarded from other devices and send them to other devices. The forwarding process can be as follows: Figure 8 As shown, the following steps are included:

[0138] 801 , a first interface receives a message sent by another device, and the message is transmitted to the interface chip 22 through the first interface.

[0139] 802 , the interface chip 22 sends the message to the active switch chip 32 through a direct connection with the active switch chip 32 , and sends the message to the standby switch chip 42 through a direct connection with the standby switch chip 42 .

[0140] 803 , the main switching chip 32 performs forwarding-related processing on the message, determines that the outgoing interface of the message is the second interface, and sends the processed message and the identifier of the second interface to the interface chip 22 through the switch 23 .

[0141] Based on the actual forwarding processing logic, the processed message may be the same as the message before processing (for example, the forwarding processing logic simply looks up the routing table to determine the outgoing interface), or it may be different (for example, based on the forwarding processing logic, a path label is removed from the message header).

[0142] 804 , the standby switching chip 42 performs forwarding-related processing on the message, determines that the outgoing interface of the message is the second interface, and sends the processed message and the identifier of the second interface to the interface chip 22 through the switch 23 .

[0143] Based on the actual forwarding processing logic, the processed message may be the same as the message before processing (for example, the forwarding processing logic simply looks up the routing table to determine the outgoing interface), or it may be different (for example, based on the forwarding processing logic, a path label is removed from the message header).

[0144] The above steps 803 and 804 are performed separately, and there is no necessary time sequence relationship.

[0145] 805 , the switch 23 connects one of the active switching chip 32 and the standby switching chip 42 to the interface chip 22 based on the first status indication signal sent by the active switching chip 32 and the second status indication signal sent by the standby switching chip 42 .

[0146] When the first status indication signal indicates that both the main processor 31 and the main switching chip 32 are available, the switch 23 connects the main switching chip 32 and the interface board 2 , and the processed message sent by the main switching chip 32 can be sent to the interface chip 22 through the switch 23 .

[0147] When the first status indication signal indicates that the main processor 31 and / or the main switching chip 32 are unavailable, and the second status indication signal indicates that the standby processor 41 and the standby switching chip 42 are both available, the processed message sent by the standby switching chip 42 can be sent to the interface chip 22 through the switch 23.

[0148] 806 , the interface chip 22 sends the processed message through the second interface.

[0149] The forwarding device can receive control messages sent by other devices. The receiving process can be as follows: Figure 9 As shown, the following steps are included:

[0150] 901 , a first interface receives a control plane message sent by another device, and the first interface sends the control plane message to the interface chip 22 .

[0151] 902 , the interface chip 22 sends the control plane message to the active switch chip 32 through a direct connection with the active switch chip 32 , and sends the control plane message to the standby switch chip 42 through a direct connection with the standby switch chip 42 .

[0152] 903 , the main switching chip 32 sends the control plane message to the main processor 31 .

[0153] 904 , the main processor 31 processes the control plane message. If updated control plane data is generated locally after the processing, the main processor 31 synchronizes the updated control plane data to the standby processor 41 .

[0154] At this time, it is taken as an example that the main processor 31 is in the main working mode and the backup processor 41 is in the backup working mode.

[0155] 905 , the standby switching chip 42 sends the control message to the standby processor 41 .

[0156] 906 : The standby processor 41 discards the control message sent by the standby switching chip 42 .

[0157] The processing of steps 903-904 and the processing of steps 905-906 are performed separately, and there is no necessary time sequence relationship.

[0158] The forwarding device can send messages to other devices. For example, the main processor 31 stores the routing table of other devices and needs to send the routing table to other devices. The sending process can be as follows: Figure 10 As shown, the following steps are included:

[0159] 1001 , the main processor 31 generates a control plane message to be sent, and sends the control plane message to the main switching chip 32 .

[0160] Currently, the main processor 31 is in the active working mode, and the standby processor 41 is in the standby working mode and does not perform similar processing.

[0161] 1002 , the main switching chip 32 performs sending-related processing on the control plane message, determines the outgoing interface of the control plane message, and sends the control plane message and the identifier of the outgoing interface to the interface chip 22 through the switch 23 .

[0162] 1003 , the interface chip 22 sends the received control plane message through the outgoing interface.

[0163] The terms used in the embodiments of the present disclosure are only used to explain the embodiments of the present disclosure and are not intended to limit the present disclosure. Unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should have the ordinary meaning understood by people with ordinary skills in the field to which the present disclosure belongs. The words "first", "second" and similar terms used in this disclosure specification and claims do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "a" do not indicate a quantitative limitation, but rather indicate the presence of at least one. Words such as "include" or "comprising" mean that the elements or objects appearing before "include" or "comprising" include the elements or objects listed after "include" or "comprising" and their equivalents, and do not exclude other elements or objects. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly. "Multiple" refers to two or more, unless otherwise clearly defined.

[0164] The above descriptions are merely optional embodiments of the present disclosure and are not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the principles of the present disclosure shall be included in the scope of protection of the present disclosure.

Claims

1. A forwarding device, characterized in that: The forwarding device comprises a frame (1), an interface board (2), a main forwarding control board (3) and a standby forwarding control board (4); The frame (1) is respectively connected to the interface board (2), the main forwarding control board (3) and the standby forwarding control board (4); The interface board (2) is electrically connected to the active forwarding control board (3) and the standby forwarding control board (4) respectively through the frame (1); the interface board (2) is used to send and receive messages with other devices, and is used to switch the active forwarding control board (3) and the standby forwarding control board (4) based on a specified switching mechanism; The active forwarding control board (3) and the standby forwarding control board (4) are both used to execute message forwarding control logic, and the active forwarding control board (3) and the standby forwarding control board (4) are switched with each other under the designated switching mechanism.

2. The forwarding device according to claim 1, characterized in that The main forwarding control board (3) includes a main processor (31) and a main switching chip (32) electrically connected to each other, and the main switching chip (32) is electrically connected to the interface board (2); The standby forwarding control board (4) comprises a standby processor (41) and a standby switching chip (42) electrically connected to each other, and the standby switching chip (42) is electrically connected to the interface board (2).

3. The forwarding device according to claim 2, characterized in that The interface board (2) comprises a plurality of interfaces (21) and an interface chip (22); the plurality of interfaces (21) are electrically connected to the interface chip (22) respectively; and the interface chip (22) is electrically connected to the main switching chip (32) and the standby switching chip (42) respectively.

4. The forwarding device according to claim 3, characterized in that The interface board (2) further comprises a switch (23), wherein the switch (23) is electrically connected to the interface chip (22), the main processor (31), the main switching chip (32), the standby processor (41), and the standby switching chip (42) respectively; The main processor (31) is used to send a first status indication signal to the switch (23), wherein the first status indication signal is used to indicate whether the main processor (31) and the main switching chip (32) are available; The standby processor (41) is used to send a second status indication signal to the switch (23), wherein the second status indication signal is used to indicate whether the standby processor (41) and the standby switching chip (42) are available; The interface chip (22) is used to send a message received by any interface to the main switching chip (32) and the standby switching chip (42) respectively for processing through electrical connection with the main switching chip (32) and the standby switching chip (42); The switch (23) is used to connect one of the main switching chip (32) and the standby switching chip (42) to the interface chip (22) based on the first status indication signal and the second status indication signal.

5. The forwarding device according to claim 4, characterized in that The switch (23) is used to: When the first status indication signal indicates that both the main processor (31) and the main switching chip (32) are available, connecting the main switching chip (32) to the interface chip (22); When the first status indication signal indicates that the main processor (31) and / or the main switching chip (32) are unavailable, and the second status indication signal indicates that both the standby processor (41) and the standby switching chip (42) are available, the standby switching chip (42) is connected to the interface chip (22).

6. The forwarding device according to claim 4 or 5, characterized in that: When the first state indication signal is a first signal value, it indicates that both the main processor (31) and the main switching chip (32) are available; When the first status indication signal is a second signal value, it indicates that the main processor (31) and / or the main switching chip (32) is unavailable; When the second state indication signal is a third signal value, it indicates that both the standby processor (41) and the standby switching chip (42) are available; When the second status indication signal is a fourth signal value, it indicates that the standby processor (41) and / or the standby switching chip (42) is unavailable.

7. The forwarding device according to claim 6, characterized in that: The first signal value and the third signal value are continuous high level values, and the second signal value and the fourth signal value are continuous low level values.

8. The forwarding device according to any one of claims 4 to 7, characterized in that: The main switching chip (32) is used to send first status indication information to the main processor (31), wherein the first status indication information is used to indicate whether the main switching chip (32) is available.

9. The forwarding device according to any one of claims 4 to 8, characterized in that: The standby switching chip (42) is used to send second status indication information to the standby processor (41), wherein the second status indication information is used to indicate whether the standby switching chip (42) is available.

10. The forwarding device according to any one of claims 2 to 9, characterized in that: The forwarding device further comprises a service board (5), the service board (5) comprises a service processor (51), and the service processor (51) is electrically connected to the main switching chip (32) and the standby switching chip (42) respectively.

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