Inertial navigation high-frequency data long-term storage method based on domestic ARM chip

Abstract

The invention relates to a domestic ARM chip-based inertial navigation high-frequency data long-term storage method, which comprises the following steps of: periodically judging a DMA (Direct Memory Access) double-buffer channel data receiving mark in real time in a highest priority data storage task of a system by configuring and transplanting an exFAT (Extensible File Allocation Table) file system and a FreeRTOS (Real-time Operating System); writing the received inertial navigation high-frequency data into a file in the SD card configured to be in an exFAT format, and if the mark is invalid, releasing CPU resources by the storage task to wait for entering next time; meanwhile, redundant operation is provided, the write-in return state of the data file of the SD card is judged in real time, if the write-in is not successful, the write-in operation is repeated for multiple times until the write-in is successful, and the task is quitted, so that the risk of data storage loss is reduced. According to the invention, the 24-hour data volume under the frequency of 1000Hz is greater than 4GB, the continuous storage time is greater than 2000 hours, and all data are completely stored in the SD card, so that the method is suitable for the long-term storage requirement of the inertial navigation field on high-frequency data, and the application and development of the localization technology in high-frequency data processing are promoted.

Description

Technical Field

[0001] This invention belongs to the field of embedded basic software platform technology, and in particular to a method for long-term storage of high-frequency data for inertial navigation based on domestically produced ARM chips. Background Technology

[0002] In today's era of rapid technological advancement, inertial navigation systems (INS) are a core component in many critical fields, widely used in aerospace, military defense, intelligent navigation and control, and other key industries. The high-frequency, massive amounts of data generated during their operation are of immeasurable value for system performance evaluation, fault diagnosis, and subsequent data analysis and backtracking. However, achieving long-term stable storage (continuous storage time greater than 2000 hours) of high-frequency data (1000Hz frequency, 24-hour data volume greater than 4GB) faces numerous technical challenges, often resulting in low storage efficiency, high risk of data loss, and complex storage management. Especially in the application environment of domestically produced ARM processors, overcoming issues such as storage efficiency, data integrity, and management complexity has become a key focus of current research and practice. Summary of the Invention

[0003] The purpose of this invention is to overcome the shortcomings of existing technologies and propose a long-term storage method for high-frequency data in inertial navigation based on a domestically produced ARM chip. By utilizing a domestically produced ARM chip (GD32F4XX) to receive serial interface data, this method achieves complete storage of over 4GB of data per 24 hours at a frequency of 1000Hz, with a continuous storage time exceeding 2000 hours, all within an SD card. Through optimized serial data management, the adoption of the FreeRTOS real-time operating system, the exFAT file system, and DMA (Direct Memory Access Controller) dual-caching technology, data storage efficiency and reliability are improved. This method addresses problems such as low storage efficiency, high risk of data loss, and complex storage management encountered in real-world engineering practices. The strategy includes key steps such as data reception and caching, file system adaptation and optimization, efficient DMA transfer and management, reasonable scheduling of the FreeRTOS real-time operating system, and multi-level fault diagnosis and recovery. It is applicable to the long-term storage needs of high-frequency data in the field of inertial navigation and promotes the application and development of domestically produced technologies in high-frequency data processing.

[0004] The technical problem solved by this invention is achieved through the following technical solution: A method for long-term storage of high-frequency data in inertial navigation based on domestically produced ARM chips includes the following steps: Step 1: Configure the ARM chip and power it on, run the program, and start the system tasks on the ARM chip; Step 2: In the highest priority data storage task, periodically check the DMA double buffer channel data reception flag in real time. If the flag is valid, proceed to step 3; if the flag is invalid, proceed to step 6. Step 3: Write the received inertial navigation high-frequency data to a file configured as exFAT format on an SD card; Step 4: Use redundant operations to judge the return status of SD card data file writing in real time. If the writing is unsuccessful, return to step 3; if the writing is successful, the process ends. Step 5: Repeat steps 2 to 4 periodically to achieve long-term storage of high-frequency inertial navigation data; Step 6: The storage task releases CPU resources and waits for the next entry before ending.

[0005] Furthermore, step 1 includes the following steps: Step 1.1: Set the data size and transmission rate of the serial communication interface, and initialize the serial interface baud rate. Step 1.2: Configure the exFAT file system based on the ARM chip; Step 1.3: Enable the DMA channel of the ARM chip and configure the DMA to serial data reception double-buffered mode; Step 1.4: Port the FreeRTOS real-time operating system based on the ARM chip, create a system task allocation task stack, and configure the data storage task to the highest priority level of the system.

[0006] Moreover, the ARM chip used in step 1 is the GD32F4XX ARM chip.

[0007] Furthermore, the specific implementation method of the redundant operation in step 4 is as follows: use the return status of the SD card data file write to determine in real time whether the storage operation is successful. If the write is unsuccessful, repeat the write operation multiple times until the write is successful and then exit the task.

[0008] Furthermore, the specific implementation method of configuring DMA as a serial data reception double-buffered mode in step 1.3 is as follows: configure two independent memory buffer storage areas, namely memory 0 and memory 1. During the working phase, DMA writes high-frequency data of the serial communication interface directly to memory 0 without CPU processing. After memory 0 is full, it gives a full memory 0 flag and automatically switches to memory 1 to receive data without manual intervention. After memory 1 is full, it gives a full memory 1 flag and automatically switches to memory 0 to receive data, and repeats the operation.

[0009] Furthermore, the specific implementation method for porting the FreeRTOS real-time operating system in step 1.4 is as follows: create a system task allocation task stack, configure the data storage task as the highest priority level of the system, and use FreeRTOS to store data using a preemptive scheduling method.

[0010] The advantages and positive effects of this invention are: 1. This invention configures an ARM chip, powers it on, runs a program, and initiates system tasks on the ARM chip. In the highest-priority data storage task, it periodically checks the DMA dual-buffer channel data reception flag in real time. If the flag is valid, the received inertial navigation high-frequency data is written to a file configured in exFAT format on an SD card. If the flag is invalid, the storage task releases CPU resources and waits for the next entry. Simultaneously, it provides redundant operations, checking the SD card data file write return status in real time. If the write fails, the write operation is repeated multiple times until successful, at which point the task exits, reducing the risk of data loss. This invention achieves complete storage of all data (greater than 4GB in 24 hours at 1000Hz frequency and more than 2000 hours of continuous storage) on an SD card. It is suitable for the long-term storage needs of high-frequency data in the inertial navigation field and promotes the application and development of domestic technology in high-frequency data processing.

[0011] 2. This invention is based on porting the exFAT file system to a domestically produced ARM (GD32F4XX) chip. The exFAT file system has the advantages of overcoming partition limitations, high storage space management efficiency, optimized file system structure, and fast data storage speed. It overcomes the disadvantages of the FAT32 file system, such as the maximum storage size of a single file of 4GB, long file management time, and slow storage speed, thereby improving the system's file management efficiency, reducing data storage time, and reducing the risk of data loss.

[0012] 3. This invention applies the ARM chip DMA (Direct Memory Access Controller) serial data reception double-buffered mode management technology, which uses hardware to transfer data between peripherals and memory without the need for CPU intervention. This avoids the CPU entering interrupts multiple times to perform large-scale data copying, reduces CPU time, and improves the overall system storage performance and reliability. 4. This invention realizes the domestic porting of the FreeRTOS real-time operating system to ARM (GD32F4XX) systems. FreeRTOS, as an embedded real-time operating system kernel, dominates the controller field, providing reliable and accurate real-time performance for embedded applications while maintaining extreme lightweightness and high configurability. FreeRTOS employs a preemptive scheduling method, featuring low interrupt latency and strong real-time performance, ensuring the real-time performance and reliability of data reception and storage. This invention employs multi-level fault diagnosis and recovery technology to reduce the risk of data loss and improve system reliability. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of the system architecture of the present invention; Figure 2 This is a schematic diagram of the DMA dual-buffer process of the present invention; Figure 3 This is a system flowchart of the present invention; Figure 4 This is an experimental verification diagram of the present invention. Detailed Implementation

[0014] The present invention will be further described in detail below with reference to the accompanying drawings.

[0015] Methods for long-term storage of high-frequency data in inertial navigation based on domestically produced ARM chips, such as... Figure 3 As shown, it includes the following steps: Step 1: Configure the ARM chip and power it on, run the program, and start the system tasks on the ARM chip.

[0016] This invention uses the GD32F4XX ARM chip. It boasts advantages such as low power consumption, rich interfaces, strong computing power, and independent controllability, leading to a significant increase in its application as a system CPU in the field of inertial navigation.

[0017] Step 1.1: Set the data size and transmission rate of the serial communication interface, and initialize the serial interface baud rate.

[0018] like Figure 1As shown, the ARM chip receives system data via serial communication. Based on the requirement of over 4GB of data in 24 hours at 1000Hz, the data scale and transmission rate of the serial communication interface should be rationally planned. From the technical requirement of over 4GB of data in 24 hours at 1000Hz, it can be calculated that the number of bytes transmitted per millisecond should be no less than 50 bytes. According to the serial communication specification, to ensure stable and reliable communication, the serial communication load rate should ideally be controlled within 80% of the entire transmission cycle. To reduce the system data transmission time, the maximum serial communication baud rate of 921600bps, 1 start bit, and 1 stop bit are selected as the system transmission rate. The time required to transmit 50 bytes per millisecond is calculated to be approximately 0.54ms, with a communication load rate of approximately 54%, less than 80%. When the communication load rate is 80%, the number of bytes transmitted per millisecond is 73 bytes. As the above analysis shows, to ensure that the 24-hour data volume exceeds the technical requirement of 4GB at a frequency of 1000Hz, a transmission rate of 921600bps is selected according to the serial communication standard. Transmitting 50-73 bytes per millisecond is sufficient to meet the communication requirements. Considering the actual data usage needs of the system, a transmission rate of 60 bytes per millisecond is selected. The transmission time is approximately 0.65ms, the communication load rate is approximately 0.65% (less than 80%), and the total data volume in 24 hours is approximately 5GB. This meets the technical requirements while ensuring efficient, stable, and reliable data transmission.

[0019] Step 1.2: Configure the exFAT file system based on the ARM chip.

[0020] Storing received data into an SD card data file for an extended period necessitates SD card interface configuration and file system application. The ARM chip's SDIO (Secure Digital Input / Output Interface) defines the connection method between the SD memory card and the ARM, providing a data transfer path between the system bus and the SD memory card device. Simultaneously, the ARM needs to create a file system on the SD card to store system data. Since long-term stable storage of high-frequency data (1000Hz frequency, 24-hour data volume greater than 4GB) is required (continuous storage time greater than 2000 hours), file system performance and reliability are key factors in meeting these technical requirements.

[0021] Currently, the vast majority of file systems used in ARM applications are FAT32. FAT32 has been widely used for decades and is characterized by its maturity, stability, strong compatibility, simple implementation, small code size, and low memory consumption. However, FAT32 has a file size limit; a single file cannot exceed 4GB, making it unsuitable for large data file processing. In terms of performance, FAT32 requires frequent updates to the FAT table for file writing, significantly reducing file write speed. Furthermore, FAT32 is more prone to file fragmentation. As usage time increases, the number of files and fragments gradually increases, significantly reducing file system read and write performance. Therefore, regular file and fragment cleanup and maintenance are necessary, which is detrimental to working conditions and scenarios requiring continuous long-term operation. The exFAT file system breaks through the file and partition size limitations, theoretically allowing a maximum file size of up to 16EB, fully meeting the needs of modern ultra-large file storage. In terms of performance, exFAT optimizes the performance of large files and large partitions, using cluster bitmaps instead of the FAT table, reducing the frequency of FAT table updates, saving CPU time, and improving system data storage speed. A comparison of the characteristics of FAT32 and exFAT file systems is shown in Table 1. As can be seen from the comparison, although porting the exFAT file system to ARM chips is a brand-new embedded platform technology, this technology is suitable for long-term stable storage (continuous storage time greater than 2000 hours) of high-frequency data (1000Hz frequency, 24-hour data volume greater than 4GB) working scenarios.

[0022] Table 1 Comparison of File System Features

[0023] Step 1.3: Enable the DMA (Direct Memory Access Controller) channel of the ARM chip and configure the DMA to serial data reception double-buffered mode.

[0024] ARM chips directly receive data via serial port and write it to an SD card, consuming significant time and resources from the ARM (CPU) chip. Experiments have shown that this method cannot meet the technical requirements of storing high-frequency data (1000Hz) and 24-hour data volumes exceeding 4GB. ARM chips provide a DMA (Direct Memory Access Controller) interface, using hardware to transfer data between peripherals and memory without CPU intervention. This avoids multiple CPU interrupts for large-scale data copying operations, reducing CPU resource usage. ARM chip DMA has multiple operating modes, including circular buffering and double buffering. The double buffering mode works by configuring two independent memory buffer storage areas (Memory 0 and Memory 1). During operation, the DMA writes high-frequency data from the serial communication interface directly to Memory 0 without CPU processing. When Memory 0 is full, a full flag is displayed, and the system automatically switches to Memory 1 to receive data without manual intervention. Similarly, when Memory 1 is full, a full flag is displayed, and the system automatically switches back to Memory 0. This cycle repeats continuously. A schematic diagram of the DMA double buffering mode is shown below. Figure 2 As shown, after calculation, two 24kB buffer spaces were selected for use as memory 0 and memory 1 to receive high-frequency data. Since high-frequency data is received via DMA memory without going through the CPU, it does not occupy CPU resources. At this time, the CPU only needs to check the full flags of the two memory spaces and write the received data to the SD card file during the time interval of receiving high-frequency data in the memory. According to the design of the serial data management section, 60 bytes are transmitted every millisecond, and it takes about 410 milliseconds to fill the 24KB buffer space. Since DMA data reception does not occupy CPU resources, as long as the time for ARM to store data to the SD card does not exceed 410 milliseconds, the system can be guaranteed to operate safely, reliably and stably. Through the above analysis, by using DMA double buffer technology to receive high-frequency inertial navigation data, a continuous and seamless connection of high-speed data streams is achieved, the bus idle time during data reception is reduced, software overhead is eliminated, CPU load and time latency are significantly reduced, the overall system efficiency is improved, and the system storage performance and reliability are guaranteed.

[0025] Step 1.4: Port the FreeRTOS real-time operating system based on the ARM chip, create a system task allocation task stack, and configure the data storage task to the highest priority level of the system.

[0026] FreeRTOS (Free Real-Time Operating System) is an open-source, customizable, and highly portable real-time operating system kernel designed specifically for embedded microcontrollers. Its core design philosophy is simplicity, efficiency, and reliability, making it a dominant force in the embedded systems field. FreeRTOS features a preemptive, priority-based scheduler, low interrupt latency, and an efficient interrupt handling model, improving system response speed and providing a reliable operating environment for scenarios with strict time constraints. This project ports FreeRTOS to a domestically produced ARM chip, creating a system task allocation stack and configuring data storage tasks as the highest priority. Leveraging FreeRTOS's preemptive scheduling, low interrupt latency, and strong real-time performance, it ensures stable and reliable real-time data reception and storage, achieving the design requirement of data storage time less than 410 milliseconds.

[0027] Step 2: In the highest priority data storage task, periodically (every 10ms) check the DMA dual-buffer channel data reception flag. If the flag is valid, proceed to step 3; if the flag is invalid, proceed to step 6.

[0028] Step 3: Write the received inertial navigation high-frequency data to a file on an SD card configured in exFAT format.

[0029] Step 4: Use redundant operations to check the return status of SD card data file writing in real time. If the writing is unsuccessful, return to step 3; if the writing is successful, the process ends.

[0030] Through the technical analysis and operation in steps 1-3, while largely ensuring that all data is stored intact on the SD card for 24 hours at a frequency of 1000Hz and a continuous storage time of more than 2000 hours, to improve system reliability, the software side, through analysis, can adopt multi-level fault diagnosis and recovery techniques to reduce the risk of data loss. Specifically, this involves providing redundant operations for data storage, rationally utilizing the SD card data file write return status through technical means, and judging in real time whether the storage operation is successful. If the write is unsuccessful, the write operation is repeated multiple times until the write is successful and then the task is exited, greatly reducing the risk of data loss.

[0031] Step 5: Repeat steps 2 to 4 periodically to achieve long-term storage of high-frequency inertial navigation data.

[0032] Step 6: The storage task releases CPU resources and waits for the next entry before ending.

[0033] Based on the aforementioned method for long-term storage of high-frequency data in inertial navigation using domestically produced ARM chips, software design and system construction were carried out. The system's data storage consumption time was monitored in real time. Tests were conducted, and approximately 200 hours of data were extracted, yielding the following results: Figure 4 As shown, the horizontal axis represents the data acquisition time in seconds, and the vertical axis represents the data storage time in seconds. Although the data storage time fluctuates at different times, the maximum is less than 0.15 seconds, or less than 150 milliseconds, which is far less than the 410 milliseconds design requirement of the DMA double buffer section. Simultaneously, the acquired and stored data was copied to a computer to verify the storage results, and no data loss was detected. Therefore, the above technical methods are verified to be effective and feasible, achieving the design requirement of long-term stable storage (continuous storage time greater than 2000 hours) of high-frequency data (1000Hz frequency, 24-hour data volume greater than 4GB) in the field of inertial navigation.

[0034] It should be emphasized that the embodiments described in this invention are illustrative rather than limiting. Therefore, this invention includes, but is not limited to, the embodiments described in the specific implementation. Any other implementations derived by those skilled in the art based on the technical solutions of this invention are also within the scope of protection of this invention.

Claims

1. A method for long-term storage of high-frequency data in inertial navigation based on domestically produced ARM chips, characterized in that: Includes the following steps: Step 1: Configure the ARM chip and power it on, run the program, and start the system tasks on the ARM chip; Step 2: In the highest priority data storage task, periodically check the DMA double buffer channel data reception flag in real time. If the flag is valid, proceed to step 3; if the flag is invalid, proceed to step 6. Step 3: Write the received inertial navigation high-frequency data to a file configured as exFAT format on an SD card; Step 4: Use redundant operations to judge the return status of SD card data file writing in real time. If the writing is unsuccessful, return to step 3; if the writing is successful, the process ends. Step 5: Repeat steps 2 to 4 periodically to achieve long-term storage of high-frequency inertial navigation data; Step 6: The storage task releases CPU resources and waits for the next entry before ending.

2. The method for long-term storage of high-frequency data in inertial navigation based on a domestically produced ARM chip according to claim 1, characterized in that: Step 1 includes the following steps: Step 1.1: Set the data size and transmission rate of the serial communication interface, and initialize the serial interface baud rate. Step 1.2: Configure the exFAT file system based on the ARM chip; Step 1.3: Enable the DMA channel of the ARM chip and configure the DMA to serial data reception double-buffered mode; Step 1.4: Port the FreeRTOS real-time operating system based on the ARM chip, create a system task allocation task stack, and configure the data storage task to the highest priority level of the system.

3. The method for long-term storage of high-frequency data in inertial navigation based on a domestically produced ARM chip according to claim 1, characterized in that: In step 1, the ARM chip used is the GD32F4XX ARM chip.

4. The method for long-term storage of high-frequency data in inertial navigation based on a domestically produced ARM chip according to claim 1, characterized in that: The specific implementation method of the redundant operation in step 4 is as follows: use the SD card data file write return status to determine whether the storage operation is successful in real time. If the write is unsuccessful, repeat the write operation multiple times until the write is successful and then exit the task.

5. The method for long-term storage of high-frequency data in inertial navigation based on a domestically produced ARM chip according to claim 2, characterized in that: The specific implementation method of configuring DMA as a serial data reception double-buffered mode in step 1.3 is as follows: Configure two independent memory buffer storage areas, namely memory 0 and memory 1. During the working stage, DMA writes high-frequency data of serial communication interface directly to memory 0 without CPU processing. After memory 0 is full, a full memory 0 flag is given and the system automatically switches to memory 1 to receive data without manual intervention. After memory 1 is full, a full memory 1 flag is given and the system automatically switches back to memory 0 to receive data. This cycle repeats.

6. The method for long-term storage of high-frequency data in inertial navigation based on a domestically produced ARM chip according to claim 2, characterized in that: The specific implementation method for porting the FreeRTOS real-time operating system in step 1.4 is as follows: create a system task allocation task stack, configure the data storage task as the highest priority level of the system, and use FreeRTOS to store data using a preemptive scheduling method.

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